Asynchronous communication LED cache display control method, system and device and medium

Abstract

The invention belongs to the technical field of LED display, and provides an asynchronous communication LED cache display control method, system and device and a medium, a main control end sends display line information and cache display gray information corresponding to the next line to a display end at intervals in an asynchronous communication mode; the display end transmits row display information to the display control module and the counter module, transmits cache row information corresponding to the current row display information to the row cache module, and transmits cache display gray information to the gray conversion module; the counter module records the number of interval clocks of adjacent display line information, and the gray level conversion module calculates an actual display gray level value based on an actual maximum display gray level value; the line cache module stores an actual display gray value according to a cache line number remainder result; the display control module controls the corresponding row switches to be switched on, and whole frame display is completed in a row-by-row circulation mode. According to the method, the cache data volume is greatly reduced, the asynchronous communication synchronization problem is solved, the display effect is guaranteed, and the compatibility is high.

Description

Technical Field

[0001] This invention belongs to the field of LED display technology, specifically relating to an asynchronous communication LED buffer display control method, system, device, and medium. Background Technology

[0002] LED display technology, with its advantages of high brightness, high contrast, low power consumption, and fast response, is widely used in various electronic devices such as televisions, mobile phones, and LED screens. As the LED display field continues to mature, market demands for cost control are becoming increasingly stringent, requiring the minimization of display costs while maintaining appropriate display quality.

[0003] In traditional LED matrix displays, data is displayed line by line, showing the first line first, then the second. For example... Figure 2 As shown, for example, if you need to control the light 21 to light up, you need to control GRID2 to be low and SEG1 to be high. This means controlling both to be on at the same time, making GRIDx low voltage and SEGx high voltage, so that a voltage difference is formed for the LED, and the LED can light up.

[0004] To control the illumination of lights 51, 52, 53, 54, 55, 56, 57, and 58, GRID5 and SEG1, SEG2, SEG3, SEG4, SEG5, SEG6, SEG7, and SEG8 need to be turned on. Furthermore, to control the brightness of each light, the timing of each SEG's activation must be different, meaning each SEG has its own control data.

[0005] To display a complete frame, all data for one frame needs to be cached. For example... Figure 3 As shown, to display a 20×20, 8-bit grayscale image, 20×20×8=3200 bits of data need to be cached. This type of data usually relies on SRAM for storage, but the use of SRAM will significantly increase the chip area—the area of ​​a single SRAM cache may be equivalent to the area of ​​the entire digital control section, directly leading to increased costs.

[0006] Meanwhile, most consumer applications use asynchronous communication protocols such as IIC to transmit data. However, asynchronous communication has an inherent problem of asynchronous display and data transmission: the display end cannot know which line of data the communication end is currently sending, and the communication end is also unaware of which line the display end is currently displaying. This can easily lead to display confusion such as "the display end is waiting to display the third line, but the communication end is sending the seventh line of data", which seriously affects the display effect.

[0007] Therefore, there is an urgent need for an LED display control solution that can reduce data buffer size, shrink chip area, and solve asynchronous communication synchronization problems while ensuring display quality. Summary of the Invention

[0008] The purpose of this invention is to overcome the existing defects and provide an asynchronous communication LED buffer display control method, system, device and medium.

[0009] To solve the above-mentioned technical problems, the present invention provides the following technical solution: The first objective of this invention is to provide an asynchronous communication LED buffer display control method, comprising the following steps: (1) The main control terminal sends the display line information and the corresponding cached grayscale information of the next line to the display terminal at preset intervals via asynchronous communication; (2) After receiving the data, the display end parses and distinguishes between the line display information and the cached display grayscale information, transmits the line display information to the display control module and the counter module, transmits the cached line information corresponding to the current line display information to the line cache module, and transmits the cached display grayscale information to the grayscale conversion module; (3) The counter module records the number of clock intervals between adjacent display lines, obtains and stores the actual maximum display grayscale value, and the grayscale conversion module calculates the actual display grayscale value based on the actual maximum display grayscale value; (4) The row cache module stores the actual grayscale value by taking the remainder of the cache row number through a two-row cache structure; (5) The display control module controls the corresponding row switch to be turned on, and controls the conduction time of the column switch in combination with the actual display gray value, and completes the display of the whole frame in a row-by-row loop.

[0010] Furthermore, in step (1), the asynchronous communication adopts the IIC communication protocol, and the data transmission order is to first send the current display line information, and then send the cached grayscale information of the corresponding next line.

[0011] Furthermore, in step (3), the counter module operates as follows: When the first line of display information is received, the counter starts counting. When the second line of display signal is received, the count value is saved as the actual maximum display grayscale value. The counter is reset to zero and starts counting again. When the next line of display information is received, the saved actual maximum display grayscale value is updated with the new count value.

[0012] Furthermore, in step (3), the actual grayscale value is calculated as follows: G = X * (Z / Y) Where G is the actual displayed grayscale value, X is the cached displayed grayscale information, Y is the maximum displayed grayscale value, and Z is the actual maximum displayed grayscale value.

[0013] Another objective of this invention is to provide an asynchronous communication LED buffer display control system, comprising a main control terminal and a display terminal, wherein the main control terminal and the display terminal establish a data transmission connection through an asynchronous communication protocol to realize the execution of the asynchronous communication LED buffer display control method provided by the first objective of this invention.

[0014] Furthermore, the main control terminal includes: The timer module is used to provide timing functions for information transmission from the main control terminal; The IIC data sending module is used to load and send display line information and cached display grayscale information.

[0015] Furthermore, the display terminal includes: The IIC data receiving module is used to receive data sent by the master control terminal and forward the received data to the data parsing module; The data parsing module is used to parse the received data, distinguish between the line display information and the cached display grayscale information, transmit the line display information to the display control module and the counter module, transmit the cached line information corresponding to the current line display information to the line cache module, and transmit the cached display grayscale information to the grayscale conversion module. The counter module is used to record the number of clock cycles between adjacent display rows, obtain the actual maximum display grayscale value, and store it. The grayscale conversion module is used to calculate the actual display grayscale value based on the actual maximum display grayscale value; The row cache module is used to store the actual display grayscale value output by the grayscale conversion module according to the remainder result of the cache row number, using a two-row cache structure. The display control module controls the conduction of the corresponding row switches and controls the conduction duration of the column switches in combination with the actual displayed grayscale value, completing the display of the entire frame row by row in a loop.

[0016] Furthermore, the counter module includes a counter and a buffer. When the display line information is received, the buffer stores the current value of the counter, while the counter is reset to zero and starts counting again by 1. When not in display mode, the counter is set to 0.

[0017] Another object of the present invention is to provide an electronic device, including a processor and a memory storing a computer program, wherein the processor executes the computer program to implement the asynchronous communication LED cache display control method provided by the first object of the present invention.

[0018] Another object of the present invention is to provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the asynchronous communication LED cache display control method provided by the first object of the present invention.

[0019] In combination with the above technical solutions, the beneficial effects of the present invention compared with the prior art are as follows: Significantly reduces cached data volume: Only two lines of cache are required, reducing the data volume by an order of magnitude compared to traditional full-frame cache, significantly reducing chip area and hardware costs; Solving the synchronization problem of asynchronous communication: Use a timer to send data periodically, combined with a counter, to ensure that data transmission and display rhythm are consistent, thus avoiding display confusion; Ensuring display quality: Through a grayscale conversion mechanism, the received grayscale values ​​are adapted to the actual display duration to ensure brightness accuracy in different scenarios. Even with fluctuations in communication intervals, a stable display effect can still be maintained. High compatibility: It is suitable for LED display matrices with different grayscale depths and sizes, and does not require knowledge of the display control clock size, making it more adaptable. Attached Figure Description

[0020] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a flowchart of the asynchronous communication LED buffer display control method provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the LED matrix display principle; Figure 3 This is a schematic diagram of the traditional whole-frame buffer data volume, taking 20×20, 8-bit grayscale as an example; Figure 4 This is a schematic diagram of the working state of "displaying the first line and caching the second line" provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the working state of "displaying the second line and caching the third line" provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the asynchronous communication LED buffer display control system provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the dark area displayed when the communication interval is greater than the maximum grayscale in the traditional solution; Figure 8 This is a schematic diagram showing that the display efficiency after grayscale conversion reaches 100% according to an embodiment of the present invention; Figure 9 This is a schematic diagram illustrating the display error when the communication interval is less than the maximum grayscale in the traditional solution; Figure 10 This is a schematic diagram showing accurate grayscale conversion provided by an embodiment of the present invention. Detailed Implementation

[0021] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0022] Example 1: like Figure 1 The image shows an embodiment of the asynchronous communication LED buffer display control method provided by the present invention, which specifically includes the following steps: S1: The main control terminal sends the display line information and the corresponding cached grayscale information of the next line to the display terminal at preset intervals via asynchronous communication. S2: After receiving the data, the display end parses and distinguishes between the line display information and the cached display grayscale information. It transmits the line display information to the display control module and the counter module, and transmits the cached line information corresponding to the current line display information to the line cache module. It also transmits the cached display grayscale information to the grayscale conversion module. S3: The counter module records the number of clock cycles between adjacent display lines, which is the actual maximum displayable grayscale value. The actual maximum display grayscale value is obtained and stored. The grayscale conversion module calculates the actual display grayscale value based on the actual maximum display grayscale value. S4: The row cache module uses a two-row cache structure to store the actual grayscale value by taking the remainder of the cache row number; S5: The display control module controls the corresponding row switch to be turned on, and controls the on duration of the column switch in combination with the actual displayed grayscale value, and completes the display of the whole frame by cycling through the rows.

[0023] Specifically, this invention proposes a control method for asynchronous communication LED buffer display, where one line is buffered and displayed at a time. For example... Figure 4 As shown, while ensuring that one row of data is displayed, the second row of data is cached. Figure 5 As shown, the second line of data is displayed while the third line is cached, and this process continues until the entire image is displayed. Similarly, to display a single frame, the chip only needs to store two lines of data to ensure successful display: one line for display and the other for caching the next line. If a 20x20, 8-bit grayscale image is displayed using the same method of displaying one line and caching the other, the required data is 20 * 2 * 8 = 320 bits. Compared to the traditional method of caching 3200 bits for a single frame, caching only two lines requires an order of magnitude less data, significantly saving chip area. Furthermore, in display control, displaying one line and caching the next allows for higher synchronization between transmission and display.

[0024] For example, when the master control terminal sends the third line of data, it sends a trigger message to the display terminal to display the second line. After waiting for a certain time interval, the master control terminal sends the fourth line of data and simultaneously sends a trigger message to the display terminal to display the third line, ensuring consistency between asynchronous communication and display. Because the data for the third line is prepared while the second line is being displayed, and the display terminal is notified to display the third line while the fourth line is being buffered, synchronization between display and transmission is ensured, avoiding display chaos. By controlling the display line by line, the entire screen can be displayed.

[0025] To address the issue of not being able to directly determine whether a single line display is complete in asynchronous communication, this invention uses a timer to send line display information asynchronously at equal time intervals. An internal counter on the display device records each trigger of the asynchronous communication, allowing the determination of the interval between each trigger and thus the display time interval for each line. For example, upon receiving the first line of display information, the counter immediately begins counting, and this count value can be used to calculate the display time. The counter continues counting until the third line of display signal is received, then updates the saved count value, and so on. This count value is equivalent to knowing the actual maximum display grayscale value. Dividing the actual maximum display grayscale value by the set maximum display grayscale value reveals the ratio between the displayed grayscale and the actual display grayscale. Multiplying the displayed grayscale value by this ratio converts the displayed grayscale value to the actual display grayscale value.

[0026] If the displayed grayscale value is X, the maximum displayed grayscale value is Y, and the stored count value is Z, then the actual displayed grayscale value is G = X * (Z / Y). It can be seen that this invention can save on data caching while ensuring a certain display effect, thereby reducing the control cost of LED cache display.

[0027] The present invention will be further explained below using an 8*8 matrix (8 rows and 8 columns) as an example, combined with specific implementation details.

[0028] 1) Set the timer's timing duration: Here, the timer trigger time on the main control side is set to T0, and the grayscale depth is set to 8 bits. This means that the master control unit (host) sends display and other control information to the display unit (slave) at intervals of T0.

[0029] 2) Wait for the timed trigger. After the timed trigger, the main control unit sends the information of the row to be displayed and the corresponding grayscale information of the next row to be displayed via the IIC data sending module. X (X=0, 1, 2, 3...7, with 8 columns of LEDs displayed per row): Here, if the current display is row N, then the row that needs to be cached is row N+1. Then, the grayscale data (Gray) is displayed by loading the currently displayed row information N and the corresponding N+1 rows from the cache via the IIC data sending module. X First, send the currently displayed row information, then send the cached grayscale information. After loading, send data according to the IIC protocol format.

[0030] 3) The IIC data receiving module is waiting to receive data: The IIC data receiving module reads information according to the IIC protocol and sends the received data to the data parsing module.

[0031] 4) The data parsing module parses out different information types and sends the different information types to the corresponding modules.

[0032] If the information received is a line display signal: Then the display information N of the row that needs to be displayed is sent to the display control module and the counter module; Send the current cached row information C to the row cache module; but: C = N + 1; (If C > 7, then C = 0) If the information obtained is grayscale information, then Gray X (X=0, 1, 2...6, 7): Gray X (X=0, 1, 2...6, 7) are sent to the grayscale conversion module; 5) When the display system is in operation, the counter module has a counter (Counter) and a buffer (RealGrayMax): When receiving row display information N each time: RealGrayMax = Counter; At the same time: if Counter is reset to zero, then Counter=0; And restart the count, Counter = Counter + 1; When not in operation, Counter = 0; 6) When the grayscale conversion module receives grayscale information Gray X (X=0, 1, 2...6, 7): Then it is converted into actual grayscale information RealGray X (X=0, 1, 2...6, 7): RealGray X = Gray X *(RealGrayMax / 255); And send it to the row cache module; 7) The row caching module caches two rows of data, with the numbers 0 and 1: Line 0: Gray0 X (X=0, 1, 2...6, 7); Row 1: Gray1 X (X=0, 1, 2...6, 7); The line caching module performs a modulo operation on the received line information C: When C% 2 (remainder) = 0, the actual grayscale value received next will be displayed. RealGray X Cache to line number 0: Then Gray0 X = RealGray X X = 0, 1, 2...6, 7; When C% 2 (remainder) = 1: then the RealGray value received next will be the actual grayscale value displayed. X Cache to line number 1: Then Gray1 X = RealGray X X = 0, 1, 2...6, 7; 8) The display control module includes a display counter (CounterShow). When line display information N is received: The CounterShow display is reset to zero. CounterShow=0; At other times: CounterShow = CounterShow + 1; (When CounterShow>RealGrayMax: CounterShow=RealGrayMax) At the same time, update the SEGx display data for each SEGx. show : When N%2 (remainder) = 0: SEGx show = Gray1 X X = 0, 1, 2...6, 7; When N%2 (remainder) = 1: SEGx show = Gray0 X X = 0, 1, 2...6, 7; Since C = N+1, when N%2 (remainder) = 0, C % 2 (remainder) = 1; when N%2 (remainder) = 1, C % 2 (remainder) = 0. Therefore, there is no conflict between display and caching; it is possible to display one line and cache one line.

[0033] 9) The display unit controls the row switch (GRID) and column switch (SEG), such as... Figure 1 When the display control module obtains that the number of rows to be displayed is N: The row switch (GRID) turns on the corresponding row GRID. N; That is GRID N = 1 (ON); all other grids M =0 (OFF); (N=0, 1, 2...6, 7; M=0, 1, 2...6, 7) (N corresponds to the row, M corresponds to the column) 10) Column Switch (SEG): Turns the column switch on or off based on the grayscale information of each column. This is when CounterShow <SEGx show SEGx = 1 (ON), otherwise SEGx = 0 (OFF); X = 0, 1, 2...6, 7; 11) The main controller sends the data line by line, which will display the entire screen.

[0034] like Figure 7 As shown, taking an 8-bit display with a maximum grayscale of 255 as an example, when the time interval between the second line of displayed information is greater than the maximum grayscale, the next line's display signal will arrive after the maximum grayscale has been displayed, potentially adding a dark area to the display and reducing display efficiency. For example, when the display value is 255 grayscale, theoretically, the display efficiency should be close to the maximum of about 100%. However, because of this added dark area, the display efficiency is reduced. For instance, if the second line of displayed information arrives after 300 CLK, because there is no display during the time interval from 256 to 300, the display efficiency becomes approximately 255 / 300 = 85%. Similarly, using the above example, if... Figure 8 The counter counts the time interval between two lines as approximately 300 CLK. After conversion, the actual displayed grayscale is G = X * (Z / Y) = 255 (300 / 255) = 300 CLK (the displayed grayscale is X, the maximum displayed grayscale value is Y, and the stored count value is Z), 300 / 300 = 100%. This demonstrates that the present invention has higher efficiency. Again, taking an 8-bit display with a maximum grayscale of 255 as an example, as... Figure 9If the maximum grayscale value is not fully displayed before the next line of information arrives, it will cause display errors. For example, if the signal for the second line arrives after the first line of 200 CLK has been displayed, a significant 50 CLK of display time (255-200=50 CLK) will be wasted. This will result in the brightness of a 200 grayscale value being the same as that of a 255 grayscale value, causing display inconsistencies. Figure 10 As shown in the example, after conversion, the maximum display grayscale also decreases. The actual grayscale value after conversion for a grayscale value of 255 is G=X*(Z / Y)=255 / (200 / 255)=200. The actual grayscale value after conversion for a grayscale value of 200 is G=X*(Z / Y)=200 / (200 / 255)≈158. It can be seen that the conversion ensures correct display. Similarly, the above example illustrates that the larger the display matrix, the greater the area saved even after conversion.

[0035] Example 2: This invention provides an asynchronous communication LED buffer display control system, including a main control terminal and a display terminal. The main control terminal and the display terminal establish a data transmission connection through an asynchronous communication protocol to implement the asynchronous communication LED buffer display control method provided in Embodiment 1 of this invention.

[0036] Preferably, the main control terminal in this embodiment of the invention includes: The timer module is used to provide timing functions for information transmission from the main control terminal; The IIC data transmission module is used to load and send display line information and cached display grayscale information; Preferably, the display terminal in this embodiment of the invention includes: The IIC data receiving module is used to receive data sent by the master control terminal and forward the received data to the data parsing module; The data parsing module is used to parse the received data, distinguish between the line display information and the cached display grayscale information, transmit the line display information to the display control module and the counter module, transmit the cached line information corresponding to the current line display information to the line cache module, and transmit the cached display grayscale information to the grayscale conversion module. The counter module is used to record the number of clock cycles between adjacent display rows, obtain the actual maximum display grayscale value, and store it. The grayscale conversion module is used to calculate the actual display grayscale value based on the actual maximum display grayscale value; The row cache module is used to store the actual display grayscale value output by the grayscale conversion module according to the remainder result of the cache row number, using a two-row cache structure. The display control module controls the conduction of the corresponding row switches and controls the conduction duration of the column switches in combination with the actual displayed grayscale value, completing the display of the entire frame row by row in a loop.

[0037] Preferably, the counter module in this embodiment of the invention includes a counter and a buffer. When the display line information is received, the buffer stores the current value of the counter, and the counter is reset to zero. At other times, the counter continues to accumulate.

[0038] Example 3: The present invention provides an electronic device, including a processor and a memory storing a computer program. When the processor executes the computer program, it implements the asynchronous communication LED cache display control method provided in embodiment 1 of the present invention.

[0039] Example 4: The present invention provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the asynchronous communication LED cache display control method provided in embodiment 1 of the present invention.

[0040] It should be understood that although the steps in the flowcharts of the various embodiments of the present invention are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated in the present invention, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some steps in the various embodiments may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.

[0041] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided by this invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0042] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An asynchronous communication LED buffer display control method, characterized in that, The method comprises the following steps: (1) The master control end sends display line information and corresponding next line cache display grayscale information to the display end at intervals according to a preset time through asynchronous communication; (2) After receiving the data, the display end analyzes and distinguishes the line display information and the cache display grayscale information, transmits the line display information to the display control module and the counter module, transmits the cache line information corresponding to the current line display information to the line cache module, and transmits the cache display grayscale information to the grayscale conversion module; (3) The counter module records the interval clock number of adjacent display lines, obtains the actual maximum display grayscale value and stores it, and the grayscale conversion module calculates the actual display grayscale value based on the actual maximum display grayscale value; (4) The line cache module stores the actual display grayscale value according to the remainder of the cache line number through a two-line cache structure; (5) The display control module controls the corresponding row switch to be turned on, and controls the on duration of the column switch according to the actual display grayscale value, so as to complete the whole frame display through line-by-line circulation.

2. The asynchronous communication LED buffer display control method according to claim 1, wherein, In step (1), the asynchronous communication adopts IIC communication protocol, and the data transmission sequence is to send the current display line information first, and then send the cache grayscale information corresponding to the next line.

3. The asynchronous communication LED buffer display control method according to claim 1, wherein, In step (3), the working mode of the counter module is as follows: When the first line display information is received, the counter starts timing, and when the second line display signal is received, the count value is saved as the actual maximum display grayscale value; The counter is reset to zero and starts to count again, and when the next line display information is received, the saved actual maximum display grayscale value is updated with the new count value.

4. The asynchronous communication LED buffer display control method according to claim 1, wherein In step (3), the calculation method of the actual display grayscale value is represented as: G=X*(Z / Y) Wherein, G is the actual display grayscale value, X is the cache display grayscale information, Y is the maximum display grayscale value, and Z is the actual maximum display grayscale value.

5. An asynchronous communication LED buffer display control system, characterized in that, The system comprises a master control end and a display end, the master control end and the display end are connected through an asynchronous communication protocol to realize the execution of the control method of any one of claims 1-4.

6. The asynchronous communication LED buffer display control system according to claim 5, wherein, The master control end comprises: a timer module for providing timing function for information sending of the master control end; an IIC data sending module for loading and sending display line information and cache display grayscale information.

7. The asynchronous communication LED buffer display control system according to claim 5, wherein, The display end comprises: an IIC data receiving module for receiving data sent by the master control end and forwarding the received data to a data analysis module; a data analysis module for analyzing the received data, distinguishing line display information and cache display grayscale information, transmitting line display information to a display control module and a counter module, transmitting cache line information corresponding to the current line display information to a line cache module, and transmitting cache display grayscale information to a grayscale conversion module; a counter module for recording the interval clock number of adjacent display line information, obtaining and storing the actual maximum display grayscale value; a grayscale conversion module for calculating the actual display grayscale value based on the actual maximum display grayscale value; a line cache module for storing the actual display grayscale value output by the grayscale conversion module according to the remainder of the cache line number through a two-line cache structure. The display control module is used for controlling the corresponding row switch to be turned on, and the on duration of the column switch is controlled according to the actual display gray value, so that the whole frame display is completed by row-by-row circulation.

8. The asynchronous communication LED buffer display control system according to claim 7, wherein, The counter module comprises a counter and a buffer, when receiving the display row information, the buffer stores the current value of the counter, the counter is reset to zero at the same time, and starts to count up again, and when the display is not working, the counter is set to zero.

9. An electronic device comprising a processor and a memory having a computer program stored therein, characterized in that, The processor executes the computer program to realize the asynchronous communication LED buffer display control method in any one of claims 1 to 4.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to realize the asynchronous communication LED buffer display control method in any one of claims 1 to 4.

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