Signal cancellation circuit, signal cancellation method and interface circuit

Abstract

This application discloses a signal cancellation circuit, a signal cancellation method, and an interface circuit. The signal cancellation circuit is applied to a full-duplex transmit / receive circuit, which includes a transmitter and a receiver. The transmitter provides a first-channel differential signal to the communication link based on an input signal, and the receiver receives a second-channel differential signal through the communication link. The signal cancellation circuit includes: a signal suppression unit connected to the differential input terminal of the receiver, used to provide a reverse-suppressed differential signal to the differential input terminal of the receiver based on the input signal; and a residual calibration unit, used to obtain the residual signal between the first-channel differential signal and the reverse-suppressed differential signal during the calibration phase, and to adjust the amplitude of the reverse-suppressed differential signal based on the offset characteristic value of the residual signal. By adjusting the reverse-suppressed differential signal, communication quality can be improved.

Description

Technical Field

[0001] This application relates to the field of electronic and electrical technology, and in particular to a signal cancellation circuit, a signal cancellation method, and an interface circuit. Background Technology

[0002] A full-duplex transmit / receive circuit is a circuit capable of simultaneously transmitting and receiving signals. Specifically, a full-duplex transmit / receive circuit typically includes a first interface circuit and a second interface circuit connected via a communication link.

[0003] Figure 1 A schematic structural diagram of any interface circuit 10 in the prior art is shown. For example... Figure 1 As shown, the first and / or second interface circuits have a transmitter 11 and a receiver 12. The transmitter 11 is used to provide a first channel differential signal to the communication link 13 according to the input signals TX-IN and TX-IP, and the receiver 12 is used to receive a second channel differential signal through the communication link 13. The signal transmission directions of the first and second channels are opposite, thus enabling bidirectional communication.

[0004] Since both transmitter 11 and receiver 12 are connected to communication link 13, the first channel differential signal transmitted by transmitter 11 will cause self-interference to the second channel differential signal received by receiver 12. In the prior art, interface circuit 10 also has signal cancellation circuit 14 to eliminate this self-interference.

[0005] like Figure 1 As shown, the signal cancellation circuit 14 includes a pair of resistors R1 and R2, a pair of differential transistors M1 and M2, and a current source I1. The signal cancellation circuit 14 is used to generate a reverse-suppressed differential signal based on the input signals TX-IN and TX-IP. The signal cancellation circuit 14 is connected to the differential input terminal of the receiver 12 and cancels the first channel differential signal in the received signal by the receiver 12 by using the reverse-suppressed differential signal.

[0006] However, due to factors such as device mismatch, temperature drift, and process deviation, the reverse suppression differential signal is difficult to completely match the actual interference of the first channel differential signal to the second channel differential signal, which greatly affects the communication quality. Summary of the Invention

[0007] In view of the above problems, the purpose of this application is to provide a signal cancellation circuit, a signal cancellation method and an interface circuit, which can improve communication quality.

[0008] According to one aspect of the present invention, a signal cancellation circuit for a full-duplex transmit-receive circuit is provided. The full-duplex transmit-receive circuit includes a transmitter and a receiver. The transmitter is used to provide a first channel differential signal to a communication link according to an input signal, and the receiver is used to receive a second channel differential signal through the communication link. The signal cancellation circuit includes: a signal suppression unit connected to the differential input terminal of the receiver, used to provide a reverse suppression differential signal to the differential input terminal of the receiver according to the input signal; and a residual calibration unit, used to obtain a residual signal between the first channel differential signal and the reverse suppression differential signal during a calibration phase, and to adjust the amplitude of the reverse suppression differential signal based on the offset characteristic value of the residual signal.

[0009] Optionally, during the calibration phase, the second channel differential signal is a common-mode signal, the received signal of the receiver is the residual signal, and the residual calibration unit is connected between the signal suppression unit and the differential input terminal of the receiver to receive the residual signal.

[0010] Optionally, the residual calibration unit includes: a signal inversion module for inverting negative polarity waveforms in a plurality of residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms; a comparison module for comparing the offset of the peak value of each positive polarity waveform in the detection signal relative to a reference value, and using the maximum / minimum / median / mean value among them as the offset feature value; and an adjustment module for providing an adjustment signal according to the offset feature value, the adjustment signal being used to adjust the current source in the signal suppression unit.

[0011] Optionally, the signal cancellation circuit further includes: a first amplification module, used to provide the amplified residual signal to the signal inversion module.

[0012] Optionally, the signal cancellation circuit further includes a filtering module for filtering the signal to be detected.

[0013] Optionally, the signal inversion module operates in the analog domain, the comparison module and the adjustment module operate in the digital domain, and the signal cancellation circuit further includes: an analog-to-digital conversion module, used to convert the analog signal type of the signal to be detected into the digital signal type of the signal to be detected.

[0014] Optionally, the signal cancellation circuit further includes a second amplification module for amplifying the signal to be detected before analog-to-digital conversion.

[0015] Optionally, the signal suppression unit includes: the current source; a differential pair transistor, including a first transistor and a second transistor, wherein a first terminal of the first transistor is connected to one input terminal of the receiver, and a control terminal is connected to one of the input signals; a first terminal of the second transistor is connected to the other input terminal of the receiver, and a control terminal is connected to the other of the input signals; the second terminals of the first transistor and the second transistor are connected together and connected to the current source; a first resistor, wherein the first terminal of the first transistor is connected to one output terminal of the transmitter via the first resistor; and a second resistor, wherein the first terminal of the second transistor is connected to the other output terminal of the transmitter via the second resistor.

[0016] According to another aspect of the present invention, an interface circuit for a full-duplex transmit-receive circuit is provided, comprising: a transmitter for providing a first channel differential signal to a communication link according to an input signal; a receiver for receiving a second channel differential signal through the communication link; and the aforementioned signal cancellation circuit, connected between the communication link and the receiver, for providing the reverse suppression differential signal to the differential input terminal of the receiver, the reverse suppression differential signal being used to cancel the first channel differential signal mixed in the second channel differential signal, wherein the first channel is a forward channel and the second channel is a reverse channel.

[0017] According to another aspect of the present invention, an interface circuit for a full-duplex transmit-receive circuit is provided, comprising: a transmitter for providing a first channel differential signal to a communication link according to an input signal; a receiver for receiving a second channel differential signal through the communication link; and the aforementioned signal cancellation circuit, connected between the communication link and the receiver, for providing the reverse suppression differential signal to the differential input terminal of the receiver, the reverse suppression differential signal being used to cancel the first channel differential signal mixed in the second channel differential signal, wherein the first channel is a reverse channel and the second signal is a forward channel.

[0018] According to another aspect of the present invention, a signal cancellation method for a full-duplex transmit-receive circuit is provided. The full-duplex transmit-receive circuit includes a transmitter and a receiver. The transmitter is configured to provide a first channel differential signal to a communication link based on an input signal, and the receiver is configured to receive a second channel differential signal through the communication link. The signal cancellation method includes: providing a reverse suppression differential signal to a differential input terminal of the receiver based on the input signal; obtaining a residual signal between the first channel differential signal and the reverse suppression differential signal during a calibration phase; and adjusting the amplitude of the reverse suppression differential signal based on the offset characteristic value of the residual signal.

[0019] Optionally, the step of obtaining the residual signal includes: providing a common-mode signal as the second channel differential signal during the calibration phase; and using the received signal of the receiver as the residual signal.

[0020] Optionally, the step of obtaining the offset feature value includes: flipping the negative polarity waveforms in the plurality of residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms; comparing the offset of the peak value of each positive polarity waveform in the detection signal relative to a reference value, and using the maximum / minimum / median / mean value among them as the offset feature value.

[0021] According to the signal cancellation circuit, signal cancellation method and interface circuit provided in this application, the amplitude of the reverse suppression differential signal is dynamically adjusted by detecting the offset characteristic value of the residual signal, thereby achieving high-precision interference cancellation, which can improve the anti-interference capability of the communication system, and in particular, can reduce the impact of environmental factors such as temperature changes on communication quality. Attached Figure Description

[0022] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0023] Figure 1 A schematic structural diagram of an interface circuit in the prior art is shown;

[0024] Figure 2 A schematic structural diagram of the full-duplex transmit and receive circuit for differential communication according to this application is shown.

[0025] Figure 3 A schematic structural diagram of the signal cancellation circuit of this application is shown;

[0026] Figure 4 A schematic circuit diagram of the signal cancellation circuit of this application is shown;

[0027] Figure 5 A schematic flowchart of the signal cancellation method of this application is shown. Detailed Implementation

[0028] Various embodiments of the present application will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0029] Furthermore, certain terms are used in this specification and claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0030] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0031] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0032] It should also be noted that in the various methods and processes of this application, the order of the steps does not imply the order of execution, nor does it constitute any limitation on the implementation process of the embodiments of this application.

[0033] Figure 2 A schematic structural diagram of the full-duplex transmit and receive circuit for differential communication according to this application is shown. (Reference) Figure 2 The full-duplex transmit / receive circuit for differential communication includes a first interface circuit 20, a second interface circuit 30, and a differential communication link 40 between them. The first interface circuit 20 provides a forward differential signal and receives a reverse differential signal, while the second interface circuit 30 provides a reverse differential signal and receives a forward differential signal. The first interface circuit 20 and the second interface circuit 30 are communicatively connected via the differential communication link 40.

[0034] Each interface circuit includes a transmitter and a receiver. In each interface circuit, the transmitter provides a first channel differential signal (i.e., the transmit signal of the interface circuit) to the differential communication link based on the differential input signal, and the receiver receives a second channel differential signal (i.e., the receive signal of the interface circuit) through the differential communication link.

[0035] Specifically, in Figure 2 In the first interface circuit 20, a transmitter 21 and a receiver 22 are included. The second interface circuit 30 includes a receiver 31 and a transmitter 32. It should be understood that for the first interface circuit 20, the first channel is a forward channel, and the differential signal of the first channel is the aforementioned forward differential signal; the second channel is a reverse channel, and the differential signal of the second channel is the aforementioned reverse differential signal. For the second interface circuit 30, the first channel is a reverse channel, and the differential signal of the first channel is the aforementioned reverse differential signal; the second channel is a forward channel, and the differential signal of the second channel is the aforementioned forward differential signal.

[0036] The transmitter 21 in the first interface circuit 20 provides forward-transmitted differential signals TX-OP and TX-ON based on a pair of differential input signals TX-IP and TX-IN. These forward-transmitted differential signals TX-OP and TX-ON are transmitted to the receiver 31 of the second interface circuit 30 via the differential communication link 40, thereby obtaining the forward differential signals RX-OP and RX-ON received by the second interface circuit 30.

[0037] Similarly, the transmitter 32 in the second interface circuit 30 provides reverse-transmitted differential signals BCTX-OP and BCTX-ON based on a pair of differential input signals BCTX-IP and BCTX-IN. This reverse-transmitted differential signal is transmitted via differential communication link 40 to the receiver 22 of the first interface circuit 20 to obtain the reverse differential signals BCRX-OP and BCRX-ON received by the first interface circuit 20.

[0038] In some embodiments, the transmission rate of the forward differential signal is greater than the transmission rate of the reverse differential signal. In still other embodiments, the forward differential signal includes high-speed data and low-speed data, and the reverse differential signal includes low-speed data. In yet other embodiments, the full-duplex transmit / receive circuit described above can be applied to an in-vehicle system. For example, the high-speed data in the forward differential signal is video data and / or audio data captured by an in-vehicle camera, and the low-speed data in the forward and reverse differential signals is control data between the in-vehicle camera and the processor. Furthermore, the full-duplex transmit / receive circuit provided in this application can also be applied to other fields, such as communications and consumer electronics.

[0039] In the full-duplex transmit / receive circuit of differential communication, the differential communication link 40 includes a first signal line 41 and a second signal line 42. The first signal terminal of the first interface circuit 20 is connected to the first signal terminal of the second interface circuit 30 via the first signal line 41, and the second signal terminal of the first interface circuit 20 is connected to the second signal terminal of the second interface circuit 30 via the second signal line. The first signal line 41 and the second signal line 42 can be implemented, for example, using shielded twisted pair (STP) cable. It should be understood that DC blocking capacitors are also connected between the differential communication link 40 and the signal terminals of each interface circuit. Figure 2 The numbers are labeled C1, C2, C1', and C2'. By using DC blocking capacitors, the DC component mixed into the first and second channel differential signals can be filtered out, reducing the interference of common-mode noise on the differential signals.

[0040] For each interface circuit, its transmitted signal can cause self-interference with the received signal, especially at high frequencies. Therefore, in the embodiments of this application, the interface circuit further includes a signal cancellation circuit to eliminate the first channel differential signal mixed in the received signal, thereby improving communication quality.

[0041] Specifically, such as Figure 2 As shown, the first interface circuit 20 also includes a signal cancellation circuit 23, which is connected between the differential communication link 40 and the receiver 22. The second interface circuit 30 also includes a signal cancellation circuit 33, which is connected between the differential communication link 40 and the receiver 31.

[0042] It should be understood that signal cancellation circuits 23 and 33 operate on the same principle. Therefore, in Figure 3 and Figure 4 The diagram below shows a schematic structural diagram and circuit diagram of the signal cancellation circuit according to an embodiment of this application, using signal cancellation circuit 23 as an example. The following section, in conjunction with... Figures 2 to 4 The signal cancellation circuit of the embodiments of this application will be described in detail.

[0043] refer to Figure 3 The signal cancellation circuit 23 is connected to the differential communication link 40. Specifically, the signal cancellation circuit 23 is connected between the transmitter 21 and the receiver 22, and the common node of the signal cancellation circuit 23 and the transmitter 21 is connected to the differential communication link 40 through corresponding DC blocking capacitors C1 and C2. The signal cancellation circuit 23 includes a signal suppression unit 200. The signal suppression unit 200 is connected to the differential input terminal of the receiver 22 and is used to provide a reverse suppression differential signal to the differential input terminal of the receiver 22 according to the differential input signals TX-IN and TX-IP.

[0044] Combination Figure 3 and Figure 4 For ease of understanding, the transmitter 21 includes a pair of resistors Rfa and Rfb, a pair of differential transistors Ma and Mb, and a current source Ia as an example. Resistor Rfa is coupled between the power supply voltage VDD and the first terminal of transistor Ma, resistor Rfb is coupled between the power supply voltage VDD and the first terminal of transistor Mb, and the second terminals of transistors Ma and Mb are connected and grounded via the current source Ia. One of the differential input signals TX-IN and TX-IP (e.g., TX-IN) is applied to the control terminal of transistor Ma, and the other (e.g., TX-IP) is applied to the control terminal of transistor Mb. The first signal terminal 24 of the first interface circuit 20 is connected to the first terminal of transistor Ma to extract one of the forward differential signals, TX-OP, for example. This signal TX-OP is connected to the differential communication link 40 via a DC blocking capacitor C1. The second signal terminal 25 is connected to the first terminal of transistor Mb to extract the other of the forward differential signals, TX-ON, for example. This signal TX-ON is connected to the differential communication link 40 via a DC blocking capacitor C2. However, it should be understood that the working principle of transmitter 21 is well known to those skilled in the art and can be implemented using any related technology.

[0045] The signal suppression unit 200 is connected between the first signal terminal 24, the second signal terminal 25 and the differential input terminal of the receiver 22, and includes a first resistor R1, a second resistor R2, a differential pair transistor having a first transistor M1 and a second transistor M2 and a current source I1.

[0046] The first terminal of the first transistor M1 is connected to one input terminal of the receiver 22, and the control terminal is connected to one of the input signals, such as TX-IN; the first terminal of the second transistor M2 is connected to the other input terminal of the receiver 22, and the control terminal is connected to the other input signal, such as TX-IP; the second terminal of the first transistor M1 and the second terminal of the second transistor M2 are connected together and grounded through the current source I1.

[0047] The first terminal of the first transistor M1 is also connected to the second signal terminal 25 via the first resistor R1, which is one output terminal of the transmitter 21. The first terminal of the second transistor M2 is also connected to the first signal terminal 24 via the second resistor R2, which is the other output terminal of the transmitter 21.

[0048] Under the control of the differential input signals TX-IN and TX-IP, the signal cancellation circuit 23 can provide a reverse suppression differential signal to the differential input terminal of the receiver 22 to eliminate the forward differential signals TX-OP and TX-ON mixed in the reverse differential signals BCTX-OP and BCTX-ON.

[0049] exist Figure 4In the examples, transistors Ma, Mb, M1, and M2 are all N-type field-effect transistors (MOSFETs). It should be understood that a MOSFET consists of a first terminal, a second terminal, and a control terminal. When the MOSFET is turned on, current flows from the first terminal to the second terminal. For an N-type MOSFET, the first terminal is the drain, the second terminal is the source, and the control terminal is the gate. For a P-type MOSFET, the first terminal is the source, the second terminal is the drain, and the control terminal is the gate.

[0050] It should be pointed out that, in cases such as Figure 4 In the illustrated embodiment, the signal suppression unit 200 provides reverse suppression differential signal through the first resistor R1, the second resistor R2, the first transistor M1, the second transistor M2, and the current source I1. However, this application is not limited thereto. In some other embodiments, the signal suppression unit 200 further includes a mirror structure. The mirror structure is used to mirror the received signal of the receiver 22 and / or the first channel differential signal, and to eliminate interference in the received signal of the receiver 22 through a differential circuit. Related mirror structures should also be well known to those skilled in the art, and will not be described in detail here.

[0051] In actual operation, the reverse suppression differential signal provided by the signal cancellation circuit can be deflected by factors such as device mismatch, temperature drift, and process deviation, and thus cannot completely cancel the transmitted signal. To solve this problem, the signal cancellation circuit 23 of this application also includes a residual calibration unit 100. The residual calibration unit 100 is used to obtain the residual signal between the first channel differential signal and the reverse suppression differential signal during the calibration stage, and to adjust the amplitude of the reverse suppression differential signal based on the offset characteristic value of the residual signal, so as to improve the matching accuracy between the reverse suppression differential signal and the actual interference of the transmitted signal, thereby improving the communication quality.

[0052] In some embodiments, the calibration phase described above occurs before the full-duplex transmit / receive circuit operates normally, or when the operating environment of the full-duplex transmit / receive circuit changes. For example, the amplitude calibration described above is performed whenever the operating temperature changes. Therefore, this application is particularly applicable to avoiding the negative effects of environmental factors such as temperature on the signal cancellation circuit.

[0053] In a preferred embodiment, during the calibration phase, the transmitter 21 of the current interface circuit transmits a sample signal and sends a common-mode signal to the transmitter 32 of the interface circuit. This allows the residual signal to be directly obtained through signal sampling, which is more conducive to simplifying the circuit structure of the residual calibration unit. The sample signal can be a clock pattern, a pseudo-random bit sequence pattern, a custom pattern, or other types of data samples.

[0054] More specifically, multiple residual signals are obtained through multiple data transmissions to obtain offset characteristic values ​​(which will be described in detail below).

[0055] Combination Figure 3 and Figure 4 The residual calibration unit 100 includes: a first amplification module 110, a signal inversion module 120, a filtering module 130, a second amplification module 140, an analog-to-digital conversion module 150, a comparison module 160, and an adjustment module 170.

[0056] The first amplification module 110 is used to initially amplify multiple residual signals to improve the sensitivity and accuracy of subsequent processing, ensuring that weak residual signals can be effectively captured. The residual signal represents the transmitted signal remaining in the signal received by the receiver 22, that is, the transmitted signal that has not been canceled.

[0057] When the peer interface circuit sends a common-mode signal, the DC blocking capacitor connected to the differential communication link 40 isolates the DC common-mode signal. Therefore, ideally, the second-channel differential signal received by the receiver 22 should be "0". However, when the reverse suppression differential signal cannot completely cancel the transmitted signal, the signal cancellation circuit 23 will send the uncancelled forward differential signal to the receiver 22. In other words, when the peer interface circuit sends a common-mode signal, the signal received by the receiver 22 is the residual signal.

[0058] The residual signal can be represented by positive and negative waveforms. Specifically, a positive waveform indicates that the actual received signal exceeds the reference value, i.e., the "0" value mentioned above, while a negative waveform indicates that the actual received signal is less than the reference value.

[0059] The signal inversion module 120 is used to invert the negative polarity waveforms of the multiple residual signals into positive polarity waveforms, thereby obtaining a detection signal with all positive polarity waveforms. Inverting the residual signals reduces the detection complexity of the comparison module and improves the accuracy of peak capture. It also ensures that all fluctuations participate in subsequent peak judgment, avoiding detection omissions due to different polarities, thus achieving complete tracking and accurate response to offset feature values.

[0060] The filtering module 130 filters the received signal to be detected to eliminate fluctuations caused by noise or transient interference, ensuring the stability and reliability of the waveform to be detected. The filtering unit 130 can be implemented, for example, by an RC filtering unit.

[0061] The comparison module 160 is used to compare the peak value of each positive polarity waveform in the signal to be detected with the reference value, that is, the offset of the "0" value, and use the maximum / minimum / median / mean value as the offset feature value.

[0062] The adjustment module 170 provides an adjustment signal based on the offset characteristic value. This adjustment signal is used to adjust the amplitude of the reverse suppression differential signal, thereby making the reverse suppression differential signal more closely match the actual interference of the transmitted signal. More specifically, in conjunction with... Figure 4 Specifically, the adjustment signal is used to adjust the bias current provided by the current source I1 to adjust the amplitude of the reverse suppression differential signal, thereby adjusting the strength of interference elimination.

[0063] In some embodiments, the first amplification module 110, the signal inversion module 120, and the filtering module 130 operate in the analog domain to ensure real-time signal processing and low latency. The comparison module 160 and the adjustment module 170 operate in the digital domain, generating corresponding digital adjustment signals to improve processing speed and adjustment accuracy. Therefore, an analog-to-digital converter module 150 is also provided between the filtering module 130 and the comparison module 160. The analog-to-digital converter module 150 converts the analog signal to be detected into a digital signal, facilitating subsequent analysis and processing by the digital domain comparison module 160 and the adjustment module 170 to provide adjustment signals for precise adjustment of the current source I1.

[0064] Furthermore, in order to adapt to the input range of the analog-to-digital conversion module 150, a second amplification module 140 is provided between the filtering module 130 and the analog-to-digital conversion module 150 to amplify the signal to be detected with adjustable gain before conversion.

[0065] This application also provides an interface circuit that includes the signal cancellation circuit described in the above embodiment. This interface circuit is, for example, a... Figure 2 The first interface circuit 20 and / or the second interface circuit 30 in the full-duplex transmit and receive circuit shown.

[0066] This application also provides a signal cancellation method for a full-duplex transmit and receive circuit. Figure 5 This diagram illustrates a schematic flowchart of a signal cancellation method according to an embodiment of this application. The full-duplex transmit / receive circuit is, for example, described above. Figure 2 The details are omitted here. The signal cancellation method provided in this application can be implemented, for example, using the signal cancellation circuit provided in this application. Figure 5 As shown, the signal cancellation method includes:

[0067] In step S11, an inverse suppression differential signal is provided to the differential input terminal of the receiver according to the input signal.

[0068] The transmitter of any interface circuit in the full-duplex transmit / receive circuit provides the first channel differential signal of that interface circuit according to the corresponding input signal. The reverse suppression differential signal provided in step S11 specifically refers to the signal that is the reverse of the first channel differential signal.

[0069] In step S12, the residual signal between the first channel differential signal and the inverse suppression differential signal is obtained during the calibration phase.

[0070] The calibration phase specifically occurs before the full-duplex transmit / receive circuit operates normally, or when the operating environment of the full-duplex transmit / receive circuit changes. For example, the amplitude calibration described above is performed whenever the operating temperature changes. Therefore, this application is particularly applicable to avoiding the negative impact of environmental factors such as temperature on the signal cancellation circuit.

[0071] In a preferred embodiment, during the calibration phase, the transmitter of the current interface circuit can transmit a sample signal and send a common-mode signal to the transmitter of the interface circuit. This allows the residual signal to be directly obtained through signal sampling, simplifying the circuit structure of the residual calibration unit. The sample signal can be a clock pattern, a pseudo-random bit sequence pattern, a custom pattern, or other types of data samples.

[0072] In other words, in some embodiments, step S12 specifically includes: providing a common-mode signal as a second channel differential signal during the calibration phase; and using the receiver's received signal as a residual signal.

[0073] In step S13, the amplitude of the reverse suppression differential signal is adjusted based on the offset characteristic value of the residual signal.

[0074] When the peer interface circuit transmits a common-mode signal, the DC blocking capacitor connected to the differential communication link isolates the DC common-mode signal. Therefore, ideally, the second-channel differential signal received by the receiver in the current interface circuit should be "0". However, when the reverse suppression differential signal cannot completely cancel the transmitted signal, the signal cancellation circuit will send the uncancelled forward differential signal to the receiver. In other words, when the peer interface circuit transmits a common-mode signal, the received signal by the receiver in the current interface circuit is the residual signal. The residual signal can be represented by positive and negative waveforms, for example. Specifically, a positive waveform indicates that the actual received signal exceeds the reference value, i.e., the aforementioned "0" value, while a negative waveform indicates that the actual received signal is less than the reference value.

[0075] In some embodiments, the step of obtaining the offset feature value specifically includes: flipping the negative polarity waveforms in multiple residual signals to positive polarity waveforms to obtain a detection signal with all positive polarity waveforms; comparing the offset of the peak value of each positive polarity waveform in the detection signal relative to the reference value, that is, the offset relative to the "0" value, and taking the maximum / minimum / median / mean value among them as the offset feature value.

[0076] Flipping the residual signal reduces the detection complexity of the comparison module and improves the accuracy of peak capture. It also ensures that all fluctuations participate in subsequent peak determination, avoiding detection omissions due to different polarities, thus achieving complete tracking and accurate response to offset feature values.

[0077] In some embodiments, the adjustment signal is specifically adjusted by adjusting the amplitude of the reverse suppression differential signal by the bias current provided by the current source I1 in the adjustment signal elimination circuit.

[0078] According to the signal cancellation circuit, signal cancellation method and interface circuit provided in this application, the amplitude of the reverse suppression differential signal is dynamically adjusted by detecting the offset characteristic value of the residual signal, thereby achieving high-precision interference cancellation, which can improve the anti-interference capability of the communication system, and in particular, can reduce the impact of environmental factors such as temperature changes on communication quality.

[0079] As described above, these embodiments of this application do not exhaustively cover all details, nor do they limit this application to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. The scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A signal cancellation circuit for a full-duplex transmit-receive circuit, the full-duplex transmit-receive circuit comprising a transmitter and a receiver, the transmitter being configured to provide a first channel differential signal to a communication link based on an input signal, and the receiver being configured to receive a second channel differential signal through the communication link, wherein... The signal cancellation circuit includes: A signal suppression unit, connected to the differential input terminal of the receiver, is used to provide a reverse suppression differential signal to the differential input terminal of the receiver according to the input signal; and The residual calibration unit is used to obtain the residual signal between the first channel differential signal and the inverse suppression differential signal during the calibration phase, and to adjust the amplitude of the inverse suppression differential signal based on the offset characteristic value of the residual signal. The residual calibration unit includes: The signal inversion module is used to invert the negative polarity waveforms of the multiple residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms. The comparison module is used to compare the offset of the peak value of each positive polarity waveform in the signal to be detected relative to a reference value, and use the maximum / minimum / median / mean value as the offset feature value; and An adjustment module is used to provide an adjustment signal based on the offset characteristic value, the adjustment signal being used to adjust the current source in the signal suppression unit.

2. The signal cancellation circuit according to claim 1, wherein, During the calibration phase, the second channel differential signal is a common-mode signal, and the received signal from the receiver is the residual signal. The residual calibration unit is connected between the signal suppression unit and the differential input of the receiver to receive the residual signal.

3. The signal cancellation circuit according to claim 2, wherein, The signal cancellation circuit further includes: The first amplification module is used to provide the amplified residual signal to the signal inversion module.

4. The signal cancellation circuit according to claim 2, wherein, The signal cancellation circuit further includes: The filtering module is used to filter the signal to be detected.

5. The signal cancellation circuit according to claim 2, wherein, The signal inversion module operates in the analog domain, while the comparison module and the adjustment module operate in the digital domain. The signal cancellation circuit further includes: An analog-to-digital converter module is used to convert the signal to be detected, which is of analog signal type, into the signal to be detected, which is of digital signal type.

6. The signal cancellation circuit according to claim 5, wherein, The signal cancellation circuit further includes: The second amplification module is used to amplify the signal to be detected before analog-to-digital conversion.

7. The signal cancellation circuit according to claim 2, wherein, The signal suppression unit includes: The current source; The differential pair includes a first transistor and a second transistor. The first terminal of the first transistor is connected to one input terminal of the receiver, and the control terminal is connected to one of the input signals. The first terminal of the second transistor is connected to the other input terminal of the receiver, and the control terminal is connected to the other input signal. The second terminals of the first transistor and the second transistor are connected together and connected to the current source. A first resistor, wherein a first terminal of the first transistor is connected via the first resistor to an output terminal of the transmitter; and The second resistor connects the first terminal of the second transistor to the other output terminal of the transmitter.

8. An interface circuit for a full-duplex transmit / receive circuit, wherein, The full-duplex transmit / receive circuit includes the interface circuit, which includes: A transmitter is used to provide a first channel differential signal to the communication link based on the input signal; Receiver, configured to receive a second channel differential signal via the communication link; and The signal cancellation circuit as described in any one of claims 1-7 is connected between the communication link and the receiver, and is used to provide the inverse suppression differential signal to the differential input terminal of the receiver, the inverse suppression differential signal being used to cancel the first channel differential signal mixed in the second channel differential signal. The first channel is the forward channel, and the second channel is the reverse channel.

9. An interface circuit for a full-duplex transmit / receive circuit, wherein, The full-duplex transmit / receive circuit includes the interface circuit, which includes: A transmitter is used to provide a first channel differential signal to the communication link based on the input signal; Receiver, configured to receive a second channel differential signal via the communication link; and The signal cancellation circuit as described in any one of claims 1-7 is connected between the communication link and the receiver, and is used to provide the inverse suppression differential signal to the differential input terminal of the receiver, the inverse suppression differential signal being used to cancel the first channel differential signal mixed in the second channel differential signal. The first channel is the reverse channel, and the second channel is the forward channel.

10. A signal cancellation method for a full-duplex transmit-receive circuit, the full-duplex transmit-receive circuit including a transmitter and a receiver, the transmitter being used to provide a first channel differential signal to a communication link according to an input signal, and the receiver being used to receive a second channel differential signal through the communication link, wherein... The signal cancellation method includes: A reverse suppression differential signal is provided to the differential input terminal of the receiver according to the input signal; During the calibration phase, the residual signal between the first channel differential signal and the inverse suppression differential signal is obtained; and The amplitude of the inverse suppression differential signal is adjusted based on the offset characteristic value of the residual signal. The step of obtaining the offset feature value includes: The negative polarity waveforms in the multiple residual signals are flipped into positive polarity waveforms to obtain a detection signal with a fully positive polarity waveform; The offset of the peak value of each positive polarity waveform in the signal to be detected relative to the reference value is compared, and the maximum / minimum / median / mean value is used as the offset feature value.

11. The signal cancellation method according to claim 10, wherein, The steps for obtaining the residual signal include: During the calibration phase, a common-mode signal is provided as the second channel differential signal; and The received signal from the receiver is used as the residual signal.

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