Texture processing method and device, equipment, medium and product

Abstract

The invention discloses a texture processing method and device, equipment, a medium and a product, and relates to the technical field of chips. The texture processing method comprises the following steps: receiving a first storage instruction, wherein the first storage instruction comprises to-be-stored first texture data, a first texture coordinate and a descriptor index; obtaining format information corresponding to the first texture data based on the descriptor index; converting the first texture coordinate to obtain a virtual address corresponding to the first texture data; performing format conversion on the first texture data based on the format information to obtain second texture data; based on the second texture data and the virtual address, a second storage instruction is generated, and the second storage instruction is used for indicating to write the second texture data into the memory space. By reading the format information corresponding to the first texture data, format conversion of the first texture data can be realized according to the format information, and the second texture data obtained after format conversion is stored.

Description

Technical Field

[0001] This application relates to the field of chips, and in particular to a texture processing method, apparatus, device, medium, and product. Background Technology

[0002] The STORE instruction is an instruction used to write texture data into memory. In some embodiments, when the Graphics Processing Unit (GPU) executes the machine instructions corresponding to the shader program, the machine instructions include the STORE instruction, so that the GPU writes texture data into memory based on the STORE instruction.

[0003] In related technologies, texture data is bound to format information. The central processing unit (CPU) divides the space of the GPU's registers and allocates the write address of the texture data format information in the register according to the division result. Then, it sends the write address of the format information to the MOVE module. The MOVE module reads the format information from the register according to the write address, performs format conversion on the texture data according to the format information, and writes the format-converted texture data into the memory space.

[0004] However, when the texture data is implemented as a bindless resource, the write address of the format information in the register is not fixed but dynamically determined. As a result, the CPU cannot allocate the write address of the format information in the register to the MOVE module, causing the STORE instruction to fail to execute. Summary of the Invention

[0005] This application provides a texture processing method, apparatus, device, medium, and product. The technical solutions provided by this application include the following aspects.

[0006] According to one aspect of the embodiments of this application, a texture processing method is provided, characterized in that the method is executed by a texture processing device, and the method includes: Receive a first storage instruction, the first storage instruction including first texture data to be stored, first texture coordinates, and descriptor index; obtain the format information corresponding to the first texture data based on the descriptor index; Transform the first texture coordinates to obtain the virtual address corresponding to the first texture data; Based on the format information, the first texture data is converted to obtain the second texture data; Based on the second texture data and the virtual address, a second storage instruction is generated, which is used to instruct the writing of the second texture data into the memory space.

[0007] According to one aspect of this application, a texture processing apparatus is provided, characterized in that the texture processing apparatus includes a format acquisition unit, a virtual address acquisition unit, and a format conversion unit; The format acquisition unit is configured to receive a first storage instruction, the first storage instruction including first texture data to be stored, first texture coordinates, and descriptor index; and to acquire format information corresponding to the first texture data based on the descriptor index. The virtual address acquisition unit is configured to convert the first texture coordinates to obtain the virtual address corresponding to the first texture data; The format conversion unit is configured to perform format conversion on the first texture data based on the format information to obtain the second texture data; The format conversion unit is further configured to generate a second storage instruction based on the second texture data and the virtual address, the second storage instruction being used to instruct the writing of the second texture data into the memory space.

[0008] According to one aspect of the embodiments of this application, a terminal device is provided, the terminal device including a processor and a memory, the memory storing a computer program, the computer program being loaded and executed by the processor to implement the above-described texture processing method.

[0009] According to one aspect of the embodiments of this application, a computer-readable storage medium is provided, wherein a computer program is stored in the computer-readable storage medium, the computer program being loaded and executed by a processor to implement the above-described texture processing method.

[0010] According to one aspect of the embodiments of this application, a computer program product is provided, the computer program product including a computer program stored in a computer-readable storage medium, and a processor reading from the computer-readable storage medium and executing the computer program to implement the above-described texture processing method.

[0011] According to another aspect of the embodiments of this application, a chip is provided, the chip integrating all the functional modules of the texture processing device described in any of the above embodiments.

[0012] In an optional embodiment, the chip described above is implemented as a system-on-a-chip (SoC).

[0013] According to another aspect of the embodiments of this application, a board is provided, the board including all the functional modules of the texture processing device described in any of the above embodiments.

[0014] According to another aspect of the embodiments of this application, a computer device is provided, the device including any of the texture processing apparatus or any of the chips described in the above embodiments.

[0015] The technical solution provided in this application can bring the following beneficial effects: During the execution of the STORE instruction, the format information corresponding to the first texture data is read through the descriptor index in the STORE instruction. Based on this format information, the format of the first texture data can be converted, and the resulting second texture data is stored. By obtaining the format information, even if the texture data is implemented as an unbound resource and the format information cannot be directly obtained from STORE, the format information can still be obtained from the GPU hardware perspective through the descriptor index. This ensures the accuracy of STORE texture processing for unbound resources and improves texture processing efficiency. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a computer system provided in an exemplary embodiment of this application; Figure 2 This is a schematic diagram of an instruction channel provided in an exemplary embodiment of this application; Figure 3 This is a flowchart illustrating a texture processing method provided in an exemplary embodiment of this application; Figure 4 This is a schematic diagram of the information field corresponding to the descriptor provided in an exemplary embodiment of this application; Figure 5 This is a schematic diagram of the texture processing stage in a texture processing method provided in an exemplary embodiment of this application; Figure 6 This is a flowchart illustrating a texture processing method provided in another exemplary embodiment of this application; Figure 7 This is a schematic diagram illustrating the process of executing a second storage instruction provided in an exemplary embodiment of this application; Figure 8 This is a flowchart illustrating a texture processing method provided in another exemplary embodiment of this application; Figure 9 This is a flowchart illustrating a texture processing method provided in another exemplary embodiment of this application; Figure 10 This is a schematic diagram of the structure of a texture processing apparatus provided in an exemplary embodiment of this application; Figure 11 This is a schematic diagram of the structure of a texture processing module TPU provided in an exemplary embodiment of this application; Figure 12This is a schematic block diagram of a processor provided in an exemplary embodiment of this application; Figure 13 This is a schematic block diagram of a board provided in an exemplary embodiment of this application; Figure 14 This is a schematic block diagram of a computer device provided in an exemplary embodiment of this application; Figure 15 This is a schematic block diagram of a computer device provided in another exemplary embodiment of this application; Figure 16 This is a schematic block diagram of a computer device provided in another exemplary embodiment of this application; Figure 17 This is a schematic block diagram of a computer device provided in another exemplary embodiment of this application; Figure 18 This is a schematic block diagram of a computer device provided in another exemplary embodiment of this application. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0018] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0019] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0020] It should be understood that although the terms first, second, etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, a first parameter may also be referred to as a second parameter, and similarly, a second parameter may also be referred to as a first parameter. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0021] It should be noted that this application may display prompt interfaces, pop-ups, or output voice prompts before and during the collection of user, processor, and computer device data. These prompt interfaces, pop-ups, or voice prompts are used to inform the user that their data is being collected. This ensures that the application only begins the steps for collecting user data after receiving confirmation from the user regarding the prompt interface or pop-up; otherwise (i.e., without user confirmation), the steps for collecting user data end, meaning no user data is collected. In other words, all user data collected in this application is collected with the user's consent and authorization, and the collection, use, and processing of related user data must comply with the relevant laws, regulations, and standards of the relevant countries and regions.

[0022] Figure 1 This is a schematic diagram of the structure of a computer system provided in an exemplary embodiment of this application. The computer system 100 can be implemented as a system architecture for a texture processing method, or as a hardware architecture for a texture processing device that applies a texture processing method. The computer system 100 includes: a computer device 120.

[0023] In some embodiments, the computer device 120 includes a texture processing apparatus that applies the texture processing method of this embodiment, or the computer device 120 includes a processor that includes the texture processing apparatus that applies the texture processing method of this embodiment. The computer device 120 may be an electronic device such as a mobile phone, tablet computer, vehicle terminal (vehicle system), wearable device, personal computer (PC), unmanned reservation terminal, etc., or it may be a server, such as a physical server or cloud server. This application embodiment does not limit this.

[0024] The texture processing method provided in this application can be executed by a texture processing device in a computer device 120 that applies the texture processing method. In some embodiments, the computer device includes hardware devices that require texture processing, such as a GPU, a dedicated texture sampling accelerator, and a programmable synthesis engine.

[0025] Optionally, the computer device 120 mentioned above can be a terminal or any computer device such as a server running at least one virtual machine. This application embodiment does not limit this.

[0026] The aforementioned terminal is optional and can be a desktop computer, laptop computer, mobile phone, tablet computer, e-book reader, Moving Picture Experts Group Audio Layer III (MP3) player, Moving Picture Experts Group Audio Layer IV (MP4) player, smart TV, smart vehicle, and other types of terminal devices. This application embodiment does not limit the specific terminal device to these types.

[0027] It is worth noting that the aforementioned servers can be independent physical servers, server clusters or distributed systems composed of multiple physical servers, or cloud servers that provide basic cloud computing services such as cloud services, cloud security, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDN), and big data and artificial intelligence platforms.

[0028] Cloud technology refers to a managed technology that unifies a series of resources such as hardware, software, and networks within a wide area network or local area network to achieve data computing, storage, processing, and sharing.

[0029] In some embodiments, the server described above can also be implemented as a node in a blockchain system.

[0030] In some embodiments, an application (APP) creates a shader program. After obtaining the shader program, the GPU driver compiles it using a GPU compiler to obtain machine instructions, thereby driving the GPU hardware to execute the machine instructions and obtain the texture processing results. The machine instructions include various instructions such as arithmetic instructions and storage instructions. Among them, storage instructions include the STORE instruction, which is used to instruct the texture data to be written to memory space.

[0031] In related technologies, when the GPU executes the STORE instruction on texture data, it includes the following two instruction channels: 1. Direct Memory Access (DMA) channel.

[0032] In some embodiments, when the texture data is implemented as a buffered STORE instruction, storage is performed via a DMA channel. The buffered texture data is typically implemented as one-dimensional data, such as constant parameters used in pixel calculations. This texture data corresponds to a virtual address, which is converted to a physical address via DMA, thereby writing the texture data into memory.

[0033] 2. Texture Address Processor (TAP) + MOVE + DMA channel.

[0034] In some embodiments, when the texture data is implemented as an image type STORE instruction, storage is performed through the TAP+MOVE+DMA channel. The image type texture data is usually implemented as one-dimensional or multi-dimensional data, such as pixel data of a pixel, including pixel values ​​of one or more pixel channels, with each pixel channel corresponding to a data dimension.

[0035] TAP is used to map the texture coordinates of texture data to a virtual address, that is, to obtain the texture coordinates of texture data in the STORE instruction and map the texture coordinates to a virtual address.

[0036] The MOVE module is used to obtain the format information of texture data and perform format conversion on the texture data based on the format information to obtain the converted texture data. The format information is obtained by the GPU driver running on the CPU and written to the storage space. For bound resources, the memory address for writing the format information is pre-allocated and configured. When a STORE instruction needs to be executed on the texture data, the CPU driver configures the format information to the MOVE module, which then performs the format conversion on the texture data according to the format information. Optionally, when configuring the format information to the MOVE module, the GPU driver configures the storage address of the format information in the storage space to the MOVE module, which then retrieves the texture data format information from the storage space based on the storage address.

[0037] DMA is used to map virtual addresses to physical addresses, and physical addresses are used to express the write address of texture data in memory space.

[0038] Figure 2 This is a schematic diagram of an instruction channel provided in an exemplary embodiment of this application, as shown below. Figure 2As shown, in the instruction channel provided by mode 1, the texture coordinates of the texture data are first mapped to the virtual address 211 through TAP210, and the format information 222 and texture data 221 of the texture data 221 are input to the MOVE module 230. The MOVE module 230 performs format conversion on the texture data 221 according to the format information 222 to obtain the format-converted texture data.

[0039] The converted texture data and virtual address 211 are sent to DMA240, which maps virtual address 211 to physical address, and then writes the converted texture data into memory space according to the physical address.

[0040] like Figure 2 As shown, after the GPU driver configures the storage address to the MOVE module, the MOVE module obtains the format information written in the storage address from the register, and then performs format conversion on the texture data based on the format information.

[0041] However, when the aforementioned texture data is implemented as an unbound resource, the write address of the format information in the storage space is dynamically determined. That is, there is no need to pre-divide the storage space and allocate a subspace to each texture data. Instead, the write address of the format information is dynamically determined according to the writing progress. Therefore, the GPU driver cannot specify the write address of the format information in the storage space to the MOVE module, and the MOVE module cannot know the format information of the texture data, resulting in format conversion failure.

[0042] In response to the above problems, this application provides a texture processing method that obtains the format information of texture data through the hardware inside the GPU, thereby enabling the texture data to be converted based on the format information. Figure 3 This is a schematic flowchart of a texture processing method provided in an exemplary embodiment of this application, as shown below. Figure 3 As shown, this method can be executed by a terminal, a server, or both. Optionally, this method is applied to a texture processing apparatus, which includes a format acquisition unit, a virtual address acquisition unit, and a format conversion unit.

[0043] The format acquisition unit is connected to the virtual address acquisition unit, and the virtual address acquisition unit is connected to the format conversion unit. These connections represent data interaction between the units. Figure 3 As shown, the method includes the following steps: Step 310: Receive the first storage instruction.

[0044] The first storage instruction received by the format acquisition unit is implemented as a STORE instruction. The STORE instruction is a machine instruction in the shader program used to implement texture data storage. In some embodiments, the STORE instruction is an instruction to store the first texture data sent by the host, or the STORE instruction is an instruction to store the first texture data generated by the GPU during texture processing.

[0045] The first storage instruction includes the first texture data to be stored, the first texture coordinates, and the descriptor index. The first texture coordinates are the texture coordinates corresponding to the first texture data, used to express the coordinate position of a pixel in the texture space. The first texture data includes the first texture coordinates of at least one pixel; that is, the first texture data includes the first texture coordinates corresponding to multiple pixels, or the first texture data includes the first texture coordinates corresponding to a single pixel. Here, the texture coordinates represent address pointers that pin the two-dimensional image onto the three-dimensional model. In other words, each pixel on the three-dimensional model corresponds to a texture coordinate on the two-dimensional image. The texture coordinates are expressed in the form (u, v), where u corresponds to the horizontal coordinate position on the two-dimensional image, and v corresponds to the vertical coordinate position on the two-dimensional image.

[0046] Step 320: Based on the descriptor index, obtain the format information corresponding to the first texture data.

[0047] The descriptor index is the index of the descriptor allocated to the first texture data. It is used to retrieve the descriptor corresponding to the first texture data from the descriptor space index. A descriptor is a string describing the static attributes of the first texture data using a continuous sequence of bytes. Descriptors include, but are not limited to, at least one of the following: 1. Base address of the first texture data: that is, the address of the first byte when the first texture data is written to memory space. Subsequent reads and writes of the first texture data by the GPU are performed from this base address combined with the address offset.

[0048] 2. Format Information: Used to express the target format for the first texture data conversion. In some embodiments, the data format also includes the source format of the first texture data, bytes per pixel, compression mode, etc. For example, the target format of the first texture data is R8G8B8A8_UNORM, which means that the first texture data is converted into unsigned normalized integer data with 8 bits for the red channel component, 8 bits for the green channel component, 8 bits for the blue channel component, and 8 bits for the transparency channel component.

[0049] In some embodiments, the format information includes at least one of the following: 2.1 Pixel format: refers to the encoding method of a single pixel in the first texture data, used to indicate the format requirements such as color and depth. For example, RGBA8 means 32 bits per pixel, with each channel of integer data occupying 8 bits; RGB32F means 96 bits per pixel, with each channel of floating-point data occupying 32 bits.

[0050] 2.2 Channel bit width: refers to the number of bits occupied by each channel component. The channel bit width affects data precision and memory usage. For example, in RGB565, R occupies 5 bits, G occupies 6 bits, and B occupies 5 bits.

[0051] 2.3 Compression Status: Includes compressed / uncompressed. When the format information is compressed, it means that multiple pixels are packaged into 8 or 16-byte blocks using a block algorithm to reduce video memory and bandwidth. When the format information is uncompressed, it means that the first texture data is stored pixel by pixel without additional compression or decompression operations, making access simpler but requiring more space.

[0052] 2.4 Structured State: Includes structured / unstructured buffers. For buffer data, when the format information represents a structured buffer, it means that the data elements of the buffer data are fixed-size user-defined structures, written to the buffer according to the user-defined structure, such as float4 or other custom structures. In this case, the GPU can perform random reads and writes based on the buffer index. When the format information represents an unstructured buffer, it means that the buffer data is treated only as a byte stream, requiring manual offsetting and type conversion during location.

[0053] 3. Texture dimensions and texture size of texture data: The effective range and sampling boundary of texture coordinates are defined by parameters, such as width, height, depth, and number of array layers. Among them, the texture size includes at least width and height.

[0054] 4. Address translation information: This indicates the translation rules for converting the first texture coordinates into virtual addresses. The address translation information includes the addressing mode of the first texture data, including wrap addressing mode, clamp addressing mode, mirror addressing mode, etc.

[0055] It is worth noting that the information in the above descriptors is only an illustrative example, and the types of information in the descriptors may be more or less. The embodiments of this application do not limit the content of the descriptors.

[0056] A descriptor is information generated by the GPU driver based on data parameters provided by the application when creating the shader program, and written into the descriptor space. When writing a descriptor to the descriptor space, the driver assigns a descriptor index to the descriptor and writes it to the descriptor space based on that index. The descriptor space can be implemented as at least one of the following in the GPU: register space, memory space, or cache space.

[0057] The format acquisition unit retrieves the descriptor based on the descriptor index and parses the information field corresponding to the descriptor to obtain the format information corresponding to the first texture data. This eliminates the need for the CPU driver to frequently participate in the format information acquisition process, thus improving hardware processing efficiency.

[0058] In this embodiment, the format acquisition unit obtains the descriptor corresponding to the first texture data based on the descriptor index, and obtains the format information corresponding to the first texture data from the descriptor.

[0059] Based on the descriptor index, obtain the descriptor address; based on the descriptor address, obtain the descriptor corresponding to the first texture data; parse the descriptor to obtain the format information corresponding to the first texture data.

[0060] In some embodiments, the format acquisition unit obtains the descriptor address based on the descriptor index; obtains the descriptor corresponding to the first texture data based on the descriptor address; and parses the descriptor to obtain the format information corresponding to the first texture data.

[0061] The GPU includes an address space, which stores the mapping between descriptor indices and descriptor addresses. Optionally, when generating a descriptor, the GPU driver allocates a descriptor index to the descriptor and writes the descriptor into the descriptor space based on the descriptor index, writing the descriptor index and the descriptor address in the descriptor space into the address space. The address space is implemented as at least one of the following in the GPU: register space, memory space, and cache space.

[0062] After obtaining the descriptor index, the format acquisition unit obtains the descriptor address corresponding to the descriptor index from the address space, and obtains the descriptor corresponding to the first texture data from the descriptor space based on the descriptor address.

[0063] Optionally, the GPU also includes a cache space, which caches some descriptor indices and the descriptors corresponding to those indices. First, the descriptor index corresponding to the first texture data is searched in the cache space. If the descriptor index corresponding to the first texture data is hit in the cache space, the descriptor corresponding to the first texture data is directly retrieved from the cache space. If the descriptor index corresponding to the first texture data is not hit in the cache space, the address of the descriptor corresponding to the first texture data is retrieved from the address space based on the descriptor index, and the descriptor corresponding to the first texture data is retrieved from the descriptor space based on the descriptor address.

[0064] In some embodiments, the descriptor includes at least one information field corresponding to the first texture data. Parsing the descriptor to obtain the format information means reading the information field in the descriptor that corresponds to the format information to obtain the format information corresponding to the first texture data.

[0065] For illustrative purposes, please refer to the following: Figure 4 It illustrates a schematic diagram of the information field corresponding to the descriptor provided in an exemplary embodiment of this application, such as... Figure 4 As shown, the format acquisition unit obtains the descriptor 420 corresponding to the first texture data according to the descriptor index 410. The descriptor 420 includes at least a base address field 421, a format information field 422, an address translation information field 423, and a texture size field 424. Among them, the format information field 422 is used to express the format information of the first texture data, so the format acquisition unit reads the format information field 422 from the descriptor 420 and obtains the format information of the first texture data.

[0066] Parse the descriptor to obtain at least one information field in the descriptor, including a format information field; based on the format information field, obtain the format information corresponding to the first texture data.

[0067] In some embodiments, a format acquisition unit parses a descriptor to obtain at least one information field in the descriptor, including a format information field, and obtains the format information corresponding to the first texture data based on the format information field. The aforementioned information fields include, but are not limited to, a base address field, a format information field, an address translation information field, and a texture size field.

[0068] The descriptor indexes generated in real time by the format acquisition unit for different needs can be automatically processed by the hardware to obtain the configuration information required for texture processing, thus realizing dynamic resource access. At the same time, it reduces the dependence on the CPU and reduces the CPU performance overhead, reduces complex binding and parsing processing, thereby freeing up the CPU's computing power to perform more complex logic processing or computation scheduling, and improving the efficiency of texture processing.

[0069] In some embodiments, after obtaining the format information corresponding to the first texture data based on the aforementioned descriptor index, the format acquisition unit sends a first storage instruction and format information to the virtual address acquisition unit. Optionally, the first storage instruction is used to instruct the virtual address acquisition unit to convert the first texture coordinates into a virtual address by reading and calculating.

[0070] Virtual addresses are used to access video memory or system memory. A virtual address is an intermediary address between texture coordinates and physical addresses.

[0071] Step 330: Convert the first texture coordinates to obtain the virtual address corresponding to the first texture data.

[0072] Based on the descriptor index, the base address and address translation information corresponding to the first texture data are obtained. The base address is used to indicate the starting address of the first texture data in the virtual storage space, and the address translation information is used to indicate the conversion rules for converting the first texture coordinates into virtual addresses. Based on the base address and address translation information, the first texture coordinates are converted to obtain the virtual address corresponding to the first texture data.

[0073] In some embodiments, the virtual address acquisition unit obtains the base address and address translation information corresponding to the first texture data based on the descriptor index; based on the base address and address translation information, it transforms the first texture coordinates to obtain the virtual address corresponding to the first texture data. The base address indicates the starting address of the first texture data in the virtual storage space, i.e., the base address of the first texture data contained in the aforementioned descriptor, and the address translation information indicates the transformation rules for converting the first texture coordinates to the virtual address. Optionally, the base address refers to the base address of the first texture data contained in the aforementioned descriptor.

[0074] The first texture coordinates corresponding to the first texture data are processed through a unified virtual address acquisition process. This merges the processing processes for different types of texture data, reduces the overhead of path selection, lowers the complexity of address calculation, and improves the efficiency of texture processing.

[0075] Based on the descriptor index, obtain the texture size corresponding to the first texture data; based on the texture size and address translation information, perform proportional scaling on the first texture coordinates to obtain the second texture coordinates; based on the second texture coordinates, obtain the address offset corresponding to the first texture data; based on the base address and the address offset, calculate the virtual address.

[0076] In some embodiments, the virtual address acquisition unit obtains the texture size corresponding to the first texture data based on the descriptor index; performs proportional scaling on the first texture coordinates based on the texture size and address conversion information to obtain the second texture coordinates; obtains the address offset corresponding to the first texture data based on the second texture coordinates; and calculates the virtual address based on the base address and the address offset.

[0077] In some embodiments, the virtual address acquisition unit obtains the texture size corresponding to the first texture data based on the descriptor index. The method for obtaining the texture size can refer to the method for obtaining the format information described above, and will not be repeated here.

[0078] Texture dimensions are defined by, but are not limited to, the following values: 1. Width: Represents the number of texels in the x-direction, such as the number of texels in the horizontal direction.

[0079] 2. Height: Represents the number of texels in the y-direction, such as the number of texels in the vertical direction. When the texture type is Texture 1D, height is 1.

[0080] 3. Depth: Represents the number of texels in the z-direction, which is perpendicular to the coordinate axes of the x and y directions. When the texture type is Texture 2D / 1D, depth is 1.

[0081] 4. Array Layers: Represents the number of texture images of the same size at the same texture layer. The texture layer is determined by the distance between the texture image and the camera. Schematic, the farther the texture image is from the camera, the smaller the texture image; the closer the texture image is to the camera, the larger the texture image. Automatic switching between texture images at different layers eliminates aliasing and saves bandwidth.

[0082] 5. Mip Levels: These represent a series of image levels with decreasing resolutions generated from the same texture image, with each level representing a texture image of a different resolution.

[0083] The virtual address acquisition unit performs a scaling operation on the first texture coordinates based on the texture size to obtain the second texture coordinates. Schematably, the first texture coordinates are expressed as (u, v), and the texture size includes width and height. Therefore, scaling the first texture coordinates based on the texture size means multiplying the width of the texture size by the first texture coordinate u to obtain the second texture coordinate u. And, multiply the height of the texture size by the v of the first texture coordinate to obtain the v of the second texture coordinate. Thus, the second texture coordinates (u) are obtained. v ).for example, , .

[0084] In some embodiments, address translation information is also introduced during the conversion from the first texture coordinates to the virtual address. The introduction of address translation information includes at least one of the following methods: 1. Based on the address translation information, the first texture coordinates are transformed to the preset texture expression range to obtain the transformed first texture coordinates. The transformed first texture coordinates are scaled proportionally based on the texture size to obtain the second texture coordinates. After obtaining the address offset based on the second texture coordinates, the virtual address is obtained.

[0085] The preset texture representation range includes [0, 1], meaning that the coordinate data of the first texture coordinates is mapped to the range [0, 1]. Optionally, the address translation information includes the addressing mode of the first texture data, and the coordinate data of the first texture coordinates is mapped to the range [0, 1] according to the addressing mode. For example, if the addressing mode of the first texture data includes a wrap addressing mode, the decimal part is taken to map the first texture coordinates to [0, 1], such as: u =u u =3.7 3 = 0.7, v =v v = 1.2 ( 2) = 0.8, where u′′ is the horizontal coordinate value in the first texture coordinate after conversion, and v′′ is the vertical coordinate value in the first texture coordinate after conversion.

[0086] 2. Scale the first texture coordinates proportionally based on the texture size to obtain the second texture coordinates; convert the second texture coordinates to a preset size range according to the address conversion information to obtain the converted second texture address; obtain the address offset based on the converted second texture address to obtain the virtual address.

[0087] The preset size range includes [0, width] for texture width and [0, height] for texture height. That is, the coordinate data of the second texture coordinates is mapped to a horizontal texture coordinate range of [0, width] and a vertical texture coordinate range of [0, height]. Optionally, the address translation information includes the addressing mode of the first texture data, and the coordinate data of the second texture coordinates is mapped to the preset size range according to the addressing mode. For example, if the addressing mode of the first texture data includes a wrap addressing mode, the coordinate data of the second texture coordinates is mapped to the preset size range according to a preset algorithm.

[0088] In some embodiments, after obtaining the second texture coordinates, the address offset of the first texture data is obtained based on the second texture coordinates. The virtual address acquisition unit obtains the per-pixel byte corresponding to the first texture data from the descriptor of the first texture data, that is, the number of bytes occupied by the data corresponding to each pixel. The address offset of the first texture data is calculated as follows: the product of the vertical texture coordinate and the texture width is added to the sum of the horizontal texture coordinates, and the product between the sum and the per-pixel byte is calculated to obtain the address offset, such as: address offset offset=(y×width+x)×bytes_per_pixel, where y refers to the vertical texture coordinate, width refers to the texture width, x refers to the horizontal texture coordinate, and bytes_per_pixel refers to the per-pixel byte.

[0089] The address offset corresponding to the first texture data is obtained by the virtual address acquisition unit, which combines the processing flow for different types of texture data, reduces the overhead of path selection, reduces the complexity of address calculation, and improves the efficiency of texture processing.

[0090] After calculating the address offset, the virtual address acquisition unit calculates the virtual address corresponding to the first texture data based on the base address and the address offset. Schematic, virtual address = base address + address offset.

[0091] After the virtual address acquisition unit acquires the virtual address, it sends the first storage instruction, the virtual address, and the format information to the format conversion unit. The format conversion unit receives the first storage instruction, the virtual address, and the format information. Based on the format information, the format conversion unit performs format conversion on the first texture data to obtain the second texture data. It then generates a second storage instruction, which includes the second texture data and the virtual address. The second storage instruction is used to instruct the writing of the second texture data into the memory space.

[0092] In some embodiments, the format information of the first texture data includes the target format for converting the first texture data, that is, the first texture data needs to be converted to the target format indicated by the format information.

[0093] Step 340: Based on the format information, perform format conversion on the first texture data to obtain the second texture data.

[0094] If the format of the first texture data is inconsistent with the target format indicated in the format information, the format conversion unit performs format conversion on the first texture data based on the format information to obtain the second texture data. Format conversion includes at least the following conversion methods: 1. Channel rearrangement: This refers to rearranging the storage order of color channels in the first texture data. Only bytes are moved, without modifying the values. It is used to correct the channel order or adapt to the graphics application programming interface (API). For example, converting BGRA8888 to RGBA8888 only swaps the R and B channels.

[0095] 2. Bit width compression / expansion: This refers to shortening or lengthening the bit width of at least one channel in the first texture data. Bit width shortening can be achieved by truncation, and bit width lengthening can be achieved by padding. This is used to adjust precision and memory usage. For example, when converting RGB8 to R5G6B5, the 8-bit data is truncated to 5 or 6 bits.

[0096] 3. Data Type Conversion: Changing the numerical representation, including conversions between floating-point, integer, and normalized types, is used to adjust the numerical range of the first texture data so that it matches the needs of the shader program, or is adaptively written to the corresponding registers. For example, converting FLOAT32 to SNORM16, and UINT8 to UNORM8. FLOAT32 refers to a 32-bit floating-point number, SNORM16 refers to a 16-bit signed normalized integer, UINT8 refers to an 8-bit unsigned integer, and UNORM8 refers to an 8-bit unsigned normalized integer.

[0097] 4. Block compression format transcoding: This refers to writing uncompressed pixels from the first texture data into a block compression format, which is used to reduce video memory usage with a fixed block algorithm.

[0098] 5. Spatial transformation: refers to mapping the linear color values ​​in the first texture data to a non-linear space.

[0099] It is worth noting that the above-described format conversion methods are merely illustrative examples, and the specific methods of format conversion are not limited in the embodiments of this application.

[0100] Optionally, the format conversion unit obtains the first texture data and its corresponding format information, and then splits the first texture data to obtain at least one channel component. Based on the format information, the format conversion unit performs format conversion on the at least one channel component, including at least one of the above-mentioned format conversion types. Based on the format information, the format conversion unit merges the format-converted at least one channel component into second texture data.

[0101] Step 350: Generate a second storage instruction based on the second texture data and the virtual address.

[0102] The format conversion unit generates a second storage instruction, which includes second texture data and a virtual address. The second storage instruction is used to instruct the writing of the second texture data into the memory space.

[0103] In some embodiments, the above-mentioned memory space is implemented as at least one of the following: 1. Global memory; 2. Constant memory; 3. Texture memory; 4. Local memory; 5. Shared memory. It is worth noting that the above memory spaces are merely illustrative examples, and the embodiments of this application do not limit them. The GPU's video memory space, or the GPU's system memory.

[0104] In some embodiments, the texture processing device is implemented as a texture processing unit (TPU) in a GPU. The format conversion unit is a new functional unit added on the basis of the TPU structure, which is used to provide the function of converting the texture data according to the format information on the basis of the TPU.

[0105] The TPU module is the module in the GPU responsible for texture mapping and processing. The TPU module can perform operations such as rotation, resizing, and distortion on bitmap images through a series of dedicated circuits. In related technologies, the TPU module usually includes a sampling and loading processing unit for texture data.

[0106] In some embodiments, the texture processing device is the Texture Addressing Generator (TAG) in the TPU, and the format conversion unit is a new functional unit added on the basis of the TAG structure.

[0107] In summary, the method provided in this application, during the execution of the STORE instruction, reads the format information corresponding to the first texture data through the descriptor index in the STORE instruction. This allows for format conversion of the first texture data based on the format information, and the resulting second texture data is then stored. By obtaining the format information, even if the texture data is implemented as an unbound resource and the format information cannot be directly obtained from the STORE, it can still be obtained from the GPU hardware perspective through the descriptor index. This ensures the accuracy of STORE texture processing for unbound resources and improves texture processing efficiency.

[0108] Figure 5 This is a schematic diagram of the texture processing stage in a texture processing method provided in an exemplary embodiment of this application, as shown below. Figure 5 As shown, the texture processing stage includes at least the following three stages: format acquisition stage 510, virtual address acquisition stage 520, and format conversion stage 530.

[0109] The format acquisition stage 510 is executed by the format acquisition unit, wherein in the format acquisition stage 510, ① the format acquisition unit reads the descriptor based on the descriptor index in the first storage instruction, and the descriptor includes the format information of the first texture data; ② the format acquisition unit obtains the format information of the first texture data from the descriptor.

[0110] In the format acquisition stage 510, the output of the format acquisition unit is the format information of the first texture data and the first storage instruction. The format acquisition unit outputs the format information of the first texture data and the first storage instruction respectively, or the format acquisition unit adds the format information of the first texture data to the first storage instruction and outputs it.

[0111] The virtual address acquisition stage 520 is executed by the virtual address acquisition unit. In the virtual address acquisition stage 520, ① the virtual address acquisition unit reads the descriptor based on the descriptor index in the first storage instruction. The descriptor includes the texture size, address translation information, and base address of the first texture data; ② the virtual address acquisition unit obtains the texture size, address translation information, and base address from the descriptor; ③ the virtual address acquisition unit obtains the address offset based on the first texture coordinates, texture size, and address translation information; ④ the virtual address acquisition unit combines the base address and the address offset to obtain the virtual address of the first texture data.

[0112] In the virtual address acquisition stage 520, the output of the virtual address acquisition unit is the format information of the first texture data, the virtual address, and the first storage instruction. The virtual address acquisition unit outputs the format information of the first texture data, the virtual address, and the first storage instruction respectively, or the virtual address acquisition unit adds at least one of the format information of the first texture data and the virtual address to the first storage instruction and outputs it.

[0113] The format conversion stage 530 is executed by the format conversion unit, wherein in the format conversion stage 530, the format conversion unit performs format conversion on the first texture data based on the format information of the first texture data to obtain the second texture data.

[0114] In the format conversion stage 530, the output of the format conversion unit is the second texture data and the virtual address. The format conversion unit outputs the second texture data and the virtual address separately, or the format conversion unit outputs the virtual address and the second texture data as a second storage instruction.

[0115] In an optional embodiment, the texture processing apparatus for applying the texture processing method further includes a first storage unit. Figure 6 This is a flowchart illustrating a texture processing method provided in another exemplary embodiment of this application, such as... Figure 6 As shown, the method includes the following steps.

[0116] Step 610: Based on the second storage instruction, obtain the physical address corresponding to the virtual address.

[0117] In some embodiments, the format conversion unit sends a second storage instruction to the first storage unit. The first storage unit is connected to the format conversion unit, and the connection relationship indicates that there is data interaction between the units.

[0118] In some embodiments, the first storage unit receives a second storage instruction; obtains the physical address corresponding to the virtual address; and writes the second texture data into the memory space based on the physical address.

[0119] Optionally, the first storage unit is implemented as a Level 1 (L1) cache, a Level 2 (L2) cache, or any other form of cache space.

[0120] The first storage unit is used to provide a cache space before the second texture data is written to the content space, that is, to provide a transit station for the second texture data. The second storage instructions are stored in the first storage unit, and when the first storage unit receives multiple storage instructions, the multiple storage instructions are sorted according to the queue, so that the texture data in the multiple storage instructions can be written to the memory space in sequence according to the queue.

[0121] Step 620: Write the second texture data into the memory space based on the physical address.

[0122] In some embodiments, the first storage unit directly obtains the physical address corresponding to the virtual address of the first texture data; or, the first storage unit sends a second storage instruction to a hardware unit capable of performing virtual address and physical address mapping, and the hardware unit implements the mapping of virtual address and physical address and completes the writing of the second texture data to the memory space.

[0123] In some embodiments, Figure 7 This is a schematic diagram illustrating the process of executing a second storage instruction provided in an exemplary embodiment of this application, as shown below. Figure 7 As shown, the first storage unit 710 sends a second storage instruction to the bus controller 720. The bus controller 720 determines the target memory space of the second storage instruction based on the virtual address in the second storage instruction. If the target memory space is inside the GPU and can be transmitted through the GPU's internal data transmission path, the bus controller 720 sends the second storage instruction to the System Level Cache (SLC) 730.

[0124] In this embodiment, as Figure 7As shown, the SLC730, acting as a crossbar switch, receives the second store instruction and, if it determines that the second store instruction requires virtual address to physical address mapping, sends the virtual address in the second store instruction to the Memory Management Unit (MMU) 740. The MMU 740 queries the page table based on the virtual address and converts the virtual address in the second store instruction into a physical address. The page table stores the mapping relationship between virtual and physical addresses. After the MMU sends the physical address back to the SLC730, it writes the second texture data from the second store instruction into the memory space via the bus based on the physical address.

[0125] In some embodiments, such as Figure 7 As shown, when the SLC730 receives the second storage instruction, it first searches internally for the physical address corresponding to the virtual address of the second texture data. When the virtual address of the second texture data is not found in the virtual address cached by the SLC730, the virtual address in the second storage instruction is sent to the MMU740.

[0126] Or in other embodiments, such as Figure 7 As shown, the first storage unit 710 sends the virtual address corresponding to the second texture data to the MMU 740 and receives the physical address corresponding to the virtual address fed back by the MMU 740, thereby the first storage unit 710 writes the second texture data into the memory space based on the physical address.

[0127] In some embodiments, such as Figure 7 As shown, after receiving the virtual address, MMU740 searches for the virtual address corresponding to the second texture data in the virtual addresses of the allocated physical addresses. If the virtual addresses of the allocated physical addresses include the virtual address corresponding to the second texture data, the allocated physical address is fed back to the first storage unit 710; if the virtual addresses of the allocated physical addresses do not include the virtual address corresponding to the second texture data, a physical address is allocated to the virtual address corresponding to the second texture data, and the allocated physical address is fed back to the first storage unit 710.

[0128] In summary, the method provided in this embodiment, during the execution of the STORE instruction, reads the format information corresponding to the first texture data through the descriptor index in the STORE instruction. This allows for format conversion of the first texture data based on the format information, and the resulting second texture data is then stored. By obtaining the format information, even if the texture data is implemented as an unbound resource and the format information cannot be directly obtained from the STORE, it can still be obtained from the GPU hardware perspective through the descriptor index. This ensures the accuracy of STORE texture processing for unbound resources and improves texture processing efficiency.

[0129] The method provided in this application uses the first storage unit as a transit station before writing the second texture data into the memory space. This avoids the blocking problem caused by the slow writing speed to the memory space when the texture data is written at a high frequency, improves the transmission throughput of texture data, reduces the delay of retransmitting lost or erroneous texture data, and thus improves the accuracy of writing texture data into the memory space.

[0130] In an optional embodiment, the texture processing apparatus for applying the texture processing method further includes an address unification unit. Figure 8 This is a flowchart illustrating a texture processing method provided in another exemplary embodiment of this application, such as... Figure 8 As shown, step 610 above can also be implemented as the following steps.

[0131] Step 810: Based on the second storage instruction, convert the virtual address into a target polynomial expression.

[0132] There exist at least two different virtual addresses that correspond to the same polynomial expression.

[0133] The address unification unit is used to unify virtual addresses. Optionally, the format conversion unit is connected to the address unification unit, and the address unification unit is connected to the first storage unit. The connection relationship is used to indicate that there is data interaction between the units.

[0134] In some embodiments, the address unification unit converts a virtual address into a polynomial expression. This polynomial expression uniquely identifies the virtual address. That is, multiple virtual addresses can be expressed as the same polynomial, and these same polynomials actually correspond to the same physical address. Therefore, multiple virtual addresses corresponding to the same polynomial can be unified into the same virtual address. In other words, converting a virtual address into a polynomial expression allows expressions with different virtual addresses but algebraic equivalence to have the same representation.

[0135] Step 820: Perform a unified operation on the virtual addresses based on the virtual address list.

[0136] Obtain a list of virtual addresses, which includes at least one correspondence between candidate virtual addresses and polynomial expressions; if the list of virtual addresses includes a target polynomial expression, express the virtual address as a candidate virtual address corresponding to the target polynomial expression; if the list of virtual addresses does not include a target polynomial expression, add the correspondence between the virtual address and the target polynomial expression to the list of virtual addresses; obtain a second storage instruction, where the virtual address in the second storage instruction is a unified address.

[0137] In some embodiments, after receiving the second storage instruction, the address unification unit converts the virtual address into a target polynomial expression, where at least two different virtual addresses correspond to the same polynomial expression; and obtains a list of virtual addresses, which includes a correspondence between at least one candidate virtual address and a polynomial expression.

[0138] In some embodiments, the address unification unit arranges the polynomial expression into a one-dimensional array as a coefficient vector, and uses the coefficient vector as a lookup key. A correspondence is established between the coefficient vector and register numbers to generate a virtual address list. The register number then becomes the value corresponding to the lookup key, where the register corresponding to the register number stores the virtual address corresponding to the coefficient vector.

[0139] Optionally, the above unified operation is implemented as follows: if the virtual address list includes the target polynomial expression, the virtual address is expressed as the candidate virtual address corresponding to the target polynomial expression; if the virtual address list does not include the target polynomial expression, the correspondence between the virtual address and the target polynomial expression is added to the virtual address list.

[0140] In some embodiments, the coefficient vector corresponding to the polynomial expression is obtained. The address unification unit traverses the virtual address list using the coefficient vector as the query key. If a match is found (i.e., the same key value is matched), the register number corresponding to the key value is obtained, and the virtual address in the register corresponding to the register number is used as the virtual address corresponding to the second texture data. If no match is found (i.e., the same key value is not matched), a new entry is created in the virtual address list. The coefficient vector obtained by converting the polynomial expression corresponding to the second texture data is used as the key value, and the virtual address corresponding to the second texture data is written into the register to obtain the register number. The coefficient vector and the memory number are then written into the new entry created in the virtual address list.

[0141] The virtual address in the second storage instruction is a unified address. That is, after the address unification unit performs a unification operation on the virtual address in the second storage instruction, it obtains the processed second storage instruction and sends it to the first storage unit. The processed second storage instruction includes the second texture data and the unified virtual address; the second storage instruction is used to instruct the writing of the second texture data into the memory space.

[0142] In summary, the method provided in this embodiment, during the execution of the STORE instruction, reads the format information corresponding to the first texture data through the descriptor index in the STORE instruction. This allows for format conversion of the first texture data based on the format information, and the resulting second texture data is then stored. By obtaining the format information, even if the texture data is implemented as an unbound resource and the format information cannot be directly obtained from the STORE, it can still be obtained from the GPU hardware perspective through the descriptor index. This ensures the accuracy of STORE texture processing for unbound resources and improves texture processing efficiency.

[0143] The method provided in this embodiment, through the processing of the address unification unit, will merge the polynomial expressions corresponding to the same virtual address when the coefficient vector is the same, thereby avoiding the repeated generation and sending of the second storage instruction, avoiding bandwidth waste during register reading, and reusing register numbers reduces register file write port contention, reduces register pressure, and eliminates redundant calculations and repeated accesses, thereby improving the accuracy of writing texture data to memory space.

[0144] In an optional embodiment, the texture processing apparatus for applying the texture processing method further includes a pixel conversion unit. Figure 9 This is a flowchart illustrating a texture processing method provided in another exemplary embodiment of this application, such as... Figure 9 As shown, step 310 above can also be implemented as the following steps.

[0145] Step 910: The instruction descrambling unit receives the first storage instruction and format information.

[0146] In some embodiments, the texture processing device that applies the texture processing method is a device in a TPU. The TPU is used to perform operations such as texture data sampling. Based on the TPU structure, the texture processing device further includes an instruction decoupling unit. The format acquisition unit is connected to the pixel conversion unit through the instruction decoupling unit. The connection relationship is used to indicate that there is data interaction between the units.

[0147] The instruction decoupling unit receives the first storage instruction and format information; in response to the instruction type of the first storage instruction being a storage type, it sends the first storage instruction and format information to the pixel conversion unit.

[0148] In some embodiments, within the TPU architecture, the instruction demultiplexing unit needs to distinguish the instruction type corresponding to the received instruction. Instruction types include storage type, load type, sampling type, etc.

[0149] In some embodiments, the instruction descrambling unit identifies the instruction type based on the parsed instruction field or message header on the interface.

[0150] In step 920, the instruction decoupling unit, in response to the instruction type of the first storage instruction being a storage type, sends the first storage instruction and format information to the pixel conversion unit.

[0151] In this embodiment, when the instruction decoupling unit receives an instruction, it determines the transmission channel of the instruction based on the instruction type. Optionally, if the instruction type is implemented as a storage type or a load type, the instruction decoupling unit forwards the instruction to the pixel conversion unit. Responding to the fact that the instruction type of the first storage instruction is a storage type, the instruction decoupling unit sends the first storage instruction and format information to the pixel conversion unit through the format acquisition unit.

[0152] In some embodiments, the pixel conversion unit is configured with first configuration information 8p2c for a load instruction and second configuration information 4p4c for a store instruction. 8p2c means that for a load instruction, the pixel conversion unit processes 8 pixels in parallel per clock cycle, wherein the number of channels for each pixel is 2 or less. 4p4c means that for a store instruction, the pixel conversion unit processes 4 pixels in parallel per clock cycle, wherein the number of channels for each pixel is 4 or less.

[0153] In step 930, the pixel conversion unit converts the first texture coordinates into floating-point data representation when the first texture coordinates are expressed as integer data, based on the first storage instruction and format information sent by the format acquisition unit.

[0154] Based on the first storage instruction and format information, if the first texture coordinates are expressed as integer data, the first texture coordinates are converted into floating-point data.

[0155] In some embodiments, the pixel conversion unit receives a first storage instruction and format information sent by the format acquisition unit; if the first texture coordinates are expressed as integer data, it converts the first texture coordinates into floating-point data; and sends the first storage instruction and format information to the virtual address acquisition unit, wherein the first storage instruction includes the first texture coordinates expressed as floating-point data. The pixel conversion unit is connected to the format acquisition unit and to the virtual address acquisition unit, and the above connection relationship is used to indicate that there is data interaction between the units.

[0156] In some embodiments, when the first texture coordinates are expressed as the position coordinates of a pixel in the image, the first texture coordinates are implemented as integer data. For example, the bottom left corner of the image is taken as the origin, and the position of the pixel in the image is expressed by the position coordinates (x, y), where x indicates that the pixel is the xth pixel in the horizontal direction, and y indicates that the pixel is the yth pixel in the vertical direction.

[0157] When the first texture coordinates are expressed as UV coordinates, the first texture coordinates are implemented as floating-point data.

[0158] Based on the above, when the first texture coordinates are expressed as position coordinates, the pixel conversion unit converts the position coordinates (x, y) into UV coordinates (u, v). During the coordinate conversion process, normalization is performed based on the texture size. Illustratively, ensuring that the pixel coordinate values ​​x and y are within valid ranges, i.e., x is in the interval [0, width-1] and y is in the interval [0, height-1], the pixel coordinate values ​​are divided by the corresponding texture size and normalized to the range [0, 1], i.e., u = x / (width-1), v = y / (height-1). The result (u, v) obtained in this way is the UV coordinate corresponding to the first texture data.

[0159] Step 940: The pixel conversion unit sends the first storage instruction and format information to the virtual address acquisition unit.

[0160] After completing the data type expression of the first texture coordinates, the pixel conversion unit sends a first storage instruction and format information to the virtual address acquisition unit. The first storage instruction includes the first texture coordinates expressed as floating-point data.

[0161] like Figure 9 As shown, in some embodiments, steps 910 to 940 can also be implemented as steps 950 to 980.

[0162] Step 950: The instruction splitter unit receives the sampling instruction.

[0163] The sampling instruction includes third texture data. In some embodiments, the instruction demultiplexing unit needs to distinguish the instruction type corresponding to the received instruction, which includes the sampling type.

[0164] The texture processing apparatus that applies the texture processing method further includes a texture sampling unit; the texture sampling unit is connected to the instruction decoupling unit, and the texture sampling unit is connected to the virtual address acquisition unit, the above connection relationship is used to represent the data interaction between the units.

[0165] Step 960: The instruction demultiplexing unit responds to the sampling instruction by sending a sampling instruction to the texture sampling unit, since the instruction type of the sampling instruction is a sampling type.

[0166] In this embodiment, when the instruction decoupling unit receives an instruction, it decides which channel to send the instruction based on the instruction type. Optionally, if the instruction type is implemented as a sampling type, the instruction decoupling unit forwards the instruction to the texture sampling unit.

[0167] Step 970: The texture sampling unit performs texture sampling on the third texture data based on the sampling instruction to obtain the sampling result.

[0168] In some embodiments, the texture sampling unit is configured with configuration information 4p4c, which means that for a sampling instruction, the texture sampling unit processes 4 pixels in parallel per clock cycle, wherein the number of channels for each pixel is 4 or less.

[0169] The instruction descrambling unit responds to the sampling instruction by forwarding the sampling instruction to the texture sampling unit if the instruction type is sampling type. This avoids the third texture data that needs to be sampled in the sampling instruction from entering the wrong processing channel, which would cause texture data processing errors and improve the accuracy of texture processing.

[0170] Step 980: The texture sampling unit sends the sampling results to the virtual address acquisition unit.

[0171] After the texture sampling unit obtains the sampling result obtained after performing texture sampling on the third texture data, in order to write the sampling result into the correct memory space, it needs to send the sampling result to the virtual address acquisition unit, which then obtains the virtual address corresponding to the sampling result.

[0172] That is, in some embodiments, such as Figure 9 As shown, the instruction decoupling unit is connected to both the texture sampling unit and the pixel conversion unit. When the instruction decoupling unit receives an instruction, it determines the transmission channel of the instruction based on the instruction type. Optionally, if the instruction type is implemented as a storage type or a load type, the instruction decoupling unit forwards the instruction to the pixel conversion unit; if the instruction type is implemented as a sampling type, the instruction decoupling unit forwards the instruction to the texture sampling unit. The above connection relationship is used to indicate that there is data interaction between the units.

[0173] In some embodiments, the texture sampling unit is configured with configuration information 4p4c, which means that for a sampling instruction, the texture sampling unit processes 4 pixels in parallel per clock cycle, wherein the number of channels per pixel is 4 or less. The pixel conversion unit is configured with first configuration information 8p2c for a load instruction and second configuration information 4p4c for a store instruction. 8p2c means that for a load instruction, the pixel conversion unit processes 8 pixels in parallel per clock cycle, wherein the number of channels per pixel is 2 or less; 4p4c means that for a store instruction, the pixel conversion unit processes 4 pixels in parallel per clock cycle, wherein the number of channels per pixel is 4 or less.

[0174] Combination Figure 9 The flowchart of the texture processing method is shown, and the execution process of the first storage instruction is explained in general.

[0175] The format acquisition unit first receives a first storage instruction, which is an instruction generated during GPU data processing for storing the first texture data. Schematic, the first storage instruction is an instruction issued by the Unified Shading Cluster (USC) in the GPU after performing vertex calculations, pixel calculations, or general calculations. The first storage instruction includes the first texture data, first texture coordinates, and a descriptor index. The format acquisition unit obtains the format information corresponding to the first texture data based on the descriptor index and sends the first storage instruction and format information to the instruction decoupling unit. Specifically, the format acquisition unit searches for the descriptor corresponding to the first texture data based on the descriptor index and obtains the format information corresponding to the first texture data from the descriptor.

[0176] The instruction decoupling unit receives the first storage instruction and format information sent by the format acquisition unit, and decouples and forwards the first storage instruction based on its instruction type (i.e., storage type). In response to the instruction type of the first storage instruction being a storage type, the instruction decoupling unit sends the first storage instruction and format information to the pixel conversion unit, which is a unit used to process storage type instructions and loading type instructions.

[0177] After receiving the first storage instruction and format information, the pixel conversion unit converts the first texture coordinates, which are expressed as integer data, into floating-point data; and sends the first storage instruction and format information to the virtual address acquisition unit. The first storage instruction sent to the virtual address acquisition unit includes the first texture coordinates expressed as floating-point data.

[0178] After receiving the first storage instruction and format information, the virtual address acquisition unit converts the first texture coordinates to obtain the virtual address corresponding to the first texture coordinates; and sends the first storage instruction, virtual address and format information to the format conversion unit.

[0179] After receiving the first storage instruction, virtual address and format information, the format conversion unit performs format conversion on the first texture data to obtain the second texture data; generates a second storage instruction, which includes the second texture data and virtual address, and sends the second storage instruction to the address unification unit.

[0180] After receiving the second storage instruction, the address unification unit converts the virtual address into a target polynomial expression, where at least two different virtual addresses correspond to the same polynomial expression; it obtains a virtual address list, which includes a correspondence between at least one candidate virtual address and a polynomial expression; if the virtual address list includes the target polynomial expression, it expresses the virtual address as a candidate virtual address corresponding to the target polynomial expression; if the virtual address list does not include the target polynomial expression, it adds the correspondence between the virtual address and the target polynomial expression to the virtual address list; and it sends the second storage instruction to the first storage unit.

[0181] After receiving the second storage instruction, the first storage unit obtains the physical address corresponding to the virtual address and writes the second texture data into the memory space based on the physical address.

[0182] In summary, the method provided in this embodiment, during the execution of the STORE instruction, reads the format information corresponding to the first texture data through the descriptor index in the STORE instruction. This allows for format conversion of the first texture data based on the format information, and the resulting second texture data is then stored. By obtaining the format information, even if the texture data is implemented as an unbound resource and the format information cannot be directly obtained from the STORE, it can still be obtained from the GPU hardware perspective through the descriptor index. This ensures the accuracy of STORE texture processing for unbound resources and improves texture processing efficiency.

[0183] The method provided in this embodiment, when different types of instructions such as storage, sampling, and loading share hardware processing channels to a certain extent, preprocesses the first texture coordinates through a pixel conversion unit to avoid positional errors caused by incorrect first texture coordinate formats; and decides the sending channel of the instruction based on the different instruction types through an instruction decoupling unit to avoid read / write conflicts of texture data caused by improper decisions, thereby avoiding texture data processing errors caused by entering the wrong processing channel when the conflict is not resolved, thus improving the accuracy of texture processing.

[0184] The following are embodiments of the apparatus described in this application, which can be used to execute the embodiments of the method described in this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the method described in this application.

[0185] Please refer to Figure 10 It shows a schematic diagram of the structure of a texture processing apparatus 1000 provided in one embodiment of this application, as follows: Figure 10As shown, the device includes: a format acquisition unit 1010, a virtual address acquisition unit 1020, and a format conversion unit 1030. The format acquisition unit 1010 is connected to the virtual address acquisition unit 1020, and the virtual address acquisition unit 1020 is connected to the format conversion unit 1030. The above connection relationship is used to indicate that there is data interaction between the units.

[0186] The format acquisition unit 1010 is configured to receive a first storage instruction, which includes first texture data to be stored, first texture coordinates, and descriptor index; and to acquire the format information corresponding to the first texture data based on the descriptor index.

[0187] In an optional embodiment, the format acquisition unit 1010 is further configured to acquire a descriptor address based on a descriptor index; acquire a descriptor corresponding to the first texture data based on the descriptor address; and parse the descriptor to obtain the format information corresponding to the first texture data.

[0188] In an optional embodiment, the format acquisition unit 1010 is further configured to parse the descriptor to obtain at least one information field in the descriptor, including a format information field; and based on the format information field, to obtain the format information corresponding to the first texture data.

[0189] The format acquisition unit 1010 is also configured to send a first storage instruction and format information to the virtual address acquisition unit 1020.

[0190] The virtual address acquisition unit 1020 is configured to convert the first texture coordinates to obtain the virtual address corresponding to the first texture data.

[0191] In an optional embodiment, the virtual address acquisition unit 1020 is further configured to acquire the base address and address translation information corresponding to the first texture data based on the descriptor index. The base address is used to indicate the starting address of the first texture data in the virtual storage space, and the address translation information is used to indicate the conversion rules for converting the first texture coordinates into virtual addresses. The virtual address acquisition unit 1020 is also configured to convert the first texture coordinates based on the base address and address conversion information to obtain the virtual address corresponding to the first texture data.

[0192] In an optional embodiment, the virtual address acquisition unit 1020 is further configured to: acquire the texture size corresponding to the first texture data based on the descriptor index; perform proportional scaling on the first texture coordinates based on the texture size and address conversion information to obtain the second texture coordinates; acquire the address offset corresponding to the first texture data based on the second texture coordinates; and calculate the virtual address based on the base address and the address offset.

[0193] The virtual address acquisition unit 1020 is also configured to send a first storage instruction, a virtual address, and format information to the format conversion unit 1030.

[0194] The format conversion unit 1030 is configured to perform format conversion on the first texture data based on format information to obtain the second texture data; and generate a second storage instruction, which includes the second texture data and a virtual address, and is used to instruct the writing of the second texture data into the memory space.

[0195] like Figure 10 The texture processing device 1000 further includes a first storage unit 1040, an address unification unit 1050, a pixel conversion unit 1060, an instruction splitting unit 1070, and a texture sampling unit 1080; the format conversion unit 1030 is connected to the address unification unit 1050, and the address unification unit 1050 is connected to the first storage unit 1040; the format acquisition unit 1010 is connected to the pixel conversion unit 1060 through the instruction splitting unit 1070, and the pixel conversion unit 1060 is connected to the virtual address acquisition unit 1020; the texture sampling unit 1080 is connected to the instruction splitting unit 1070, and the texture sampling unit 1080 is connected to the virtual address acquisition unit 1020. The above connection relationships are used to indicate that there is data interaction between the units.

[0196] In an optional embodiment, the format conversion unit 1030 is further configured to send a second storage instruction to the first storage unit 1040.

[0197] In an optional embodiment, the format conversion unit 1030 is further configured to send a second storage instruction to the address unification unit 1050, which is used to unify virtual addresses. Address unification unit 1050 is configured to convert virtual addresses into target polynomial expressions, where at least two different virtual addresses correspond to the same polynomial expression; and to obtain a list of virtual addresses, which includes a correspondence between at least one candidate virtual address and a polynomial expression. The address unification unit 1050 is further configured to, when the virtual address list includes the target polynomial expression, express the virtual address as a candidate virtual address corresponding to the target polynomial expression; when the virtual address list does not include the target polynomial expression, add the correspondence between the virtual address and the target polynomial expression to the virtual address list; and send a second storage instruction to the first storage unit 1040, wherein the virtual address in the second storage instruction is the unified address.

[0198] The first storage unit 1040 is configured to receive a second storage instruction; obtain the physical address corresponding to the virtual address; and write the second texture data into the memory space based on the physical address.

[0199] In an optional embodiment, the pixel conversion unit 1060 is configured to receive a first storage instruction and format information sent by the format acquisition unit 1010; convert the first texture coordinates into floating-point data if the first texture coordinates are expressed as integer data; and send the first storage instruction and format information to the virtual address acquisition unit 1020, wherein the first storage instruction includes the first texture coordinates expressed as floating-point data.

[0200] In an optional embodiment, the instruction decoupling unit 1070 is configured to receive a first storage instruction and format information; in response to the instruction type of the first storage instruction being a storage type, it sends the first storage instruction and format information to the pixel conversion unit 1060.

[0201] In an optional embodiment, the instruction demultiplexing unit 1070 is further configured to receive a sampling instruction, the sampling instruction including third texture data; and to send a sampling instruction to the texture sampling unit 1080 in response to the instruction type of the sampling instruction being a sampling type. The texture sampling unit 1080 is configured to perform texture sampling on the third texture data based on the sampling instruction, obtain the sampling result, and send the sampling result to the virtual address acquisition unit 1020.

[0202] In summary, the apparatus provided in this embodiment, during the execution of the STORE instruction, utilizes the format acquisition unit within the GPU to read the format information corresponding to the first texture data through the descriptor index in the STORE instruction. This allows for format conversion of the first texture data based on the format information, and the resulting second texture data is then stored. By acquiring the format information through the GPU's internal format acquisition unit, even if the texture data is implemented as an unbound resource and its format information cannot be directly obtained from the STORE, the format information can still be obtained from the GPU hardware perspective through the descriptor index. This ensures the accuracy of STORE texture processing for unbound resources and improves texture processing efficiency.

[0203] It should be noted that the texture processing apparatus provided in the above embodiments is only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the content structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the texture processing apparatus and texture processing method embodiments provided in the above embodiments belong to the same concept, and their specific implementation process can be found in the method embodiments, which will not be repeated here.

[0204] Figure 11 This is a schematic diagram of the structure of a texture processing module TPU provided in an exemplary embodiment of this application, as shown below. Figure 11 As shown, the texture processing module 1100 includes a texture addressing generator 1110, a texture data decompressor 1120, and a texture filter 1130.

[0205] In some embodiments, the texture processing apparatus 300 provided in this application reuses some functional units in the texture addressing generator 1110 and adds a format conversion unit on the basis of the texture addressing generator 1110.

[0206] The texture processing device 1000 reuses the format acquisition unit, instruction splitting unit, pixel conversion unit, and virtual address acquisition unit in the texture addressing generator 1110.

[0207] like Figure 11 As shown, based on the structure of the texture processing module 1100, after reusing some functional units of the texture addressing generator 1110, an instruction path is constructed from the format acquisition unit → instruction routing unit → pixel conversion unit → virtual address acquisition unit → format conversion unit. Based on this path, the address unification unit and the first storage unit inside the GPU are referenced to realize the transmission, address mapping, and format conversion of the first storage instruction on the path.

[0208] Texture data decompressor 1120 is used to decompress texture data, restore and unify the format of texture data obtained after texture sampling through sampled texture processing. Texture data decompressor 1120 is also used to send texture data to texture filter 1130.

[0209] Texture filter 1130 is used to filter texture data. Texture filter 1130 includes a first data queue 1131 and a second data queue 1132. The first data queue 1131 is connected to the pixel conversion unit and is used to receive texture data obtained by loading texture through a loading instruction sent from the pixel conversion unit. The second data queue 1132 is connected to the texture sampling unit and is used to receive texture data in the sampling instruction sent from the texture sampling unit. The second data queue 1132 is also connected to a filtering unit 1140. The texture data in the sampling instruction is sent to the filtering unit 1140 through the second data queue 1132, and the filtering unit 1140 performs filtering processing according to a preset filtering mode. Texture filter 1130 also includes a sampling unit 1150. The texture data output from the first data queue 1131 and the texture data output from the filtering unit 1140 are input to the sampling unit 1150. After the sampling unit 1150 performs preset downsampling processing, it is sent to the format conversion unit 1160 for format conversion. The format conversion unit 1160 may have the same or different conversion strategy as the above-mentioned format conversion unit. The aforementioned connection relationships are used to represent the data interaction between units.

[0210] An exemplary embodiment of this application also provides a chip product that includes the texture processing apparatus described above. Optionally, the chip product may be a GPU chip, an artificial intelligence (AI) chip, a tensor processing unit (TPU) chip, a neural network processing unit (NPU) chip, etc.

[0211] This application provides a processor. Figure 12 This is a schematic block diagram of a processor provided in an exemplary embodiment of this application. The processor 1200 includes the texture processing apparatus provided in the above embodiments. Alternatively, an embodiment of this application provides a processor including programmable logic circuitry and / or program instructions, which, when running on a computer device, implement the texture processing method provided in the above method embodiments.

[0212] This application provides a circuit board. Figure 13 This is a schematic block diagram of a board provided in an exemplary embodiment of this application. The board 1300 includes the texture processing device provided in the above embodiment. Alternatively, this application embodiment provides a board that, when running on a computer device, is used to implement the texture processing method provided in the above method embodiment. Specifically, the board can also be called a server board. A board is a type of printed circuit board (PCB), which is manufactured with a socket and can be inserted into a slot on the motherboard of a server to control the operation of hardware, such as controlling the operation of hardware devices like displays and acquisition cards. After installing a driver or computer program on the board, the board can realize the corresponding function. The driver or computer program can be installed in the processor, and the processor controls the execution of the driver or computer program, which, in conjunction with the texture processing device, realizes the corresponding function of the board 1300.

[0213] This application provides a computer device. Figure 14 This is a schematic block diagram of a computer device provided in an exemplary embodiment of this application. The computer device 1400 includes the texture processing apparatus provided in the above embodiment. Alternatively, an embodiment of this application provides a computer device.

[0214] Figure 15 This is a schematic block diagram of a computer device provided in an exemplary embodiment of this application. The computer device 1500 includes the processor provided in the above embodiments, and the computer device can be implemented as a terminal. Alternatively, an embodiment of this application provides a computer device.

[0215] Figure 16This is a schematic block diagram of a computer device provided in an exemplary embodiment of this application. The computer device 1600 includes the board provided in the above embodiment, and the computer device 1600 can be implemented as a server.

[0216] Optionally, embodiments of this application also provide a computer device, which includes: a processor and a memory, wherein the memory stores a computer program; the processor is used to execute the computer program in the memory to implement the texture processing methods provided in the above-described method embodiments.

[0217] Figure 17 This is a schematic block diagram of a computer device provided in an exemplary embodiment of this application. The computer device is a server 1700. Typically, the server 1700 includes a processor 1701 and a memory 1702.

[0218] Processor 1701 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. Processor 1701 may be implemented using at least one hardware form selected from Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). Processor 1701 may also include a main processor and a coprocessor. The main processor, also known as the CPU, is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 1701 may integrate a GPU, which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 1701 may also include an artificial intelligence (AI) processor, which is used to handle computational operations related to machine learning.

[0219] Memory 1702 may include one or more computer-readable storage media, which may be non-transitory. Memory 1702 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in memory 1702 is used to store at least one instruction, which is executed by processor 1701 to implement the texture processing method provided in the method embodiments of this application.

[0220] In some embodiments, server 1700 may optionally include an input interface 1703 and an output interface 1704. Processor 1701, memory 1702, and input interfaces 1703 and 1704 can be connected via a bus or signal lines. Various peripheral devices can be connected to input interfaces 1703 and 1704 via buses, signal lines, or circuit boards. Input interfaces 1703 and 1704 can be used to connect at least one input / output (I / O) related peripheral device to processor 1701 and memory 1702. In some embodiments, processor 1701, memory 1702, and input interfaces 1703 and 1704 are integrated on the same chip or circuit board; in some other embodiments, any one or two of processor 1701, memory 1702, and input interfaces 1703 and 1704 can be implemented on separate chips or circuit boards, and this application embodiment does not limit this.

[0221] Figure 18 This is a schematic block diagram of a computer device provided in an exemplary embodiment of this application. Optionally, the computer device 1800 is a terminal.

[0222] The computer device 1800 can be a portable mobile terminal, also referred to as a mobile terminal in this embodiment. Examples include smartphones, tablets, MP3 players, and MP4 players. The computer device 1800 may also be referred to as user equipment, portable terminal, or other names.

[0223] Typically, computer device 1800 includes a processor 1801 and a memory 1802.

[0224] Processor 1801 may include one or more processing cores, such as a quad-core processor or an octa-core processor. Processor 1801 may be implemented using at least one hardware form factor selected from DSP, FPGA, and PLA. Processor 1801 may also include a main processor and a coprocessor. The main processor, also known as a CPU, is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 1801 may integrate a GPU, which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 1801 may also include an AI processor, which is used to handle computational operations related to machine learning.

[0225] The memory 1802 may include one or more computer-readable storage media, which may be tangible and non-transitory. The memory 1802 may also include high-speed random access memory devices and non-volatile storage devices, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in the memory 1802 are used to store at least one instruction, which is executed by the processor 1801 to implement the texture processing methods provided in the various method embodiments of this application.

[0226] In some embodiments, the computer device 1800 may also optionally include a peripheral device interface 1803 and at least one peripheral device. Specifically, the peripheral device includes at least one of the following: a radio frequency circuit 1804, a touch display screen 1805, a camera assembly 1806, an audio circuit 1807, and a power supply 1808. The computer device 1800 also includes one or more sensors 1809. The one or more sensors 1809 include, but are not limited to: an accelerometer 1810, a gyroscope 1811, a pressure sensor 1812, an optical sensor 1813, and a proximity sensor 1814.

[0227] Those skilled in the art will understand that Figure 12 The structure shown does not constitute a limitation on the processor. Figure 13 The structure shown does not constitute a limitation on the board. Figure 14 , Figure 15 , Figure 16 , Figure 17 , Figure 18 The structure shown does not constitute a limitation on the computer device and may include more or fewer components than shown, or combine certain components, or use different component arrangements.

[0228] This application provides a computer-readable storage medium storing a computer program, which is loaded and executed by a processor to implement the texture processing methods provided in the above-described method embodiments.

[0229] This application provides a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. The processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the processor of the computer device to load and execute the texture processing method provided in the above-described method embodiments.

[0230] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0231] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0232] Those skilled in the art will recognize that the functions described in the embodiments of this application in one or more of the above examples can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0233] The above are merely optional embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A texture processing method, characterized in that, The method is performed by a texture processing device, and the method includes: Receive a first storage instruction, the first storage instruction including first texture data to be stored, first texture coordinates, and descriptor index; obtain the format information corresponding to the first texture data based on the descriptor index; Transform the first texture coordinates to obtain the virtual address corresponding to the first texture data; Based on the format information, the first texture data is converted to obtain the second texture data; Based on the second texture data and the virtual address, a second storage instruction is generated, which is used to instruct the writing of the second texture data into the memory space.

2. The method according to claim 1, characterized in that, The step of obtaining the format information corresponding to the first texture data based on the descriptor index includes: Based on the descriptor index, obtain the descriptor address; Based on the descriptor address, obtain the descriptor corresponding to the first texture data; The descriptor is parsed to obtain the format information corresponding to the first texture data.

3. The method according to claim 2, characterized in that, The step of parsing the descriptor to obtain the format information corresponding to the first texture data includes: Parse the descriptor to obtain at least one information field in the descriptor, including a format information field; Based on the format information field, obtain the format information corresponding to the first texture data.

4. The method according to any one of claims 1 to 3, characterized in that, The step of transforming the first texture coordinates to obtain the virtual address corresponding to the first texture data includes: Based on the descriptor index, the base address and address translation information corresponding to the first texture data are obtained. The base address is used to indicate the starting address of the first texture data in the virtual storage space, and the address translation information is used to indicate the conversion rules for converting the first texture coordinates into the virtual address. Based on the base address and the address conversion information, the first texture coordinates are converted to obtain the virtual address corresponding to the first texture data.

5. The method according to claim 4, characterized in that, The step of converting the first texture coordinates based on the base address and the address conversion information to obtain the virtual address corresponding to the first texture data includes: Based on the descriptor index, obtain the texture size corresponding to the first texture data; Based on the texture size and the address translation information, the first texture coordinates are scaled proportionally to obtain the second texture coordinates; Based on the second texture coordinates, obtain the address offset corresponding to the first texture data; The virtual address is calculated based on the base address and the address offset.

6. The method according to any one of claims 1 to 3, characterized in that, After generating the second storage instruction based on the second texture data and the virtual address, the method further includes: Based on the second storage instruction, obtain the physical address corresponding to the virtual address; Based on the physical address, the second texture data is written into the memory space.

7. The method according to claim 6, characterized in that, The step of obtaining the physical address corresponding to the virtual address based on the second storage instruction includes: Based on the second storage instruction, the virtual address is converted into a target polynomial expression, and there exist at least two different virtual addresses corresponding to the same polynomial expression; Obtain a list of virtual addresses, which includes at least one candidate virtual address and a correspondence between it and a polynomial expression; If the target polynomial expression is included in the list of virtual addresses, the virtual address is expressed as the candidate virtual address corresponding to the target polynomial expression; If the target polynomial expression is not included in the virtual address list, the correspondence between the virtual address and the target polynomial expression is added to the virtual address list; Obtain the second storage instruction, wherein the virtual address in the second storage instruction is a unified address.

8. The method according to any one of claims 1 to 3, characterized in that, The method further includes: Based on the first storage instruction and the format information, if the first texture coordinates are expressed as integer data, the first texture coordinates are converted into floating-point data.

9. A texture processing device, characterized in that, The texture processing device includes: a format acquisition unit, a virtual address acquisition unit, and a format conversion unit; The format acquisition unit is configured to receive a first storage instruction, the first storage instruction including first texture data to be stored, first texture coordinates, and descriptor index; and to acquire format information corresponding to the first texture data based on the descriptor index. The virtual address acquisition unit is configured to convert the first texture coordinates to obtain the virtual address corresponding to the first texture data; The format conversion unit is configured to perform format conversion on the first texture data based on the format information to obtain the second texture data; The format conversion unit is further configured to generate a second storage instruction based on the second texture data and the virtual address, the second storage instruction being used to instruct the writing of the second texture data into the memory space.

10. A terminal device, characterized in that, The terminal device includes a processor and a memory, the memory storing a computer program, which is loaded and executed by the processor to implement the texture processing method as described in any one of claims 1 to 8.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which is loaded and executed by a processor to implement the texture processing method as described in any one of claims 1 to 8.

12. A computer program product, characterized in that, The computer program product includes a computer program stored in a computer-readable storage medium, which a processor reads from and executes to implement the texture processing method as described in any one of claims 1 to 8.

Images