Slope compensation circuit and backlight display device

Abstract

The invention provides a slope compensation circuit and a backlight display device. The slope compensation circuit comprises a first current generation module, a first current mirror module, a second current generation module and a second current mirror module, the first current generation module is electrically connected with the first current mirror module, and the second current generation module is electrically connected with the first current mirror module and the second current mirror module; the first current generation module generates a first current, the first current mirror module outputs a mirror current according to the first current, and the mirror current and the conduction time of the switching tube are in a linear function relationship; the second current generation module generates a second current according to the mirror current, the second current mirror module outputs a slope compensation current according to the second current, and the slope compensation current and the conduction time of the switching tube are in a quadratic function relationship. According to the slope compensation circuit, the problem that the linearly increased compensation current is difficult to meet the compensation intensity requirement when the turn-on time of the switch tube is obviously prolonged when the voltage conversion ratio of the existing slope compensation circuit is extremely high is effectively solved.

Description

Technical Field

[0001] This application belongs to the technical field of backlight display devices, and particularly relates to a slope compensation circuit and a backlight display device. Background Technology

[0002] In boost converter scenarios for backlit displays, especially in battery-powered applications, the power supply system faces extremely wide parameter variations. The input voltage needs to adapt to fluctuations ranging from 3V to 48V, while the output voltage, due to the flexible adjustment of the number of LED strings (3-14 strings), needs to cover a range of 8V to 45V, resulting in significant variations in the transfer ratio of the boost circuit. To ensure the stability of the boost circuit when the duty cycle is greater than 50% and to avoid subharmonic oscillations, a slope compensation current is typically introduced. Existing slope compensation circuits mostly generate compensation current by charging a single capacitor with a fixed current. This slope compensation current is linearly related to the switching transistor's on-time. When the transfer ratio is extremely high, causing a significant extension of the switching transistor's on-time, the linearly increasing compensation current is insufficient to meet the compensation strength requirements. Summary of the Invention

[0003] This application provides a slope compensation circuit and a backlight display device, which can solve the problem that the slope compensation current generated by the existing slope compensation circuit is linearly related to the switching transistor conduction time. When the transfer ratio is extremely large, which causes the switching transistor conduction time to be significantly extended, the linearly increasing compensation current is difficult to meet the compensation intensity requirements.

[0004] In a first aspect, embodiments of this application provide a ramp compensation circuit applied to a boost circuit of a backlight display device. The ramp compensation circuit includes a first current generation module, a first current mirror module, a second current generation module, and a second current mirror module. The first current generation module is electrically connected to the first current mirror module, and the second current generation module is electrically connected to both the first current mirror module and the second current mirror module.

[0005] The first current generating module is used to generate a first current, and the first current mirror module is used to output a mirror current based on the first current. The mirror current has a linear relationship with the conduction time of the switching transistor in the boost circuit. The second current generating module is used to generate a second current based on the mirror current, and the second current mirror module is used to output a ramp compensation current based on the second current. The ramp compensation current has a quadratic relationship with the conduction time of the switching transistor in the boost circuit.

[0006] In one possible implementation of the first aspect, the first current generating module includes a reference source, a first transistor, a second transistor, a first capacitor, a first resistor, and a first switch. The reference source is electrically connected to the control terminal of the first transistor, the first conducting terminal of the first transistor, and the control terminal of the second transistor. The first conducting terminal of the second transistor is electrically connected to the first current mirror module. The second conducting terminal of the second transistor is electrically connected to the first terminal of the first resistor. The control terminal of the first switch is used to receive a first signal. The first conducting terminal of the first switch is electrically connected to the first terminal of the first capacitor and the second conducting terminal of the first transistor. The second conducting terminal of the first switch, the second terminal of the first capacitor, and the second terminal of the first resistor are all grounded.

[0007] In one possible implementation of the first aspect, the first current mirror module includes a third transistor and a fourth transistor, the first conducting terminal of the third transistor and the first conducting terminal of the fourth transistor are both used to be electrically connected to a power supply, the control terminal of the third transistor is electrically connected to the control terminal of the fourth transistor, the second conducting terminal of the third transistor and the first current generating module, and the second conducting terminal of the fourth transistor is electrically connected to the second current generating module.

[0008] In one possible implementation of the first aspect, the second current generating module includes a fifth transistor, a sixth transistor, a second capacitor, a second resistor, and a second switch. The control terminal of the fifth transistor is electrically connected to the control terminal of the sixth transistor, the first conducting terminal of the fifth transistor, and the first current mirror module. The first conducting terminal of the sixth transistor is electrically connected to the second current mirror module. The second conducting terminal of the sixth transistor is electrically connected to the first terminal of the second resistor. The control terminal of the second switch is used to receive a second signal. The first conducting terminal of the second switch is electrically connected to the first terminal of the second capacitor and the second conducting terminal of the fifth transistor. The second conducting terminal of the second switch, the second terminal of the second capacitor, and the second terminal of the second resistor are all grounded.

[0009] In one possible implementation of the first aspect, the second current mirror module includes a seventh transistor and an eighth transistor. The first conducting terminal of the seventh transistor and the first conducting terminal of the eighth transistor are both used to be electrically connected to the power supply. The control terminal of the seventh transistor is electrically connected to the control terminal of the eighth transistor, the second conducting terminal of the seventh transistor, and the second current generating module, respectively. The second conducting terminal of the eighth transistor is used to output the slope compensation current.

[0010] In one possible implementation of the first aspect, the slope compensation circuit further includes a first current adjustment module and a second current adjustment module, wherein the first current adjustment module is electrically connected to the first current generation module and the first current mirror module respectively, and the second current adjustment module is electrically connected to the second current generation module and the first current mirror module respectively. The first current regulation module is used to adjust the first current according to the operating frequency of the boost circuit, and the second current regulation module is used to adjust the mirror current according to the operating frequency of the boost circuit.

[0011] In one possible implementation of the first aspect, the first current regulating module includes a plurality of first regulating units, all of which are connected in parallel, and all of which are electrically connected to the first current generating module and the first current mirror module, respectively. The first regulating unit includes a current source and a first switch, wherein the current source is connected in series with the corresponding first switch.

[0012] In one possible implementation of the first aspect, the second current regulating module includes a plurality of second regulating units, all of which are connected in parallel, and all of which are electrically connected to the second current generating module and the first current mirror module, respectively. The second adjustment unit includes a second switch, a third switch, a ninth transistor, and a third resistor. The first terminal of the second switch is electrically connected to the second current generating module and the first current mirror module, respectively. The second terminal of the second switch and the first conducting terminal of the ninth transistor are electrically connected to the control terminal of the ninth transistor and the first terminal of the third switch, respectively. The second conducting terminal of the ninth transistor is electrically connected to the first terminal of the third resistor. The second terminal of the third switch and the second terminal of the third resistor are both grounded.

[0013] In one possible implementation of the first aspect, the number of the first switch and the number of the second switch are equal, and when the first switch is closed, the second switch is closed and the third switch is closed; when the first switch is closed, the second switch is closed and the third switch is closed.

[0014] Secondly, embodiments of this application provide a backlight display device, including the slope compensation circuit described in any one of the first aspects.

[0015] The beneficial effects of the embodiments in this application compared with the prior art are: The slope compensation circuit provided in this application includes a first current generation module, a first current mirror module, a second current generation module, and a second current mirror module. The first current generation module generates a first current, and the first current mirror module outputs a mirrored current based on the first current. The first current generation module and the first current mirror module together constitute a first-stage slope compensation, and the output mirrored current has a linear relationship with the conduction time of the switching transistor in the boost circuit. The mirrored current further serves as the input to the second current generation module, driving the second current generation module to generate a second current, and the second current mirror module outputs a slope compensation current based on the second current. The second current generation module and the second current mirror module together constitute a second-stage slope compensation, such that the final output slope compensation current has a quadratic relationship with the conduction time of the switching transistor in the boost circuit. Therefore, the slope compensation circuit of this application uses the mirrored current output from the first-stage slope compensation as the input to the second-stage slope compensation. As a result, the slope compensation current and the conduction time of the switching transistor have a quadratic function relationship. When the input voltage and output voltage differ significantly, i.e. when the transfer ratio is particularly high, the conduction time of the switching transistor will be significantly extended. The rate of change of the slope compensation current, which has a quadratic function relationship with the conduction time of the switching transistor, will increase significantly with the extension of the conduction time. This can meet the compensation strength requirements in high transfer ratio scenarios and effectively solve the technical problem in the prior art where the linearly increasing compensation current is difficult to achieve the required compensation strength when the transfer ratio is extremely high and the conduction time is significantly extended. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of a traditional boost circuit architecture; Figure 2 This is a circuit diagram of an existing slope compensation circuit; Figure 3 This is a circuit diagram of another existing slope compensation circuit; Figure 4 This is a schematic block diagram of a slope compensation circuit provided in one embodiment of this application; Figure 5 This is a circuit connection diagram of a slope compensation circuit provided in an embodiment of this application; Figure 6 This is a schematic block diagram of a slope compensation circuit provided in another embodiment of this application; Figure 7This is a circuit connection diagram of a slope compensation circuit provided in another embodiment of this application.

[0018] In the figure, 101 is the first current generating module; 102 is the first current mirror module; 103 is the second current generating module; 104 is the second current mirror module; 105 is the first current regulating module; 1051 is the first regulating unit; 106 is the second current regulating module; and 1061 is the second regulating unit. Detailed Implementation

[0019] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0020] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0021] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0022] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."

[0023] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0024] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0025] In boost converter applications for backlit displays, especially battery-powered applications, the power supply system faces challenges due to extremely wide range of parameter variations. The input voltage VIN needs to adapt to fluctuations of 3V-48V, while the output voltage VOUT, due to the flexible adjustment of the number of LED strings (3-14 strings), needs to cover a range of 8V-45V, resulting in significant variations in the shift ratio of the boost circuit. Traditional boost circuit architectures, such as... Figure 1 As shown, to ensure the stability of the boost circuit when the duty cycle is greater than 50% and to avoid subharmonic oscillations, a slope compensation current Islope is usually introduced. The slope compensation current Islope satisfies: Islope / TON > 0.5 VIN K / L; TON is the on-time of the switching transistor in the boost circuit, K is the sampling ratio, and L is the inductance value of the inductor.

[0026] like Figure 2 As shown, existing slope compensation circuits mostly use a fixed current ( Figure 2 In the case of Ib) for a single capacitor ( Figure 2 By charging C1, we can obtain: the voltage VA at the first terminal of C1 = Ib TON / C1; Due to the principle of current mirrors, we know that VB=VA; Therefore, VB=VA=Ib TON / C1. Therefore, the current flowing through M2 is IM2 = VB / R1 = Ib. TON / (R1 C1); then, through the current mirroring of M3 and M4, we get: Islope = N1 IM2=N1 Ib TON / (R1 C1); N1 is the current mirror ratio of M3 and M4; the ratio of the slope compensation current Islope to the conduction time TON of the switching transistor can be calculated as: Islope / TON=N1 Ib / (R1 C1). Therefore, it can be concluded that... Figure 2 The slope compensation current Islope generated by the slope compensation circuit shown is linearly related to the on-time TON of the switching transistor. When the transfer ratio is extremely high, which causes the on-time TON of the switching transistor to be significantly prolonged, the linearly increasing slope compensation current Islope is difficult to meet the compensation strength requirements.

[0027] like Figure 3 As shown, when the system output voltage VOUT varies significantly, the ramp compensation Ib can be changed to (VIN-VTH / RIN), where VTH is the threshold voltage (turn-on voltage) of the switching transistor in the boost circuit, and RIN is the input current-limiting resistor connected in series in the MOSFET drive circuit. This attempts to adjust the charging current through feedback from the high-voltage input voltage VIN; however, the wide-range high-voltage characteristics of VIN increase circuit design complexity and reliability risks.

[0028] To address the aforementioned issues, the slope compensation circuit provided in this application includes a first current generation module, a first current mirror module, a second current generation module, and a second current mirror module. The first current generation module generates a first current, and the first current mirror module outputs a mirrored current based on the first current. The first current generation module and the first current mirror module together constitute a first-stage slope compensation, and the output mirrored current has a linear relationship with the conduction time of the switching transistor in the boost circuit. The mirrored current further serves as the input to the second current generation module, driving it to generate a second current. The second current mirror module outputs a slope compensation current based on the second current. The second current generation module and the second current mirror module together constitute a second-stage slope compensation, such that the final output slope compensation current has a quadratic relationship with the conduction time of the switching transistor in the boost circuit. Therefore, the slope compensation circuit of this application uses the mirrored current output from the first-stage slope compensation as the input to the second-stage slope compensation. As a result, the slope compensation current and the conduction time of the switching transistor have a quadratic function relationship. When the input voltage and output voltage differ significantly, i.e. when the transfer ratio is particularly high, the conduction time of the switching transistor will be significantly extended. The rate of change of the slope compensation current, which has a quadratic function relationship with the conduction time of the switching transistor, will increase significantly with the extension of the conduction time. This can meet the compensation strength requirements in high transfer ratio scenarios and effectively solve the technical problem in the prior art where the linearly increasing compensation current is difficult to achieve the required compensation strength when the transfer ratio is extremely high and the conduction time is significantly extended.

[0029] To illustrate the technical solution described in this application, specific embodiments are provided below.

[0030] Ramp compensation circuits are used in the boost circuits of backlight display devices. Figure 4 A schematic block diagram of a slope compensation circuit according to an embodiment of this application is shown. See also... Figure 4As shown, the slope compensation circuit includes a first current generating module 101, a first current mirror module 102, a second current generating module 103, and a second current mirror module 104. The first current generating module 101 is electrically connected to the first current mirror module 102, and the second current generating module 103 is electrically connected to the first current mirror module 102 and the second current mirror module 104, respectively.

[0031] Specifically, the first current generation module 101 generates a first current, and the first current mirror module 102 outputs a mirrored current based on the first current. The first current generation module 101 and the first current mirror module 102 together constitute a first-stage slope compensation, and the output mirrored current has a linear relationship with the on-time TON of the switching transistor in the boost circuit. The mirrored current is further used as the input to the second current generation module 103, driving the second current generation module 103 to generate a second current. The second current mirror module 104 outputs a slope compensation current Islope based on the second current. The second current generation module 103 and the second current mirror module 104 together constitute a second-stage slope compensation, such that the final output slope compensation current Islope has a quadratic relationship with the on-time TON of the switching transistor in the boost circuit. Therefore, the slope compensation circuit of this application, by continuing to use the mirrored current output of the first-stage slope compensation as the input of the second-stage slope compensation, will ultimately result in a slope compensation current Islope that has a quadratic function relationship with the conduction time TON of the switching transistor (i.e., the slope compensation current Islope is related to the square of the conduction time TON of the switching transistor). When the input voltage and output voltage differ significantly, i.e. when the transfer ratio is particularly high, the conduction time TON of the switching transistor will be significantly extended, and the rate of change of the slope compensation current Islope, which has a quadratic function relationship with the conduction time TON of the switching transistor, will increase significantly with the extension of the conduction time. This can meet the compensation strength requirements in high transfer ratio scenarios and effectively solve the technical problem in the prior art where the linearly increasing compensation current is difficult to achieve the required compensation strength when the transfer ratio is extremely high and the conduction time is significantly extended.

[0032] It should be noted that in this application, the first current generation module 101 generates a first current based on a fixed current, constituting the basic input for two-stage slope compensation. Compared to Figure 3 The scheme shown, which adjusts the charging current through input voltage feedback, does not rely on a feedback mechanism of high-voltage input signal. It only uses a two-stage slope compensation superposition design to make the final output slope compensation current Islope exhibit a quadratic growth characteristic with the conduction time TON of the switching transistor. Its rate of change will increase significantly with the extension of conduction time. Even in high transfer ratio scenarios with a large difference between input voltage and output voltage, it can fully meet the required compensation strength, which simplifies circuit design and avoids the reliability risks caused by high-voltage feedback.

[0033] The following is combined Figure 5 The circuit diagram shown provides a detailed description of the working principle of the slope compensation circuit provided in the embodiments of this application.

[0034] In one embodiment of this application, such as Figure 5 As shown, the first current generating module 101 includes a reference source, a first transistor M1, a second transistor M2, a first capacitor C1, a first resistor R1, and a first switch Q1. The reference source is electrically connected to the control terminal of the first transistor M1, the first conducting terminal of the first transistor M1, and the control terminal of the second transistor M2. The first conducting terminal of the second transistor M2 is electrically connected to the first current mirror module 102, and the second conducting terminal of the second transistor M2 is electrically connected to the first terminal of the first resistor R1. The control terminal of the first switch Q1 is used to receive a first signal. The first conducting terminal of the first switch Q1 is electrically connected to the first terminal of the first capacitor C1 and the second conducting terminal of the first transistor M1. The second conducting terminal of the first switch Q1, the second terminal of the first capacitor C1, and the second terminal of the first resistor R1 are all grounded.

[0035] Specifically, the reference source is used to provide a stable fixed current Ib. The fixed current is transmitted to the control terminals of the first transistor M1 and the second transistor M2, which can clamp the control terminal potentials of the first transistor M1 and the second transistor M2, ensuring that the two transistors operate in a stable constant current state.

[0036] The first switch Q1 is driven by a first signal (a control signal related to the on-time TON of the switch, such as the off-time of the switch). Its on and off states directly determine the operating mode of the first capacitor C1. When the first switch Q1 is off, a fixed current is allowed to charge the first capacitor C1, ensuring that a stable linear voltage signal can be generated in each cycle, thereby ensuring that the linear function relationship between the first current and the on-time holds. When the first switch Q1 is on, the residual charge of the first capacitor C1 can be quickly released, realizing the reset of the voltage of the first capacitor C1.

[0037] During the charging of the first capacitor C1 with a fixed current, VA is generated at the first terminal of the first capacitor C1, where VA = Ib. TON / C1, where VA is the voltage related to the on-time TON of the switching transistor, that is, VA changes linearly with the on-time TON of the switching transistor. Since the first transistor M1 and the second transistor M2 form a mirror constant current structure (taking the mirror ratio of the first transistor M1 and the second transistor M2 as 1:1 as an example), the accurate replication and transmission of current can be realized. The first conducting terminal of the second transistor M2 serves as the output terminal of the first current generation module 101, which can supply a stable first current to the first current mirror module 102.

[0038] Based on the above and the principle of current mirrors, we know that VB = VA; therefore, VB = VA = Ib TON / C1, at this point VB is a voltage related to the on-time TON of the switching transistor, that is, VB changes linearly with the on-time TON. Therefore, the current flowing through the second transistor M2 (i.e., the first current) IM2 = VB / R1 = Ib TON / (R1 C1), where the first resistor R1 serves to limit current and convert voltage to current, which can prevent device damage or signal distortion caused by excessive current, and can also be used to calculate the first current according to Ohm's law.

[0039] For example, designers can select the types of the first transistor M1, the second transistor M2, and the first switch Q1 according to the actual situation, that is, they can use fully controllable power devices such as metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors. For example, the first transistor M1, the second transistor M2, and the first switch Q1 can all be NMOS transistors.

[0040] It should be noted that the embodiments provided in this application only show one circuit structure as the first current generating module 101, and do not mean that only this one circuit structure can realize the function of the first current generating module 101. Other circuit structures that can realize this function can also be substituted, and are not limited to this.

[0041] In one embodiment of this application, such as Figure 5 As shown, the first current mirror module 102 includes a third transistor M3 and a fourth transistor M4. The first conducting terminal of the third transistor M3 and the first conducting terminal of the fourth transistor M4 are both used to be electrically connected to the power supply VDD. The control terminal of the third transistor M3 is electrically connected to the control terminal of the fourth transistor M4, the second conducting terminal of the third transistor M3 and the first current generating module 101, respectively. The second conducting terminal of the fourth transistor M4 is electrically connected to the second current generating module 103.

[0042] Specifically, the third transistor M3 and the fourth transistor M4 form a symmetrical mirror structure, working together to accurately replicate the first current and transmit the mirror current. The control terminal of the third transistor M3 is shorted to its second conducting terminal, forming a diode connection mode, and simultaneously receives the first current output from the first current generation module 101. Since the gate potentials of the two transistors are synchronized and both are connected to the same power supply VDD, the fourth transistor M4 can accurately replicate the current characteristics of the third transistor M3, and reproduce the first current output from the first current generation module 101, which has a linear relationship with the conduction time, without distortion to obtain the mirror current (i.e., the current flowing through the fourth transistor M4) I1=N1. IM2=N1 Ib TON / (R1 C1) and N1 are the current mirror ratios of M3 and M4. Therefore, the mirrored current has a linear relationship with the on-time TON of the switching transistor. The mirrored current is then transmitted to the second current generation module 103, providing a stable and accurate input signal for the subsequent secondary slope compensation to generate a slope current with a quadratic function relationship.

[0043] For example, designers can select the types of the third transistor M3 and the fourth transistor M4 according to the actual situation, that is, they can use fully controllable power devices such as metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors. For example, both the third transistor M3 and the fourth transistor M4 can be selected as PMOS transistors.

[0044] It should be noted that the embodiments provided in this application only show one circuit structure as the first current mirror module 102, and do not mean that only this one circuit structure can realize the function of the first current mirror module 102. Other circuit structures that can realize this function can also be substituted, and are not limited to this.

[0045] In one embodiment of this application, such as Figure 5 As shown, the second current generating module 103 includes a fifth transistor M5, a sixth transistor M6, a second capacitor C2, a second resistor R2, and a second switch Q2. The control terminal of the fifth transistor M5 is electrically connected to the control terminal of the sixth transistor M6, the first conducting terminal of the fifth transistor M5, and the first current mirror module 102. The first conducting terminal of the sixth transistor M6 is electrically connected to the second current mirror module 104. The second conducting terminal of the sixth transistor M6 is electrically connected to the first terminal of the second resistor R2. The control terminal of the second switch Q2 is used to receive a second signal. The first conducting terminal of the second switch Q2 is electrically connected to the first terminal of the second capacitor C2 and the second conducting terminal of the fifth transistor M5. The second conducting terminal of the second switch Q2, the second terminal of the second capacitor C2, and the second terminal of the second resistor R2 are all grounded.

[0046] Specifically, the mirrored current is transmitted to the control terminals of the fifth transistor M5 and the sixth transistor M6, which can clamp the control terminal potentials of the fifth transistor M5 and the sixth transistor M6, ensuring that the two transistors operate in a stable constant current state.

[0047] The second switch Q2 is driven by a second signal (a control signal related to the on-time TON of the switch, such as the off-time of the switch; the first and second signals can be the same signal). Its on and off states directly determine the operating mode of the second capacitor C2. When the second switch Q2 is off, the mirror current is allowed to charge the second capacitor C2, ensuring that a stable linear voltage signal can be generated in each cycle, thereby ensuring that the quadratic function relationship between the second current and the on-time holds true. When the second switch Q2 is on, the residual charge of the second capacitor C2 can be quickly released, realizing the reset of the voltage of the second capacitor C2.

[0048] During the charging of the second capacitor C2 by the mirror current, VC is generated at the first terminal of the second capacitor C2, where VC = I1. TON / C2=N1 Ib TON TON / (R1 C1 C2), where VC is the voltage related to the on-time TON of the switching transistor, meaning that VC changes as a quadratic function with the on-time TON. Since the fifth transistor M5 and the sixth transistor M6 form a mirror constant current structure (taking a mirror ratio of 1:1 for the fifth transistor M5 and the sixth transistor M6 as an example), accurate replication and transmission of current can be achieved. The first conducting terminal of the sixth transistor M6 serves as the output terminal of the second current generation module 103, which can supply a stable second current to the second current mirror module 104.

[0049] From the above, and combining the principle of current mirrors, we know that VC = VD; therefore, VD = VC = N1 Ib TON TON / (R1 C1 C2), where VD is the voltage related to the on-time TON of the switching transistor, meaning VD changes as a quadratic function with the on-time TON. Therefore, the current flowing through the sixth transistor M6 (i.e., the second current) IM6 = VD / R2 = N1 Ib TON TON / (R1 C1 C2 R2), where the second resistor R2 serves to limit current and convert voltage to current, which can prevent device damage or signal distortion caused by excessive current. The second current can also be calculated according to Ohm's law.

[0050] For example, designers can select the types of the fifth transistor M5, the sixth transistor M6, and the second switch Q2 according to the actual situation; that is, they can use fully controllable power devices such as metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors. For instance, the fifth transistor M5, the sixth transistor M6, and the second switch Q2 can all be NMOS transistors.

[0051] It should be noted that the embodiments provided in this application only show one circuit structure as the second current generating module 103, and do not mean that only this one circuit structure can realize the function of the second current generating module 103. Other circuit structures that can realize this function can also be substituted, and are not limited to this.

[0052] In one embodiment of this application, such as Figure 5 As shown, the second current mirror module 104 includes a seventh transistor M7 and an eighth transistor M8. The first conducting terminal of the seventh transistor M7 and the first conducting terminal of the eighth transistor M8 are both used to be electrically connected to the power supply VDD. The control terminal of the seventh transistor M7 is electrically connected to the control terminal of the eighth transistor M8, the second conducting terminal of the seventh transistor M7, and the second current generation module 103, respectively. The second conducting terminal of the eighth transistor M8 is used to output the slope compensation current Islope.

[0053] Specifically, the seventh transistor M7 and the eighth transistor M8 form a symmetrical mirror structure, working together to accurately replicate the second current and transmit the slope compensation current Islope. The control terminal of the seventh transistor M7 is shorted to its own second conduction terminal, forming a diode connection mode, and simultaneously receives the second current output from the second current generation module 103. Since the gate potentials of the two transistors are synchronized and both are connected to the same power supply VDD, the eighth transistor M8 can accurately replicate the current characteristics of the seventh transistor M7, and reproduce the second current output from the second current generation module 103, which has a linear relationship with the conduction time, without distortion to obtain the slope compensation current Islope (i.e., the current flowing through the eighth transistor M8) I2=N2. IM6=N2 N1 Ib TON TON / (R1 C1 C2 R2) and N2 are the current mirror ratios of M7 and M8. Therefore, the slope compensation current Islope has a quadratic function relationship with the conduction time TON of the switching transistor. The slope compensation current Islope is then passed to the boost circuit to accurately counteract the subharmonic oscillation tendency of the inductor current, ensuring stable operation of the circuit under conditions where the duty cycle is greater than 50%.

[0054] For example, designers can select the types of the seventh transistor M7 and the eighth transistor M8 according to the actual situation, that is, they can use fully controllable power devices such as metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors. For example, both the seventh transistor M7 and the eighth transistor M8 can be selected as PMOS transistors.

[0055] It should be noted that the embodiments provided in this application only show one circuit structure as the first current mirror module 102, and do not mean that only this one circuit structure can realize the function of the first current mirror module 102. Other circuit structures that can realize this function can also be substituted, and are not limited to this.

[0056] This application fully considers the compensation requirements of boost circuits at different operating frequencies. By configuring corresponding current ratio parameters according to the actual operating frequency, it can flexibly adapt to the differentiated requirements of slope compensation current (Islope) in different frequency scenarios, possessing excellent multi-frequency adaptability. Figure 6 As shown, the slope compensation circuit also includes a first current adjustment module 105 and a second current adjustment module 106. The first current adjustment module 105 is electrically connected to the first current generation module 101 and the first current mirror module 102, respectively, and the second current adjustment module 106 is electrically connected to the second current generation module 103 and the first current mirror module 102, respectively.

[0057] Specifically, the first current adjustment module 105 is connected between the first current mirror module 102 and ground, and dynamically adjusts the magnitude of the first current according to the actual operating frequency of the boost circuit. The second current adjustment module 106 is also connected between the first current mirror module 102 and ground, and synchronously responds to changes in the operating frequency of the boost circuit by adjusting the magnitude of the mirror current output by the first current mirror module 102. This ensures that the mirror current, as the input signal for the second-stage slope compensation, matches the switching cycle and conduction time at the current frequency. Through the coordinated adjustment of key current signals (first current and mirror current) at different frequencies, the two modules ensure that the final output slope compensation current Islope maintains a quadratic function relationship with the conduction time while flexibly adapting to the compensation strength requirements of different frequency scenarios. This guarantees that the circuit can meet the stability criteria under various frequency conditions, further expanding the application flexibility and adaptability of the circuit.

[0058] In one embodiment of this application, such as Figure 7 As shown, the first current regulation module 105 includes multiple first regulation units 1051, all of which are connected in parallel. All first regulation units 1051 are electrically connected to the first current generation module 101 and the first current mirror module 102, respectively. Each first regulation unit 1051 includes a current source (…). Figure 7Ib1, Ib2, ..., Ibx shown are all current sources) and the first switch ( Figure 7 K1, K2, ..., Kx shown are all first switches), and the current source is connected in series with the corresponding first switch.

[0059] Specifically, in the first current regulation module 105, a topology design of multiple parallel first regulation units 1051 is adopted, and each first regulation unit 1051 is connected between the first current mirror module 102 and ground. The current is tiered by combining the switching on and off of each first regulation unit 1051. Each first regulation unit 1051 consists of a current source and a first switch connected in series. The current source provides a fixed regulation current of preset amplitude to the module as the basic signal for current regulation. The first switch is used as an on / off control element, and its on / off state is flexibly switched according to the actual operating frequency of the boost circuit. When the system switches to the corresponding frequency, one or more corresponding first switches close, and the current source corresponding to the closed first switch is connected to the circuit, so that the first current flowing through the third transistor M3 is equal to the sum of the current flowing through the second transistor M2 and the current source connected to the circuit. In addition, the combination of different first switches can form multiple current regulation levels, thereby realizing dynamic adaptation of the first current and ensuring that the basic current input to the first current mirror module 102 can match the current frequency.

[0060] It should be noted that the higher the actual operating frequency of the boost circuit, the more first switches need to be closed. Specifically, as the operating frequency of the boost circuit increases, the switching cycle shortens accordingly, and the on-time (TON) of the corresponding switching transistor also decreases. According to the slope compensation stability criterion, the current flowing through the third transistor M3 needs to be increased accordingly to ensure the compensation strength. Based on this requirement, the number of first switches that need to be closed in the first current adjustment module 105 increases with the increase of the operating frequency. That is, the closure of more first switches means that more preset current sources are connected to the circuit. Through the superposition of multiple fixed adjustment currents, the current amplitude flowing through the third transistor M3 is increased synchronously, thereby ensuring that the slope compensation current Islope generated by the secondary compensation can still maintain a sufficient rate of change and compensation strength in the short TON scenario, ensuring that the circuit can meet the stability requirements under high-frequency conditions. Conversely, when the operating frequency of the boost circuit decreases, the number of first switches that need to be closed decreases accordingly, the number of current sources connected decreases, and the current amplitude flowing through the third transistor M3 is adapted to the compensation requirements of long TON in the low-frequency scenario, avoiding overcompensation that leads to a slower dynamic response.

[0061] In one embodiment of this application, such as Figure 7As shown, the second current regulation module 106 includes multiple second regulation units 1061, all of which are connected in parallel. All second regulation units 1061 are electrically connected to the second current generating module 103 and the first current mirror module 102, respectively. Each second regulation unit 1061 includes a second switch (…). Figure 7 K11, K12, ..., K1x shown are all used as the second switch and the third switch. Figure 7 K1b, K2b, ..., Kxb shown are all used as the third switch, and the ninth transistor ( Figure 7 M91, M92, ..., M9x shown are all used as the ninth switch transistor) and the third resistor ( Figure 7 R31, R32, ..., R3x shown are all used as third resistors. The first terminal of the second switch is electrically connected to the second current generating module 103 and the first current mirror module 102, respectively. The second terminal of the second switch and the first conducting terminal of the ninth transistor are electrically connected to the control terminal of the ninth transistor and the first terminal of the third switch, respectively. The second conducting terminal of the ninth transistor is electrically connected to the first terminal of the third resistor. The second terminal of the third switch and the second terminal of the third resistor are both grounded.

[0062] Specifically, in the second current regulation module 106, a topology design of multiple parallel second regulation units 1061 is adopted, and each second regulation unit 1061 is connected between the first current mirror module 102 and ground. The graded regulation of the mirror current is achieved through the combined switching of the various second regulation units 1061. Each second regulation unit 1061 is composed of a second switch, a third switch, a ninth transistor, and a third resistor. The second and third switches serve as input control elements, and their on / off states determine whether the second regulation unit 1061 participates in the regulation of the mirror current. The ninth transistor and the third resistor form a constant current branch. When the second switch is on and the third switch is off, the ninth transistor and the third resistor are connected to the circuit to regulate the mirror current. The third resistor serves as a current limiter and voltage-to-current converter. By changing the number of the second adjustment unit 1061 connected, the shunting ratio or equivalent current amplitude of the mirror current can be dynamically adjusted to ensure that the mirror current input to the second current generation module 103 can be accurately matched with the actual operating frequency of the boost circuit. This ensures that the quadratic function slope current generated by the second-level slope compensation can meet the compensation strength requirements under different frequency conditions, thus enabling the circuit to flexibly adapt to multi-frequency scenarios.

[0063] It should be noted that the number of the first and second switches is equal. When the first switch is closed, the second switch closes simultaneously, and the third switch turns off simultaneously; when the first switch is turned off, the second switch turns off simultaneously, and the third switch closes simultaneously. Specifically, when the corresponding first switch is closed to connect the current source of the first regulating unit 1051, the second switch closes simultaneously and the third switch turns off simultaneously, causing the corresponding second regulating unit 1061 to start working; when the corresponding first switch is turned off to disconnect the current source of the first regulating unit 1051, the second switch turns off simultaneously and the third switch closes simultaneously, causing the corresponding second regulating unit 1061 to stop working. This one-to-one, synchronous linkage design has the advantage of achieving precise closed-loop compensation for current regulation: the regulation current superimposed by the switch closure of the first regulation unit 1051 is precisely matched by the second regulation unit 1061 that is working synchronously. The amount of current drawn from the circuit by the first regulation unit 1051 is matched by the amount of current compensated back by the second regulation unit 1061. This ensures that the amplitude of the mirror current input to the second current generation module 103 is always precisely matched with the current frequency requirement, and avoids current imbalance caused by unilateral regulation. It also effectively prevents distortion of the quadratic function relationship between the slope compensation current Islope and the conduction time, and ultimately ensures that the circuit can output compensation current that meets the stability criteria in the entire frequency range.

[0064] In summary, based on Figure 6 and Figure 7 The circuit structure shown achieves precise matching of different frequencies and compensation parameters through selective switching, ensuring that the slope compensation current Islope that meets the stability criteria can be output under various frequency conditions, further expanding the application range of the circuit.

[0065] This application also discloses a backlight display device, including the aforementioned slope compensation circuit. By employing the slope compensation circuit, the backlight display device can operate stably under a wide input voltage range of 3V-48V and a wide output voltage range of 8V-45V. Even if the input and output voltages differ greatly, causing a significant change in the transfer ratio, the slope compensation current Islope, which has a quadratic relationship with the conduction time, can fully meet the compensation intensity requirements under high transfer ratio scenarios. At the same time, the circuit supports flexible adaptation to multiple switching frequencies. Through the synchronous linkage of the first adjustment unit 1051 and the second adjustment unit 1061, it ensures that the subharmonic oscillation trend of the inductor current can be accurately offset under different frequency conditions, effectively avoiding abnormal operation of the boost circuit. Ultimately, it provides a stable and uniform driving voltage for the LED string of the backlight display device, improves the brightness consistency and stability of the displayed image, and extends the service life of the device.

[0066] Since the processing and functions implemented by the backlight display device in this embodiment are basically the same as the embodiments, principles and examples of the aforementioned slope compensation circuit, any details not covered in this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.

[0067] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A slope compensation circuit, characterized in that, A boost circuit for a backlight display device, the slope compensation circuit includes a first current generating module, a first current mirror module, a second current generating module and a second current mirror module, wherein the first current generating module is electrically connected to the first current mirror module, and the second current generating module is electrically connected to both the first current mirror module and the second current mirror module. The first current generating module is used to generate a first current, and the first current mirror module is used to output a mirror current based on the first current. The mirror current has a linear relationship with the conduction time of the switching transistor in the boost circuit. The second current generating module is used to generate a second current based on the mirror current, and the second current mirror module is used to output a ramp compensation current based on the second current. The ramp compensation current has a quadratic relationship with the conduction time of the switching transistor in the boost circuit.

2. The slope compensation circuit according to claim 1, characterized in that, The first current generating module includes a reference source, a first transistor, a second transistor, a first capacitor, a first resistor, and a first switching transistor. The reference source is electrically connected to the control terminal of the first transistor, the first conducting terminal of the first transistor, and the control terminal of the second transistor. The first conducting terminal of the second transistor is electrically connected to the first current mirror module. The second conducting terminal of the second transistor is electrically connected to the first terminal of the first resistor. The control terminal of the first switching transistor is used to receive a first signal. The first conducting terminal of the first switching transistor is electrically connected to the first terminal of the first capacitor and the second conducting terminal of the first transistor. The second conducting terminal of the first switching transistor, the second terminal of the first capacitor, and the second terminal of the first resistor are all grounded.

3. The slope compensation circuit according to claim 1, characterized in that, The first current mirror module includes a third transistor and a fourth transistor. The first conducting terminal of the third transistor and the first conducting terminal of the fourth transistor are both used to be electrically connected to the power supply. The control terminal of the third transistor is electrically connected to the control terminal of the fourth transistor, the second conducting terminal of the third transistor, and the first current generating module, respectively. The second conducting terminal of the fourth transistor is electrically connected to the second current generating module.

4. The slope compensation circuit according to claim 1, characterized in that, The second current generating module includes a fifth transistor, a sixth transistor, a second capacitor, a second resistor, and a second switch. The control terminal of the fifth transistor is electrically connected to the control terminal of the sixth transistor, the first conducting terminal of the fifth transistor, and the first current mirror module. The first conducting terminal of the sixth transistor is electrically connected to the second current mirror module. The second conducting terminal of the sixth transistor is electrically connected to the first terminal of the second resistor. The control terminal of the second switch is used to receive a second signal. The first conducting terminal of the second switch is electrically connected to the first terminal of the second capacitor and the second conducting terminal of the fifth transistor. The second conducting terminal of the second switch, the second terminal of the second capacitor, and the second terminal of the second resistor are all grounded.

5. The slope compensation circuit according to claim 1, characterized in that, The second current mirror module includes a seventh transistor and an eighth transistor. The first conducting terminal of the seventh transistor and the first conducting terminal of the eighth transistor are both used to be electrically connected to the power supply. The control terminal of the seventh transistor is electrically connected to the control terminal of the eighth transistor, the second conducting terminal of the seventh transistor, and the second current generating module, respectively. The second conducting terminal of the eighth transistor is used to output the slope compensation current.

6. The slope compensation circuit according to any one of claims 1-5, characterized in that, The slope compensation circuit further includes a first current adjustment module and a second current adjustment module. The first current adjustment module is electrically connected to the first current generation module and the first current mirror module, respectively. The second current adjustment module is electrically connected to the second current generation module and the first current mirror module, respectively. The first current regulation module is used to adjust the first current according to the operating frequency of the boost circuit, and the second current regulation module is used to adjust the mirror current according to the operating frequency of the boost circuit.

7. The slope compensation circuit according to claim 6, characterized in that, The first current regulation module includes multiple first regulation units, all of which are connected in parallel, and all of which are electrically connected to the first current generation module and the first current mirror module, respectively. The first regulating unit includes a current source and a first switch, wherein the current source is connected in series with the corresponding first switch.

8. The slope compensation circuit according to claim 7, characterized in that, The second current regulation module includes multiple second regulation units, all of which are connected in parallel, and all of which are electrically connected to the second current generation module and the first current mirror module, respectively. The second adjustment unit includes a second switch, a third switch, a ninth transistor, and a third resistor. The first terminal of the second switch is electrically connected to the second current generating module and the first current mirror module, respectively. The second terminal of the second switch and the first conducting terminal of the ninth transistor are electrically connected to the control terminal of the ninth transistor and the first terminal of the third switch, respectively. The second conducting terminal of the ninth transistor is electrically connected to the first terminal of the third resistor. The second terminal of the third switch and the second terminal of the third resistor are both grounded.

9. The slope compensation circuit according to claim 8, characterized in that, The number of the first switch and the number of the second switch are equal. When the first switch is closed, the second switch is closed and the third switch is closed. When the first switch is closed, the second switch is closed and the third switch is closed.

10. A backlight display device, characterized in that, Includes the slope compensation circuit as described in any one of claims 1-9.

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