Substrate processing method and substrate processing apparatus

Abstract

The substrate processing method includes a holding step and a supply step. In the holding step, a substrate having an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn) on the surface is held. In the supply step, an etching solution for etching the oxide semiconductor is supplied to the substrate held in the holding step. In the supply step, sulfuric acid or hydrofluoric acid is supplied as an etching solution.

Description

Technical Field

[0001] This disclosure relates to a substrate processing method and a substrate processing apparatus. Background Technology

[0002] Previously, a technique was known to etch oxide semiconductors by supplying an etching solution such as acetic acid, citric acid, hydrochloric acid, or perchloric acid to a substrate having an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn) on its surface.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2008-41695 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] This disclosure provides a technique for appropriately etching oxide semiconductors.

[0008] Solution for solving the problem

[0009] One aspect of the substrate processing method disclosed herein includes a holding step and a supply step. In the holding step, a substrate having an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn) on its surface is held. In the supply step, an etchant for etching the oxide semiconductor is supplied to the substrate held in the holding step. Sulfuric acid or hydrofluoric acid is supplied as the etchant in the supply step.

[0010] The effects of the invention

[0011] According to this disclosure, oxide semiconductors can be appropriately etched. Attached Figure Description

[0012] Figure 1 This is a schematic diagram illustrating the structure of the substrate processing system according to the embodiment.

[0013] Figure 2 This is a schematic diagram showing the structure of the substrate processing apparatus according to the embodiment.

[0014] Figure 3 This is a diagram illustrating an example of the substrate processing involved in the implementation method.

[0015] Figure 4 This is a diagram illustrating an example of the substrate processing involved in the implementation method.

[0016] Figure 5 This is a diagram illustrating another example of the substrate processing involved in the implementation method.

[0017] Figure 6 This is a diagram illustrating another example of the substrate processing involved in the implementation method.

[0018] Figure 7 This is a table showing the solubility of the components of an oxide semiconductor when it is etched using various etchants involved in the embodiments.

[0019] Figure 8 This is a flowchart illustrating the process performed by the substrate processing system according to the embodiment.

[0020] Figure 9 This is a diagram showing the structure of the substrate processing apparatus involved in the modified example. Detailed Implementation

[0021] Hereinafter, the substrate processing method and substrate processing apparatus for implementing the present disclosure will be described in detail with reference to the accompanying drawings (hereinafter referred to as "Embodiments"). However, the present disclosure is not limited by these embodiments. Furthermore, the various embodiments can be appropriately combined without contradicting the processing content. In the following embodiments, the same reference numerals are used to label the same parts, and repeated descriptions are omitted.

[0022] <Structure of the substrate processing system>

[0023] First, the structure of the substrate processing system involved in the implementation method will be described. Figure 1 This is a schematic diagram illustrating the structure of the substrate processing system according to the embodiment. Furthermore, in the following description, to clarify the positional relationships, the mutually orthogonal X-axis, Y-axis, and Z-axis are defined, with the positive direction of the Z-axis set as the vertically upward direction.

[0024] like Figure 1 As shown, the substrate processing system 1 includes a loading / unloading station 2 and a processing station 3. The loading / unloading station 2 and the processing station 3 are arranged adjacent to each other.

[0025] The loading / unloading station 2 includes a carrier placement section 11 and a transport section 12. The carrier placement section 11 holds multiple transport containers (hereinafter referred to as "carriers C") capable of horizontally accommodating multiple wafers W.

[0026] The conveying section 12 is disposed adjacent to the carrier placement section 11. Inside the conveying section 12, a substrate conveying device 121 and a transfer section 122 are provided.

[0027] The substrate transport apparatus 121 includes a wafer holding mechanism for holding the wafer W. Furthermore, the substrate transport apparatus 121 is capable of moving horizontally and vertically and rotating about a vertical axis, using the wafer holding mechanism to transport the wafer W between the carrier C and the junction 122.

[0028] Processing station 3 is arranged adjacent to conveying unit 12. Processing station 3 includes conveying unit 13 and multiple substrate processing devices 14. Multiple substrate processing devices 14 are arranged on both sides of conveying unit 13.

[0029] The transfer unit 13 includes a substrate transfer device 131 inside. The substrate transfer device 131 includes a wafer holding mechanism for holding the wafer W. In addition, the substrate transfer device 131 can move in the horizontal and vertical directions and can rotate about the vertical axis. The wafer holding mechanism is used to transfer the wafer W between the transfer unit 122 and the substrate processing device 14.

[0030] The substrate processing apparatus 14 performs a wet etching process (hereinafter referred to simply as "etching process"). The etching process is performed, for example, to remove oxide semiconductors that constitute a hard mask disposed on the etch target film. In addition, the etching process is sometimes performed, for example, to remove oxide semiconductors that constitute the channels of a semiconductor memory device.

[0031] The substrate processing system 1 includes a control device 4. The control device 4 is a device for controlling the operation of the substrate processing system 1. This control device 4 is, for example, a computer, and includes a control unit 15 and a storage unit 16. The storage unit 16 stores programs for controlling various processes such as etching. The control unit 15 controls the operation of the substrate processing system 1 by reading the programs stored in the storage unit 16 and executing those programs. The control unit 15 is, for example, a CPU (Central Processing Unit), an MPU (Micro Processor Unit), etc., and the storage unit 16 is, for example, ROM (Read Only Memory), RAM (Random Access Memory), etc.

[0032] Furthermore, the program can also be recorded on a computer-readable storage medium and installed from that storage medium into the storage unit 16 of the control device 4. Examples of computer-readable storage media include hard disks (HD), floppy disks (FD), optical disks (CD), magneto-optical disks (MO), and memory cards.

[0033] In the substrate processing system 1 configured as described above, firstly, the substrate transport device 121 of the transport station 2 removes the wafer W from the carrier C and places the removed wafer W on the transfer section 122. The wafer W placed on the transfer section 122 is removed from the transfer section 122 by the substrate transport device 131 of the processing station 3 and transported into the substrate processing apparatus 14, where it undergoes etching. After the etched wafer W is removed from the substrate processing apparatus 14 by the substrate transport device 131 and placed on the transfer section 122, it is returned to the carrier C by the substrate transport device 121.

[0034] <Structure of the substrate processing device>

[0035] Next, refer to Figure 2 The structure of the substrate processing apparatus 14 will be explained. Figure 2 This is a schematic diagram showing the structure of the substrate processing apparatus 14 according to the embodiment.

[0036] like Figure 2 As shown, the substrate processing apparatus 14 includes a chamber 20, a substrate holding mechanism 30, a liquid supply unit 40, and a recovery cup 50.

[0037] The chamber 20 houses the substrate holding mechanism 30, the liquid supply unit 40, and the recovery cup 50. An FFU (Fan Filter Unit) 21 is provided at the top of the chamber 20. The FFU 21 forms a downward flow within the chamber 20.

[0038] FFU 21 is connected to downflow gas supply source 23 via valve 22. FFU 21 ejects downflow gas (e.g., dry air) supplied from downflow gas supply source 23 into chamber 20.

[0039] The substrate holding mechanism 30 includes a rotating holding part 31, a support part 32, and a driving part 33. The rotating holding part 31 is disposed approximately in the center of the chamber 20. A holding member 311 for holding the wafer W from the side is provided on the upper surface of the rotating holding part 31. The wafer W is horizontally held by the holding member 311 in a state slightly separated from the upper surface of the rotating holding part 31.

[0040] The support member 32 is a member extending in a vertical direction. Its base end is supported by the drive member 33 in a rotatable manner, and the rotation holding member 31 is horizontally supported at the front end of the support member 32. The drive member 33 causes the support member 32 to rotate about a vertical axis.

[0041] The substrate holding mechanism 30 rotates the rotating holding part 31 supported by the support part 32 by rotating the support part 32 through the drive part 33, thereby rotating the wafer W held by the rotating holding part 31.

[0042] Furthermore, the rotating holding part 31 is not limited to the type that holds the wafer W from the side as described above; for example, it can also be the type that holds the wafer W from below by adsorption, such as a vacuum holding disk (holding disk: chuck).

[0043] The liquid supply unit 40 supplies various processing liquids to the wafer W held by the substrate holding mechanism 30. The liquid supply unit 40 includes multiple (in this case, two) nozzles 41a and 41b, an arm 42 that horizontally supports the nozzles 41a and 41b, and a rotation lifting mechanism 43 that rotates and lifts the arm 42. Alternatively, the nozzles 41a and 41b may be supported by separate arms.

[0044] Nozzle 41a is connected to etching solution supply source 45a via valve 44a and flow regulator 46a. In addition, nozzle 41b is connected to rinsing solution supply source 45b via valve 44b and flow regulator 46b.

[0045] Etching solution supplied from etching solution supply source 45a is ejected from nozzle 41a. Details about the etching solution will be described later.

[0046] The flushing fluid supplied from the flushing fluid supply source 45b is ejected from nozzle 41b. The flushing fluid is, for example, DIW (deionized water).

[0047] The recovery cup 50 is configured to surround the rotating holding part 31 and collects the processing liquid that splashes off from the wafer W due to the rotation of the rotating holding part 31. A drain port 51 is formed at the bottom of the recovery cup 50, through which the processing liquid collected by the recovery cup 50 is discharged to the outside of the substrate processing apparatus 14. In addition, an exhaust port 52 is formed at the bottom of the recovery cup 50 for discharging the downward flow gas supplied from the FFU 21 to the outside of the substrate processing apparatus 14.

[0048] Furthermore, the number of nozzles provided on the substrate processing apparatus 14 is not limited to the examples described above. For example, it may be configured to have a single nozzle for spraying etchant and rinsing solution.

[0049] <Substrate Processing>

[0050] Next, refer to Figures 3-6 The following describes the substrate processing (etching process) performed using the substrate processing apparatus 14 described above. Figure 3 and Figure 4 This is a diagram illustrating an example of the substrate processing involved in the implementation method.

[0051] In the substrate processing involved in the implementation method, firstly, a substrate having Figure 3 The wafer W has the surface structure shown. The wafer W is held by the holding member 311 of the substrate holding mechanism 30 (see reference). Figure 2The wafer W is constructed by stacking a base film 102, an etch stop film 103, a low-k film 104, a SiN film 105, and an IGZO film 106 on a silicon substrate 101. An electrode 107, for example, made of a metal such as copper, is embedded in the base film 102. The low-k film 104 and the SiN film 105 are non-etchable films.

[0052] The IGZO film 106 is an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn). The IGZO film 106 constitutes a hard mask disposed on the Low-k film 104 and the SiN film 105 as the film to be etched. The IGZO film 106 has a defined pattern, and grooves 108 corresponding to the pattern of the IGZO film 106 are formed in the Low-k film 104 and the SiN film 105.

[0053] The substrate processing involved in the embodiment involves an etching process in which the IGZO film 106 is etched using an etching solution. In this etching process, sulfuric acid (H₂SO₄) or hydrofluoric acid (HF) is used as the etching solution. Thus, as... Figure 4 As shown, the entire IGZO film 106 constituting the hard mask is removed.

[0054] Figure 5 and Figure 6 This is a diagram illustrating another example of the substrate processing involved in the implementation method.

[0055] In the substrate processing involved in the implementation method, firstly, a substrate having Figure 5 The wafer W has the surface structure shown. The wafer W is held by the holding member 311 of the substrate holding mechanism 30 (see reference). Figure 2 The wafer W is constructed by stacking multiple silicon oxide films 202, multiple silicon nitride films 203, and multiple IGZO films 204 on a silicon substrate 201. The multiple silicon oxide films 202, multiple silicon nitride films 203, and multiple IGZO films 204 are formed in multiple layers from the side closest to the silicon substrate 201 in the order of silicon oxide film 202, silicon nitride film 203, IGZO film 204, and silicon nitride film 203.

[0056] IGZO membrane 204 and Figure 3 Similarly, the IGZO film 106 shown is an oxide semiconductor containing indium (In), gallium (Ga) and zinc (Zn).

[0057] In this way, the wafer W, which is the object of substrate processing, has a stacked film having multiple layers including a silicon oxide film 202, a silicon nitride film 203, an IGZO film 204, and a silicon nitride film 203. Furthermore, in the wafer W having this stacked film, the IGZO film 204 forms, for example, the channel of a semiconductor memory device such as DRAM (Dynamic Random Access Memory). Moreover, the wafer W only needs to have a stacked film containing at least an IGZO film 204 on its surface; the structure of the stacked film is not particularly limited. Figure 5 The example shown.

[0058] Additionally, a groove 205 is formed on the wafer W for allowing the etching solution to penetrate and etch the stacked IGZO film 204.

[0059] The substrate processing involved in the embodiment involves an etching process in which the IGZO film 204 is etched using an etchant. In this etching process, hydrofluoric acid (HF) is used as the etchant. Therefore, as... Figure 6 As shown, a portion of the IGZO film 204 constituting the trench is removed, such that the IGZO film 204 facing the trench 205 is recessed in the width direction of the trench 205, and the upper and lower surfaces of the ends of the silicon nitride film 203 adjacent to the IGZO film 204 are exposed.

[0060] Thus, in this embodiment, by using sulfuric acid or hydrofluoric acid as the etching solution, the IGZO film 106, which serves as a hard mask, can be appropriately etched. Additionally, in this embodiment, by using hydrofluoric acid as the etching solution, the IGZO film 204, which serves as a channel, can be appropriately etched. For the reasons explained, please refer to... Figure 7 For example, an examination can be conducted as follows.

[0061] Figure 7 This is a table showing the solubility of the components of an oxide semiconductor when it is etched using various etchants involved in the embodiments. Figure 7 The image shows sulfuric acid (H₂SO₄) or hydrofluoric acid (HF) as etching solutions. Additionally, in... Figure 7 The solubility of each component of indium oxide (In₂O₃), gallium oxide (Ga₂O₃), and zinc oxide (ZnO) constituting IGZO films 106 and 204 as oxide semiconductors is shown. Furthermore, indium (In), gallium (Ga), and zinc (Zn) contained in IGZO films 106 and 204 exist as indium oxide (In₂O₃), gallium oxide (Ga₂O₃), and zinc oxide (ZnO), respectively.

[0062] like Figure 7As shown, it can be seen that when etching is performed using hydrofluoric acid as the etching solution, the components of indium oxide, gallium oxide, and zinc oxide dissolve (are etched). The dissolution of the components of indium oxide, gallium oxide, and zinc oxide caused by hydrofluoric acid is represented by the following chemical reaction formulas (1) to (3).

[0063]

[0064] Furthermore, it is known that when an etching process is performed using sulfuric acid as the etching solution, the components of indium oxide and zinc oxide dissolve (are etched). The dissolution of the components of indium oxide and zinc oxide caused by sulfuric acid is represented by the following chemical reaction formulas (4) and (5).

[0065]

[0066]

[0067] Furthermore, when etching is performed using sulfuric acid as the etching solution, gallium oxide does not dissolve in sulfuric acid (and is not etched).

[0068] In this embodiment, by using hydrofluoric acid as an etching solution, the chemical reaction (dissolution) shown in the above chemical reaction formulas (1) to (3) can be generated during the etching process, thereby enabling the IGZO film 106 or IGZO film 204 to be etched appropriately.

[0069] In addition, in the embodiment, by using sulfuric acid as the etching solution, the chemical reaction (dissolution) shown in the above chemical reaction formulas (4) and (5) can be generated during the etching process, thereby enabling the IGZO film 106 to be etched appropriately.

[0070] Furthermore, in this embodiment, when hydrofluoric acid is used as the etching solution, the concentration of hydrofluoric acid can be 50 (wt%). This allows for more appropriate etching of the IGZO film 106 or the IGZO film 204.

[0071] Furthermore, in this embodiment, when hydrofluoric acid is used as the etching solution, the hydrofluoric acid can be dilute hydrofluoric acid diluted with pure water or an organic solvent. When the hydrofluoric acid is dilute hydrofluoric acid diluted with pure water, the concentration of the etching solution can be a hydrofluoric acid to pure water ratio of 1:10 to 1:5000. When the hydrofluoric acid is dilute hydrofluoric acid diluted with an organic solvent, the concentration of the etching solution can be a hydrofluoric acid to organic solvent ratio of 1:1 to 1:10. This allows for more appropriate etching of the IGZO film 106 or the IGZO film 204.

[0072] Furthermore, in the embodiments, the organic solvent may be selected from at least one of glycols such as ethylene glycol, propylene glycol, and diethylene glycol, propylene carbonate, and IPA (isopropanol). This allows for more appropriate etching of the IGZO film 106 or IGZO film 204.

[0073] Furthermore, in this embodiment, the temperature of the etching solution can be from 20°C to 80°C. This allows for more appropriate etching of the IGZO film 106 or the IGZO film 204.

[0074] Furthermore, in this embodiment, the IGZO film 106 constitutes a hard mask that serves as the etching target film disposed on the Low-k film 104 and the SiN film 105. In this case, the volume of gallium (Ga) contained in the IGZO film 106 is smaller than the volume of zinc (Zn) contained in the IGZO film 106. For example, the volume ratio of indium (In), gallium (Ga), zinc (Zn), and oxygen (O) in the IGZO film 106 can be 1:1:2:5. In this way, by using the IGZO film 106, which has a relatively small volume ratio of gallium, as a hard mask, the entire IGZO film 106 can be removed efficiently. Moreover, during the etching process using sulfuric acid as the etching solution, the gallium oxide in the IGZO film 106 does not dissolve in the sulfuric acid (it is not etched), but it is considered that the gallium oxide is removed together with the indium oxide and zinc oxide dissolved by the sulfuric acid.

[0075] Furthermore, in this embodiment, when sulfuric acid is used as the etching solution to remove the entire IGZO film 106 serving as a hard mask, the concentration of the sulfuric acid can be 96 (wt%) to 98 (wt%). This allows for more efficient removal of the entire IGZO film 106.

[0076] Alternatively, in this embodiment, the IGZO film 204 can also form the channel of the semiconductor memory device. In this case, the volume of gallium (Ga) contained in the IGZO film 204 is greater than the volume of zinc (Zn) contained in the IGZO film 204. For example, the volume ratio of indium (In), gallium (Ga), zinc (Zn), and oxygen (O) in the IGZO film 204 can be 1:2:1:5. In this way, by forming the channel with an IGZO film 204 having a relatively large gallium volume ratio, a portion of the IGZO film 204 can be uniformly removed.

[0077] <Specific Operations of the Substrate Processing System>

[0078] Next, refer to Figure 8 To explain the specific operation of the substrate processing device 14. Figure 8 This is a flowchart illustrating the processing procedure performed by the substrate processing system 1 according to the embodiment. Furthermore, each device included in the substrate processing system 1 performs operations under the control of the control unit 15. Figure 8The processing steps shown are as follows.

[0079] like Figure 8 As shown, in the substrate processing apparatus 14, a substrate loading process (step S101) is first performed. In this substrate loading process, the substrate transport device 131 (see reference 14) loads the substrate into the substrate. Figure 1 The wafer W, which has been moved into the chamber 20, is held by the holding member 311 of the substrate holding mechanism 30. The wafer W is held in the holding member 311 with the patterned surface facing upward. Then, the rotating holding member 31 is rotated by the drive unit 33. As a result, the wafer W rotates together with the rotating holding member 31 while being held horizontally by the rotating holding member 31. The rotational speed of the wafer W is set to a first rotational speed.

[0080] Next, in the substrate processing apparatus 14, an etching process using the aforementioned etching solution is performed (step S102). In this etching process, the nozzle 41a of the liquid supply unit 40 is positioned above the center of the wafer W. Then, by opening the valve 44a for a predetermined time, the etching solution is supplied to the patterned surface of the wafer W. That is, sulfuric acid or hydrofluoric acid is supplied as the etching solution.

[0081] The etching solution supplied to wafer W diffuses on the surface of wafer W due to the centrifugal force generated by the rotation of wafer W. On wafer W, there is... Figure 3 In the case of the surface structure shown, the IGZO film 106, which serves as a hard mask, is etched using sulfuric acid or hydrofluoric acid, which is supplied to the wafer W as an etching solution. That is, etching is performed using sulfuric acid or hydrofluoric acid as the etching solution, such as... Figure 4 As shown, the entire IGZO film 106 constituting the hard mask is removed. On the other hand, on the wafer W having... Figure 5 In the case of the surface structure shown, the IGZO film 204, which serves as the channel, is etched using hydrofluoric acid as the etching solution. That is, etching is performed using hydrofluoric acid as the etching solution, such as... Figure 6 As shown, a portion of the IGZO membrane 204 constituting the channel is removed.

[0082] Next, a rinsing process is performed in the substrate processing apparatus 14 (step S103). During the rinsing process, the nozzle 41b of the liquid supply unit 40 is positioned above the center of the wafer W. Then, by opening the valve 44c for a predetermined time, DIW, which serves as the rinsing liquid, is supplied to the wafer W. The DIW supplied to the wafer W diffuses on the pattern formation surface of the wafer W due to the centrifugal force generated by the rotation of the wafer W. As a result, the etching solution remaining on the wafer W is rinsed away by the DIW.

[0083] Next, a drying process is performed in the substrate processing apparatus 14 (step S104). In the drying process, for example, by increasing the rotation speed of the wafer W from a first rotation speed to a second rotation speed, the DIW remaining on the surface of the wafer W is removed, thereby drying the wafer W.

[0084] Next, a substrate removal process is performed in the substrate processing apparatus 14 (step S105). In this substrate removal process, the substrate is transported by the substrate transfer device 131 (see reference 14). Figure 1 The wafer W is removed from the chamber 20 of the substrate processing apparatus 14. Then, the wafer W is received by the transfer section 122 and the substrate transport device 121 into the carrier C placed in the carrier carrier placement section 11. When the substrate removal process is completed, the processing associated with one wafer W is completed.

[0085] As described above, the substrate processing apparatus according to the embodiment (for example, substrate processing apparatus 14) includes a holding section (for example, substrate holding mechanism 30) and a supply section (for example, liquid supply section 40). The holding section holds a substrate (for example, wafer W) having an oxide semiconductor (for example, IGZO film 106, 204) containing indium (In), gallium (Ga), and zinc (Zn) on its surface. The supply section supplies an etching solution for etching the oxide semiconductor to the substrate held by the holding section. Moreover, the supply section supplies sulfuric acid or hydrofluoric acid as the etching solution. As a result, the oxide semiconductor can be appropriately etched.

[0086] <Variation Example>

[0087] The above embodiments illustrate an example of using an etching solution in a single-wafer etching process, but the etching solution can also be used for batch etching processes that process multiple wafers W simultaneously. Hereinafter, refer to... Figure 9 This example illustrates a substrate processing apparatus for performing batch etching. Figure 9 This is a diagram showing the structure of the substrate processing apparatus involved in the modified example.

[0088] like Figure 9 As shown, the etching solution supply system 450C involved in the modified example includes an etching solution supply source 451, a valve 452, and a flow regulator 453.

[0089] In addition, the substrate processing apparatus 14A involved in the modified example includes a processing tank 90, a substrate holding mechanism 30A, and a liquid supply unit 40A.

[0090] The processing tank 90 stores the etching solution. The substrate holding mechanism 30 holds multiple wafers W together in a vertical orientation. The substrate holding mechanism 30A can be raised and lowered via a lifting mechanism (not shown). The liquid supply unit 40A is connected to the etching solution supply source 451 via a valve 452 and a flow regulator 453, supplying etching solution to the processing tank 90. ​​Thus, the etching solution is stored in the processing tank 90.

[0091] In the etching process described in the modified example, the substrate holding mechanism 30A is lowered to immerse the plurality of wafers W held in the substrate holding mechanism 30A in the etching solution stored in the processing tank 90. ​​As a result, the IGZO film 106 or IGZO film 204 formed on the surface of the wafers W is etched.

[0092] In this way, the etching solution can also be applied to batch etching processes that process multiple wafers W at the same time.

[0093] The embodiments disclosed herein should be considered illustrative rather than restrictive in all respects. In fact, the above-described embodiments can be implemented in various ways. Furthermore, the above-described embodiments can be omitted, substituted, or modified in various ways without departing from the appended claims and their spirit.

[0094] Explanation of reference numerals in the attached figures

[0095] 1: Substrate processing system; 14, 14A: Substrate processing apparatus; 30, 30A: Substrate holding mechanism; 40, 40A: Liquid supply unit; 106, 204: IGZO film; W: Wafer.

Claims

1. A substrate processing method, comprising the following steps: The holding process involves holding a substrate with an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn) on its surface; and In the supply process, an etching solution for etching the oxide semiconductor is supplied to the substrate held in the holding process. in, In the supply process, sulfuric acid or hydrofluoric acid is supplied as the etching solution.

2. The substrate processing method according to claim 1, wherein, The oxide semiconductor forms a hard mask disposed on the film to be etched. The volume of gallium (Ga) contained in the oxide semiconductor is smaller than the volume of zinc (Zn) contained in the oxide semiconductor.

3. The substrate processing method according to claim 2, wherein, The volume ratio of indium (In), gallium (Ga), zinc (Zn), and oxygen (O) in the oxide semiconductor is 1:1:2:

5.

4. The substrate processing method according to claim 2, wherein, In the supply process, the oxide semiconductor constituting the hard mask is completely removed by etching using sulfuric acid or hydrofluoric acid as the etching solution.

5. The substrate processing method according to claim 4, wherein, The concentration of the sulfuric acid is 96wt%~98wt%.

6. The substrate processing method according to claim 1, wherein, The oxide semiconductor forms the channel of the semiconductor memory device. The volume of gallium (Ga) in the oxide semiconductor is greater than the volume of zinc (Zn) in the oxide semiconductor.

7. The substrate processing method according to claim 6, wherein, The volume ratio of indium (In), gallium (Ga), zinc (Zn), and oxygen (O) in the oxide semiconductor is 1:2:1:

5.

8. The substrate processing method according to claim 6, wherein, In the supply process, a portion of the oxide semiconductor constituting the channel is removed by etching using hydrofluoric acid as the etching solution.

9. The substrate processing method according to claim 1, wherein, The hydrofluoric acid is dilute hydrofluoric acid obtained by diluting it with pure water or an organic solvent.

10. The substrate processing method according to claim 9, wherein, When the hydrofluoric acid is dilute hydrofluoric acid obtained by diluting the pure water, the concentration of the etching solution is a concentration where the ratio of hydrofluoric acid to pure water is 1:10 to 1:5000.

11. The substrate processing method according to claim 9, wherein, When the hydrofluoric acid is dilute hydrofluoric acid diluted with the organic solvent, the concentration of the etching solution is a concentration where the ratio of hydrofluoric acid to the organic solvent is 1:1 to 1:

10.

12. The substrate processing method according to claim 9, wherein, The organic solvent is selected from at least one of glycols, propylene carbonate, and isopropanol, i.e., IPA.

13. The substrate processing method according to claim 1, wherein, The concentration of the hydrofluoric acid is 50 W / t.

14. The substrate processing method according to claim 1, wherein, The temperature of the etching solution is 20℃~80℃.

15. A substrate processing apparatus comprising: The holding portion is held in a substrate having an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn) on its surface; and The supply unit supplies etchant for etching the oxide semiconductor to the substrate held by the holding unit. in, The supply unit supplies sulfuric acid or hydrofluoric acid as the etching solution.

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