Overlay mark and overlay error measuring method

Abstract

The invention provides an overlay mark and an overlay error measuring method, comprising a first overlay pattern, a second overlay pattern and a third overlay pattern which are sequentially positioned on a first film layer, a second film layer and a third film layer, and the first film layer, the second film layer and the third film layer are sequentially stacked, the first overlay pattern, the second overlay pattern and the third overlay pattern are all of rectangular annular structures, and each rectangular annular structure is composed of a plurality of pattern segments arranged at intervals; when the second overlay pattern and the third overlay pattern are projected to the first film layer, the second overlay pattern and the first overlay pattern are sequentially arranged on the periphery of the third overlay pattern in a sleeving mode, and any two adjacent overlay patterns are arranged in a spaced mode. According to the method, the identification degree of the overlay mark is improved, the time for calculating the overlay error is shortened, and the productivity is improved. Meanwhile, the overlay marks of the three film layers are integrated at the same position, so that the occupied area of a cutting channel is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor lithography technology, and in particular to an overlay marking and overlay error measurement method. Background Technology

[0002] Photolithography is a process that transfers a mask pattern onto a wafer through a series of steps, including alignment and exposure. In the fabrication of semiconductor devices, multiple photolithography operations are required for overlay. The relative positions of the overlay marks on the current layer and the previous layer are measured to calculate the overlay error (OVL), which describes the deviation of the current layer pattern from the previous layer pattern in the X and Y directions. Figure 1 In this semiconductor device, a second metal layer 101 (MET2) is formed first, followed by a first via layer 102 (VIA1), and finally a third metal layer 103 (MET3). Therefore, overlay marks need to be formed in the second metal layer 101, the first via layer 102, and the third metal layer 103. After forming the photolithographic pattern of the first via layer 102, the overlay error between the first via layer 102 and the second metal layer 101 is calculated. After forming the photolithographic pattern of the third metal layer 103, the overlay error between the third metal layer 103 and the first via layer 102 is calculated.

[0003] In the prior art, overlay markings are formed in a photomask, and there are multiple overlay marking combinations. Each combination includes a first overlay marking 210 of a first through-hole layer 102 and a second metal layer 101, and another second overlay marking combination pattern 220 of a third metal layer 103 and the first through-hole layer 102. Figure 2 The first set of markings 210 includes an overlay pattern 211 in the second metal layer and an overlay pattern 212 in the first through-hole layer. For example... Figure 3 The second set of markings 220 includes the overprinted pattern 221 of the second metal layer and the overprinted pattern 222 of the first through-hole layer. For example... Figure 4 Overlay marks are formed on the dicing channels surrounding the chip region 230. When projected onto the dicing channels, there are multiple first overlay marks 210 and second overlay marks 220, all positioned on the dicing channels. Each first overlay mark 210 is positioned near a second overlay mark 220, and the two are positioned in pairs on the dicing channels. When calculating the overlay error, the coordinates of the overlay patterns 211 and 212 in the first overlay mark 210 are measured, and the overlay error is calculated. Similarly, the coordinates of the overlay patterns 221 and 222 in the second overlay mark 220 are measured, and the overlay error is calculated.

[0004] However, several problems arise when calculating the overlay error: 1. Overlay patterns 211, 212, 221, and 222 are all composed of rectangular graphic segments with identical shapes and sizes. Furthermore, the shapes of the first overlay mark 210 and the second overlay mark 220 are not obvious, making them difficult to identify. 2. Calculating the overlay error of the three overlay patterns requires establishing two separate programs to calculate the overlay errors of patterns 211 and 212, and patterns 221 and 222, respectively, which is time-consuming. 3. The formation of the three-layer film requires the first overlay mark 210 and the second overlay mark 220 to appear in pairs, occupying a significant portion of the cutting area. Summary of the Invention

[0005] The purpose of this invention is to provide a method for measuring overprinting marks and overprinting errors, which can improve the recognizability of overprinting marks, reduce the time for calculating overprinting errors, and reduce the area occupied by the cutting path.

[0006] To achieve the above objectives, the present invention provides an overlay marking, comprising:

[0007] The first set of etched patterns, the second set of etched patterns, and the third set of etched patterns are sequentially located on the first film layer, the second film layer, and the third film layer. The first film layer, the second film layer, and the third film layer are stacked sequentially. The first set of etched patterns, the second set of etched patterns, and the third set of etched patterns are all rectangular ring structures. The rectangular ring structure is composed of multiple spaced pattern segments.

[0008] When the second and third sets of etched patterns are projected onto the first film layer, the second and first sets of etched patterns are sequentially overlaid on the periphery of the third set of etched patterns, and any two adjacent sets are spaced apart.

[0009] Optionally, in the overlay markings, the first overlay pattern, the second overlay pattern, and the third overlay pattern are all located in the dicing channel area, and the dicing channel is located around the chip area.

[0010] Optionally, in the aforementioned overlay markings, there are multiple first overlay patterns, second overlay patterns, and third overlay patterns, which are respectively arranged at intervals in the cutting channel area.

[0011] Optionally, in the aforementioned overlay markings, the third overlay pattern is a square ring structure, with the same number of pattern segments on each side.

[0012] Optionally, in the aforementioned overlay markings, the second overlay pattern is a square ring structure, with the same number of graphic segments on each side, and the number of graphic segments on each side of the second overlay pattern is greater than the number of graphic segments on each side of the third overlay pattern.

[0013] Optionally, in the overlay marking, the first overlay pattern is a square ring structure, with the same number of graphic segments on each side, and the number of graphic segments on each side of the first overlay pattern is greater than the number of graphic segments on each side of the second overlay pattern.

[0014] Optionally, in the overlay markings, multiple spaced graphic segments are evenly arranged in the rectangular ring structure.

[0015] Optionally, in the overlay marking, the graphic segment is rectangular, extending in the direction from the center of the rectangular ring to the edge, and multiple graphic segments are spaced apart in a direction perpendicular to the center to the edge.

[0016] Optionally, in the aforementioned overlay markings, the graphic segment of the third overlay graphic is aligned with a graphic segment of the second overlay graphic, and the graphic segment of the second overlay graphic is aligned with a graphic segment of the first overlay graphic.

[0017] The present invention also provides a method for measuring overlay error, comprising:

[0018] Find the center of the first set of engraved patterns based on the shape of the first set of engraved patterns; find the center of the second set of engraved patterns based on the shape of the second set of engraved patterns; find the center of the third set of engraved patterns based on the shape of the third set of engraved patterns.

[0019] Measure the coordinates of the centers of the first set of engraved patterns, the second set of engraved patterns, and the third set of engraved patterns respectively;

[0020] The offset of the coordinates between the center of the third set of engraved patterns and the center of the second set of engraved patterns is calculated as the overlay error between the third set of engraved patterns and the second set of engraved patterns. The offset of the coordinates between the center of the third set of engraved patterns and the center of the first set of engraved patterns is calculated as the overlay error between the third set of engraved patterns and the first set of engraved patterns.

[0021] In the overlay marking and overlay error measurement method provided by this invention, the first, second, and third overlay patterns of the three film layers are all rectangular ring structures. When the second and third overlay patterns are projected onto the first film layer, they are sequentially overlaid on the outer periphery of the third overlay pattern, with any adjacent patterns spaced apart. Therefore, the rectangular edges of the overlay patterns of each film layer do not interfere with each other, their shapes are clear, and they are easy to identify, improving the recognizability of the overlay markings. The three overlay patterns can simultaneously test the offset, reducing the time for calculating overlay errors and increasing production capacity. Furthermore, the overlay markings of the three film layers are clustered in the same location, reducing the area occupied by the cutting path. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of a semiconductor device in the prior art;

[0023] Figures 2 to 4 A schematic diagram of overlay markings in existing technology;

[0024] Figures 5 to 7 This is a schematic diagram of the overlay markings according to an embodiment of the present invention;

[0025] In the figure: 101-Second metal layer, 102-First via layer, 103-Third metal layer, 210-First overlay mark, 211-Overlay pattern, 212-Overlay pattern, 220-Second overlay mark, 221-Overlay pattern, 222-Overlay pattern, 230-Chip area, 301-First film layer, 302-Second film layer, 303-Third film layer, 401-First overlay pattern, 402-Second overlay pattern, 403-Third overlay pattern, 404-Chip area. Detailed Implementation

[0026] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0027] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.

[0028] Furthermore, it should be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and / or pattern, it can be located directly on another layer or substrate, and / or intercalation layers may also be present. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be located directly under that layer, and / or one or more intercalation layers may also be present. Furthermore, references to "on" and "under" the layers may be made based on the accompanying drawings.

[0029] Please refer to Figure 5 and Figure 6 , Figure 5 This is a top view. Figure 6As shown in the cross-sectional view, the present invention provides an overlay mark, comprising: a first overlay pattern 401, a second overlay pattern 402, and a third overlay pattern 403 sequentially located on a first film layer 301, a second film layer 302, and a third film layer 303, wherein the first film layer 301, the second film layer 302, and the third film layer 303 are stacked sequentially, and the first overlay pattern 401, the second overlay pattern 402, and the third overlay pattern 403 are all rectangular ring structures, and the rectangular ring structures are composed of multiple spaced graphic segments; when the second overlay pattern 402 and the third overlay pattern 403 are projected onto the first film layer 301, the second overlay pattern 402 and the first overlay pattern 401 are sequentially overlayed on the periphery of the third overlay pattern 403 from the center outwards, and any adjacent two are spaced apart.

[0030] Please refer to Figure 7 The first set of etched patterns 401, the second set of etched patterns 402, and the third set of etched patterns 403 are all located in the dicing channel area, which is located around the chip area 404. There are multiple sets of etched patterns 401, 402, and 403, spaced apart in the dicing channel area. The three etched patterns are integrated in one location, reducing the area occupied by the dicing channel compared to existing technologies that require two etched marks to appear in pairs.

[0031] For the preferred options, please continue to refer to [the relevant documentation / reference]. Figure 5 and Figure 6 Multiple graphic segments are evenly spaced within a rectangular ring structure. The third set of engraved graphics 403 is a square ring structure with the same number of graphic segments on each side. The second set of engraved graphics 402 is a square ring structure with the same number of graphic segments on each side, but the number of graphic segments on each side of the second set of engraved graphics 402 is greater than the number of graphic segments on each side of the third set of engraved graphics. The first set of engraved graphics 401 is a square ring structure with the same number of graphic segments on each side, but the number of graphic segments on each side of the first set of engraved graphics 401 is greater than the number of graphic segments on each side of the second set of engraved graphics 402. The graphic segments are rectangular, extending from the center of the rectangular ring to its edge, and multiple graphic segments are spaced apart in a direction perpendicular to the center to the edge. The graphic segments of the third set of engraved graphics 403 are aligned with some of the graphic segments of the second set of engraved graphics 402, and the graphic segments of the second set of engraved graphics are aligned with some of the graphic segments of the first set of engraved graphics 401. The first set of etched patterns 401 protrudes upward from the surface of the first film layer 301, the second set of etched patterns 402 protrudes upward from the surface of the second film layer 302, and the third set of etched patterns 403 protrudes upward from the surface of the third film layer 303.

[0032] In the process of forming the overlay mark, a first mask, a second mask, and a third mask are provided firstly. The first, second, and third mask masks respectively contain a first overlay mask pattern, a second overlay mask pattern, and a third overlay mask pattern. Each of the first, second, and third overlay mask patterns is a rectangular ring structure, formed by multiple spaced mask pattern segments. A first film layer is formed using the first mask mask, and the first overlay pattern is formed on the first film layer. A second film layer is formed using the second mask mask, and the first overlay pattern is formed on the second film layer. A second set of etched patterns is formed on the first film layer; a third film layer is formed using a third mask, and a third set of etched patterns is formed on the third film layer. The first film layer, the second film layer, and the third film layer are stacked sequentially. The first set of etched patterns, the second set of etched patterns, and the third set of etched patterns are all rectangular ring structures. The rectangular ring structure is composed of multiple spaced graphic segments. When the second set of etched patterns and the third set of etched patterns are projected onto the first film layer, the second set of etched patterns and the first set of etched patterns are sequentially placed around the third set of etched patterns from the center of the third set of etched patterns outwards, and any two adjacent ones are spaced apart.

[0033] This invention also provides a method for measuring overlay error, wherein a first film layer 301 serves as the front layer 2, a second film layer 302 serves as the front layer 1, and a third film layer 303 serves as the current layer. The center of the first overlay pattern 401 is identified based on its shape, the center of the second overlay pattern 402 is identified based on its shape, and the center of the third overlay pattern 403 is identified based on its shape. The coordinates of the centers of the first, second, and third overlay patterns 401, 402, and 403 are measured, and the offset between the center of the third overlay pattern 403 and the center of the second overlay pattern 402 is calculated as the overlay error between the third and second overlay patterns 403. The offset between the center of the third overlay pattern 403 and the center of the first overlay pattern 401 is also calculated as the overlay error between the third and first overlay patterns 403. When establishing the program for calculating overlay error, three overlay patterns can be established simultaneously, and the coordinates of the center can also be measured together using all three patterns. Compared to existing technologies that require establishing two sets of programs, this invention reduces the time spent on program establishment and center coordinate measurement, thus increasing production capacity.

[0034] In summary, in the overlay marking and overlay error measurement method provided in this embodiment of the invention, the first, second, and third overlay patterns of the three film layers are all rectangular ring structures. When the second and third overlay patterns are projected onto the first film layer, the second and first overlay patterns are sequentially overlaid on the outer periphery of the third overlay pattern, with any adjacent patterns spaced apart. Therefore, the rectangular edges of the overlay patterns of each film layer do not interfere with each other, have clear shapes, and are easy to identify, thus improving the recognizability of the overlay markings. The three overlay patterns can simultaneously test the offset, reducing the time for calculating the overlay error and increasing production capacity. Furthermore, the overlay markings of the three film layers are clustered in the same location, reducing the area occupied by the cutting path.

[0035] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A lithography mark, characterized in that, The application relates to a photomask, which comprises: a first set of photolithography patterns, a second set of photolithography patterns and a third set of photolithography patterns arranged on a first film layer, a second film layer and a third film layer in sequence, wherein the first film layer, the second film layer and the third film layer are arranged in sequence, the first set of photolithography patterns, the second set of photolithography patterns and the third set of photolithography patterns are all rectangular ring structures, and the rectangular ring structure is composed of a plurality of interval arranged pattern segments. When the second set of photolithography patterns and the third set of photolithography patterns are projected onto the first film layer, the second set of photolithography patterns and the first set of photolithography patterns are arranged in sequence on the periphery of the third set of photolithography patterns, and any two adjacent sets are arranged at intervals. The first set of photolithography patterns, the second set of photolithography patterns and the third set of photolithography patterns are all arranged in the cutting channel region, and the cutting channel is arranged around the chip region.

2. The overlay mark of claim 1, wherein, The first set of photolithography patterns, the second set of photolithography patterns and the third set of photolithography patterns are all multiple, and are arranged at intervals in the cutting channel region.

3. The overlay mark of claim 2, wherein, The third set of photolithography patterns is a square ring structure, and the number of pattern segments of each side is the same.

4. The overlay mark of claim 1, wherein, The second set of photolithography patterns is a square ring structure, and the number of pattern segments of each side is the same, and the number of pattern segments of each side of the second set of photolithography patterns is greater than that of the third set of photolithography patterns.

5. The overlay mark of claim 4, wherein, The first set of photolithography patterns is a square ring structure, and the number of pattern segments of each side is the same, and the number of pattern segments of each side of the first set of photolithography patterns is greater than that of the second set of photolithography patterns.

6. The overlay mark of claim 5, wherein, The plurality of interval arranged pattern segments in the rectangular ring structure are arranged uniformly.

7. The overlay mark of claim 1, wherein, The pattern segment is a rectangle, and the extending direction is the direction from the center of the rectangular ring to the side, and a plurality of the pattern segments are arranged at intervals in the direction perpendicular to the direction from the center of the rectangular ring to the side.

8. The overlay mark of claim 1, wherein, The third set of photolithography patterns is aligned with part of the pattern segments of the second set of photolithography patterns, and the second set of photolithography patterns is aligned with part of the pattern segments of the first set of photolithography patterns.

9. The overlay mark of claim 8, wherein, The application also relates to a photomask alignment method, which comprises the following steps: finding the center of the first set of photolithography patterns according to the shape of the first set of photolithography patterns, finding the center of the second set of photolithography patterns according to the shape of the second set of photolithography patterns, and finding the center of the third set of photolithography patterns according to the shape of the third set of photolithography patterns; 10. A method of overlay error measurement using the overlay mark of any one of claims 1 to 9, wherein, The coordinates of the centers of the first set of photolithography patterns, the second set of photolithography patterns and the third set of photolithography patterns are measured respectively; The offset amount of the coordinates of the center of the third set of photolithography patterns and the center of the second set of photolithography patterns is calculated as the overlay error of the third set of photolithography patterns and the second set of photolithography patterns, and the offset amount of the coordinates of the center of the third set of photolithography patterns and the center of the first set of photolithography patterns is calculated as the overlay error of the third set of photolithography patterns and the first set of photolithography patterns. ​ ​

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