Light emitting diode and preparation method thereof
By inserting a GaYN capping layer into the multi-quantum-well layer of a light-emitting diode, the polarization effect caused by lattice mismatch is alleviated, the wave function overlap rate of electrons and holes is improved, the problem of low luminous efficiency in the prior art is solved, and higher luminous efficiency and brightness are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-04
- Publication Date
- 2026-03-24
AI Technical Summary
In existing light-emitting diodes, the polarization effect and non-radiative recombination caused by lattice mismatch severely affect the luminous efficiency, especially in Micro-LEDs.
A GaYN capping layer is inserted between the InGaN quantum well and GaN quantum barrier in a multi-quantum-well layer to control the band gap of GaYN to be between that of InGaN and GaN. The doping ratio of GaYN and InGaN is gradually adjusted to alleviate polarization effects and improve band tilt.
It effectively alleviates the polarization effect, increases the wave function overlap rate of electrons and holes, reduces non-radiative recombination, and improves the luminous efficiency and brightness of light-emitting diodes.
Smart Images
Figure CN121728873A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and in particular to light-emitting diodes and methods for their fabrication. Background Technology
[0002] A light-emitting diode (LED) is a semiconductor electronic component that emits light and is widely used in lighting, display and other fields.
[0003] In related technologies, a light-emitting diode includes a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer stacked sequentially.
[0004] Improving the structure of the aforementioned light-emitting diode (LED) to enhance its luminous efficiency is a current research focus. Summary of the Invention
[0005] This disclosure provides a light-emitting diode (LED) and a method for fabricating the same, which can improve the luminous efficiency of the LED. The technical solution is as follows: On one hand, embodiments of this disclosure provide a light-emitting diode, the light-emitting diode comprising a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer stacked sequentially; The multiple quantum well layer includes a superlattice structure, which comprises multiple periodically alternating quantum well layers, capping layers, and quantum barrier layers. The quantum well layers are InGaN (indium gallium nitride) layers, the capping layers are GaYN (yttrium gallium nitride) layers, and the quantum barrier layers are GaN (gallium nitride) layers.
[0006] Optionally, the doping ratio of Y in the GaYN layer is 1% to 8%.
[0007] Optionally, along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of Y in the plurality of GaYN layers gradually increases.
[0008] Optionally, the thickness of the quantum well layer is 2-4 nm, the thickness of the capping layer is 1-2 nm, and the thickness of the quantum barrier layer is 5-15 nm.
[0009] Optionally, along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of In in the plurality of InGaN layers gradually increases.
[0010] Optionally, the superlattice structure includes 6 to 15 periodically alternating layers of quantum wells, capping layers, and quantum barrier layers.
[0011] On the other hand, embodiments of this disclosure provide a method for fabricating a light-emitting diode, the method comprising: Growth of the first semiconductor layer; A multi-quantum well layer is grown on the first semiconductor layer. The multi-quantum well layer includes a superlattice structure. The superlattice structure includes multiple periodically alternating stacked quantum well layers, capping layers, and quantum barrier layers. The quantum well layers are InGaN layers, the capping layers are GaYN layers, and the quantum barrier layers are GaN layers. A second semiconductor layer is grown on the multi-quantum-well layer.
[0012] Optionally, a multi-quantum-well layer is grown on the first semiconductor layer, comprising: The InGaN layer was grown at a growth temperature of 700-800℃ and a growth pressure of 100-200 torr. The GaYN layer was grown at a growth temperature of 850~1000℃ and a growth pressure of 300~600 torr. The GaN layer is grown at a growth temperature of 850~1000℃ and a growth pressure of 100~200 torr. Repeat the above steps multiple times to obtain the multi-quantum well layer.
[0013] Optionally, along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of Y in the plurality of GaYN layers gradually increases.
[0014] Optionally, along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of In in the plurality of InGaN layers gradually increases.
[0015] The beneficial effects of the technical solutions provided in this disclosure are: In this embodiment, a GaYN capping layer is inserted between the InGaN quantum wells and GaN quantum barriers in a multi-quantum-well layer. The bandgap of GaYN (1.9 eV~3.4 eV) lies between the bandgap of InGaN (0.7 eV~3.4 eV) and the bandgap of GaN (3.4 eV), effectively mitigating the polarization effect between the well barriers in the multi-quantum-well layer. Furthermore, the addition of the GaYN capping layer improves the bandgap tilt of the well barriers, increases the wavefunction overlap rate of electrons and holes, thereby improving the internal quantum efficiency. In addition, GaYN has an extremely low interface trap density, which reduces the occurrence of nonradiative recombination. By mitigating the polarization effect and nonradiative recombination, and improving the bandgap tilt of the well barriers, the luminous efficiency of the light-emitting diode is improved. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of a multi-quantum well layer structure provided in an embodiment of this disclosure; Figure 3 This is a schematic diagram of another light-emitting diode structure provided in an embodiment of this disclosure; Figure 4 This is a flowchart of a method for fabricating a light-emitting diode provided in an embodiment of this disclosure; Figure 5 This is a flowchart of another method for fabricating a light-emitting diode provided in this embodiment.
[0018] The attached figures are labeled as follows: 100: Substrate; 101: First semiconductor layer; 102: Active layer; 103: Second semiconductor layer; 104: Buffer layer; 105: Undoped GaN layer; 106: Electron blocking layer; 107: Contact layer; 121: Quantum well layer; 122: Cap layer; 123: Quantum barrier layer. Detailed Implementation
[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0020] In related technologies, GaN thin films are mainly grown on SiC substrates, Si substrates, or sapphire substrates via heteroepitaxial growth. However, there are significant lattice and thermal mismatches between heteroepitaxial substrates and GaN thin films. For example, the lattice mismatch between sapphire substrates and GaN is 17%, and the thermal mismatch is 34%; the lattice mismatch between Si substrates and GaN is 20%, and the thermal mismatch is 56%, etc.
[0021] When growing GaN-based light-emitting diodes on sapphire substrates via heteroepitaxial growth, a significant lattice mismatch between GaN and the sapphire substrate causes a large accumulation of stress in the epitaxial layer. This stress from the lattice mismatch leads to a decrease in the crystal quality of the GaN film, with dislocation densities reaching as high as 10-1. 8 ~10 10 cm -2 High-density dislocations may form nonradiative recombination centers in GaN-based devices, leading to a decrease in luminous efficiency.
[0022] In addition, in related technologies, the multi-quantum-well layer of light-emitting diodes includes a superlattice structure composed of InGaN quantum wells and GaN quantum barriers. Due to lattice mismatch, there is a polarization electric field between the wells and barriers, which causes the energy band of the wells and barriers to tilt. The distribution of electrons and holes in the quantum wells is uneven, the overlap rate of electron-hole wave functions decreases, the radiative recombination efficiency decreases, and the internal quantum efficiency is affected, which seriously limits the performance and application of light-emitting diodes.
[0023] Especially for green micro-light-emitting diodes (Micro-LEDs), the higher In content in the quantum well leads to a more severe well-barrier polarization effect. Furthermore, Micro-LEDs are small in size and have low injection current density, making their photoelectric performance highly sensitive to dislocation density and the tilt of the quantum well's barrier band. Under the same epitaxial structure and chip structure, Micro-LEDs exhibit superior performance. As LEDs decrease in size and surface area, the brightness of a single LED chip will decrease more significantly.
[0024] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure, with reference to... Figure 1 As can be seen, the present disclosure provides a light-emitting diode, which includes a first semiconductor layer 101, a multiple quantum well layer 102 and a second semiconductor layer 103 stacked sequentially.
[0025] Figure 2 This is a schematic diagram of a multi-quantum well layer structure provided in an embodiment of this disclosure. See also... Figure 2 The multi-quantum well layer 102 includes a superlattice structure, which includes multiple periodically alternating quantum well layers 121, capping layers 122, and quantum barrier layers 123. The quantum well layer 121 is an InGaN layer, the capping layer 122 is a GaYN layer, and the quantum barrier layer 123 is a GaN layer.
[0026] It should be noted that the first semiconductor layer 101 needs to be connected to the first electrode, and the second semiconductor layer 103 needs to be connected to the second electrode, with current flowing between the first and second electrodes. One of the first and second electrodes is an N-electrode, and the other is a P-electrode.
[0027] In this embodiment, a GaYN capping layer is inserted between the InGaN quantum wells and GaN quantum barriers in a multi-quantum-well layer. The bandgap of GaYN (1.9 eV~3.4 eV) lies between the bandgap of InGaN (0.7 eV~3.4 eV) and the bandgap of GaN (3.4 eV), effectively mitigating the polarization effect between the well barriers in the multi-quantum-well layer. Furthermore, the addition of the GaYN capping layer improves the bandgap tilt of the well barriers, increases the wavefunction overlap rate of electrons and holes, thereby improving the internal quantum efficiency. In addition, GaYN has an extremely low interface trap density, which reduces the occurrence of nonradiative recombination. By mitigating the polarization effect and nonradiative recombination, and improving the bandgap tilt of the well barriers, the luminous efficiency of the light-emitting diode is improved.
[0028] The light-emitting diode provided in this embodiment can be a Micro-LED, such as a green Micro-LED. The brightness of the Micro-LED can be improved through the above-described improvements to the multi-quantum-well layer.
[0029] In one possible implementation of this disclosure, the first semiconductor layer 101 can be an N-type layer, and the second semiconductor layer 103 can be a P-type layer. In another possible implementation of this disclosure, the first semiconductor layer 101 can be a P-type layer, and the second semiconductor layer 103 can be an N-type layer.
[0030] For example, the first semiconductor layer 101 is an N-type GaN layer, and the second semiconductor layer 103 is a P-type GaN layer.
[0031] For example, the doping element of the first semiconductor layer 101 can be Si, and the doping concentration of Si can be 1×10⁻⁶. 19 ~1×10 21 cm -3 The first semiconductor layer 101 is of good overall quality.
[0032] For example, the thickness of the first semiconductor layer 101 can be 1~3µm.
[0033] For example, the thickness of the first semiconductor layer 101 is 2µm.
[0034] In this embodiment of the disclosure, the doping element of the second semiconductor layer 103 can be Mg, and the doping concentration of Mg can be 1×10⁻⁶. 19 ~5×10 21 cm -3 .
[0035] For example, the thickness of the second semiconductor layer 103 can be 30~100nm.
[0036] For example, the thickness of the second semiconductor layer 103 is 50 nm.
[0037] In this embodiment of the disclosure, the doping ratio of Y in the GaYN layer is 1% to 8%.
[0038] In this implementation, by controlling the doping ratio of Y to 1%~8%, the bandgap of GaYN can be controlled to be between the bandgap of InGaN and the bandgap of GaN; on the other hand, it can ensure that GaYN has an extremely low interface trap density.
[0039] In one example of an embodiment of this disclosure, the doping ratio of Y in the plurality of GaYN layers is the same, for example, 2%, 4%, or 6%.
[0040] In this implementation, the control of the growth process is simpler due to the varying doping ratios of Y in the multiple GaYN layers.
[0041] In another example of the embodiments of this disclosure, along the direction from the first semiconductor layer 101 to the second semiconductor layer 103, the doping ratio of Y in the plurality of GaYN layers gradually increases, that is, the doping ratio of Y is higher in the GaYN layers farther away from the first semiconductor layer 101.
[0042] Within a single sublayer, the doping ratio of Y in the GaYN layer remains constant or gradually increases.
[0043] In one example, the doping ratio of Y in the multiple GaYN layers varies arithmetically, for example, the doping ratio of Y in the multiple GaYN layers is 1%, 2%, 3%, 4%, 5%, and 6% respectively.
[0044] In another example, the doping ratio of Y in the multiple GaYN layers varies non-uniformly, for example, the difference becomes larger and larger, such as the doping ratio of Y in the multiple GaYN layers being 1%, 1.5%, 2.3%, 3.5%, 5.5%, and 8% respectively.
[0045] In this embodiment of the disclosure, the In doping ratio in the InGaN layer is 10% to 30%.
[0046] In one example of an embodiment of this disclosure, the In doping ratio is the same in multiple InGaN layers, for example, 15%, 20%, or 25%.
[0047] In another example of the embodiments of this disclosure, the doping ratio of In in the plurality of InGaN layers gradually increases along the direction from the first semiconductor layer 101 to the second semiconductor layer 103.
[0048] Within a single sublayer, the doping ratio of In in the InGaN layer remains constant or gradually increases.
[0049] In one example, the doping ratio of In in the multiple InGaN layers varies at equal arithmetic progressions, such as 10%, 14%, 18%, 22%, 26%, and 30% in the multiple InGaN layers, respectively. In another example, the doping ratio of In in the multiple InGaN layers does not vary at equal arithmetic progressions, such as the difference increasing, such as 10%, 11%, 13%, 16%, 20%, and 25% in the multiple InGaN layers, respectively.
[0050] For example, along the direction from the first semiconductor layer 101 to the second semiconductor layer 103, the doping ratio of In in the plurality of InGaN layers gradually increases, and the doping ratio of Y in the plurality of GaYN layers gradually increases.
[0051] In this implementation, the doping ratios of In in the InGaN layer and Y in the GaYN layer are increased simultaneously. Taking green Micro-LED as an example, green Micro-LED emits a long wavelength. By gradually increasing the In content in the quantum well, the stress in the green quantum well layer can be gradually released. However, as the In content in the quantum well increases, the polarization effect of the well barrier in the multi-quantum well layer also gradually intensifies, leading to a more severe band tilt of the well barrier. But when the Y doping ratio in the GaYN capping layer also increases along with In, the band gap of GaYN decreases, reducing the lattice mismatch between well barriers and decreasing the polarization effect between well barriers. This results in an increase in the overlap rate of the electron-hole wave function in the quantum well, ultimately improving the luminous efficiency of the Micro-LED.
[0052] In this embodiment of the disclosure, the thickness of the quantum well layer 121 is 2-4 nm, the thickness of the capping layer 122 is 1-2 nm, and the thickness of the quantum barrier layer 123 is 5-15 nm.
[0053] In this implementation, designing the quantum well layer 121 and the quantum barrier layer 123 to the aforementioned thickness ensures the luminescence effect of the multiple quantum well layers. The capping layer 122, with its aforementioned thickness, both reduces polarization effects and improves lattice mismatch, ultimately enhancing internal quantum efficiency.
[0054] For example, the thickness of the quantum well layer 121 is 3 nm, the thickness of the cap layer 122 is 1.5 nm, and the thickness of the quantum barrier layer 123 is 10 nm.
[0055] In this embodiment of the disclosure, the superlattice structure includes 6 to 15 periodically alternating layers of quantum well layers 121, cap layers 122, and quantum barrier layers 123.
[0056] Using the aforementioned number of cycles provides sufficient space for electron-hole recombination luminescence while avoiding excessive thickness of the multiple quantum well layers, which would hinder miniaturization. Furthermore, this number of cycles, combined with the design of gradually increasing In doping ratios in multiple InGaN layers and gradually increasing Y doping ratios in multiple GaYN layers, allows for sufficient variation in the In and Y doping ratios, ultimately improving the luminous efficiency of Micro-LEDs.
[0057] Figure 3 This is a schematic diagram of another light-emitting diode structure provided in this disclosure embodiment, see below. Figure 3 The light-emitting diode may also include a substrate 100, on which a first semiconductor layer 101 is located.
[0058] For example, the substrate 100 may be a sapphire substrate 100.
[0059] See Figure 3 The light-emitting diode may also include a buffer layer 104 and an undoped GaN layer 105, the buffer layer 104 and the undoped GaN layer 105 being stacked on the substrate 100, and the first semiconductor layer 101 being located on the undoped GaN layer 105.
[0060] For example, buffer layer 104 can be an AlN buffer layer.
[0061] For example, the thickness of the buffer layer 104 can be 15~30nm.
[0062] For example, the thickness of the buffer layer 104 is 20 nm.
[0063] For example, the thickness of the undoped GaN layer 105 can be 1~3µm.
[0064] For example, the thickness of the undoped GaN layer 105 is 2µm.
[0065] See Figure 3 The light-emitting diode may also include an electron blocking layer 106, which is located between the multiple quantum well layer 102 and the second semiconductor layer 103.
[0066] For example, the electron blocking layer 106 can be an AlGaN electron blocking layer.
[0067] For example, the thickness of the electron blocking layer 106 can be 30~100nm.
[0068] For example, the electron blocking layer 106 has a thickness of 50 nm.
[0069] See Figure 3The light-emitting diode may also include a contact layer 107, which is located on the second semiconductor layer 103.
[0070] For example, the contact layer 107 may be a GaN layer with the same doping as the second semiconductor layer 103, such as a P-type GaN contact layer.
[0071] For example, the thickness of the contact layer 107 can be 10~30nm.
[0072] For example, the thickness of the contact layer 107 is 20 nm.
[0073] Figure 4 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure, with reference to... Figure 4 As can be seen, this disclosure provides a method for fabricating a light-emitting diode, the method comprising: S101: Growth of the first semiconductor layer.
[0074] S102: Grow a multi-quantum-well layer on the first semiconductor layer.
[0075] The multi-quantum well layer includes a superlattice structure, which comprises multiple periodically alternating quantum well layers, capping layers, and quantum barrier layers. The quantum well layers are InGaN layers, the capping layers are GaYN layers, and the quantum barrier layers are GaN layers.
[0076] S103: Grow a second semiconductor layer on the multi-quantum-well layer.
[0077] In this embodiment, a GaYN capping layer is inserted between the InGaN quantum wells and GaN quantum barriers in a multi-quantum-well layer. The bandgap of GaYN (1.9 eV~3.4 eV) lies between the bandgap of InGaN (0.7 eV~3.4 eV) and the bandgap of GaN (3.4 eV), effectively mitigating the polarization effect between the well barriers in the multi-quantum-well layer. Furthermore, the addition of the GaYN capping layer improves the bandgap tilt of the well barriers, increases the wavefunction overlap rate of electrons and holes, thereby improving the internal quantum efficiency. In addition, GaYN has an extremely low interface trap density, which reduces the occurrence of nonradiative recombination. By mitigating the polarization effect and nonradiative recombination, and improving the bandgap tilt of the well barriers, the luminous efficiency of the light-emitting diode is improved.
[0078] Figure 5 This is a flowchart of another method for fabricating a light-emitting diode provided in this disclosure embodiment, see reference. Figure 5 It can be seen that the method for fabricating this light-emitting diode includes: S201: Provide a substrate.
[0079] The substrate can be a sapphire substrate, for example, (0001) crystal orientation sapphire (Al2O3) as the substrate.
[0080] Optionally, step S201 may further include: placing the sapphire substrate in a graphite disk in an epitaxial vapor deposition reaction chamber, and treating the surface of the substrate for epitaxial layer growth for 2-30 minutes under a hydrogen atmosphere.
[0081] S202: Growing a buffer layer on the substrate.
[0082] The buffer layer can be an AlN buffer layer.
[0083] In this embodiment of the disclosure, an AlN buffer layer can be grown using a physical vapor deposition (PVD) apparatus with a sputtering power of 2500~4000W, for example 3000W.
[0084] For example, an AlN buffer layer of 15-30 nm is grown in an environment with a growth temperature of 500-650 °C and a growth pressure of 1-10 torr.
[0085] For example, a 20 nm AlN buffer layer was grown at a growth temperature of 600 °C and a growth pressure of 5 torr.
[0086] Optionally, after growth is complete, the substrate is transferred to a metal-organic chemical vapor deposition (MOCVD) apparatus for in-situ annealing under a hydrogen atmosphere. The annealing temperature is 1000~1200℃, the chamber pressure is 150~500 Torr, and the annealing time is 5~10 minutes.
[0087] For example, the annealing temperature is 1100℃, the cavity pressure is 300 Torr, and the annealing time is 8 minutes.
[0088] After annealing, subsequent semiconductor films are grown in an MOCVD device.
[0089] S203: An undoped GaN layer is grown on the buffer layer.
[0090] In this embodiment of the disclosure, after annealing, an NH3 and TMGa source are introduced to grow an undoped GaN layer.
[0091] For example, an undoped GaN layer of 1-3 μm is grown at a growth temperature of 1050-1200°C and a growth pressure of 100-300 Torr.
[0092] For example, a 2 μm undoped GaN layer was grown at a growth temperature of 1100 °C and a growth pressure of 200 Torr.
[0093] S204: The first semiconductor layer is grown on an undoped GaN layer.
[0094] In this embodiment of the disclosure, after the undoped GaN layer is grown, NH3 and TMGa sources are introduced, and SiH4 is introduced simultaneously to grow the first semiconductor layer.
[0095] In this embodiment of the disclosure, step S204 may include: An N-type GaN layer of 1-3 μm is grown at a growth temperature of 1100-1200℃ and a growth pressure of 100-300 Torr as the first semiconductor layer.
[0096] For example, a 2 μm N-type GaN layer was grown at a growth temperature of 1150 °C and a growth pressure of 200 Torr.
[0097] In this embodiment of the disclosure, the Si doping concentration in the N-type GaN layer can be 1×10⁻⁶. 19 ~1×10 21 cm -3 .
[0098] S205: A multi-quantum-well layer is grown on the first semiconductor layer.
[0099] In this embodiment of the present disclosure, after the first semiconductor layer is grown, NH3, TEGa, and TMIn sources are introduced, and trimethylcyclopentadienyl yttrium is also introduced to grow a multi-quantum well layer.
[0100] In step S205, the multiple quantum well layer includes a superlattice structure, which includes multiple periodically alternating quantum well layers, capping layers, and quantum barrier layers. The quantum well layers are InGaN layers, the capping layers are GaYN layers, and the quantum barrier layers are GaN layers.
[0101] In this embodiment of the disclosure, step S205 may include: The InGaN layer was grown at a growth temperature of 700-800℃ and a growth pressure of 100-200 torr. The GaYN layer was grown at a growth temperature of 850~1000℃ and a growth pressure of 300~600 torr. The GaN layer is grown at a growth temperature of 850~1000℃ and a growth pressure of 100~200 torr. Repeat the above steps multiple times to obtain the multi-quantum well layer.
[0102] In this step, the above-mentioned temperature and pressure are used to grow multiple quantum well layers, which can ensure the crystal quality of each sublayer.
[0103] For example, the InGaN layer is grown at a growth temperature of 750°C and a growth pressure of 150 torr; The GaYN layer was grown at a growth temperature of 900℃ and a growth pressure of 450 torr. The GaN layer was grown at a growth temperature of 900°C and a growth pressure of 150 torr.
[0104] In this embodiment of the disclosure, the doping ratio of Y in the GaYN layer is 1% to 8%.
[0105] In this implementation, by controlling the doping ratio of Y to 1%~8%, the bandgap of GaYN can be controlled to be between the bandgap of InGaN and the bandgap of GaN; on the other hand, it can ensure that GaYN has an extremely low interface trap density.
[0106] In one example of an embodiment of this disclosure, the doping ratio of Y in the plurality of GaYN layers is the same, for example, 2%, 4%, or 6%.
[0107] In this implementation, the control of the growth process is simpler due to the varying doping ratios of Y in the multiple GaYN layers.
[0108] In another example of the embodiments of this disclosure, along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of Y in the plurality of GaYN layers gradually increases, that is, the doping ratio of Y is higher in the GaYN layers farther away from the first semiconductor layer 101.
[0109] Within a single sublayer, the doping ratio of Y in the GaYN layer remains constant or gradually increases.
[0110] In one example, the doping ratio of Y in the multiple GaYN layers varies arithmetically, for example, the doping ratio of Y in the multiple GaYN layers is 1%, 2%, 3%, 4%, 5%, and 6% respectively.
[0111] In another example, the doping ratio of Y in the multiple GaYN layers varies non-uniformly, for example, the difference becomes larger and larger, such as the doping ratio of Y in the multiple GaYN layers being 1%, 1.5%, 2.3%, 3.5%, 5.5%, and 8% respectively.
[0112] In this embodiment of the disclosure, the In doping ratio in the InGaN layer is 10% to 30%.
[0113] In one example of an embodiment of this disclosure, the In doping ratio is the same in multiple InGaN layers, for example, 15%, 20%, or 25%.
[0114] In another example of the embodiments of this disclosure, the doping ratio of In in the plurality of InGaN layers gradually increases along the direction from the first semiconductor layer to the second semiconductor layer.
[0115] Within a single sublayer, the doping ratio of In in the InGaN layer remains constant or gradually increases.
[0116] In one example, the doping ratio of In in the multiple InGaN layers varies at equal arithmetic progressions, such as 10%, 14%, 18%, 22%, 26%, and 30% in the multiple InGaN layers, respectively. In another example, the doping ratio of In in the multiple InGaN layers does not vary at equal arithmetic progressions, such as the difference increasing, such as 10%, 11%, 13%, 16%, 20%, and 25% in the multiple InGaN layers, respectively.
[0117] For example, along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of In in the plurality of InGaN layers gradually increases, and the doping ratio of Y in the plurality of GaYN layers gradually increases.
[0118] In this implementation, the doping ratios of In in the InGaN layer and Y in the GaYN layer are increased simultaneously. Taking green Micro-LED as an example, green Micro-LED emits a long wavelength. By gradually increasing the In content in the quantum well, the stress in the green quantum well layer can be gradually released. However, as the In content in the quantum well increases, the polarization effect of the well barrier in the multi-quantum well layer also gradually intensifies, leading to a more severe band tilt of the well barrier. But when the Y doping ratio in the GaYN capping layer also increases along with In, the band gap of GaYN decreases, reducing the lattice mismatch between well barriers and decreasing the polarization effect between well barriers. This results in an increase in the overlap rate of the electron-hole wave function in the quantum well, ultimately improving the luminous efficiency of the Micro-LED.
[0119] In this embodiment of the disclosure, the thickness of the quantum well layer is 2-4 nm, the thickness of the capping layer is 1-2 nm, and the thickness of the quantum barrier layer is 5-15 nm.
[0120] In this implementation, designing the quantum well layer and quantum barrier layer to the aforementioned thickness ensures the luminescence effect of the multiple quantum well layers. The capping layer, with its aforementioned thickness, reduces polarization effects and improves lattice mismatch, ultimately enhancing internal quantum efficiency.
[0121] For example, the thickness of the quantum well layer is 3 nm, the thickness of the cap layer is 1.5 nm, and the thickness of the quantum barrier layer is 10 nm.
[0122] In this embodiment of the disclosure, the superlattice structure includes 6 to 15 periodically alternating layers of quantum wells, capping layers, and quantum barrier layers.
[0123] Using the aforementioned number of cycles provides sufficient space for electron-hole recombination luminescence while avoiding excessive thickness of the multiple quantum well layers, which would hinder miniaturization. Furthermore, this number of cycles, combined with the design of gradually increasing In doping ratios in multiple InGaN layers and gradually increasing Y doping ratios in multiple GaYN layers, allows for sufficient variation in the In and Y doping ratios, ultimately improving the luminous efficiency of Micro-LEDs.
[0124] S206: An electron blocking layer is grown on a multi-quantum-well layer.
[0125] In this embodiment of the disclosure, after the multi-quantum well layer is grown, NH3, TEGa and TMAl sources are introduced to grow an electron blocking layer.
[0126] In this embodiment of the disclosure, step S206 may include: An AlGaN layer of 50-100 nm was grown at a growth temperature of 950-1050℃ and a growth pressure of 50-100 Torr to serve as an electron blocking layer.
[0127] For example, an 80nm AlGaN layer was grown at a growth temperature of 1000℃ and a growth pressure of 80Torr.
[0128] In the embodiments disclosed herein, the Al content in the AlGaN layer is between 0.1 and 0.5.
[0129] S207: A second semiconductor layer is grown on the electron blocking layer.
[0130] In this embodiment of the disclosure, after the electron blocking layer is grown, NH3, TEGa and Cp2Mg are introduced to grow a second semiconductor layer.
[0131] In this embodiment of the disclosure, step S207 may include: A 30-100 nm P-type GaN layer is grown at a growth temperature of 950-1050℃ and a growth pressure of 100-600 Torr as the second semiconductor layer.
[0132] For example, a 50 nm P-type GaN layer was grown at a growth temperature of 1000 °C and a growth pressure of 400 Torr.
[0133] In this embodiment, the doping concentration of Mg in the P-type GaN layer can be 1×10⁻⁶. 19 ~5×10 21 cm -3 .
[0134] S208: A contact layer is grown on the second semiconductor layer.
[0135] In this embodiment of the present disclosure, after the second semiconductor layer is grown, NH3, TEGa and Cp2Mg are introduced to grow a contact layer.
[0136] In this embodiment of the disclosure, step S208 may include: P-type GaN contact layers of 10-30 nm were grown at a growth temperature of 1000-1100℃ and a growth pressure of 100-300 Torr.
[0137] For example, a 20 nm P-type GaN contact layer was grown at a growth temperature of 1050 °C and a growth pressure of 200 Torr.
[0138] In this embodiment, the doping concentration of Mg in the P-type GaN layer can be 1×10⁻⁶. 19 ~5×10 21 cm -3 .
[0139] After step S208, the method may further include: The reaction chamber temperature was lowered, and the cells were annealed in a nitrogen atmosphere at a temperature range of 650~850℃ for 5~15 minutes. The cells were then cooled to room temperature, and the epitaxial growth was completed.
[0140] It should be noted that, Figure 5 The method for fabricating the light-emitting diode shown is relatively... Figure 4 The method for fabricating a light-emitting diode shown provides a more detailed approach to the growth of light-emitting diodes.
[0141] It should be noted that, in the embodiments disclosed herein, a PVD equipment and a Veeco K465iorC4orRB MOCVD equipment are used to realize the growth method of light-emitting diodes. Trimethylaluminum (TMAl), trimethylgallium (TMGa) and / or triethylgallium (TEGa) and trimethylaluminum indium (TMIn) are used as precursors for group III sources, ammonia (NH3) is used as a precursor for group V sources, silane (SiH4) and magnesium pyrocene (Cp2Mg) are used as precursors for N-type dopant and P-type dopant, respectively, trimethylcyclopentadienyl yttrium is used as a Y precursor, and nitrogen and hydrogen are used as carrier gases.
[0142] After testing, the embodiments disclosed herein were applied to green Micro-LEDs, fabricated into chips with a size of 2*2mil, and subjected to a 2.5mA current test. The test data are shown in Table 1 below:
[0143] As shown in Table 1, when this embodiment of the present disclosure is applied to a green Micro-LED, the luminous brightness is increased from 1.67mW to 1.95mW, and the blue shift of the emission wavelength is reduced from 4.2nm to 1.6nm.
[0144] In Table 1, ESD-6kV (%) refers to the percentage (%) of LED products that still function normally after a 6 kV electrostatic discharge (ESD) test. This indicator has also seen a slight improvement.
[0145] The above description is only a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A light-emitting diode, characterized in that, The light-emitting diode includes a first semiconductor layer (101), a multi-quantum well layer (102), and a second semiconductor layer (103) stacked sequentially. The multi-quantum well layer (102) includes a superlattice structure, which includes multiple periodically alternating quantum well layers (121), capping layers (122) and quantum barrier layers (123). The quantum well layer (121) is an InGaN layer, the capping layer (122) is a GaYN layer, and the quantum barrier layer (123) is a GaN layer.
2. The light-emitting diode according to claim 1, characterized in that, The doping ratio of Y in the GaYN layer is 1% to 8%.
3. The light-emitting diode according to claim 2, characterized in that, Along the direction from the first semiconductor layer (101) to the second semiconductor layer (103), the doping ratio of Y in the plurality of GaYN layers gradually increases.
4. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The thickness of the quantum well layer (121) is 2~4nm, the thickness of the cap layer (122) is 1~2nm, and the thickness of the quantum barrier layer (123) is 5~15nm.
5. The light-emitting diode according to any one of claims 1 to 3, characterized in that, Along the direction from the first semiconductor layer (101) to the second semiconductor layer (103), the doping ratio of In in the plurality of InGaN layers gradually increases.
6. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The superlattice structure comprises 6 to 15 periodically alternating layers of quantum wells (121), capping layers (122), and quantum barrier layers (123).
7. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: Growth of the first semiconductor layer; A multi-quantum well layer is grown on the first semiconductor layer. The multi-quantum well layer includes a superlattice structure. The superlattice structure includes multiple periodically alternating stacked quantum well layers, capping layers, and quantum barrier layers. The quantum well layers are InGaN layers, the capping layers are GaYN layers, and the quantum barrier layers are GaN layers. A second semiconductor layer is grown on the multi-quantum-well layer.
8. The preparation method according to claim 7, characterized in that, Growing a multi-quantum-well layer on the first semiconductor layer includes: The InGaN layer was grown at a growth temperature of 700-800℃ and a growth pressure of 100-200 torr. The GaYN layer was grown at a growth temperature of 850~1000℃ and a growth pressure of 300~600 torr. The GaN layer is grown at a growth temperature of 850~1000℃ and a growth pressure of 100~200 torr. Repeat the above steps multiple times to obtain the multi-quantum well layer.
9. The preparation method according to claim 7 or 8, characterized in that, Along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of Y in the plurality of GaYN layers gradually increases.
10. The preparation method according to claim 7 or 8, characterized in that, Along the direction from the first semiconductor layer to the second semiconductor layer, the doping ratio of In in the plurality of InGaN layers gradually increases.