File updating method and device, equipment, medium and product
By identifying the executable file section type and instruction characteristic parameters of the ARM64 platform, differential patch files are generated, solving the problem of low update efficiency on the ARM64 platform and realizing an efficient update process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2026-03-27
Smart Images
Figure CN121742877A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of computer technology, and in particular to a file update method, apparatus, device, medium, and product. Background Technology
[0002] With the widespread adoption of embedded and mobile devices, the ARM64 platform has become one of the mainstream computing architectures. The demand for application updates on the ARM64 platform is increasing, making the efficient transfer and application update packages a pressing issue.
[0003] In existing technologies, the entire executable file corresponding to the application on the ARM64 platform needs to be distributed to the corresponding terminal device, resulting in low transmission and update efficiency due to the large size of the update package to be transmitted. Summary of the Invention
[0004] This invention provides a file update method, apparatus, device, medium, and product to solve the technical problem in the prior art where the large size of the update package to be transmitted leads to low transmission and update efficiency.
[0005] According to one aspect of the present invention, a file update method is provided, comprising:
[0006] Obtain the section types contained in the initial executable file in the target computing architecture as the first section type, and obtain the section types contained in the target executable file in the target computing architecture as the second section type;
[0007] The initial executable file determines the section that matches the first section type, and identifies and extracts the instruction feature parameters of each instruction from the section that matches the first section type as the first instruction feature parameter; the target executable file determines the section that matches the second section type, and identifies and extracts the instruction feature parameters of each instruction from the section that matches the second section type as the second instruction feature parameter.
[0008] A differential patch file is generated based on the first instruction feature parameters and the second instruction feature parameters, so that the terminal device integrating the target computing architecture updates the initial executable file based on the differential patch file to generate the target executable file.
[0009] According to another aspect of the present invention, a file updating apparatus is provided, comprising:
[0010] The first acquisition module is used to acquire the section types contained in the initial executable file in the target computing architecture as the first section type, and to acquire the section types contained in the target executable file in the target computing architecture as the second section type;
[0011] The identification and extraction module is used to determine the section matching the first section type from the initial executable file, and to identify and extract the instruction feature parameters of each instruction from the section matching the first section type as the first instruction feature parameter; and to determine the section matching the second section type from the target executable file, and to identify and extract the instruction feature parameters of each instruction from the section matching the second section type as the second instruction feature parameter.
[0012] The file update module is used to generate a differential patch file based on the first instruction feature parameters and the second instruction feature parameters, so that the terminal device integrating the target computing architecture can update the initial executable file based on the differential patch file to generate the target executable file.
[0013] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:
[0014] At least one processor; and
[0015] A memory communicatively connected to the at least one processor; wherein,
[0016] The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the file update method according to any embodiment of the present invention.
[0017] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the file update method described in any embodiment of the present invention.
[0018] According to another aspect of the present invention, a computer program product is provided, the computer program product comprising a computer program that, when executed by a processor, implements the file update method described in any embodiment of the present invention.
[0019] The technical solution of this invention obtains the section types contained in the initial executable file and the target executable file in the target computing architecture, respectively, and identifies and extracts the instruction feature parameters of each instruction in the section that matches the section type from the initial executable file and the target executable file, respectively. Based on the difference between these two instruction feature parameters, a differential patch file is generated, so that the terminal device integrating the target computing architecture can directly update the initial executable file based on the differential patch file without sending the entire target executable file to the terminal device integrating the target computing architecture. This can significantly reduce the size of the update package in the target computing architecture and improve transmission efficiency and update efficiency.
[0020] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0022] Figure 1 This is a flowchart of a file update method provided in an embodiment of the present invention;
[0023] Figure 2 This is a flowchart of another file update method provided in an embodiment of the present invention;
[0024] Figure 3 This is a flowchart of another file update method provided in an embodiment of the present invention;
[0025] Figure 4 This is a schematic diagram of the structure of a file update device provided in an embodiment of the present invention;
[0026] Figure 5 This is a structural block diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0028] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0029] It should be noted that, for ease of understanding of the scheme, the relevant parameters involved in this scheme are explained as follows.
[0030] The Courgette algorithm is a differential update algorithm that updates software by generating and applying differential files. Unlike traditional binary differential algorithms (such as BSDiff), the Courgette algorithm not only compares the binary differences between files but also considers the structural characteristics of the target file format. It can identify and minimize functionally equivalent code differences, thereby generating smaller update packages.
[0031] ELF (Executable and Linkable Format) is a standard file format for executable files, object code, and shared libraries, widely used in Unix-like operating systems. An ELF file consists of a header, a program header table, a section header table, and multiple sections. Its structure is complex and flexible, allowing it to adapt to different hardware platforms and operating system requirements.
[0032] ARM64 (also known as AArch64) is a 64-bit extension of the ARM architecture, widely used in mobile devices, embedded systems, and servers. Compared to the traditional 32-bit ARM architecture, ARM64 offers higher performance and a larger address space, better meeting the demands of modern computing.
[0033] In one embodiment, Figure 1 This is a flowchart illustrating a file update method provided in an embodiment of the present invention. This embodiment is applicable to situations where the Courgette algorithm is adapted to the ARM64 platform. The method can be executed by a file update device, which can be implemented in hardware and / or software and can be configured in an electronic device. For example, the electronic device can be any mobile device or embedded device with data computing and processing capabilities. Figure 1 As shown, the method includes:
[0034] S110. Obtain the section types contained in the initial executable file in the target computing architecture as the first section type, and obtain the section types contained in the target executable file in the target computing architecture as the second section type.
[0035] Here, the target computing architecture refers to the computing architecture that an embedded or mobile device can integrate. For example, the target computing architecture could be ARM64. The initial executable file refers to an older version of the executable file, which can also be understood as the version of the executable file currently used by the terminal device integrating the target computing architecture; the target executable file refers to a newer version of the executable file, which can also be understood as the version of the executable file that the terminal device integrating the target computing architecture needs to update to. Generally, the version of the initial executable file is lower than the version of the target executable file. Of course, the version of the initial executable file can be higher than the version of the target executable file. It should be noted that the executable file formats of the initial executable file and the target executable file are the same. For example, both the initial executable file and the target executable file can be ELF (Executable and Linkable Format) files.
[0036] The first section type refers to all section types contained in the initial executable file; the second section type refers to all section types contained in the target executable file. In practice, the first and second section types may contain the same section types. For example, both the first and second section types may include, but are not limited to, one of the following: code section, data section, symbol table section, string table section, debugging information section, and relocation information section.
[0037] In the embodiments, both the initial executable file and the target executable file contain a header, a program header table, and a section header table. The section type specific to the target computing architecture in the initial executable file can be identified based on the header, program header table, and section header table in the initial executable file as the first section type, and the section type specific to the target computing architecture in the target executable file can be identified based on the header, program header table, and section header table in the target executable file as the second section type.
[0038] S120. Determine the section matching the first section type from the initial executable file, and identify and extract the instruction feature parameters of each instruction from the section matching the first section type as the first instruction feature parameters; and determine the section matching the second section type from the target executable file, and identify and extract the instruction feature parameters of each instruction from the section matching the second section type as the second instruction feature parameters.
[0039] The instruction characteristic parameters include instruction boundaries, instruction type, and operands. Correspondingly, the first instruction characteristic parameters include the first instruction boundary, first instruction type, and first operand, and the second instruction characteristic parameters include the second instruction boundary, second instruction type, and second operand. The instruction boundary characterizes the execution trigger condition for each instruction, i.e., under what circumstances the instruction is executed. The instruction type refers to the classification based on the instruction's function and operational characteristics; for example, the instruction type may include, but is not limited to, one of the following: arithmetic operation instructions, logical operation instructions, shift operation instructions, branch instructions, function call instructions, load instructions, store instructions, and synchronization instructions. The operands refer to the objects involved in the instruction's operation; for example, operands can be memory address operands, offsets, and addends.
[0040] In this embodiment, a section matching the first section type can be found in the initial executable file, and each instruction in the section matching the first section type is parsed to identify and extract the instruction boundary, instruction type, and operands of the instruction as first instruction feature parameters, thus obtaining the first instruction boundary, first instruction type, and first operand; and a section matching the second section type can be found in the target executable file, and each instruction in the section matching the second section type is parsed to identify and extract the instruction boundary, instruction type, and operands of the instruction as second instruction feature parameters, thus obtaining the second instruction boundary, second instruction type, and second operand.
[0041] S130. A differential patch file is generated based on the first instruction feature parameters and the second instruction feature parameters, so that the terminal device integrating the target computing architecture updates the initial executable file based on the differential patch file and generates the target executable file.
[0042] The differential patch file is used to update application or data files, and generally records the differences between two versions of the file. In this embodiment, the differential patch file refers to the file containing the difference information between the target executable file and the initial executable file. In this embodiment, the differential patch file, which contains the difference information between the initial executable file and the target executable file, can be determined based on the relative and absolute addresses determined by the operands in the first instruction feature parameters, and based on the relative and absolute addresses determined by the operands in the second instruction feature parameters. The differential patch file is then sent to a terminal device integrating the target computing architecture, so that the terminal device can update the initial executable file based on the differential patch file to obtain a new version of the target executable file, thus completing the file update process.
[0043] The technical solution of this embodiment obtains the section types contained in the initial executable file and the target executable file in the target computing architecture, respectively, and identifies and extracts the instruction feature parameters of each instruction in the section that matches the section type from the initial executable file and the target executable file. Based on the difference between these two instruction feature parameters, a differential patch file is generated, so that the terminal device integrating the target computing architecture can directly update the initial executable file based on the differential patch file without sending the entire target executable file to the terminal device integrating the target computing architecture. This can significantly reduce the size of the update package in the target computing architecture and improve the update efficiency.
[0044] In one embodiment, Figure 2 This is a flowchart of another file update method provided by an embodiment of the present invention. This embodiment further refines the process of obtaining section types, identifying and extracting instruction feature parameters, and generating differential patch files, based on the above embodiments. Figure 2 As shown, the file update method in this embodiment includes:
[0045] S210. Obtain the header, program header table, and section header table contained in the initial executable file in the target computing architecture as the first header, the first program header table, and the first section header table; and obtain the header, program header table, and section header table contained in the target executable file as the second header, the second program header table, and the second section header table.
[0046] The executable file's header contains basic information about the entire file, such as file type and target architecture. It also includes offsets pointing to the program header table and section header tables. In practice, the starting read position of the section header table can be determined based on the offsets. Each section header table contains basic information such as the name, type, offset in the file, size, and attributes of each section. The program header table describes the segment information within the executable file, and each segment can contain one or more sections. Generally, the program header table is used to characterize each segment's type, offset in the file, virtual address, physical address, segment size, and access permissions.
[0047] In this embodiment, a programming language can be used to read the header, program header table, and section header table contained in the initial executable file, as the first header, first program header table, and first section header table; and a programming language can be used to read the header, program header table, and section header table contained in the target executable file, as the second header, second program header table, and second section header table. Alternatively, a specialized reading tool (e.g., a binary analysis tool) can be used to read the header, program header table, and section header table contained in the initial executable file, as the first header, first program header table, and first section header table; and a specialized reading tool can be used to read the header, program header table, and section header table contained in the target executable file, as the second header, second program header table, and second section header table.
[0048] S220: Identify and extract the section type contained in the initial executable file as the first section type based on the first header, the first program header table and the first section header table; and identify and extract the section type contained in the target executable file as the second section type based on the second header, the second program header table and the second section header table.
[0049] In this embodiment, the initial executable file contains offsets in its first header pointing to the first program header table and the first section header table, and the target executable file contains offsets in its second header pointing to the second program header table and the second section header table. Furthermore, both the first section header table in the initial executable file and the second section header table in the target executable file can contain multiple section header table entries, with each entry corresponding to a section. Therefore, by traversing each section header table entry in the first section header table of the initial executable file, the section corresponding to each entry can be obtained, serving as the first section type; similarly, by traversing each section header table entry in the second section header table of the target executable file, the section corresponding to each entry can be obtained, serving as the second section type. In one example, the index containing the section name in each section header entry of the first section header table included in the initial executable can be obtained, and the section name can be found in the string table using that index. The section name is then matched with a known section type name to determine the section type, which is designated as the first section type. Similarly, the index containing the section name in each section header entry of the first section header table included in the target executable can be obtained, and the section name can be found in the string table using that index. The section name is then matched with a known section type name to determine the section type, which is designated as the second section type.
[0050] In one example, each segment in the first program header table may contain one or more sections. By analyzing the segment information in the first program header table of the initial executable file, the sections contained in each segment can be determined. Then, based on the segment type and the correspondence between segments and sections, the section type contained in that segment can be identified and extracted as the first section type. Similarly, by analyzing the segment information in the second program header table of the target executable file, the sections contained in each segment can be determined. Then, based on the segment type and the correspondence between segments and sections, the section type contained in that segment can be identified and extracted as the second section type. For example, if the segment type is a code segment, and the code segment corresponds to a .text section, then the section type contained in that segment can be determined to be a .text section. For example, when the segment type is a data segment, the data segment corresponds to the .data section and the .bss section. Therefore, it can be determined that the segment can include the .data section and the .bss section. Specifically, if the segment type is an initialized data segment, it can be determined that the segment includes the .data section; if the segment type is an uninitialized data segment, it can be determined that the segment includes the .bss section.
[0051] S230. Determine the section that matches the first section type from the initial executable file, and based on the offset and addend in the section that matches the first section type, and in combination with the executable file format, identify and extract the first absolute address of each instruction.
[0052] The executable file format can be ELF; the offset refers to the displacement of an instruction within a segment relative to a base address; the base address refers to the starting address of the segment; the addend can be combined with the offset to obtain the absolute address of each instruction. Assuming the first section type can be a relocation information section, the section containing the relocation table can be located based on the information in the section header table, and the offset and size information in the section header table entry can be read. Alternatively, the contents of the relocation table can be read from the initial executable file. In this embodiment, the first absolute address can be calculated based on the relocation type in the initial executable file. For example, if the relocation type is a relative relocation type, the base address, symbol address, and the addend in the relocation table can be added to obtain the absolute address; then, address correction is performed based on the offset to obtain the first absolute address of each instruction.
[0053] S240. Identify the first instruction boundary and the first instruction type of each instruction, and parse the code section in the section that matches the first section type based on the first instruction boundary and the first instruction type, so as to identify and extract the first relative address of each instruction.
[0054] Here, the first relative address refers to the offset of a certain instruction relative to the start position of a section. For example, assume the first section type is a code section. In an embodiment, the code section can be found in the first program header table and the first section header table contained in the initial executable file. Then, starting from the start position of the code section, the file content of the initial executable file is read, and the instruction boundary corresponding to each instruction is identified as the first instruction boundary, and the instruction type corresponding to each instruction is identified as the second instruction type. For each parsed instruction, the first relative address can be calculated based on its position in the code section.
[0055] S250. Determine the section that matches the second section type from the target executable file, and based on the offset and addend in the section that matches the second section type, and in combination with the executable file format, identify and extract the second absolute address of each instruction.
[0056] The executable file format can be ELF; the offset refers to the displacement relative to a certain base address; the addend can be combined with the offset to obtain the absolute address of each instruction. Assuming the second section type can be a relocation information section, the section containing the relocation table can be located based on the information in the section header table, and the offset and size information in the section header table entry can be read. Alternatively, the contents of the relocation table can be read from the target executable file. In this embodiment, the absolute address can be calculated based on the relocation type in the target executable file. For example, if the relocation type is a relative relocation type, the base address, symbol address, and the addend in the relocation table can be added to obtain the absolute address; then, address correction is performed based on the offset to obtain the second absolute address of each instruction.
[0057] S260. Identify the second instruction boundary and the second instruction type of each instruction, and parse the code section in the section that matches the second section type based on the second instruction boundary and the second instruction type to identify and extract the second relative address of each instruction.
[0058] Here, the second relative address refers to the offset relative to the start position of a section. For example, assume the second section type is a code section. In an embodiment, the code section can be found in the second program header table and the second section header table contained in the target executable file. Then, starting from the start position of the code section, the file content of the initial executable file is read, and the instruction boundary corresponding to each instruction is identified as the second instruction boundary, and the instruction type corresponding to each instruction is identified as the second instruction type. For each parsed instruction, the second relative address can be calculated based on its position in the code section.
[0059] S270. Generate a first set of memory addresses corresponding to the initial executable file based on the first instruction feature parameters, and generate a second set of memory addresses corresponding to the target executable file based on the second instruction feature parameters.
[0060] In one embodiment, generating a first set of memory addresses corresponding to an initial executable file based on a first instruction feature parameter, and generating a second set of memory addresses corresponding to a target executable file based on a second instruction feature parameter, includes: using the absolute address or relative address in the first instruction feature parameter corresponding to each instruction in the initial executable file as the first set of memory addresses corresponding to the initial executable file, and using the absolute address or relative address in the second instruction feature parameter corresponding to each instruction in the target executable file as the second set of memory addresses corresponding to the target executable file.
[0061] In this embodiment, the relative or absolute address in the first instruction feature parameter can be directly used as the memory address corresponding to the initial executable file, forming the first memory address set; and the relative or absolute address in the second instruction feature parameter can be directly used as the memory address corresponding to the initial executable file, forming the second memory address set. In one example, the relative address in the first instruction feature parameter can be converted to an absolute address, or the absolute address can be converted to a relative address, and the converted absolute or relative address can be used as the memory address corresponding to the initial executable file, forming the first memory address set; and the relative address in the second instruction feature parameter can be converted to an absolute address, or the absolute address can be converted to a relative address, and the converted absolute or relative address can be used as the memory address corresponding to the initial executable file, forming the second memory address set.
[0062] S280. Generate a differential patch file based on the first memory address set and the second memory address set, so that the terminal device integrating the target computing architecture can update the initial executable file based on the differential patch file and generate the target executable file.
[0063] In one embodiment, each memory address in the first memory address set is symbolized to obtain a corresponding first address symbol, and each memory address in the second memory address set is symbolized to obtain a corresponding second address symbol. The instructions corresponding to each memory address in the first memory address set are matched with the instructions corresponding to each memory address in the second memory address set. The first and second address symbols corresponding to the two matching instructions are adjusted to obtain corresponding first and second address symbol sets. A corresponding differential patch file is generated based on the difference in address symbols between the first and second address symbol sets. Here, the first address symbol represents the letter symbol of each memory address in the first memory address set; the second address symbol represents the letter symbol of each memory address in the second memory address set. The two matching instructions refer to two instructions with the same function and meaning. For example, suppose the initial executable file contains three instructions: Mov 1000; Add 2000; Div 3000, then the corresponding first memory address set includes 1000, 2000, and 3000; the target executable file contains four instructions: Mov 1020; Sub 1030; Add 2050; Div 3060, then the corresponding second memory address set includes 1020, 1030, 2050, and 3060; symbolizing the first and second memory address sets respectively, we obtain the updated instructions in the initial executable file as: Mov A; Add B; Div C, and the updated instructions in the target executable file as: Mov A; Sub B; Add C; Div D; where Add B and Add C have the same function and meaning, and Div C and Div D have the same function and meaning, then the instructions in the target executable file can be updated to: Mov A; Sub D; Add 2000; Add 2000; Add 2000; Div 3000. B; DivC; Then, the updated initial executable file contains the instruction: Mov A; Add B; Div C, which is compared with the updated target executable file containing the instruction: Mov A; Sub D; Add B; Div C. The result shows that the differential patch file contains the instruction Sub D. This differential patch file containing Sub D is then distributed to the terminal device integrating the target computing architecture, enabling the terminal device to update the initial executable file based on the differential patch file and generate the corresponding target executable file.
[0064] In one embodiment, a terminal device integrating a target computing architecture updates an initial executable file based on a differential patch file to generate a target executable file. This includes: parsing the differential patch file to obtain difference information; and updating the initial executable file based on the difference information to generate the target executable file. After receiving the differential patch file, the terminal device integrating the target computing architecture can parse it to obtain difference information containing the Sub D instruction. Then, the terminal device updates the initial executable file based on this difference information to generate the corresponding target executable file.
[0065] In one embodiment, the file update method further includes: obtaining the file size of the differential patch file; and evaluating the performance of the differential update algorithm based on the file size. The file size represents the memory space occupied by the differential patch file; a larger file size corresponds to a larger memory space occupied. A differential update algorithm refers to an algorithm that can update files using the difference information between two versions of a file; for example, the Courgette algorithm. In this embodiment, the update performance of the differential update algorithm can be evaluated using the file size of the differential patch file obtained by the algorithm during file updates on the target computing architecture; that is, the smaller the file size of the differential patch file, the better the update performance of the corresponding differential update algorithm.
[0066] In one embodiment, Figure 3 This is a flowchart of another file update method provided by an embodiment of the present invention. This embodiment is a preferred embodiment based on the above embodiments, describing the file update process. In this embodiment, the target computing architecture can be ARM64, the differential update algorithm is the Courgette algorithm, the initial executable file is the initial ELF file, and the target executable file is the target ELF file. Figure 3 As shown, the file update process in this embodiment includes the following steps:
[0067] S310 parses the initial ELF file and target ELF file under the ARM64 architecture.
[0068] In this embodiment, the structure of the ARM64 ELF file is parsed. Specifically, the file parsing module of the Courgette algorithm can be extended to support the ARM64 ELF file format. For example, it can include functions such as parsing the ELF header, program header table, and section header table, as well as identifying ARM64-specific section and segment types.
[0069] S320 identifies and processes the ARM64 instruction set, generating the first instruction feature parameters corresponding to the initial ELF file and the second instruction feature parameters corresponding to the target ELF file.
[0070] The core of the Courgette algorithm lies in identifying and processing instructions in the initial and target ELF files. To achieve this, the Courgette algorithm needs to be extended to support the ARM64 instruction set. Since the ARM64 instruction set differs significantly from the x86 instruction set, specialized parsing and processing logic is required to identify instruction boundaries, instruction types, and operands in the initial ELF file as the corresponding first instruction characteristic parameters, and to identify the instruction boundaries, instruction types, and operands in the target ELF file as the second instruction characteristic parameters.
[0071] S330: Generate a differential patch file based on the first instruction feature parameters and the second instruction feature parameters.
[0072] After successfully parsing the ARM64 ELF file and identifying the instructions, the next step is to perform differential calculations and generate a patch. This requires extending Courgette's differential algorithm to generate minimal differences based on the ARM64 instruction set. The results of the differential calculations will be used to generate a patch file for the ARM64 platform.
[0073] S340. The differential patch file is sent to the terminal device so that the terminal device can update the initial ELF file based on the differential patch file to obtain the target ELF file.
[0074] The final step in adapting to the Courgette algorithm is to apply the generated patch file to update the ARM64 ELF file. This requires extending Courgette's patch application module to correctly handle ARM64 ELF files and successfully update the application on terminal devices with integrated ARM64 architecture.
[0075] To ensure the adapted Courgette algorithm runs efficiently on the ARM64 platform, performance optimization is necessary. This includes optimizing file parsing and instruction processing logic, as well as improving the efficiency of differential calculation and patch application. Furthermore, the characteristics of the ARM64 platform can be leveraged to further enhance the overall performance of the algorithm.
[0076] In one embodiment, an embedded development environment including an ARM64 processor was set up, and a development toolchain supporting ARM64 ELF file parsing and processing was configured. In this embodiment, the following two versions of the Android webview .so file were selected as experimental test samples: version 1: tag122.0.6261.7 (i.e., the version of the initial executable file); version 2: tag122.0.6261.9 (i.e., the version of the target executable file). The following experimental steps were then followed for verification.
[0077] Step 1: Use the extended Courgette algorithm to parse the ARM64 ELF file of the test sample.
[0078] Step 2: Compare different versions of the test samples and generate differential patch files.
[0079] Step 3: Apply the generated differential patch file and verify that the updated file is correct.
[0080] Step 4: Test and record the file size of the generated differential patch file to evaluate the performance of the Courgette algorithm.
[0081] The file can generate differential patches and restore normally. The test results are shown in Table 1:
[0082] Table 1
[0083] ARM64 full amount 124.3M Bsdiff (included with Courgette) 11.4M Courgette 6.9M
[0084] The advantages of the extended Courgette algorithm on the ARM64 platform are verified by comparing it with traditional differential algorithms (such as BSDiff).
[0085] This technical solution successfully adapts the Courgette algorithm to the ARM64 platform, solving the problems of parsing ARM64 ELF files, instruction recognition, differential calculation, and patch application. Experimental results show that the adapted Courgette algorithm can significantly reduce the update package size on the ARM64 platform and improve update efficiency, demonstrating high application value and promising prospects for widespread adoption.
[0086] In one embodiment, Figure 4 This is a schematic diagram of a file update device provided in an embodiment of the present invention. Figure 4 As shown, the device includes: a first acquisition module 410, an identification and extraction module 420, and a file update module 430.
[0087] The first acquisition module 410 is used to acquire the section type contained in the initial executable file in the target computing architecture as the first section type, and to acquire the section type contained in the target executable file in the target computing architecture as the second section type;
[0088] The identification and extraction module 420 is used to determine the section that matches the first section type from the initial executable file, and to identify and extract the instruction feature parameters of each instruction from the section that matches the first section type as the first instruction feature parameters; and to determine the section that matches the second section type from the target executable file, and to identify and extract the instruction feature parameters of each instruction from the section that matches the second section type as the second instruction feature parameters.
[0089] The file update module 430 is used to generate a differential patch file based on the first instruction feature parameters and the second instruction feature parameters, so that the terminal device integrating the target computing architecture can update the initial executable file based on the differential patch file and generate the target executable file.
[0090] In one embodiment, the acquisition module 410 includes:
[0091] The acquisition unit is used to acquire the header, program header table and section header table contained in the initial executable file in the target computing architecture as the first header, the first program header table and the first section header table, and to acquire the header, program header table and section header table contained in the target executable file as the second header, the second program header table and the second section header table.
[0092] The identification and extraction unit is used to identify and extract the section type contained in the initial executable file as the first section type based on the first header, the first program header table and the first section header table, and to identify and extract the section type contained in the target executable file as the second section type based on the second header, the second program header table and the second section header table.
[0093] In one embodiment, the first instruction feature parameters include: a first instruction boundary, a first instruction type, and a first operand; the second instruction feature parameters include: a second instruction boundary, a second instruction type, and a second operand; wherein, the first operand includes a first relative address and a first absolute address; the second operand includes a second relative address and a second absolute address; the identification and extraction module 420 includes:
[0094] The first identification and extraction unit is used to determine the section that matches the first section type from the initial executable file, and to identify and extract the first absolute address of each instruction based on the offset and addend in the section that matches the first section type, combined with the executable file format.
[0095] The second identification and extraction unit is used to identify the first instruction boundary and the first instruction type of each instruction, and to parse the code section in the section that matches the first section type based on the first instruction boundary and the first instruction type, so as to identify and extract the first relative address of each instruction;
[0096] The third identification and extraction unit is used to determine the section that matches the second section type from the target executable file, and to identify and extract the second absolute address of each instruction based on the offset and addend in the section that matches the second section type, combined with the executable file format.
[0097] The fourth identification and extraction unit is used to identify the second instruction boundary and the second instruction type of each instruction, and to parse the code section in the section that matches the second section type based on the second instruction boundary and the second instruction type, so as to identify and extract the second relative address of each instruction.
[0098] In one embodiment, a differential patch file is generated based on the first instruction feature parameters and the second instruction feature parameters, specifically for:
[0099] A first set of memory addresses corresponding to the initial executable file is generated based on the first instruction feature parameters, and a second set of memory addresses corresponding to the target executable file is generated based on the second instruction feature parameters;
[0100] A differential patch file is generated based on the first memory address set and the second memory address set.
[0101] In one embodiment, generating a first set of memory addresses corresponding to an initial executable file based on a first set of instruction feature parameters, and generating a second set of memory addresses corresponding to a target executable file based on a second set of instruction feature parameters, is specifically used for:
[0102] The absolute or relative address in the first instruction feature parameter corresponding to each instruction in the initial executable file is used as the first memory address set corresponding to the initial executable file, and the absolute or relative address in the second instruction feature parameter corresponding to each instruction in the target executable file is used as the second memory address set corresponding to the target executable file.
[0103] In one embodiment, a differential patch file is generated based on a first memory address set and a second memory address set, specifically for:
[0104] Each memory address in the first set of memory addresses is symbolized to obtain a first address symbol, and each memory address in the second set of memory addresses is symbolized to obtain a second address symbol;
[0105] Match the instruction corresponding to each memory address in the first memory address set with the instruction corresponding to each memory address in the second memory address set;
[0106] Adjust the first address symbols and second address symbols corresponding to the two matching instructions to obtain the corresponding first address symbol set and second address symbol set;
[0107] A differential patch file is generated based on the difference in address symbols between the first set of address symbols and the second set of address symbols.
[0108] In one embodiment, the terminal device integrating the target computing architecture updates the initial executable file based on the differential patch file to generate the target executable file, specifically for:
[0109] The differential patch file is parsed to obtain the difference information;
[0110] The initial executable file is updated based on the difference information to generate the target executable file.
[0111] In one embodiment, the file updating device further includes:
[0112] The second acquisition module is used to obtain the file size of the differential patch file;
[0113] The evaluation module is used to evaluate the performance of the differential update algorithm based on file size.
[0114] The file update apparatus provided in this embodiment of the invention can execute the file update method provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the method.
[0115] In one embodiment, Figure 5 This is a structural block diagram of an electronic device provided in an embodiment of the present invention, such as... Figure 5 The diagram illustrates a schematic representation of an electronic device 10 that can be used to implement embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.
[0116] like Figure 5As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 may also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0117] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.
[0118] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as file update methods.
[0119] In some embodiments, the file update method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the file update method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the file update method by any other suitable means (e.g., by means of firmware).
[0120] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.
[0121] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.
[0122] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.
[0123] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).
[0124] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.
[0125] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.
[0126] This application also provides a computer program product, including a computer program that, when executed by a processor, can implement the file update method provided in any embodiment of this application.
[0127] In the implementation of the computer program product, computer program code for performing the operations of this application can be written in one or more programming languages or a combination thereof. Programming languages include object-oriented programming languages such as Java, Smalltalk, and C++, as well as conventional procedural programming languages such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0128] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.
[0129] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A file update method, characterized in that, include: Obtain the section types contained in the initial executable file in the target computing architecture as the first section type, and obtain the section types contained in the target executable file in the target computing architecture as the second section type; The initial executable file determines the section that matches the first section type, and the instruction feature parameters of each instruction are identified and extracted from the section that matches the first section type as the first instruction feature parameters; the target executable file determines the section that matches the second section type, and the instruction feature parameters of each instruction are identified and extracted from the section that matches the second section type as the second instruction feature parameters. A differential patch file is generated based on the first instruction feature parameters and the second instruction feature parameters, so that the terminal device integrating the target computing architecture updates the initial executable file based on the differential patch file to generate the target executable file.
2. The method according to claim 1, characterized in that, The steps of obtaining the section types contained in the initial executable file in the target computing architecture as the first section type and obtaining the section types contained in the target executable file in the target computing architecture as the second section type include: Obtain the header, program header table, and section header table contained in the initial executable file in the target computing architecture as the first header, the first program header table, and the first section header table; and obtain the header, program header table, and section header table contained in the target executable file as the second header, the second program header table, and the second section header table. Based on the first header, the first program header table, and the first section header table, the section types contained in the initial executable file are identified and extracted as the first section type, and based on the second header, the second program header table, and the second section header table, the section types contained in the target executable file are identified and extracted as the second section type.
3. The method according to claim 1, characterized in that, The first instruction characteristic parameters include: a first instruction boundary, a first instruction type, and a first operand; the second instruction characteristic parameters include: a second instruction boundary, a second instruction type, and a second operand; wherein, the first operand includes a first relative address and a first absolute address; the second operand includes a second relative address and a second absolute address; The steps of determining the section matching the first section type from the initial executable file, identifying and extracting instruction feature parameters for each instruction from the section matching the first section type as first instruction feature parameters, and determining the section matching the second section type from the target executable file, identifying and extracting instruction feature parameters for each instruction from the section matching the second section type as second instruction feature parameters, include: The section matching the first section type is determined from the initial executable file, and the first absolute address of each instruction is identified and extracted based on the offset and addend in the section matching the first section type, combined with the executable file format; Identify the first instruction boundary and first instruction type of each instruction, and parse the code section in the section that matches the first section type based on the first instruction boundary and first instruction type to identify and extract the first relative address of each instruction; The section matching the second section type is determined from the target executable file, and the second absolute address of each instruction is identified and extracted based on the offset and addend in the section matching the second section type, combined with the executable file format; The second instruction boundary and second instruction type of each instruction are identified, and the code section in the section that matches the second section type is parsed based on the second instruction boundary and the second instruction type to identify and extract the second relative address of each instruction.
4. The method according to claim 1, characterized in that, The generation of the differential patch file based on the first instruction feature parameters and the second instruction feature parameters includes: A first set of memory addresses corresponding to the initial executable file is generated based on the first instruction feature parameters, and a second set of memory addresses corresponding to the target executable file is generated based on the second instruction feature parameters; A differential patch file is generated based on the first memory address set and the second memory address set.
5. The method according to claim 4, characterized in that, The step of generating a first set of memory addresses corresponding to the initial executable file based on the first instruction feature parameters, and generating a second set of memory addresses corresponding to the target executable file based on the second instruction feature parameters, includes: The absolute or relative address in the first instruction feature parameter corresponding to each instruction in the initial executable file is used as the first memory address set corresponding to the initial executable file, and the absolute or relative address in the second instruction feature parameter corresponding to each instruction in the target executable file is used as the second memory address set corresponding to the target executable file.
6. The method according to claim 4, characterized in that, The step of generating a differential patch file based on the first memory address set and the second memory address set includes: Each memory address in the first set of memory addresses is symbolized to obtain a first address symbol, and each memory address in the second set of memory addresses is symbolized to obtain a second address symbol; The instructions corresponding to each memory address in the first memory address set are matched with the instructions corresponding to each memory address in the second memory address set; Adjust the first address symbols and second address symbols corresponding to the two matching instructions to obtain the corresponding first address symbol set and second address symbol set; A differential patch file is generated based on the difference in address symbols between the first set of address symbols and the second set of address symbols.
7. The method according to claim 1, characterized in that, The terminal device integrating the target computing architecture updates the initial executable file based on the differential patch file to generate the target executable file, including: The differential patch file is parsed to obtain the difference information; The initial executable file is updated based on the difference information to generate the target executable file.
8. The method according to any one of claims 1-7, characterized in that, The method further includes: Obtain the file size of the differential patch file; The performance of the differential update algorithm is evaluated based on the file size.
9. A file updating device, characterized in that, include: The first acquisition module is used to acquire the section types contained in the initial executable file in the target computing architecture as the first section type, and to acquire the section types contained in the target executable file in the target computing architecture as the second section type; The identification and extraction module is used to determine the section that matches the first section type from the initial executable file, and to identify and extract the instruction feature parameters of each instruction from the section that matches the first section type as the first instruction feature parameter; and to determine the section that matches the second section type from the target executable file, and to identify and extract the instruction feature parameters of each instruction from the section that matches the second section type as the second instruction feature parameter. The file update module is used to generate a differential patch file based on the first instruction feature parameters and the second instruction feature parameters, so that the terminal device integrating the target computing architecture can update the initial executable file based on the differential patch file to generate the target executable file.
10. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the file update method according to any one of claims 1-8.
11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the file update method according to any one of claims 1-8.
12. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the file update method according to any one of claims 1-8.