Wafer image processing method and device, electronic equipment and storage medium
By determining the target area and target edge line in the wafer image and calculating the target angle, the problem of unstable positioning of the marker point after wafer sorting is solved, realizing stable straightening and precise positioning of the wafer and improving the accuracy of processing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-18
- Publication Date
- 2026-03-27
AI Technical Summary
During the wafer sorting process, the marking points disappear or shift due to the cutting and removal of bare wafers, making it difficult to accurately position and straighten them, which affects the accuracy of subsequent processing.
By determining the target area and target edge line in the wafer image, calculating the target angle, and determining the adjustment angle and direction of the wafer, stable straightening of the sorted wafer can be achieved.
This improves the accuracy of wafer processing after sorting, reduces the impact of instability on marker points, and ensures the stability and accuracy of subsequent operations.
Smart Images
Figure CN121746334A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of image processing, and more specifically to a method for processing wafer images, an apparatus for processing wafer images, an electronic device, a storage medium, and a computer program product. Background Technology
[0002] Surface defect detection and precise positioning on wafers are critical processes for ensuring the quality of bare dies within the wafer. With the continuous advancement of semiconductor technology, the requirements for wafer positioning accuracy are also increasing.
[0003] Typically, wafers are positioned using marking points (or markers) on them. However, during the sorting process, the wafer surface becomes cluttered with empty areas and residual wafers due to dicing and removal. These marking points may also disappear. Furthermore, since wafers undergo film expansion before sorting, the marking points may also shift. Therefore, how to better position and straighten sorted wafers is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0004] The present invention was proposed in view of the above-mentioned problems. The present invention provides a method for processing wafer images, a device for processing wafer images, an electronic device, a storage medium, and a computer program product.
[0005] According to one aspect of the present invention, a method for processing a wafer image is provided. The method includes: determining at least one target region in a wafer image including a wafer, wherein the wafer includes a plurality of residual dies and a plurality of empty areas formed by the removal of qualified dies, and each target region includes at least one residual die; for each target region in the at least one target region, determining a target angle between at least one target edge line in the target region and a horizontal axis or a vertical axis, wherein the target edge line includes the edge line corresponding to the edge of at least one residual die in the target region; and determining an adjustment angle and an adjustment direction of the wafer based on each target angle.
[0006] For example, the above processing method further includes: Acquire raw images including the wafer; Identify the orientation mark regions in the original image, where the orientation mark regions are the regions in the original image corresponding to the orientation marks of the wafer; Based on the relative positional relationship between the orientation mark area and the vertical axis, the first rotation angle of the wafer is determined. The orientation mark of the wafer faces downwards from the vertical axis after the wafer rotates by the first rotation angle. The wafer image is an image acquired by image acquisition of the wafer after rotating by the first rotation angle.
[0007] For example, determining at least one target region in a wafer image including a wafer includes: Based on the target location, the vertical rectangular region and the horizontal rectangular region in the wafer image are determined. The target location is the position of the center of the wafer in the wafer image. The center of the vertical rectangular region and the horizontal rectangular region are the target locations. The vertical rectangular region is a rectangular region whose long side is in the same direction as the vertical direction, and the horizontal rectangular region is a rectangular region whose long side is in the same direction as the horizontal direction. Identify the areas where the vertical and horizontal rectangular regions do not overlap, and designate them as target areas respectively.
[0008] For example, for each target region located in a vertical rectangular region, the target edge line in the target region is the edge line corresponding to the horizontal edge of at least one residual die in the wafer image, and / or for each target region located in a horizontal rectangular region, the target edge line in the target region is the edge line corresponding to the vertical edge of at least one residual die in the wafer image.
[0009] For example, for each target region located in a vertical rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest horizontal edge composed of at least one residual die, and / or for each target region located in a horizontal rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest vertical edge composed of at least one residual die.
[0010] For example, the target area includes a portion of the edge of the wafer.
[0011] For example, the above processing method further includes: Acquire a target image including the adjusted wafer; For each of the multiple residual bare films, determine the corresponding bare film region in the target image; For each of the multiple empty regions, determine the corresponding empty region in the target image; Based on the die regions corresponding to multiple residual dies, the empty regions corresponding to multiple empty regions, and the wafer map, the wafer detection results are determined. The wafer map is used to represent the location information of multiple residual dies and multiple empty regions in the wafer.
[0012] According to another aspect of the present invention, a wafer image processing apparatus is also provided, the processing apparatus comprising a target region determination module, a target angle determination module, and an adjustment parameter determination module. The target region determination module is used to determine at least one target region in a wafer image including a wafer, wherein the wafer includes a plurality of residual dies and a plurality of empty areas formed by the removal of qualified dies, and each target region includes at least one residual die; the target angle determination module is used to determine, for each target region in the at least one target region, a target angle between at least one target edge line in the target region and a horizontal axis or a vertical axis, wherein the target edge line includes the edge line corresponding to the edge of at least one residual die in the wafer image; the adjustment parameter determination module is used to determine an adjustment angle and an adjustment direction of the wafer based on each target angle.
[0013] According to another aspect of the present invention, an electronic device is also provided, the electronic device including a memory and a processor, wherein: the memory is used to store a computer program; the processor is used to execute the computer program to implement the above-described wafer image processing method.
[0014] According to another aspect of the present invention, a storage medium is also provided, which stores computer program instructions that, when executed, are used to perform the above-described wafer image processing method.
[0015] According to another aspect of the present invention, a computer program product is also provided, the computer program product comprising computer program instructions which, when run by a processor, are used to execute the above-described wafer image processing method.
[0016] According to the above-described scheme of the present invention, at least one target region in a wafer image including the wafer can be determined. Then, for each target region, at least one target edge line in that target region is determined to have a target angle with a horizontal or vertical axis. Finally, based on each target angle, the adjustment angle and adjustment direction of the wafer are determined. The above scheme determines the adjustment angle and adjustment direction of the wafer by determining the target angle through the target edge line, which is unaffected by the instability of the marker points in the sorted wafers. It can stably and effectively straighten the sorted wafers, which is beneficial to improving the accuracy of subsequent processing of the straightened wafers. Attached Figure Description
[0017] The above and other objects, features, and advantages of the present invention will become more apparent from the more detailed description of the embodiments of the invention in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same parts or steps.
[0018] Figure 1 A schematic flowchart of a wafer image processing method according to an embodiment of the present invention is shown; Figure 2 A schematic diagram of a vertical rectangular region and a horizontal rectangular region according to an embodiment of the present invention is shown; Figure 3 A schematic block diagram of a wafer image processing apparatus according to an embodiment of the present invention is shown; Figure 4 A schematic block diagram of an electronic device according to an embodiment of the present invention is shown. Detailed Implementation
[0019] To make the objectives, technical solutions, and advantages of the present invention more apparent, exemplary embodiments according to the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely a part of the embodiments of the present invention, and not all of the embodiments of the present invention. It should be understood that the present invention is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described herein, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of the present invention.
[0020] To at least partially solve the above problems, embodiments of the present invention provide a method for processing wafer images. Figure 1 A schematic flowchart illustrating a wafer image processing method according to an embodiment of the present invention is shown. Figure 1 As shown, the method may include steps S110 to S130.
[0021] In step S110, at least one target region is determined in the wafer image including the wafer.
[0022] The wafer includes multiple residual dies and multiple empty areas formed by the removal of qualified dies, with each target area in at least one target region including at least one residual die. The original wafer can be sorted to include residual dies and empty areas. In one example, the wafer can be a 6-inch to 12-inch wafer.
[0023] In some embodiments, the wafer image can be an image containing the entire wafer obtained from a single imaging session. In some alternative embodiments, if the field of view of a single imaging session is limited and it is impossible to obtain an image containing the entire wafer from a single imaging session, an automatic displacement stage can be used to capture images of the wafer in different regions to obtain multiple partitioned images belonging to different parts of the wafer. These partitioned images can then be stitched together to obtain a wafer image containing the entire wafer. It is understood that the wafer image may include the wafer region corresponding to the wafer and non-wafer regions outside the wafer region. The wafer region can be used to represent the position information of the wafer in the wafer image. The non-wafer region can be used to represent the position information of non-wafer portions (e.g., a portion of the support stage used to support the wafer) within the imaging field of view of the image acquisition device in the wafer image.
[0024] Residual dies may include dies that fail to meet electrical performance standards and dies that meet electrical performance standards but were not removed due to incomplete dicing. In one embodiment, it may be further determined whether the residual dies are actually qualified dies to improve wafer yield.
[0025] In one example, the target region can be determined by the user tracing a line. For instance, a wafer image can be displayed on a screen. The user can then trace a closed region in the wafer image using an input device (such as a mouse or keyboard) to define the target region. In another example, the target region can be automatically determined using a target region detection model or related algorithms. For example, if the total number of dies in a region of a preset size in the wafer image exceeds a preset threshold, that region can be designated as the target region.
[0026] Optionally, a wafer region can be determined within the wafer image, and then a target region can be determined based on that wafer region. For example, the wafer region in the wafer image can be determined using a wafer region detection model. Specifically, the wafer image can be directly input into the wafer region detection model to obtain the wafer region. Another example is that the wafer image can be preprocessed (e.g., converted to grayscale, feature enhancement, etc.) before being input into the wafer region detection model to obtain the wafer region. Yet another example is that the wafer image can be displayed on a screen. Then, the user can trace a closed region in the wafer image using an input device to represent the wafer region. Combining this with the example of the user tracing to determine the target region, the wafer region can be marked on the displayed wafer image for the user's tracing reference. Combining this with the example of determining the target region using a target region detection model or related algorithms, the image corresponding to the wafer region in the wafer image can be used as input to the target region detection model or related algorithms to obtain a more accurate target region.
[0027] It is understood that each target region includes at least a portion of the wafer region and includes at least one residual die to determine the target edge line formed by the residual die. In some embodiments, a target region may also include the entire wafer region.
[0028] In some embodiments, the target region may include a portion of a non-wafer region; in other words, the target region may include the edge of the wafer. In some alternative embodiments, the target region may not include a non-wafer region; that is, the target region may not include the edge of the wafer. For example, the target region may be the area corresponding to the center of the wafer in the wafer image.
[0029] In step S120, for each target region in at least one target region, the target angle between at least one target edge line in that target region and the target angle between the horizontal axis or the vertical axis is determined.
[0030] The target edge line includes the edge line corresponding to the edge of at least one residual die in the target area.
[0031] At least one residual die in the target area may include a non-rectangular die (a die with damaged edges) and / or a rectangular die (a die with undamaged edges) at the wafer edge. It is understood that if a portion of the edge line included in the target edge line is the edge line corresponding to the edge of the non-rectangular die in the target area, then for the convenience of subsequent calculations, the target included angle may also be determined based on the straight portion of the target edge line.
[0032] If the target area includes multiple intersecting edge lines of extended lines, these can also be filtered to determine the target edge lines within the target area. It is understood that multiple target edges can be filtered out from a single target area, and this embodiment of the invention does not impose any limitations on this.
[0033] A target edge line may also include the edge lines corresponding to the edges of multiple residual dies in the wafer image. Specifically, in the case of multiple horizontally continuous residual dies, a target edge line may include the continuous edge lines corresponding to the upper or lower edges of the multiple horizontally continuous residual dies in the wafer image.
[0034] It is understandable that the smaller absolute value of the angles between the target edge line and both the horizontal and vertical axes can be used as the target angle for the target edge line. In practical scenarios, the wafer's position can be initially adjusted using the wafer's notch (a groove on the wafer used for orientation) or its flat edge. Then, a wafer image, as described in this embodiment, can be acquired based on the initially adjusted wafer. After the initial adjustment, the wafer's approximate orientation is determined, so subsequent straightening adjustments are relatively minor. Taking the horizontal axis as an example, if the target edge line is closer to the horizontal axis overall, it can be compared with the horizontal axis to determine the target angle, allowing for subsequent fine-tuning of the wafer's orientation.
[0035] In step S130, the adjustment angle and adjustment direction of the wafer are determined based on each target angle.
[0036] In the case of multiple target edge lines and / or multiple target regions within a target area, multiple target angles may exist. A final angle can be determined based on these multiple target angles. This final angle can be used to determine the wafer's adjustment angle and direction. In one example, multiple target angles can be filtered to determine the final angle. For example, the angle with the smallest absolute value among the multiple target angles can be used as the final angle. In another example, the angles of multiple target angles can also be combined (e.g., by averaging or weighted averaging, where the weights can be positively correlated with the length of the target edge line) to obtain a final angle. It can be understood that if there is only one target angle, that target angle can also be directly used as the aforementioned final angle.
[0037] It is understandable that both the target angle and the final angle can carry directional symbols (e.g., positive or negative signs). These symbols can be used to indicate the relative position between the target edge line and the horizontal or vertical axis to determine the adjustment direction of the wafer. Taking the horizontal axis as an example, if the target edge line can coincide with the horizontal axis by rotating an acute angle clockwise, then the directional symbol of the target angle can be used to indicate that the adjustment direction is clockwise. If the target edge line can coincide with the horizontal axis by rotating an acute angle counterclockwise, then the directional symbol of the target angle can be used to indicate that the adjustment direction is counterclockwise. The specific adjustment angle of the wafer can be determined by the angle value of the target angle, and the specific adjustment direction of the wafer can be determined by the directional symbol of the target angle, thereby achieving wafer straightening.
[0038] According to the above-described scheme of the present invention, at least one target region in a wafer image including the wafer can be determined. Then, for each target region, at least one target edge line in that target region is determined to have a target angle with a horizontal or vertical axis. Finally, based on each target angle, the adjustment angle and adjustment direction of the wafer are determined. The above scheme determines the adjustment angle and adjustment direction of the wafer by determining the target angle through the target edge line, which is unaffected by the instability of the marker points in the sorted wafers. It can stably and effectively straighten the sorted wafers, which is beneficial to improving the accuracy of subsequent processing of the straightened wafers.
[0039] For example, the method further includes steps S210 to S230.
[0040] In step S210, an original image including the wafer is obtained.
[0041] The original image can be the image of the wafer after sorting, before the initial adjustment of the wafer's position via the wafer's notch or flat edge as described above. If the field of view is limited in a single imaging session, multiple partition images can be acquired and then stitched together; the specific process can be found in step S110. It is understood that the original wafer image may also include the wafer region corresponding to the wafer and non-wafer regions other than the wafer region.
[0042] In step S220, the directional marker region in the original image is determined.
[0043] The orientation mark region is the area in the original image corresponding to the orientation mark of the wafer. This orientation mark can be a notch as mentioned above or a flat edge of the wafer.
[0044] In some embodiments, a trained orientation marker detection model can be used to identify orientation markers in the original image to determine the orientation marker regions. This orientation marker detection model can be trained based on multiple wafer training images, including a training wafer, and the corresponding orientation marker training regions in each wafer training image. The training wafer may include multiple residual dies and multiple empty areas formed by the removal of qualified dies. The orientation marker training regions can be the regions in the wafer training images corresponding to the orientation markers of the training wafer. The original image can be input into the trained orientation marker detection model to obtain the orientation marker regions in the original image.
[0045] In some other embodiments, the directional marking region can be determined by a user tracing a line. For example, the original image can be displayed on a screen. Then, the user can use an input device (such as a mouse or keyboard) to trace a closed area in the original image as the directional marking region.
[0046] If the orientation marker area cannot be identified in the original image, a prompt can be given, and the orientation marker area in the original image can be re-identified after the user manually or the robotic arm automatically adjusts or replaces the wafer.
[0047] In step S230, the first rotation angle of the wafer is determined based on the relative positional relationship between the orientation marking area and the vertical axis.
[0048] The orientation mark on the wafer faces downwards towards the vertical axis after the wafer has rotated by the first rotation angle. The wafer image is an image acquired from the wafer after rotating by the first rotation angle. It can be understood that the first rotation angle may also include the direction symbol mentioned above. The specific adjustment angle of the wafer can be determined by the angle value of the first rotation angle, and the specific adjustment direction of the wafer can be determined by the direction symbol of the first rotation angle, thus enabling the initial adjustment of the wafer.
[0049] When the wafer's orientation mark is a flat edge, the original image can be adjusted until the flat edge is perpendicular to the vertical axis in the original image and the orientation mark area corresponding to the flat edge is at the bottom of the wafer area. The rotation angle used to adjust the original image is then determined as the first rotation angle. When the wafer's orientation mark is a notch, the original image can be adjusted until the notch faces downwards towards the vertical axis in the original image. The rotation angle used to adjust the original image is then determined as the first rotation angle. Considering practical scenarios, notches are usually located at the edge of the wafer; therefore, the original image can also be adjusted until the orientation mark area corresponding to the notch is at the bottom of the wafer area. The rotation angle used to adjust the original image is then determined as the first rotation angle.
[0050] After rotating the wafer according to the first rotation angle, a wafer image can be obtained to perform step S110 and subsequent steps.
[0051] According to the above-described scheme of the present invention, an original image including a wafer can be acquired. Then, an orientation mark region in the original image is determined. Finally, based on the relative positional relationship between the orientation mark region and the vertical axis, a first rotation angle of the wafer is determined. This scheme can use the first rotation angle to initially adjust the orientation of the wafer, and then acquire a wafer image for fine straightening, which helps improve the accuracy of wafer straightening.
[0052] For example, step S110, which determines at least one target region in a wafer image including a wafer, includes steps S111 and S112.
[0053] In step S111, based on the target location, the vertical rectangular region and the horizontal rectangular region in the wafer image are determined.
[0054] The target location is the position of the wafer's center within the wafer image. The target location is the center of both the vertical and horizontal rectangular regions. The vertical rectangular region is a rectangle whose longer side runs in the same direction as the vertical direction. The horizontal rectangular region is a rectangle whose longer side runs in the same direction as the horizontal direction.
[0055] See Figure 2 , Figure 2 A schematic diagram of a vertical rectangular region and a horizontal rectangular region according to an embodiment of the present invention is shown. Figure 2 , Figure 2 The green rectangular area can be a vertical rectangular area, and the red rectangular area can be a horizontal rectangular area.
[0056] In some embodiments, the center of the wafer may be the body center of the wafer. In some alternative embodiments, the center of the wafer may be the center of a circular region that approximately coincides with the edge of the wafer surface. In still other embodiments, the center of the wafer may be the geometric center of a two-dimensional projection of the wafer.
[0057] It can be understood that for a rectangular area, the center of the rectangular area is the geometric center of the rectangle. Specifically, the geometric center of the rectangle is the intersection of its diagonals.
[0058] A first preset rectangular region of preset size, with its long side parallel to the vertical axis, and a second preset rectangular region of preset size, with its long side parallel to the horizontal axis, can be translated within the plane of the wafer image until the centers of both regions coincide with the target position. The translated first preset rectangular region can be designated as the vertical rectangular region, and the translated second preset rectangular region as the horizontal rectangular region. The preset dimensions of the first and second preset rectangular regions can be equal. In one example, the first and second preset rectangular regions can be determined by the user tracing a path in the wafer region image.
[0059] The wafer region is approximately circular, and its diameter can be determined based on this region. It can be understood that the widths of both the vertical and horizontal rectangular regions can be smaller than the wafer diameter.
[0060] In step S112, the areas where the vertical rectangular area and the horizontal rectangular area do not overlap are determined and respectively designated as target areas.
[0061] For a vertical rectangular region and a horizontal rectangular region whose centers coincide, at least part of the vertical and horizontal rectangular regions overlap. The horizontal rectangular region divides the vertical rectangular region into an upper rectangular region from top to bottom (see reference). Figure 2A rectangle with green edges on the left, top, and right, and a red edge on the bottom; overlapping rectangular areas (see reference). Figure 2 A rectangle with green edges on the left and right sides and red edges on the top and bottom sides, and a lower rectangular area (see reference). Figure 2 A rectangle with green edges on the left, bottom, and right, and a red edge on the top. This vertical rectangular area divides the horizontal rectangular area into a left rectangular area from left to right (see reference). Figure 2 (A rectangle with red edges at the top, left, and bottom, and green edge at the right) (The overlapping rectangular area and the right rectangular area can be referenced.) Figure 2 (A rectangle with red edges at the top, right, and bottom, and green edges at the left).
[0062] The upper rectangular area, lower rectangular area, left rectangular area, and right rectangular area can be used as target areas respectively.
[0063] According to the above-described scheme of the present invention, a vertical rectangular region and a horizontal rectangular region in the wafer image can be determined based on the target position. Then, regions where the vertical and horizontal rectangular regions do not overlap are determined and respectively used as target regions. In the above scheme, target regions that do not overlap can be determined based on the vertical and horizontal rectangular regions. The target regions obtained in this way are more dispersed, which can more comprehensively reflect the overall wafer offset and help improve the accuracy of the final target angle. Especially after wafer expansion, the die is more prone to offset, and the above scheme has high accuracy in this scenario.
[0064] For example, for each target region located in a vertical rectangular region, the target edge line in the target region is the edge line corresponding to the horizontal edge of at least one residual die in the wafer image.
[0065] Based on the example above where the vertical rectangular region includes an upper rectangular region and a lower rectangular region, for each residual die in the upper rectangular region and the lower rectangular region, the edge lines corresponding to the upper and lower horizontal edges of the residual die in the wafer image can be respectively regarded as at least a part of the two target edge lines.
[0066] In some embodiments, the above edge lines can be filtered to obtain target edge lines. For example, the edge line closest to the top of the wafer region among the horizontal edges corresponding to the residual die in the upper rectangular region can be determined as the target edge line or a part of the target edge line. Similarly, the edge line closest to the bottom of the wafer region among the horizontal edges corresponding to the residual die in the lower rectangular region can be determined as the target edge line or a part of the target edge line.
[0067] According to the above-described scheme of the present invention, considering the actual scenario, the edge of the wafer usually contains more residual dies compared to the center of the wafer. Therefore, the edge line corresponding to the edge of the wafer in the target area is usually longer, and using this edge line as the target edge line is more representative, which is beneficial to improving the accuracy of the final target angle. In the target area within a vertical rectangular region, the horizontal edge formed by the residual dies is more likely to be located at the edge of the wafer, so the edge line corresponding to the horizontal edge in the wafer image can be selected as the target edge line.
[0068] For example, for each target region located in a horizontal rectangular region, the target edge line in the target region is the edge line corresponding to the vertical edge of at least one residual die in the wafer image.
[0069] Based on the example above where the horizontal rectangular region includes a left rectangular region and a right rectangular region, for each residual die in the left rectangular region and the right rectangular region, the edge lines corresponding to the left vertical edge and the right vertical edge of the residual die in the wafer image can be respectively regarded as at least a part of the two target edge lines.
[0070] In some embodiments, the above edge lines can be filtered to obtain target edge lines. For example, the edge line closest to the left side of the wafer region among the vertical edges corresponding to the residual die in the left rectangular region can be determined as the target edge line or a part of the target edge line. Similarly, the edge line closest to the right side of the wafer region among the vertical edges corresponding to the residual die in the right rectangular region can be determined as the target edge line or a part of the target edge line.
[0071] According to the above-described scheme of the embodiments of the present invention, in practical scenarios, the edges of a wafer typically contain more residual dies than the center. Therefore, the edge line corresponding to the wafer edge in the target area is usually longer, making this edge line more representative of the target edge line and improving the accuracy of the final target angle. In the target area within a horizontal rectangular region, the vertical edge formed by the residual dies is more likely to be located at the edge of the wafer; therefore, the edge line corresponding to the vertical edge in the wafer image can be selected as the target edge line.
[0072] For example, for each target region located in a vertical rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest horizontal edge of at least one residual die.
[0073] Referring to the examples above where multiple target regions include upper and lower rectangular regions, if the residual dies in the target region are not discontinuous in the horizontal direction, the longest edge line corresponding to the horizontal edge in the wafer image can be used as the target edge line for both the upper and lower rectangular regions. If the residual dies in the target region are continuous in the horizontal direction, the edge line corresponding to the longest horizontal edge formed by the continuous residual dies in the horizontal direction in the wafer image can be used as the target edge line.
[0074] According to the above-described scheme of the present invention, for each target region located in the vertical rectangular region, the target edge line in the target region can be the edge line corresponding to the longest horizontal edge of at least one residual die in the wafer image. Therefore, using this edge line as the target edge line is more representative and helps to improve the accuracy of the final target angle.
[0075] For example, for each target region located in a horizontal rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest vertical edge of at least one residual die.
[0076] Referring to the examples above regarding multiple target regions including left and right rectangular regions, if the residual dies in the target region are not vertically discontinuous, then for both the left and right rectangular regions, the longest edge line corresponding to the vertical edge in the wafer image can be used as the target edge line. If the residual dies in the target region are vertically continuous, then the edge line corresponding to the longest vertical edge formed by the vertically continuous residual dies can be used as the target edge line in the wafer image.
[0077] According to the above-described scheme of the present invention, for each target area located in the horizontal rectangular area, the target edge line in the target area can be the edge line corresponding to the longest vertical edge of at least one residual die in the wafer image. Therefore, using this edge line as the target edge line is more representative and helps to improve the accuracy of the final target angle.
[0078] For example, the target area includes a portion of the edge of the wafer.
[0079] In one example, for a target region that includes a portion of the wafer's edge, the target edge line can be the closest and / or longest edge line to a non-wafer region within that target region. It is understood that the wafer's edge is a curved edge, and both the edge line and the target edge line are line segments rather than curves.
[0080] According to the above-described scheme of the present invention, the target area may include a portion of the wafer's edge. The target area in the above scheme better reflects the overall situation of the wafer, which is beneficial for improving the accuracy of the final target angle.
[0081] For example, the above processing method further includes steps S310 to S340.
[0082] In step S310, a target image including the adjusted wafer is obtained.
[0083] In step S130, after determining the adjustment angle and direction of the wafer based on each target angle, the target image can be acquired. If the field of view of a single imaging session is limited, multiple partition images can be acquired and then stitched together. The specific process can be found in step S110. It is understood that the target image of the wafer may also include the wafer region corresponding to the wafer and non-wafer regions other than the wafer region.
[0084] In step S320, for each of the multiple residual dies, the die region corresponding to that residual die is determined in the target image.
[0085] In some embodiments, template matching can be performed on the wafer region in the target image to determine the die region. In other embodiments, a trained die detection model can be used to identify residual dies in the target image to determine the die region. The die detection model can be trained based on multiple wafer training images including a training wafer and a corresponding die training region in each wafer training image. The training wafer may include multiple residual dies and multiple empty areas formed by the removal of qualified dies. The die training region may be the region corresponding to the residual dies of the training wafer in the wafer training image. The target image can be input into the trained die detection model to obtain the die region in the target image.
[0086] In step S330, for each of the multiple empty zones, the corresponding empty zone region is determined in the target image.
[0087] In some embodiments, template matching can be performed on wafer regions in the target image to determine empty areas. In other embodiments, a trained empty area detection model can be used to identify empty areas in the target image to determine empty areas. The empty area detection model can be trained based on multiple wafer training images including a training wafer and a corresponding empty area training region in each wafer training image. The training wafer may include multiple residual dies and multiple empty areas formed by the removal of qualified dies. The empty area training region may be the region corresponding to the empty area of the training wafer in the wafer training image. The target image can be input into the trained empty area detection model to obtain the empty areas in the target image.
[0088] In step S340, the wafer detection result is determined based on the wafer regions corresponding to the multiple residual dies, the empty regions corresponding to the multiple empty regions, and the wafer pattern of the wafer.
[0089] A wafer map (or wafer map) is used to represent the location information of multiple residual dies and multiple empty areas on a wafer.
[0090] The bare die area and empty area can be mapped onto a preset wafer template to obtain a first pattern. Then, the detection result can be determined based on the degree of difference between the first pattern and the wafer pattern. This detection result can be used to indicate whether the wafer has sorting anomalies. For example, if the degree of difference is greater than a preset threshold, the wafer can be considered to have sorting anomalies.
[0091] According to the above-described scheme of the present invention, a target image including the adjusted wafer can be obtained. Then, for each of the plurality of residual dies, the die region corresponding to that residual die is determined in the target image. Next, for each of the plurality of empty regions, the empty region corresponding to that empty region is determined in the target image. Finally, based on the die regions corresponding to the plurality of residual dies, the empty regions corresponding to the plurality of empty regions, and the wafer pattern, the wafer detection result is determined. On the one hand, the above scheme provides an automated detection process, which can reduce labor costs. On the other hand, the above scheme can perform anomaly detection on the adjusted wafer, which can improve the accuracy of the obtained detection results.
[0092] This invention also provides a wafer image processing apparatus. Figure 3 A schematic block diagram of a wafer image processing apparatus 400 according to an embodiment of the present invention is shown. Figure 3 As shown, the wafer image processing apparatus 400 may include a target area determination module 410, a target angle determination module 420, and an adjustment parameter determination module 430.
[0093] The target region determination module 410 is used to determine at least one target region in a wafer image including a wafer, wherein the wafer includes a plurality of residual dies and a plurality of empty areas formed by the removal of qualified dies, and each target region includes at least one residual die.
[0094] The target angle determination module 420 is used to determine, for each target region in at least one target region, the target angle between at least one target edge line in the target region and a horizontal axis or a vertical axis, wherein the target edge line includes the edge line corresponding to the edge of at least one residual die in the wafer image.
[0095] The adjustment parameter determination module 430 is used to determine the adjustment angle and adjustment direction of the wafer based on each target angle.
[0096] For example, the processing device 400 further includes: an original image acquisition module, a directional marker region determination module, and a first rotation angle determination module.
[0097] The raw image acquisition module is used to acquire raw images, including those of the wafer.
[0098] The orientation marker region determination module is used to determine the orientation marker region in the original image, wherein the orientation marker region is the region in the original image corresponding to the orientation marker of the wafer.
[0099] The first rotation angle determination module is used to determine the first rotation angle of the wafer based on the relative positional relationship between the orientation mark area and the vertical axis. The orientation mark of the wafer faces downwards towards the vertical axis after the wafer rotates by the first rotation angle, and the wafer image is an image obtained by image acquisition of the wafer after rotating by the first rotation angle.
[0100] For example, the target area determination module 410 includes a first determination module and a second determination module.
[0101] The first determining module is used to determine the vertical rectangular region and the horizontal rectangular region in the wafer image based on the target position. The target position is the position of the center of the wafer in the wafer image. The center position of the vertical rectangular region and the horizontal rectangular region is the target position. The vertical rectangular region is a rectangular region whose long side is in the same direction as the vertical direction, and the horizontal rectangular region is a rectangular region whose long side is in the same direction as the horizontal direction. The second determining module is used to determine the areas where the vertical rectangular area and the horizontal rectangular area do not overlap, and to use them as target areas respectively.
[0102] For example, for each target region located in a vertical rectangular region, the target edge line in the target region is the edge line corresponding to the horizontal edge of at least one residual die in the wafer image, and / or for each target region located in a horizontal rectangular region, the target edge line in the target region is the edge line corresponding to the vertical edge of at least one residual die in the wafer image.
[0103] For example, for each target region located in a vertical rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest horizontal edge composed of at least one residual die, and / or for each target region located in a horizontal rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest vertical edge composed of at least one residual die.
[0104] For example, the target area includes a portion of the edge of the wafer.
[0105] For example, the above processing apparatus further includes: a target image acquisition module, a bare film region determination module, an empty area region determination module, and a detection result determination module.
[0106] The target image acquisition module is used to acquire a target image including the adjusted wafer.
[0107] The bare die region determination module is used to determine the corresponding bare die region in the target image for each of the multiple residual bare dies.
[0108] The empty area region determination module is used to determine the corresponding empty area region in the target image for each of multiple empty areas.
[0109] The detection result determination module is used to determine the detection result of the wafer based on the wafer regions corresponding to the multiple residual dies, the empty regions corresponding to the multiple empty regions, and the wafer map of the wafer. The wafer map is used to represent the location information of the multiple residual dies and multiple empty regions in the wafer.
[0110] According to another aspect of the present invention, an electronic device is also provided. Figure 4 A schematic block diagram of an electronic device 500 according to an embodiment of the present invention is shown. Figure 4 As shown, the electronic device 500 includes a processor 510 and a memory 520. The memory 520 stores a computer program, and the computer program instructions are executed by the processor 510 to perform the above-described wafer image processing method.
[0111] Furthermore, according to another aspect of the present invention, a storage medium is provided, on which program instructions are stored. When the program instructions are executed by a computer or processor, the computer or processor performs corresponding steps of the wafer image processing method described in the embodiments of the present invention, and is used to implement corresponding modules in the wafer image processing apparatus or the electronic device described in the embodiments of the present invention. The storage medium may, for example, include a memory card of a smartphone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disc read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media. According to yet another aspect of the present invention, a computer program product is also provided, including computer program instructions. When the computer program instructions are executed by a computer or processor, the computer or processor performs corresponding steps of the wafer image processing method described above.
[0112] Those skilled in the art can understand the specific implementation schemes of the above-mentioned electronic devices and storage media by reading the relevant descriptions of the wafer image processing methods. For the sake of brevity, they will not be described in detail here.
[0113] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of the invention. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of the invention. All such changes and modifications are intended to be included within the scope of the invention as claimed in the appended claims.
[0114] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.
[0115] In the several embodiments provided by this invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.
[0116] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.
[0117] Similarly, it should be understood that, in order to streamline the invention and aid in understanding one or more of the various aspects of the invention, features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of the invention. However, this approach of the invention should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with fewer features than all of those in a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of the invention.
[0118] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or elements of any method or apparatus so disclosed may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.
[0119] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of the invention and form different embodiments. For example, in the claims, any of the claimed embodiments can be used in any combination.
[0120] The various component embodiments of the present invention can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules in the wafer image processing apparatus according to embodiments of the present invention. The present invention can also be implemented as an apparatus program (e.g., a computer program and computer program product) for performing some or all of the methods described herein. Such programs implementing the present invention can be stored on a computer-readable medium or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.
[0121] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.
[0122] The above description is merely a specific embodiment of the present invention or an explanation of that embodiment. The scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this invention should be included within the scope of protection of this invention. The scope of protection of this invention should be determined by the scope of the claims.
Claims
1. A method for processing wafer images, characterized in that, The method includes: Identify at least one target region in a wafer image including a wafer, wherein the wafer includes a plurality of residual dies and a plurality of empty regions formed by the removal of qualified dies, and each target region in the at least one target region includes at least one residual die; For each target region in the at least one target region, determine the target angle between at least one target edge line in the target region and the horizontal axis or the vertical axis, wherein the target edge line includes the edge line corresponding to the edge of at least one residual die in the target region; Based on each target angle, the adjustment angle and adjustment direction of the wafer are determined.
2. The method as described in claim 1, characterized in that, The method further includes: Obtain the original image including the wafer; Determine the orientation mark region in the original image, wherein the orientation mark region is the region in the original image corresponding to the orientation mark of the wafer; Based on the relative positional relationship between the orientation mark area and the vertical axis, the first rotation angle of the wafer is determined, wherein the orientation mark of the wafer faces downwards towards the vertical axis after the wafer rotates by the first rotation angle, and the wafer image is an image obtained by image acquisition of the wafer after rotating by the first rotation angle.
3. The method as described in claim 2, characterized in that, Determining at least one target region in a wafer image, including the wafer, includes: Based on the target location, a vertical rectangular region and a horizontal rectangular region in the wafer image are determined. The target location is the position of the center of the wafer in the wafer image. The center of the vertical rectangular region and the horizontal rectangular region is the target location. The vertical rectangular region is a rectangular region whose long side is in the same direction as the vertical direction, and the horizontal rectangular region is a rectangular region whose long side is in the same direction as the horizontal direction. The regions where the vertical rectangular region and the horizontal rectangular region do not overlap are identified and respectively designated as target regions.
4. The method as described in claim 3, characterized in that, For each target region located within the vertical rectangular region, the target edge line in the target region is the edge line corresponding to the horizontal edge of at least one residual die in the wafer image, and / or for each target region located within the horizontal rectangular region, the target edge line in the target region is the edge line corresponding to the vertical edge of at least one residual die in the wafer image.
5. The method as described in claim 4, characterized in that, For each target region located within the vertical rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest horizontal edge composed of at least one residual die, and / or for each target region located within the horizontal rectangular region, the target edge line in the target region is the edge line in the wafer image corresponding to the longest vertical edge composed of at least one residual die.
6. The method as described in claim 1, characterized in that, The target region includes a portion of the edge of the wafer.
7. The method as described in claim 1, characterized in that, The method further includes: Obtain a target image including the adjusted wafer; For each of the plurality of residual bare wafers, determine the wafer region corresponding to that residual bare wafer in the target image; For each of the plurality of empty regions, determine the corresponding empty region area in the target image; Based on the die regions corresponding to the multiple residual dies, the empty regions corresponding to the multiple empty regions, and the wafer map of the wafer, the detection result of the wafer is determined, wherein the wafer map is used to represent the location information of the multiple residual dies and multiple empty regions in the wafer.
8. A wafer image processing apparatus, characterized in that, The device includes: A target region determination module is used to determine at least one target region in a wafer image including a wafer, wherein the wafer includes a plurality of residual dies and a plurality of empty areas formed by the removal of qualified dies, and each target region in the at least one target region includes at least one residual die; The target angle determination module is used to determine, for each target region in the at least one target region, the target angle between at least one target edge line in the target region and a horizontal axis or a vertical axis, wherein the target edge line includes the edge line corresponding to the edge of at least one residual die in the wafer image; The parameter adjustment determination module is used to determine the adjustment angle and adjustment direction of the wafer based on each target angle.
9. An electronic device, characterized in that, The device includes a memory and a processor, wherein: the memory is used to store a computer program; and the processor is used to execute the computer program to implement the wafer image processing method as described in any one of claims 1-7.
10. A storage medium storing computer program instructions, characterized in that, The computer program instructions, when executed, are used to perform the wafer image processing method as described in any one of claims 1-7.
11. A computer program product comprising computer program instructions, characterized in that, The computer program instructions, when executed by a processor, are used to perform the wafer image processing method as described in any one of claims 1-7.