Control method, controller, system and medium for switching of LLC resonant converter

By dynamically adjusting the duty cycle and staggered conduction control of the four switching transistors during the switching process of the LLC resonant converter, the problems of sudden changes in bus voltage and resonant current spikes during the switching from a full-bridge topology to a half-bridge topology are solved, achieving smooth switching and improved system reliability.

CN121749774BActive Publication Date: 2026-05-15NO 43 INST OF CHINA ELECTRONICS TECH GRP CETC
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NO 43 INST OF CHINA ELECTRONICS TECH GRP CETC
Filing Date
2026-02-26
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Existing LLC resonant converters suffer from sudden changes in bus voltage and resonant current spikes during the switching process from full-bridge to half-bridge topology, resulting in excessive voltage and current stress on the devices. Existing solutions increase hardware cost and complexity.

Method used

By dynamically adjusting the duty cycle of the drive signals of the four switching transistors during the switching time, and adopting a staggered conduction control strategy, the duty cycle of the first switching transistor is increased while the duty cycle of the third switching transistor is decreased. This, combined with the staggered conduction of the second and fourth switching transistors, suppresses the rate of change of the resonant current.

Benefits of technology

Without adding extra hardware circuitry, a smooth switch from a full-bridge topology to a half-bridge topology was achieved, effectively suppressing resonant current spikes and improving the system's reliability and stability.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121749774B_ABST
    Figure CN121749774B_ABST
Patent Text Reader

Abstract

The application discloses a control method, a controller, a system and a medium for switching of an LLC resonant converter, and relates to the technical field of power converter control. The primary circuit of the converter comprises two bridge arms composed of switching tubes in series. Within the switching time, the controller simultaneously adjusts the driving signals of the switching tubes: keeps the duty cycle as a first preset value; controls the duty cycle to increase from an initial value to the first preset value by a preset step length; controls the duty cycle to decrease from the first preset value to zero by the preset step length; and controls the duty cycle to increase from the first preset value to a second preset value by the preset step length. Meanwhile, the control is staggered in each switching cycle. The application can realize smooth switching from a full-bridge to a half-bridge topology without introducing additional hardware circuits, and effectively suppresses the resonant current peak.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of power converter control technology, and in particular to a control method, controller, system, and medium for switching LLC resonant converters. Background Technology

[0002] LLC resonant converters are widely used in power electronic systems due to their soft-switching capability, low switching losses, and high conversion efficiency. To meet the application requirements of wide input voltage or wide output load range, it is usually necessary to control the LLC resonant converter to switch between full-bridge and half-bridge topology operating modes to expand its voltage gain range.

[0003] However, in practical applications, topology switching is often accompanied by drastic transient changes in circuit states. Existing direct switching control strategies, which directly change the state of the switching transistors, cause abrupt changes in the bus voltage, leading to large inductor current spikes in the upstream circuitry and increasing voltage and current stress on the devices. Another common slow switching strategy, while mitigating the bus voltage spikes to some extent, causes huge negative current spikes in the resonant cavity, subjecting the circuit devices to high reverse current surges and severely impacting system reliability. Although existing technologies employ additional current sampling circuits and external comparators in conjunction with frequency conversion control to suppress spikes, the signal delays in the sampling and comparison stages are difficult to eliminate under high-frequency operating conditions, and this increases hardware costs and the complexity of the control algorithm.

[0004] Therefore, how to achieve a smooth switch from a full-bridge topology to a half-bridge topology and effectively suppress resonant current spikes without introducing additional hardware circuits has become a technical challenge that urgently needs to be solved. Summary of the Invention

[0005] The main objective of this invention is to provide a control method, controller, system, and medium for switching LLC resonant converters, aiming to achieve a smooth switching from a full-bridge topology to a half-bridge topology and effectively suppress resonant current spikes without introducing additional hardware circuitry.

[0006] To achieve the above objectives, this invention proposes a control method for switching an LLC resonant converter, wherein the primary-side circuit of the LLC resonant converter includes a first switching transistor. Second switching transistor The first bridge arm is connected in series, and the third switch is formed by... and the fourth switching transistor The second bridge arm is composed of series connections;

[0007] During the switching time of the LLC resonant converter from full-bridge topology to half-bridge topology, the controller simultaneously adjusts the first switching transistor. To the fourth switching transistor The drive signal executes the following control strategy:

[0008] Control the second switching transistor The duty cycle remains at the first preset value;

[0009] Control the first switching transistor The duty cycle is increased from the initial value to the first preset value by a preset step size, wherein the initial value is less than the first preset value;

[0010] Control the third switch transistor The duty cycle decreases from the first preset value to zero in preset steps;

[0011] Control the fourth switch transistor The duty cycle increases from the first preset value to the second preset value by a preset step size, wherein the second preset value is greater than the first preset value;

[0012] Specifically, during each switching cycle within the switching time, the second switching transistor... Controlled to be in the first switching transistor After being turned off, the third switch is turned on. Controlled to the fourth switching transistor After being turned off, it is turned on again, causing the second switch transistor to... With the third switching transistor Misaligned conduction.

[0013] Preferably, during the switching time, the duty cycle of the drive signal varies according to the duty cycle step size. Make dynamic adjustments;

[0014] The duty cycle change step size Determined through the following steps:

[0015] An equivalent circuit model of the LLC resonant converter during the switching time is constructed, and the resonant capacitor voltage is derived based on the equivalent circuit model. and resonant current Regarding the duty cycle change step size The expression;

[0016] Define a desired peak value for the resonant current and substitute it into the resonant current. In the expression, the inverse solution calculates a candidate duty cycle change step size. ;

[0017] The duty cycle change step size of the candidate Substitute the resonant capacitor voltage In the expression, it is verified whether the resonant capacitor can be fully charged within the switching time.

[0018] If the verification result indicates that charging can be completed, then the candidate duty cycle change step size is determined. For the final duty cycle change step size ;

[0019] If the verification result indicates that charging cannot be completed, then reset the desired peak value of the resonant current and repeat the above calculation and verification steps until a duty cycle change step size that meets the conditions is found. .

[0020] Preferably, the switching time includes a first stage, in which the equivalent circuit state equation of the LLC resonant converter is:

[0021]

[0022]

[0023] in, This is the voltage across the resonant capacitor. For resonant current, It is a resonant capacitor. It is a resonant inductor. The input voltage is given; the expression obtained by solving the state equation is:

[0024]

[0025]

[0026] in, and The initial time respectively The resonant current and resonant capacitor voltage, Characteristic impedance, It is the resonant angular frequency.

[0027] Preferably, the switching time further includes a second stage and a third stage, in which the equivalent circuit state equation of the LLC resonant converter is:

[0028]

[0029]

[0030] The expression obtained by solving the state equation is:

[0031]

[0032] .

[0033] Preferably, the duty cycle variation step size The value range of is configured to satisfy the following condition: such that the step size The determined switching duration is less than the discharge time required for the output voltage of the LLC resonant converter to drop to a preset ratio of the bus voltage after power failure;

[0034] The discharge time is based on the switching cycle. Load resistance and output capacitor Sure.

[0035] Preferably, the first preset value is 50%, the initial value is 0%, and the second preset value is 100%; when the fourth switch... When the duty cycle reaches 100%, the LLC resonant converter enters the normally-on state.

[0036] Preferably, the controller is a digital controller, which internally includes an enhanced pulse width modulation module (EPWM) and a comparator register (CMP); the controller changes the determined duty cycle step size. The drive signal is generated by comparing the counter value with the value in the comparison register CMP.

[0037] Preferably, the specific logic for generating the drive signal is as follows: when the counter value rises from 0 to the switching cycle... During the process: if the counter value is less than the first comparison value CMP3A, the first output signal EPWM3A is set high; otherwise, it is set low. If the counter value is less than the first comparison value CMP3A or greater than the second comparison value CMP3B, the second output signal EPWM3B is set high; otherwise, it is set low. If the counter value is less than the third comparison value CMP6B, the third output signal EPWM6A is set low and the fourth output signal EPWM6B is set high; otherwise, the third output signal EPWM6A is set high and the fourth output signal EPWM6B is set low. The first output signal and the second output signal are used to drive the first switching transistor. and the second switching transistor The third output signal and the fourth output signal are respectively used to drive the third switching transistor. and the fourth switching transistor .

[0038] Preferably, the control strategy further includes: real-time acquisition of input voltage. Read the topology switching signal; when the topology switching signal is in the first state, determine to enter the switching process, and according to the input voltage Calculate the duty cycle adjustment step size; when the topology switching signal is not in the first state, keep the current working mode unchanged.

[0039] This application also discloses an LLC resonant converter controller, including a processor and a memory, the memory storing a computer program that, when executed by the processor, implements the control method as described in any of the preceding claims.

[0040] This application also discloses an LLC resonant converter system, including:

[0041] Primary circuit, including the first switching transistor Second switching transistor Third switching transistor and the fourth switching transistor ;

[0042] The resonant cavity is composed of a resonant inductor. Resonant capacitor and the magnetizing inductance of the transformer Composition; and a controller as described above, the controller being connected to the first switching transistor. To the fourth switching transistor The control terminal is connected and used to output drive signals.

[0043] This application also discloses a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the control method as described in any of the preceding claims.

[0044] The above technical solution has the following advantages:

[0045] This invention dynamically adjusts the duty cycle of the drive signals of the four switches in the primary circuit simultaneously during topology switching time using specific logic. Specifically, it controls the duty cycle of the first switch to increase from zero to a first preset value in a preset step, and the duty cycle of the third switch to decrease from the first preset value to zero in a preset step. Combined with the staggered conduction timing of the second and third switches, this prevents the resonant inductor from experiencing excessive voltage drop during switching, thereby effectively suppressing the rate of change of the resonant current and suppressing negative current spikes. This ensures the stability and reliability of the converter during topology switching without the need for additional hardware detection circuitry. Attached Figure Description

[0046] The present invention will now be described in detail with reference to specific embodiments and accompanying drawings, wherein:

[0047] Figure 1This is a schematic diagram of the topology of an LLC resonant converter provided in an embodiment of the present invention.

[0048] Figure 2 This is a comparison chart of gain curves for the full-bridge topology and the half-bridge topology provided in the embodiments of the present invention.

[0049] Figure 3 This is a timing logic diagram of the switching transistor drive signal during the switching process provided in an embodiment of the present invention.

[0050] Figure 4 This is a schematic diagram of the equivalent circuit for the first stage of the switching process provided in an embodiment of the present invention.

[0051] Figure 5 This is a schematic diagram of the equivalent circuit for the second stage of the switching process provided in an embodiment of the present invention.

[0052] Figure 6 This is a schematic diagram of the equivalent circuit for the third stage of the switching process provided in an embodiment of the present invention.

[0053] Figure 7 The first-stage equivalent circuit model diagram is provided for an embodiment of the present invention.

[0054] Figure 8 The equivalent circuit model diagrams for the second and third stages provided in the embodiments of the present invention are shown.

[0055] Figure 9 The schematic diagram shows the digital logic implementation of driving signal generation provided in the embodiments of the present invention.

[0056] Figure 10 This is a flowchart illustrating the control method provided in an embodiment of the present invention.

[0057] Figure 11 This is a comparison diagram of simulation waveforms of the prior art and the method of the present invention under an output power of 20W, provided in an embodiment of the present invention. Figure 11 In this context, 'a' represents the existing waveform. Figure 11 In the figure, b represents the waveform of this invention.

[0058] Figure 12 This is a comparison diagram of simulation waveforms of the prior art and the method of the present invention under an output power of 80W, provided in an embodiment of the present invention. Figure 12 In this context, 'a' represents the existing waveform. Figure 12 In the figure, b represents the waveform of this invention. Detailed Implementation

[0059] To make the objectives, technical solutions, and effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. This invention, through in-depth analysis of the transient response characteristics of LLC resonant converters during the switching process from a full-bridge to a half-bridge topology, proposes a soft-switching control strategy based on misaligned conduction logic, aiming to eliminate the resonant current spikes and bus voltage oscillations caused by traditional hard switching.

[0060] This embodiment provides a control method for switching an LLC resonant converter from a full-bridge topology to a half-bridge topology. This control method is applied to applications such as... Figure 1 The diagram shows an LLC resonant converter system comprising a primary circuit, a resonant cavity, a transformer, and a secondary circuit. The primary circuit consists of a first switching transistor. Second switching transistor Third switching transistor and the fourth switching transistor The structure consists of a full-bridge circuit. The specific connection relationship is as follows: First switching transistor... With the second switching transistor The first bridge arm is formed by series connection, and the third switching transistor... With the fourth switching transistor The two bridge arms are connected in series to form the second bridge arm, and then connected in parallel across the DC input power supply. The resonant cavity is formed by a resonant inductor. Resonant capacitor and the magnetizing inductance of the transformer The system also includes a digital controller, such as a TMS320F28035 digital signal processor, which is used to acquire voltage and current signals and output drive signals to control the switching on and off of the aforementioned switching transistors.

[0061] like Figure 2 As shown, LLC resonant converters typically need to switch between full-bridge and half-bridge topologies to broaden their gain range. However, traditional switching methods often involve sudden changes in bus voltage or severe oscillations in resonant current, causing the devices to experience significant voltage and current stress. To address this technical challenge, the core of this embodiment lies in implementing a four-transistor coordinated staggered conduction control strategy during the switching time from full-bridge to half-bridge operating mode.

[0062] like Figure 3 As shown, specifically, before entering the switching process, the converter is in full-bridge operating mode, at which time the first switching transistor... With the fourth switching transistor In-phase conduction, second switching transistor With the third switching transistor In phase conduction, the two sets of switches operate alternately and complementaryly. When the controller receives a topology switching command, it enters the switching period. During this specific time period, the controller no longer simply turns off a single bridge arm, but simultaneously dynamically adjusts the duty cycle of the drive signals for all four switches. The specific adjustment logic is as follows: controlling the second switch... The duty cycle remains a fixed value of 50%; controlling the first switching transistor. The duty cycle gradually increases linearly from the initial value of 0% to 50%; controlling the third switching transistor. The duty cycle gradually decreases linearly from the initial value of 50% to 0%; controlling the fourth switching transistor. The duty cycle gradually increases linearly from the initial value of 50% to 100%.

[0063] This adjustment method involves more than just changing the duty cycle; more importantly, it achieves a "misalignment" of the switching transistor's turn-on timing. In each switching cycle within the switching time, the first switching transistor... and the fourth switching transistor It is turned on at the beginning of the cycle. This is due to the first switching transistor. With a duty cycle of less than 50%, it will precede the second switching transistor. Turn off. The controller configuration logic enables the second switch. Following the first switching transistor It turns on after being turned off. Similarly, the third switch... Controlled to the fourth switching transistor After being turned off, it is turned on again. This is due to the fourth switching transistor. The duty cycle increases from 50% to 100%, while the third switching transistor... The duty cycle decreases from 50% to 0%. This complementary change, combined with specific timing logic, enables the second switch... and the third switching transistor During the switching process, the switching is completely staggered on the time axis, meaning they are not simultaneously in the conducting state. This staggered conduction mechanism effectively avoids excessive voltage drop on the resonant inductor during the switching process, thereby suppressing the rate of change of the resonant current and suppressing negative current spikes.

[0064] To precisely control the smoothness of the switching process, the duty cycle changes mentioned above are not arbitrary, but based on a precisely calculated duty cycle change step size. Perform iterative adjustments. This step size... The determination process is based on mathematical modeling of the circuit modes during the switching process. In this embodiment, the switching process is divided into three stages, and equivalent circuit models are established for each stage.

[0065] like Figure 4 As shown, in the first stage of the switching process, the switching transistor... and When the circuit is turned on, the power supply charges the resonant cavity. At this time, the resonant inductor... Resonant capacitor And excitation inductance They participate in resonance, and the resonant current increases sinusoidally from negative to positive, causing the resonant capacitor voltage to rise. Based on Figure 7 and Figure 8 The simplified model shown here allows the system's state equations to be described mathematically as follows:

[0066] (1)

[0067] Based on the above state equations, the time-domain expressions for the resonant capacitor voltage and resonant current in this stage can be obtained:

[0068] (2)

[0069] (3)

[0070] like Figure 5 As shown, in the second stage of the switching process, the switching transistor... and Conducting a discharge to the resonant cavity. For example... Figure 6 As shown, in the third stage, the switching transistor When the circuit is turned on, the resonant current flows through. The parasitic diode. The simplified equivalent circuits for these two stages are the same, but their state equations differ from those of the first stage:

[0071] (4)

[0072] The corresponding time-domain solution is:

[0073]

[0074]

[0075] The duty cycle change step size sequence is specifically 0, , Substituting up to 0.5Ts into equations (2), (3), (5), and (6), we obtain the following function expression:

[0076]

[0077]

[0078] This embodiment cleverly utilizes the above analytical formula to calculate the optimal duty cycle change step size in real time using a digital controller. The specific method is as follows: First, the technicians set a desired peak value of the resonant current based on the device's handling capacity. Then, this desired value is substituted into the step size... From the expression for the resonant current, a candidate step size value can be obtained by inverse solving. Next, this candidate step size... Substituting into the expression for the resonant capacitor voltage, we verify whether the resonant capacitor voltage can complete the transition from the equilibrium point in full-bridge mode (typically where the DC component is 0) to the equilibrium point in half-bridge mode (typically where the DC component is 0) within the switching time. The charging process. If the calculation results indicate that charging can be completed, then the step size is... It is feasible; if not, readjust the expected peak current and repeat the calculation until the optimal solution is found.

[0079] To ensure system stability, step size The selection range must also meet specific constraints. Since the switching must end before the output voltage drops to 1 / 2n of the bus voltage to ensure the correct direction of energy transfer, where n is the transformer turns ratio and the step size is... It should meet the following requirements:

[0080]

[0081] in For the switching cycle, For load resistance, This is the output capacitor.

[0082] like Figure 9 As shown, in the actual digital control implementation, this embodiment utilizes the EPWM module inside the DSP. The calculated step size... Write to the compare register CMP. The counter cycles from 0 to the switching cycle. The counting mechanism compares the counter value with comparison values ​​configured with step size logic, such as CMP3A, CMP3B, and CMP6B, to directly generate the required four drive signals. This method avoids complex current sampling and external analog comparator circuits, relying entirely on software algorithms and the controller's internal logic, greatly simplifying hardware costs and improving system reliability.

[0083] Example 2

[0084] This embodiment, based on Embodiment 1, further elaborates on the digital implementation process of the above control method, particularly how to accurately generate the required drive signals through a digital controller. The core of the system constructed in this embodiment lies in the use of a high-performance digital controller, specifically a TMS320F28035 digital signal processor. This controller integrates an enhanced pulse width modulation module (EPWM) and a comparator register (CMP), capable of meeting the requirements for high-frequency fine-tuning.

[0085] like Figure 10 As shown, in the specific control logic, the duty cycle change step size Determining the appropriate input voltage is crucial for achieving smooth switching. The digital controller first acquires the input voltage in real time. The data is then digitized using an analog-to-digital converter (ADC). Subsequently, the controller reads the topology switching signal. When a topology switching signal is detected A value of 1 indicates that the controller determines to enter the switching process when the full-bridge to half-bridge switching is triggered. At this time, the system determines the switching process based on the currently acquired input voltage. In addition to the preset expected current peak value, the optimal duty cycle adjustment step size is calculated using the mathematical model derived in Example 1. If the topology switching signal If it is not equal to 1, it will remain in normal working mode.

[0086] To ensure the safety of the switching process and prevent excessive output voltage drop that could lead to system instability before the switching is complete, the calculated duty cycle change step size is... It needs to meet specific numerical range conditions. Specifically, this step size... The range of values ​​for must satisfy the following relationship:

[0087]

[0088] in, Represents the switching cycle. The load resistor value of the LLC resonant converter. This is the value of the output capacitor. This constraint ensures that the switching operation can be completed before the output voltage drops to 1 / 2n of the bus voltage, thereby maintaining the effectiveness of energy transfer in the resonant cavity.

[0089] After obtaining a definite step size Then, the controller writes it into the compare register CMP. The counter in the EPWM module operates from 0 to the switching cycle. Periodic counting is performed between them. To generate the four misalignment drive signals required in the aforementioned embodiments, the controller is configured with specific comparison logic:

[0090] For the first switching transistor Second switching transistor The drive signal is generated, and the controller sets the first comparison value CMP3A and the second comparison value CMP3B. The counter's count value rises from 0 to... During the process, if the counter value is less than the first comparison value CMP3A, the controller sets the first output signal EPWM3A to a high level; otherwise, it sets it to a low level. If the counter value is less than the first comparison value CMP3A or greater than the second comparison value CMP3B, the controller sets the second output signal EPWM3B to a high level; otherwise, it sets it to a low level. Here, the first output signal EPWM3A drives the first switching transistor. The second output signal EPWM3B drives the second switching transistor. .

[0091] For the third switching transistor and the fourth switching transistor The controller generates a drive signal and sets a third comparison value, CMP6B. If the counter's count value is less than the third comparison value, CMP6B, the controller sets the third output signal, EPWM6A, low and the fourth output signal, EPWM6B, high; otherwise, it sets the third output signal, EPWM6A, high and the fourth output signal, EPWM6B, low. Here, the third output signal, EPWM6A, drives the third switching transistor. The fourth output signal EPWM6B drives the fourth switching transistor. The first switching transistor can be achieved by dynamically updating the comparison value CMP during the switching process. The duty cycle gradually changes from 0% to 50%, and the second switching transistor... Maintain 50%, third switching transistor Gradually changing from 50% to 0%, fourth switching transistor A complex control effect that gradually changes from 50% to 100%.

[0092] Example 3

[0093] This embodiment further verifies the beneficial effects of the above control method under different load conditions through specific simulation experimental data. To intuitively demonstrate the superiority of the staggered conduction switching control method proposed in this invention compared to traditional direct switching or slow switching methods, this embodiment constructs an input voltage... 40V, target output voltage A simulation model of a 20V LLC resonant converter was developed, and comparative tests were conducted using PSIM software.

[0094] Under the first test condition, such as Figure 11As shown in 'a', the output power is set to 20W. A traditional switching control method is used, meaning only the third switching transistor is controlled. and the fourth switching transistor When the drive signal is switched, the simulation waveform displays the output voltage. A significant overshoot phenomenon occurred; more seriously, the resonant inductor current reached a level as high as [missing information]. The negative current spikes can cause significant current stress on circuit components. For example... Figure 11 As shown in b, in contrast, the four-tube linkage staggered conduction switching control method proposed in this invention achieves a lower output voltage under the same operating conditions. The transition is smooth without overshoot, and the negative spike of the resonant inductor current is completely eliminated, resulting in a smooth waveform that greatly improves the reliability of the system.

[0095] In the second test condition, the output power is increased to 80W. For example... Figure 12 As shown in Figure a, when using the traditional switching control method, the negative spike of the resonant inductor current is further aggravated, reaching... Furthermore, the output voltage still exhibits overshoot. For example... Figure 12 As shown in b, by employing the control method of this invention, the negative spike of the resonant inductor current is significantly suppressed to only a fraction remaining. The voltage drop was significant, and the output voltage remained stable.

[0096] In summary, this embodiment verifies that the control method does not require the introduction of additional current sampling circuits or external comparators, nor does it require complex frequency conversion control logic. It can significantly suppress resonant current spikes over a wide load range by simply adjusting the duty cycle of the original four switching transistor drive signals, thus solving the transient impact problem during the switching process from a full-bridge topology to a half-bridge topology.

[0097] This application also discloses an LLC resonant converter controller, including a processor and a memory, the memory storing a computer program that, when executed by the processor, implements the control method as described in any of the preceding claims.

[0098] This application also discloses an LLC resonant converter system, including:

[0099] Primary circuit, including the first switching transistor Second switching transistor Third switching transistor and the fourth switching transistor ;

[0100] The resonant cavity is composed of a resonant inductor. Resonant capacitor and the magnetizing inductance of the transformer Composition; and a controller as described above, the controller being connected to the first switching transistor. To the fourth switching transistor The control terminal is connected and used to output drive signals.

[0101] This application also discloses a computer-readable storage medium having a computer program stored thereon, characterized in that the computer program, when executed by a processor, implements the control method as described in any of the preceding claims.

[0102] The above embodiments are merely illustrative of the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solutions based on the technical concept proposed in this invention shall fall within the scope of protection of this invention.

Claims

1. A control method for switching an LLC resonant converter, characterized in that, The primary circuit of the LLC resonant converter includes a first switching transistor. Second switching transistor The first bridge arm is connected in series, and the third switch is formed by... and the fourth switching transistor The second bridge arm is composed of series connections; During the switching time of the LLC resonant converter from full-bridge topology to half-bridge topology, the controller simultaneously adjusts the first switching transistor. To the fourth switching transistor The drive signal executes the following control strategy: Control the second switching transistor The duty cycle remains at the first preset value; Control the first switching transistor The duty cycle is increased from the initial value to the first preset value by a preset step size, wherein the initial value is less than the first preset value; Control the third switch transistor The duty cycle decreases from the first preset value to zero in preset steps; Control the fourth switch transistor The duty cycle increases from the first preset value to the second preset value by a preset step size, wherein the second preset value is greater than the first preset value; Specifically, during each switching cycle within the switching time, the second switching transistor... Controlled to be in the first switching transistor After being turned off, the third switch is turned on. Controlled to the fourth switching transistor After being turned off, it is turned on again, causing the second switch transistor to... With the third switching transistor Misaligned conduction.

2. The control method for switching an LLC resonant converter according to claim 1, characterized in that, During the switching time, the duty cycle of the drive signal changes according to the duty cycle variation step size. Make dynamic adjustments; The duty cycle change step size Determined through the following steps: An equivalent circuit model of the LLC resonant converter during the switching time is constructed, and the resonant capacitor voltage is derived based on the equivalent circuit model. and resonant current Regarding the duty cycle change step size The expression; Define a desired peak value for the resonant current and substitute it into the resonant current. In the expression, the inverse solution yields a candidate duty cycle variation step size. ; The duty cycle change step size of the candidate Substitute the resonant capacitor voltage In the expression, it is verified whether the resonant capacitor can be fully charged within the switching time. If the verification result indicates that charging can be completed, then the candidate duty cycle change step size is determined. For the final duty cycle change step size ; If the verification result indicates that charging cannot be completed, then reset the desired peak value of the resonant current and repeat the above calculation and verification steps until a duty cycle change step size that meets the conditions is found. .

3. The control method for switching an LLC resonant converter according to claim 2, characterized in that, The switching time includes a first stage, in which the equivalent circuit state equation of the LLC resonant converter is: in, This is the voltage across the resonant capacitor. For resonant current, It is a resonant capacitor. It is a resonant inductor. The input voltage is given; the expression obtained by solving the state equation is: in, and The initial time respectively The resonant current and resonant capacitor voltage, Characteristic impedance, It is the resonant angular frequency.

4. The control method for switching an LLC resonant converter according to claim 3, characterized in that, The switching time also includes a second stage and a third stage, in which the equivalent circuit state equation of the LLC resonant converter is: The expression obtained by solving the state equation is: 。 5. The control method for switching an LLC resonant converter according to claim 2, characterized in that, The duty cycle change step size The value range of is configured to satisfy the following condition: such that the step size The determined switching duration is less than the discharge time required for the output voltage of the LLC resonant converter to drop to a preset ratio of the bus voltage after power failure; The discharge time is based on the switching cycle. Load resistance and output capacitor Sure.

6. The control method for switching an LLC resonant converter according to claim 1, characterized in that, The first preset value is 50%, the initial value is 0%, and the second preset value is 100%; when the fourth switch... When the duty cycle reaches 100%, the LLC resonant converter enters the normally-on state.

7. The control method for switching an LLC resonant converter according to claim 1, characterized in that, The controller is a digital controller, which internally includes an enhanced pulse width modulation module (EPWM) and a comparator register (CMP); the controller changes the determined duty cycle step size. The drive signal is generated by comparing the counter value with the value in the comparison register CMP.

8. The control method for switching an LLC resonant converter according to claim 7, characterized in that, The specific logic for generating the drive signal is as follows: when the counter value rises from 0 to the switching cycle... During the process: if the counter value is less than the first comparison value CMP3A, the first output signal EPWM3A is set high; otherwise, it is set low. If the counter value is less than the first comparison value CMP3A or greater than the second comparison value CMP3B, the second output signal EPWM3B is set high; otherwise, it is set low. If the counter value is less than the third comparison value CMP6B, the third output signal EPWM6A is set low and the fourth output signal EPWM6B is set high; otherwise, the third output signal EPWM6A is set high and the fourth output signal EPWM6B is set low. The first output signal and the second output signal are used to drive the first switching transistor. and the second switching transistor The third output signal and the fourth output signal are respectively used to drive the third switching transistor. and the fourth switching transistor .

9. The control method for switching an LLC resonant converter according to claim 1, characterized in that, The control strategy also includes: real-time acquisition of input voltage. Read the topology switching signal; when the topology switching signal is in the first state, determine to enter the switching process, and according to the input voltage Calculate the duty cycle adjustment step size; when the topology switching signal is not in the first state, keep the current working mode unchanged.

10. An LLC resonant converter controller, comprising a processor and a memory, characterized in that, The memory stores a computer program, which, when executed by the processor, implements the control method as described in any one of claims 1 to 9.

11. An LLC resonant converter system, characterized in that, include: Primary circuit, including the first switching transistor Second switching transistor Third switching transistor and the fourth switching transistor ; The resonant cavity is composed of a resonant inductor. Resonant capacitor and the magnetizing inductance of the transformer Configuration; and a controller as claimed in claim 10, the controller being connected to the first switching transistor. To the fourth switching transistor The control terminal is connected and used to output drive signals.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the control method as described in any one of claims 1 to 9.