Middle-high voltage D-class audio power amplifier loop structure

Abstract

The invention discloses a middle-high voltage D-class audio power amplifier loop structure, which comprises a first-stage integrator, a second-stage integrator, a comparator assembly and a driving power tube assembly, the first-stage integrator comprises an operational amplifier U1, the second-stage integrator comprises an operational amplifier U2, the comparator assembly comprises a comparator U3 and a comparator U4, and the driving power tube assembly comprises an operational amplifier U1 and an operational amplifier U2. The driving power tube assembly comprises a driving power tube U5 and a driving power tube U6. The medium-high voltage D-type audio power amplifier loop structure overcomes the defects that in the prior art, a medium-high voltage D-type audio power amplifier loop structure is poor in distortion and noise suppression effect and low in response speed, the loop gain can be remarkably improved through the structure, meanwhile, the loop response speed is effectively improved, and the reliability of the loop structure is improved. And the audio performance requirement in a medium-high voltage and medium-high output power scene is met.

Description

Technical Field

[0001] This invention belongs to the technical field of Class D audio power amplifier chips, specifically relating to a Class D audio power amplifier loop structure suitable for medium-high voltage and medium-large output power. Background Technology

[0002] In the field of audio power amplification, Class D audio power amplifiers are widely used due to their advantages such as high efficiency and small size. Among them, medium- and high-voltage Class D audio power amplifier chips are often used in medium- and high-output power applications. The loop structure of existing medium- and high-voltage Class D audio power amplifier chips usually adopts a two-stage cascaded integrator to improve the loop gain, while using a single-loop or dual-loop structure to suppress audio distortion and noise.

[0003] However, in some existing dual-loop structures, the first loop uses negative feedback, while the second loop uses positive feedback or feedforward. This design significantly reduces the loop's ability to suppress distortion and noise, making it difficult to meet the high audio quality requirements of medium-high voltage and high-output power scenarios. Summary of the Invention

[0004] The main objective of this invention is to provide a loop structure for a medium-high voltage Class D audio power amplifier, which overcomes the shortcomings of existing medium-high voltage Class D audio power amplifier loop structures, such as poor distortion and noise suppression and slow response speed. This structure can significantly improve loop gain and effectively improve loop response speed, thus meeting the audio performance requirements in medium-high voltage and high output power scenarios.

[0005] To achieve the above objectives, this invention provides a medium-to-high voltage Class D audio power amplifier loop structure, comprising a first-stage integrator, a second-stage integrator, a comparator assembly, and a drive power transistor assembly, wherein: The input terminal of the first-stage integrator receives audio input signal INP and audio input signal INN and transmits the audio input signal to the input terminal of the second-stage integrator. The input impedance of the second-stage integrator is in parallel RC configuration. The output terminal of the second-stage integrator is connected to the input terminal of the comparator component, and the feedback impedance of the second-stage integrator is in series RC configuration. The output of the comparator assembly is connected to the input of the drive power transistor assembly, and the output of the drive power transistor assembly outputs audio output signal OUTN and audio output signal OUTP. The comparator component generates an output OUTN_PVDD signal and an output OUTP_PVDD signal at its output terminal. The output OUTN_PVDD signal and the output OUTP_PVDD signal are respectively connected to the negative input terminal and the positive input terminal of the first-stage integrator, thereby forming a first negative feedback path. The output OUTN_PVDD signal and the output OUTP_PVDD signal are respectively connected to the positive input terminal and the negative input terminal of the second-stage integrator, thereby forming a second negative feedback path.

[0006] As a further preferred embodiment of the above technical solution, the first-stage integrator includes an operational amplifier U1, the negative input terminal of which is connected to an audio input signal INP and the positive input terminal of which is connected to an audio input terminal INN. The second-stage integrator includes operational amplifier U2. The positive output terminal of operational amplifier U1 is connected to the negative input terminal of operational amplifier U2 through resistor R4P, and capacitor C2P is connected in parallel across resistor R4P. The negative output terminal of operational amplifier U1 is connected to the positive input terminal of operational amplifier U2 through resistor R4N, and capacitor C2N is connected in parallel across resistor R4N. Resistor R7P and capacitor C3P are connected between the negative input terminal and the positive output terminal of operational amplifier U2, and resistor R7N and capacitor C3N are connected between the positive input terminal and the negative output terminal of operational amplifier U2. The comparator assembly includes comparator U3 and comparator U4. The negative input terminal of comparator U3 is connected to the positive output terminal of operational amplifier U2 via resistors R10P and R8P. The negative input terminal of comparator U4 is connected to the negative output terminal of operational amplifier U2 via resistors R10N and R8N. The output terminal of operational amplifier U3 outputs an OUTN_PVDD signal, one path of which is connected to the negative input terminal of operational amplifier U1 via resistor R3P, and the other path is connected to the positive input terminal of operational amplifier U2 via resistor R5P. The output terminal of operational amplifier U4 outputs an OUTP_PVDD signal, one path of which is connected to the positive input terminal of operational amplifier U1 via resistor R3N, and the other path is connected to the negative input terminal of operational amplifier U2 via resistor R5N. The driving power transistor assembly includes driving power transistor U5 and driving power transistor U6. The input terminal of driving power transistor U5 is connected to the output terminal of comparator U3, and the output terminal of driving power transistor U5 outputs an audio output signal OUTN. One output terminal of driving power transistor U5 is connected to the negative input terminal of operational amplifier U1 through resistor R2P, and the other output terminal is connected to the positive input terminal of operational amplifier U2 through resistor R6P. The input terminal of driving power transistor U6 is connected to the output terminal of comparator U4, and the output terminal of driving power transistor U6 outputs an audio output signal OUTP. One output terminal of driving power transistor U6 is connected to the positive input terminal of operational amplifier U1 through resistor R2N, and the other output terminal is connected to the negative input terminal of operational amplifier U2 through resistor R6N.

[0007] As a further preferred embodiment of the above technical solution, a capacitor C1P is connected between the negative input terminal and the positive output terminal of the operational amplifier U1, and a capacitor C1N is connected between the positive input terminal and the negative output terminal of the operational amplifier U1.

[0008] As a further preferred technical solution of the above technical solution, the common terminal of the resistor R8P and the resistor R10P is grounded through the capacitor C4P, and the two ends of the capacitor C4P are connected in parallel with the series resistor R9P and the capacitor C5P. The common terminal of resistors R8N and R10N is grounded through capacitor C4N, and resistors R9N and C5N are connected in series across the two ends of capacitor C4N.

[0009] As a further preferred embodiment of the above technical solution, the negative input terminal of the comparator U3 is grounded through a capacitor C6P, and a resistor R11P and a capacitor C7P are connected in series across the two ends of the capacitor C6P; the negative input terminal of the comparator U4 is grounded through a capacitor C6N, and a resistor R11N and a capacitor C7N are connected in series across the two ends of the capacitor C6N.

[0010] As a further preferred embodiment of the above technical solution, the negative input terminal of the operational amplifier U1 is connected to the audio input signal INP through a resistor R1P, and the positive input terminal of the operational amplifier U1 is connected to the audio input terminal INN through a resistor R1N.

[0011] The beneficial effects of this invention are as follows: Through the aforementioned improvements to the loop structure, three core technical effects are achieved: First, the loop gain of the medium-high voltage Class D audio power amplifier is significantly improved, enhancing the loop's signal amplification capability and its ability to suppress distortion and noise, effectively reducing audio signal distortion and improving audio output quality. Second, the loop response speed is greatly improved, enabling the loop to follow changes in the input audio signal more quickly, reducing signal delay, improving the real-time performance and smoothness of audio playback, and meeting the high requirements for audio performance in medium-high voltage and high-output power scenarios. Third, the loop stability is improved, allowing the loop phase margin to adapt to different system parameter requirements, thereby enhancing the stability of audio playback. Attached Figure Description

[0012] Figure 1 This is the circuit diagram of the present invention. Detailed Implementation

[0013] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0014] This invention discloses a loop structure for a medium-high voltage Class D audio power amplifier. The specific embodiments of the invention are further described below with reference to preferred embodiments.

[0015] In the embodiments of the present invention, those skilled in the art will note that the capacitors and resistors involved in the present invention can be considered as prior art.

[0016] Preferred embodiment.

[0017] like Figure 1 As shown, this invention discloses a loop structure for a medium-to-high voltage Class D audio power amplifier, comprising a first-stage integrator, a second-stage integrator, a comparator assembly, and a drive power transistor assembly, wherein: The input terminal of the first-stage integrator receives audio input signal INP and audio input signal INN and transmits the audio input signal to the input terminal of the second-stage integrator. The input impedance of the second-stage integrator is in parallel RC configuration. The output terminal of the second-stage integrator is connected to the input terminal of the comparator component, and the feedback impedance of the second-stage integrator is in series RC configuration. The output of the comparator assembly is connected to the input of the drive power transistor assembly, and the output of the drive power transistor assembly outputs audio output signal OUTN and audio output signal OUTP. The comparator component generates an output OUTN_PVDD signal and an output OUTP_PVDD signal at its output terminal. The output OUTN_PVDD signal and the output OUTP_PVDD signal are respectively connected to the negative input terminal and the positive input terminal of the first-stage integrator, thereby forming a first negative feedback path. The output OUTN_PVDD signal and the output OUTP_PVDD signal are respectively connected to the positive input terminal and the negative input terminal of the second-stage integrator, thereby forming a second negative feedback path.

[0018] Specifically, the first-stage integrator includes an operational amplifier U1, the negative input terminal of which is connected to the audio input signal INP and the positive input terminal of which is connected to the audio input terminal INN. The second-stage integrator includes operational amplifier U2. The positive output terminal of operational amplifier U1 is connected to the negative input terminal of operational amplifier U2 through resistor R4P, and capacitor C2P is connected in parallel across resistor R4P. The negative output terminal of operational amplifier U1 is connected to the positive input terminal of operational amplifier U2 through resistor R4N, and capacitor C2N is connected in parallel across resistor R4N. Resistor R7P and capacitor C3P are connected between the negative input terminal and the positive output terminal of operational amplifier U2, and resistor R7N and capacitor C3N are connected between the positive input terminal and the negative output terminal of operational amplifier U2. The comparator assembly includes comparator U3 and comparator U4. The negative input terminal of comparator U3 is connected to the positive output terminal of operational amplifier U2 via resistors R10P and R8P. The negative input terminal of comparator U4 is connected to the negative output terminal of operational amplifier U2 via resistors R10N and R8N. The output terminal of operational amplifier U3 outputs an OUTN_PVDD signal, one path of which is connected to the negative input terminal of operational amplifier U1 via resistor R3P, and the other path is connected to the positive input terminal of operational amplifier U2 via resistor R5P. The output terminal of operational amplifier U4 outputs an OUTP_PVDD signal, one path of which is connected to the positive input terminal of operational amplifier U1 via resistor R3N, and the other path is connected to the negative input terminal of operational amplifier U2 via resistor R5N. The driving power transistor assembly includes driving power transistor U5 and driving power transistor U6. The input terminal of driving power transistor U5 is connected to the output terminal of comparator U3, and the output terminal of driving power transistor U5 outputs an audio output signal OUTN. One output terminal of driving power transistor U5 is connected to the negative input terminal of operational amplifier U1 through resistor R2P, and the other output terminal is connected to the positive input terminal of operational amplifier U2 through resistor R6P. The input terminal of driving power transistor U6 is connected to the output terminal of comparator U4, and the output terminal of driving power transistor U6 outputs an audio output signal OUTP. One output terminal of driving power transistor U6 is connected to the positive input terminal of operational amplifier U1 through resistor R2N, and the other output terminal is connected to the negative input terminal of operational amplifier U2 through resistor R6N.

[0019] Specifically, a capacitor C1P is connected between the negative input terminal and the positive output terminal of the operational amplifier U1, and a capacitor C1N is connected between the positive input terminal and the negative output terminal of the operational amplifier U1.

[0020] More specifically, the common terminal of resistors R8P and R10P is grounded through capacitor C4P, and resistors R9P and capacitor C5P are connected in series across the two ends of capacitor C4P. The common terminal of resistors R8N and R10N is grounded through capacitor C4N, and resistors R9N and C5N are connected in series across the two ends of capacitor C4N.

[0021] Furthermore, the negative input terminal of comparator U3 is grounded through capacitor C6P, and a series resistor R11P and a capacitor C7P are connected in parallel across the two ends of capacitor C6P; the negative input terminal of comparator U4 is grounded through capacitor C6N, and a series resistor R11N and a capacitor C7N are connected in parallel across the two ends of capacitor C6N.

[0022] Furthermore, the negative input terminal of the operational amplifier U1 is connected to the audio input signal INP through a resistor R1P, and the positive input terminal of the operational amplifier U1 is connected to the audio input terminal INN through a resistor R1N.

[0023] For the present invention: Compared to traditional loops, this invention adds negative feedback paths from the power supply domains OUTN_PVDD and OUTP_PVDD after the comparator to the negative and positive input terminals of the first-stage integrator, respectively, and adds negative feedback paths from OUTN_PVDD and OUTP_PVDD to the positive and negative input terminals of the second-stage integrator, respectively. The circuit improves the response speed of the dual-loop, dual-stage circuit. In this invention, the input impedance of the second-stage integrator is connected in parallel RC circuits, i.e., R4P and C2P are connected in parallel, and R4N and C2N are connected in parallel. The feedback impedance is connected in series RC circuits, i.e., R7P and C3P are connected in series, and R7N and C3N are connected in series. The filter after the comparator in this invention provides additional zero-pole configuration for the loop and also has a suppressive effect on high-frequency noise. It can be weighed according to the specific loop parameters, total harmonic distortion index, and carrier frequency. Different first-order or second-order RC combinations and RC parameters can be used to improve the loop parameters and audio performance.

[0024] It is worth mentioning that, in addition to the above, the loop structure of the medium-high voltage Class D audio power amplifier also includes... Figure 1 In addition to fully differential input and fully differential output, it can also be single-ended input and single-ended output. Taking INP single-ended input and OUTN single-ended output as an example, the OUTP_PVDD and OUTP signals in the loop need to be obtained by adding inverting logic operations to OUTN_PVDD and OUTN.

[0025] Figure 1 The RC filter network after the comparator adopts a second-order filter structure, but a first-order filter structure can also be adopted according to the specific loop parameter requirements. Alternatively, the filter network can adopt a common RC low-pass filter structure, i.e., R9P=R9N=R11P=R11N=∞Ω, C5P=C5N=C7P=C7N=0F, or R8P=R8N=R10P=R10N=0Ω, or R8P=R8N=R10P=R10N=0Ω and C4P=C4N=C6P=C6N=0F.

[0026] It is worth mentioning that the technical features such as capacitors and resistors involved in this patent application should be regarded as prior art. The specific structure, working principle, and possible control methods and spatial arrangement of these technical features can be adopted using conventional choices in the field, and should not be regarded as the inventive point of this patent. This patent will not be further elaborated in detail.

[0027] For those skilled in the art, modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the protection scope of this invention.

Claims

1. A medium-high voltage class-D audio power amplifier loop structure, characterized in that, The first-stage integrator, the second-stage integrator, the comparator assembly and the driving power tube assembly are connected in series. The input terminals of the first-stage integrator receive audio input signals INP and INN and transmit the audio input signals to the input terminals of the second-stage integrator, the input impedance of the input terminals of the second-stage integrator adopts RC parallel mode, the output terminals of the second-stage integrator are connected to the input terminals of the comparator assembly and the feedback impedance of the second-stage integrator adopts RC series mode; The output terminals of the comparator assembly are connected to the input terminals of the driving power tube assembly and the output terminals of the driving power tube assembly output audio output signals OUTN and OUTP; The output terminals of the comparator assembly generate output OUTN_PVDD signal and output OUTP_PVDD signal, the output OUTN_PVDD signal and the output OUTP_PVDD signal are connected to the negative input terminal and the positive input terminal of the first-stage integrator respectively, thereby forming a first negative feedback path; the output OUTN_PVDD signal and the output OUTP_PVDD signal are connected to the positive input terminal and the negative input terminal of the second-stage integrator respectively, thereby forming a second negative feedback path.

2. The medium-high voltage class-D audio power amplifier loop structure of claim 1, wherein, The first-stage integrator comprises an operational amplifier U1, the negative input terminal of the operational amplifier U1 is connected to audio input signal INP and the positive input terminal of the operational amplifier U1 is connected to audio input signal INN; The second-stage integrator comprises an operational amplifier U2, the positive output terminal of the operational amplifier U1 is connected to the negative input terminal of the operational amplifier U2 through resistance R4P and the both ends of the resistance R4P are connected to capacitor C2P in parallel, the negative output terminal of the operational amplifier U1 is connected to the positive input terminal of the operational amplifier U2 through resistance R4N and the both ends of the resistance R4N are connected to capacitor C2N in parallel; resistance R7P and capacitor C3P are connected between the negative input terminal and the positive output terminal of the operational amplifier U2 and resistance R7N and capacitor C3N are connected between the positive input terminal and the negative output terminal of the operational amplifier U2; The comparator assembly comprises comparator U3 and comparator U4, the negative input terminal of the comparator U3 is connected to the positive output terminal of the operational amplifier U2 through resistance R10P and resistance R8P in sequence, the negative input terminal of the comparator U4 is connected to the negative output terminal of the operational amplifier U2 through resistance R10N and resistance R8N in sequence; the output terminal of the operational amplifier U3 outputs output OUTN_PVDD signal, the output OUTN_PVDD signal is connected to the negative input terminal of the operational amplifier U1 through resistance R3P in one way and is connected to the positive input terminal of the operational amplifier U2 through resistance R5P in another way; the output terminal of the operational amplifier U4 outputs output OUTP_PVDD signal, the output OUTP_PVDD signal is connected to the positive input terminal of the operational amplifier U1 through resistance R3N in one way and is connected to the negative input terminal of the operational amplifier U2 through resistance R5N in another way; The driving power tube assembly comprises driving power tubes U5 and U6, an input end of the driving power tube U5 is connected with an output end of the comparator U3, an output end of the driving power tube U5 outputs an audio output signal OUTN, the output end of the driving power tube U5 is connected with a negative input end of the operational amplifier U1 through a resistor R2P and is connected with a positive input end of the operational amplifier U2 through a resistor R6P in another way; an input end of the driving power tube U6 is connected with an output end of the comparator U4, and an output end of the driving power tube U6 outputs an audio output signal OUTP, the output end of the driving power tube U6 is connected with a positive input end of the operational amplifier U1 through a resistor R2N and is connected with a negative input end of the operational amplifier U2 through a resistor R6N in another way.

3. The class-D audio power amplifier loop structure of claim 2, wherein, A capacitor C1P is connected between the negative input end and the positive output end of the operational amplifier U1, and a capacitor C1N is connected between the positive input end and the negative output end of the operational amplifier U1.

4. The class-D audio power amplifier loop structure of claim 3, wherein, Common connection ends of the resistor R8P and the resistor R10P are grounded through a capacitor C4P, and the capacitor C4P is connected with a resistor R9P and a capacitor C5P in series at both ends. Common connection ends of the resistor R8N and the resistor R10N are grounded through a capacitor C4N, and the capacitor C4N is connected with a resistor R9N and a capacitor C5N in series at both ends.

5. A class-D audio power amplifier loop structure according to claim 4, characterized in that, The negative input end of the comparator U3 is also grounded through a capacitor C6P, and the capacitor C6P is connected with a resistor R11P and a capacitor C7P in series at both ends; the negative input end of the comparator U4 is also grounded through a capacitor C6N, and the capacitor C6N is connected with a resistor R11N and a capacitor C7N in series at both ends.

6. A medium-high voltage class-D audio power amplifier loop structure according to claim 5, characterized in that, The negative input end of the operational amplifier U1 is connected with an audio input signal INP through a resistor R1P, and the positive input end of the operational amplifier U1 is connected with an audio input signal INN through a resistor R1N.

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