Circuit board structure

Abstract

A circuit board structure includes a first multilayer board structure, a second multilayer board structure, a conductive support plate, a mold core structure, a first conductive through hole structure and a second conductive through hole structure. The first multilayer board structure comprises a plurality of first circuit layers and a plurality of first insulating layers. The second multilayer board structure comprises a plurality of second circuit layers and a plurality of second insulating layers. The conductive support plate is located between the first multilayer board structure and the second multilayer board structure. The mold core structure is located between the first multi-layer board structure and the second multi-layer board structure. The first conductive via structure extends from the upper surface of the first multilayer board structure to one of the second circuit layers of the second multilayer board structure. The second conductive via structure extends from the lower surface of the second multilayer board structure to the mold core structure. Through the rigidity of the conductive support plate, the circuit board structure has the advantages of good flatness, plate bending resistance and the like, and the product assembly yield can be improved.

Description

TECHNICAL FIELD

[0001] The present invention relates to a circuit board structure. BACKGROUND

[0002] With the rapid development of artificial intelligence (AI) and high-level servers, the number of layers of printed circuit boards and the size of ball grid array (BGA) regions in printed circuit boards are becoming larger and larger. In practical applications, attention needs to be paid to the flatness of printed circuit boards and the like. SUMMARY

[0003] Some embodiments of the present invention provide a circuit board structure. The design allows a conductive support plate to be embedded in the circuit board structure through a convex structure. The conductive support plate can be combined with a corresponding ground layer, or the conductive support plate can be used as a ground layer without considering the impact on signals, thereby increasing the design freedom, wherein the conductive support plate can also help the circuit board structure dissipate heat. In summary, the rigidity of the embedded conductive support plate of the circuit board structure can have good flatness, dimensional stability, and resistance to warping, and when large-area BGA assembly is performed, the flatness of the board and the dimensional stability during high-temperature assembly can improve the product assembly yield.

[0004] Some embodiments of the present invention provide a circuit board structure. The circuit board structure has a first region and a second region adjacent to the first region. The circuit board structure includes a first multi-layer board structure, a second multi-layer board structure, a conductive support plate, a mold core structure, a first conductive via structure, and a second conductive via structure. The first multi-layer board structure includes a plurality of first circuit layers and a plurality of first insulating layers, wherein the first insulating layers separate the first circuit layers. The second multi-layer board structure includes a plurality of second circuit layers and a plurality of second insulating layers, wherein the second insulating layers separate the second circuit layers. The conductive support plate is located between the first multi-layer board structure and the second multi-layer board structure and is located in the first region. The mold core structure is located between the first multi-layer board structure and the second multi-layer board structure and is located in the second region, wherein the mold core structure includes a core plate and a plurality of metal layers on the core plate. The first conductive via structure is located in the first region and extends from an upper surface of the first multi-layer board structure to one of the second circuit layers of the second multi-layer board structure. The second conductive via structure is located in the second region and extends from a lower surface of the second multi-layer board structure to the mold core structure.

[0005] According to some embodiments of the present invention, the first multi-layer board structure further includes a plurality of substrates, wherein one of the first circuit layers is disposed on a surface of the substrate.

[0006] According to some embodiments of the present invention, the circuit board structure further comprises a first electronic component. The first electronic component is disposed on the upper surface of the first multilayer board structure and electrically connected to the first conductive via structure.

[0007] According to some embodiments of the present invention, the circuit board structure further comprises a second electronic component. The second electronic component is disposed on the lower surface of the second multilayer board structure and electrically connected to the second conductive via structure.

[0008] According to some embodiments of the present invention, the first conductive via structure is in contact with the conductive support plate.

[0009] According to some embodiments of the present invention, a method for fabricating a circuit board structure is provided. The circuit board structure has a first region and a second region adjacent to the first region. The method comprises: forming a first multilayer board structure, wherein the first multilayer board structure comprises a plurality of first circuit layers and a plurality of first insulating layers, wherein the first insulating layers separate the first circuit layers. Forming a second multilayer board structure, wherein the second multilayer board structure comprises a plurality of second circuit layers and a plurality of second insulating layers, wherein the second insulating layers separate the second circuit layers. Disposing a conductive support plate between the first multilayer board structure and the second multilayer board structure, wherein the conductive support plate has a protruding structure. Disposing a mold core structure between the first multilayer board structure and the second multilayer board structure. Forming a plurality of first vias in the first multilayer board structure, the second multilayer board structure, and the conductive support plate in the first region. Forming a plurality of second vias in the first multilayer board structure, the second multilayer board structure, and the mold core structure in the second region. Forming a first conductive layer and a second conductive layer in the plurality of first vias and the plurality of second vias, respectively.

[0010] According to some embodiments of the present invention, the method further comprises: removing a portion of the first conductive layer in the first vias. Removing a portion of the second conductive layer in the second vias.

[0011] According to some embodiments of the present invention, the method further comprises: removing the protruding structure of the conductive support plate before forming the plurality of conductive layers.

[0012] According to some embodiments of the present invention, the conductive support plate has an opening, and the protruding structure is a rivet disposed in the opening.

[0013] According to some embodiments of the present invention, the conductive support plate has a plate body, and the protruding structure of the conductive support plate is a bump on the plate body, and the bump is made of the same material as the plate body. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 A schematic view of a circuit board structure according to some embodiments of the present invention.

[0015] Figure 2 This is a flowchart illustrating a circuit board structure manufacturing method according to a partial embodiment of the present invention.

[0016] Figures 3A to 3H This is a cross-sectional view of a circuit board structure according to an embodiment of the present invention at various stages of the manufacturing process.

[0017] Figures 4A to 4E This is a cross-sectional view of a circuit board structure according to an embodiment of the present invention at various stages of the manufacturing process. Detailed Implementation

[0018] The embodiments of the present invention will be discussed in detail below. However, it should be understood that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific situations. The embodiments discussed and disclosed are for illustrative purposes only and are not intended to limit the scope of the invention. The terms "first," "second," etc., used herein do not specifically refer to any order or sequence, but are merely used to distinguish elements or operations described using the same technical terms.

[0019] Additionally, for ease of description, spatial relative terms such as “below,” “under,” “lower,” “above,” “upper,” and similar terms are used herein to describe the relationship between one element or feature and another illustrated in the figures. Besides the orientation depicted in the figures, spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein shall be interpreted accordingly. As used herein, “approximately,” “about,” “approximately,” or “substantially” generally refers to within 20%, 10%, or 5% of a given value or range. The numerical quantities given herein are approximate, meaning that the terms “approximately,” “about,” “approximately,” or “substantially” may be conjectured unless explicitly specified.

[0020] Figure 1 This is a schematic diagram of a circuit board structure 100 according to a partial embodiment of the present invention. The circuit board structure 100 has a region R1 and a region R2 adjacent to region R1. The circuit board structure 100 includes a multilayer board structure 110, a multilayer board structure 120, a core structure 130, a conductive support plate 140, conductive via structures 150, 160, and 170, a protective layer 180, and electronic components D1 and D2.

[0021] In some embodiments, the multilayer board structure 110 includes multiple substrates 111, multiple circuit layers 112, 113, multiple insulating layers 114, 115, and multiple external circuit layers 116, 117. The configuration of the multilayer board structure 110 can be changed according to functional requirements. For example, in this embodiment, the multilayer board structure 110 is an 8-layer board. In other words, the multilayer board structure 110 has 3 circuit layers 112, 3 circuit layers 113, 1 external circuit layer 116, and 1 external circuit layer 117. However, it should be noted that the multilayer board structure 110 can adopt any suitable configuration, and is not limited thereto.

[0022] In some embodiments, the substrate 111 may be made of polytetrafluoroethylene (PTFE), glass fiber, FR-4 sheet, similar materials or combinations thereof.

[0023] In some embodiments, circuit layers 112, 113, and outer circuit layers 116, 117 may be made of nickel, similar conductive materials, or combinations thereof. The configuration of circuit layers 112 and 113 may be changed according to functional requirements. For example, in this embodiment, circuit layer 112 may be located on surface 111A of substrate 111. Circuit layer 113 may be located on surface 111B of substrate 111.

[0024] In some embodiments, insulating layers 114 and 115 may be formed by curing a prepreg (PP) film. For example, in this embodiment, insulating layers 114 and 115 may be formed by curing an adhesive sheet obtained by impregnating insulating paper, fiberglass cloth, or other fibrous materials with resin. The configuration of insulating layers 114 and 115 may be changed according to functional requirements. For example, in this embodiment, insulating layer 114 may be located between circuit layers 112 and 113, separating circuit layer 112 on surface 111A of one substrate 111 from circuit layer 113 on surface 111B of another substrate 111. One insulating layer 115 may be located between circuit layer 113 and outer circuit layer 116, separating circuit layer 113 from outer circuit layer 116. Another insulating layer 115 may be located between circuit layer 112 and outer circuit layer 117, separating circuit layer 112 from outer circuit layer 117.

[0025] In some embodiments, the multilayer board structure 120 includes multiple substrates 121, multiple circuit layers 122, 123, multiple insulating layers 124, 125, and multiple external circuit layers 126, 127. The configuration of the multilayer board structure 120 can be changed according to functional requirements. For example, in this embodiment, the multilayer board structure 120 may adopt a configuration similar to that of the multilayer board structure 110. In other words, the multilayer board structure 120 may be an 8-layer board. The multilayer board structure 120 has 3 substrates 121, 3 circuit layers 122, 123, 2 insulating layers 124, 2 insulating layers 125, 1 external circuit layer 126, and 1 external circuit layer 127. In some embodiments, the multilayer board structure 120 may adopt a different configuration than that of the multilayer board structure 110. In this way, the circuit board structure 100 can be a combination of multilayer board structures 110 and 120 with different numbers of layers.

[0026] In some embodiments, the substrate 121 may be made of polytetrafluoroethylene (PTFE), glass fiber, FR-4 sheet, similar materials or combinations thereof.

[0027] In some embodiments, circuit layers 122 and 123 may be made of nickel, nickel alloys, copper, platinum, similar conductive materials, or combinations thereof. The configuration of circuit layers 122 and 123 may be changed according to functional requirements. For example, in this embodiment, circuit layer 122 may be located on surface 121A of substrate 121. Circuit layer 123 may be located on surface 121B of substrate 121.

[0028] In some embodiments, insulating layers 124 and 125 may be formed by curing a prepreg (PP) film. For example, in this embodiment, insulating layers 124 and 125 may be formed by curing an adhesive sheet obtained by impregnating insulating paper, fiberglass cloth, or other fibrous materials with resin. The configuration of insulating layers 124 and 125 may be changed according to functional requirements. For example, in this embodiment, insulating layer 124 may be located between circuit layers 122 and 123, separating circuit layer 122 on surface 121A of one substrate 121 from circuit layer 123 on surface 121B of another substrate 121. One insulating layer 125 may be located between circuit layer 123 and outer circuit layer 126, separating circuit layer 123 from outer circuit layer 126. Another insulating layer 125 may be located between circuit layer 122 and outer circuit layer 127, separating circuit layer 122 from outer circuit layer 127.

[0029] In some embodiments, the core structure 130 may include a core plate 132 and a plurality of metal layers 134. The core structure 130 may be located between the multilayer board structure 110 and the multilayer board structure 120, and may be located in region R2. The core structure 130 may serve as an inner layer circuit of the ground plane in region R2.

[0030] In some embodiments, the core board 132 may be made of a material similar to the substrate 111 of the multilayer board structure 110 and the substrate 121 of the multilayer board structure 120. For example, in some embodiments, the core board 132 may be made of polytetrafluoroethylene (PTFE), glass fiber, FR-4 sheet, similar materials, or combinations thereof. In another embodiment, the core board 132 may be made of a material different from the substrate 111 of the multilayer board structure 110 and the substrate 121 of the multilayer board structure 120, such as a ceramic material or a Teflon material.

[0031] In some embodiments, the metal layer 134 may be made of copper, similar conductive materials, or a combination thereof. In this embodiment, the metal layer 134 may be located on surfaces 132A and 132B of the core board 132.

[0032] In some embodiments, the conductive support plate 140 may be made of copper, similar conductive materials, or a combination thereof. However, it should be noted that the conductive support plate 140 may be made of any suitable material, and is not limited thereto. The thickness of the conductive support plate 140 may be varied according to functional requirements. For example, in this embodiment, the thickness of the conductive support plate 140 may be 0.5 mm to 2 mm. The configuration of the conductive support plate 140 may be varied according to functional requirements. For example, in this embodiment, the conductive support plate 140 may be located between the multilayer board structure 110 and the multilayer board structure 120, and located in region R1. The conductive support plate 140 provides good rigidity and anti-bending properties to region R1, and also helps dissipate heat from region R1.

[0033] In some embodiments, the conductive via structures 150, 160, and 170 may be made of copper, platinum, gold, similar conductive materials, or combinations thereof. The configuration of the conductive via structure 150 may be changed according to functional requirements. For example, in this embodiment, the conductive via structures 150, 160, and 170 are located in region R1 and extend from the upper surface of the multilayer board structure 110 (i.e., the surface 116A of the outer circuit layer 116) to the lower surface of the multilayer board structure 120 (i.e., the surface 127A of the outer circuit layer 127). The conductive via structure 160 is located in region R1 and extends from the lower surface of the multilayer board structure 120 (i.e., the surface 127A of the outer circuit layer 127) toward the core structure 130. The conductive via structure 170 is located in region R2 and extends from the upper surface of the multilayer board structure 110 (i.e., the surface 116A of the outer circuit layer 116) to the circuit layer 122 or 123 of the multilayer board structure 120, wherein the conductive via structure 170 is in contact with the conductive support plate 140.

[0034] In some embodiments, the protective layer 180 may employ epoxy resin, a similar solder resist ink coating, or a combination thereof. The configuration of the protective layer 180 may be varied according to functional requirements. For example, in this embodiment, the protective layer 180 may be disposed on the surface 116A of the outer circuit layer 116 of the multilayer board structure 110 and the surface 127A of the outer circuit layer 127 of the multilayer board structure 120, and cover the outer circuit layers 116 and 127.

[0035] In some embodiments, electronic component D1 may employ electronic components for artificial intelligence (AI), high-end servers, similar electronic components, or combinations thereof. The configuration of electronic component D1 can be changed according to functional requirements. For example, in this embodiment, electronic component D1 may be located on the upper surface of the multilayer board structure 110 (i.e., surface 116A of the outer circuit layer 116). Electronic component D1 can be electrically connected to the outer circuit layer 116 and the conductive via structure 170 via solder pads. Furthermore, the good rigidity and anti-bending properties provided by the conductive support plate 140 in region R1 allow electronic component D1 to be a large-area electronic component. For example, in this embodiment, the area of ​​electronic component D1 may be 80*80 to 100*100 mm.

[0036] In some embodiments, electronic component D2 may be an electronic component used for power design and applications, a similar electronic component, or a combination thereof. The configuration of electronic component D2 may be changed according to functional requirements. For example, in this embodiment, electronic component D2 may be located on the lower surface of the multilayer board structure 120 (i.e., surface 127A of the outer circuit layer 127). Electronic component D2 may be electrically connected to the outer circuit layer 127 and the conductive via structure 160 via solder pads.

[0037] In some embodiments, the circuit board structure 100 further includes one or more insulating layers 900. The insulating layer 900 is located between the outer circuit layer 117 and the conductive support plate 140, and between the outer circuit layer 126 and the conductive support plate 140. The insulating layer 900 separates the outer circuit layer 117 from the conductive support plate 140, and also separates the outer circuit layer 126 from the conductive support plate 140. This prevents short circuits between the conductive support plate 140 and the outer circuit layer 117 or the outer circuit layer 126. In some embodiments, the insulating layer 900, similar to insulating layers 114, 115, 124, and 125, can be formed by curing a prepreg (PP) film. For example, in this embodiment, the insulating layer 900 can be formed by curing an adhesive sheet obtained by impregnating insulating paper, fiberglass cloth, or other fibrous materials with resin.

[0038] The circuit board structure 100 may have an opening OP disposed between regions R1 and R2. The opening OP may serve as a component connection hole or a positioning hole for the circuit board structure 100. In some embodiments, the opening OP may separate regions R1 and R2 of the circuit board structure 100.

[0039] Figure 2 This is a flowchart of a method 200 for manufacturing a circuit board structure 100 according to a partial embodiment of the present invention. Figures 3A to 3H This is a cross-sectional view of a circuit board structure 100 according to an embodiment of the present invention at various stages of the manufacturing process. This description is merely illustrative and is not intended to further limit the scope of the following patent application. Method 200 includes steps S210 to S310. It should be understood that additional steps may be added before, during, and after steps S210 to S310, and for another part of the implementation of the method, some of the steps mentioned below may be replaced or omitted. The order of the steps may be changed.

[0040] First, refer to Figure 2 , Figure 3A , Figure 3B as well as Figure 3C Method 200 proceeds to step S210. Multilayer board structures 110 and 120 are formed. First, refer to... Figure 3A A metal layer can be electroplated on the surfaces 111A and 111B of the substrate 111, respectively. Then, the metal is subjected to laser or patterning processes to form circuit layers 112 and 113.

[0041] Receiver, reference Figure 3B A semi-cured adhesive layer 114' is placed between substrates 111, and a semi-cured adhesive layer 115' is placed between the outer circuit layer 116 and substrates 111, and between the outer circuit layer 117 and substrates 111. The outer circuit layer 116, multiple substrates 111, and outer circuit layer 117 are then laminated together using the semi-cured adhesive layers 115' and 114'. This lamination step includes curing the semi-cured adhesive layers 114' and 115'. The cured semi-cured adhesive layers 114' and 115' are referred to as insulating layers 114 and 115, respectively.

[0042] Receiver, reference Figure 3C The outer circuit layer 117 is subjected to laser or patterning processes to form a groove TH1 corresponding to the ground layer position and a groove TH2 corresponding to the non-plating through hole (NPTH), wherein the exposed portions of the grooves TH1 and TH2 are covered by an insulating layer 115. In this way, a multilayer board structure 110 can be formed.

[0043] In some embodiments, the multilayer board structure 120 may be fabricated simultaneously using the same steps as the multilayer board structure 110. In another embodiment, the multilayer board structure 120 may be fabricated separately using the same steps as the multilayer board structure 110. For example, recesses TH1 and TH2 are formed in the outer circuit layer 126, exposing portions of the insulating layer 125.

[0044] Reference Figure 2 as well as Figure 3D Method 200 proceeds to step S220. In region R1, between multilayer board structures 110 and 120, a conductive support plate 140' is provided. In some embodiments, before providing the conductive support plate 140' between the multilayer board structures 110 and 120, an opening process can be performed on the conductive support plate 140' according to the position corresponding to the groove TH1, forming an opening OP2, such as drilling or computer numerical control milling. An opening process can be performed on the conductive support plate 140' according to the position corresponding to the groove TH2, forming an opening OP3, such as drilling or computer numerical control milling. Then, insulating layers 800A and 800B are respectively filled into openings OP2 and OP3, wherein insulating layers 800A and 800B can be made of resin, and the width W1 of insulating layer 800A is greater than the width W2 of insulating layer 800B. Next, a conductive support plate 140' is placed between the multilayer board structure 110 and the multilayer board structure 120, and the positions of the insulating layers 800A and 800B correspond to the grooves TH1 and TH2.

[0045] Reference Figure 2 as well as Figure 3E Method 200 proceeds to step S230. An opening process is performed on the insulating layer 800B in the conductive support plate 140' and the multilayer board structures 110 and 120 to form openings OP4, OP5, and OP6 in the insulating layer 800B and the multilayer board structures 110 and 120, respectively. In some embodiments, the opening process can be performed on the insulating layer 800B in the conductive support plate 140', for example, by drilling or computer numerical control machining, to form opening OP4. For example, in some embodiments, the insulating layers 115 and 125 exposed by the groove TH2 can be opened, for example, by drilling or computer numerical control machining, to form openings OP5 and OP6, respectively.

[0046] Continue to refer to Figure 2 as well as Figure 3EMethod 200 proceeds to step S240. In region R2, a core structure 130' is provided between multilayer board structures 110 and 120. For example, in some embodiments, before providing the core structure 130' between multilayer board structures 110 and 120, an opening process can be performed on the core structure 130' according to the position corresponding to the groove TH1 to form a groove TH3. The width W3 of the groove TH3 is greater than the width W4 of the groove TH1. For example, in this embodiment, the width difference between width W3 and width W4 is 0.1 to 0.2 mm. Next, the core structure 130' is provided between multilayer board structures 110 and 120, and the groove TH3 corresponds to the groove TH1, wherein the core structure 130' is separated from the conductive support plate 140'.

[0047] Reference Figure 2 as well as Figure 3F Method 200 proceeds to step S250. The conductive support plate 140', multilayer board structure 110, and multilayer board structure 120 are fixed by the convex structure 600. For example, in this embodiment, the convex structure 600 can be a rivet, which can be made of the same material as the conductive support plate 140', such as copper. The convex structure 600 can be provided at the opening OP4 (see reference). Figure 3E In the process of bonding, a semi-cured adhesive layer 700 is then placed between the conductive support plate 140' and the multilayer board structure 110, and between the conductive support plate 140' and the multilayer board structure 120. The semi-cured adhesive layer 700 is also placed between the core structure 130' and the multilayer board structure 110, and between the core structure 130' and the multilayer board structure 120. Next, the conductive support plate 140', the core structure 130', the multilayer board structure 110, and the multilayer board structure 120 are pressed together using the semi-cured adhesive layer 700, allowing the convex structure 600 to be embedded in the openings OP5 and OP6. This pressing step includes curing the semi-cured adhesive layer 700 onto the insulating layers 800A and 800B. The cured semi-cured adhesive layer 700 and the insulating layers 800A and 800B are collectively referred to as the insulating layer 900 (see reference). Figure 3G ).

[0048] Reference Figure 2 as well as Figure 3G Method 200 proceeds to step S260. In the multilayer board structure 110, multilayer board structure 120, and conductive support plate 140' (refer to...), Figure 3F Openings OP7 and OP8 are formed in the conductive support plate 140' (see reference OP8). For example, in this embodiment, the conductive support plate 140' (see reference OP8) can be... Figure 3FThe core structure 130', multilayer board structure 110, and multilayer board structure 120 are opened using processes such as drilling or computer numerical control machining to form openings OP7 and OP8, respectively. Opening OP7 extends from the upper surface of multilayer board structure 110 (i.e., surface 116A of outer circuit layer 116) to the lower surface of multilayer board structure 120 (i.e., surface 127A of outer circuit layer 127), and penetrates the core structure 130'. Opening OP8 extends from the upper surface of multilayer board structure 110 (i.e., surface 116A of outer circuit layer 116) to the lower surface of multilayer board structure 120 (i.e., surface 127A of outer circuit layer 127), and penetrates the conductive support plate 140' (see reference). Figure 3F ) and insulation layer 800B (refer to Figure 3F ), to form a conductive support plate 140.

[0049] In some embodiments, step S260 further includes forming an opening OP. For example, in this embodiment, the conductive support plate 140', the core structure 130', the multilayer board structure 110, and the multilayer board structure 120 may be removed according to the rivet position, such as by drilling or computer numerical control machining, to remove the rivet and thereby form an opening OP, wherein the opening OP penetrates the conductive support plate 140' and the multilayer board structure 110 and the multilayer board structure 120.

[0050] Continue to refer to Figure 2 as well as Figure 3G Method 200 proceeds to step S270. Conductive via structures 150, 160', and 170' are formed in openings OP7 and OP8. For example, in this embodiment, a metal layer is electroplated on the inner wall of opening OP7 to form conductive via structure 150. A metal layer is electroplated on the inner wall of opening OP8 to form conductive via structures 160' and 170'. In some embodiments, one of the conductive via structures 170' can serve as a grounding wire and electrically connect to the conductive support plate 140' (see reference). Figure 3F The other of the conductive via structure 170' can serve as a signal line, and is connected to the conductive support plate 140' (see reference). Figure 3F Separated. After forming the conductive through-hole structure 170', the conductive support plate 140' (refer to...) Figure 3F It can be called conductive support plate 140.

[0051] Next, method 200 proceeds to step S280. The outer circuit layers 116 and 127 are patterned. For example, in this embodiment, the outer circuit layers 116 and 127 can be patterned by laser processing according to functional requirements.

[0052] Reference Figure 2 as well as Figure 3HMethod 200 proceeds to step S290. A protective layer 180 is formed on the outer circuit layers 116 and 127. For example, in this embodiment, processes such as silkscreen printing or inkjet printing can be used to form the protective layer 180 on the outer circuit layers 116 and 127 to achieve requirements such as moisture protection, insulation, solder resist, or high temperature resistance.

[0053] Continue to refer to Figure 2 as well as Figure 3H Method 200 proceeds to step S300. Back-drilling is performed on the conductive via structures 160' and 170'. For example, in this embodiment, drilling or computer numerical control (CNC) machining processes can be used to remove excess metal from the conductive via structures 160' and 170' to form openings VH1 and VH2 respectively, thereby forming the conductive via structures 160 and 170. This avoids signal reflection caused by excess metal, thereby increasing signal integrity.

[0054] Continue to refer to Figure 2 as well as Figure 3H Method 200 proceeds to step S310. Electronic component D1 is disposed on the multilayer board structure 110, and electronic component D2 is disposed on the protective layer 180 of the multilayer board structure 120. For example, in this embodiment, a process such as a ball grid array (BGA) can be used to dispose of electronic components D1 and D2, thereby connecting electronic components D1 and D2 to conductive via structures 160 and 170 in the multilayer board structures 110 and 120, respectively.

[0055] Furthermore, in some embodiments, additional steps may be added during and after steps S300 and S310. For example, in this embodiment, an electrical test or surface treatment process may be performed after step S310.

[0056] Figures 4A to 4E This is a cross-sectional view of a circuit board structure 100 according to an embodiment of the present invention at various stages of the manufacturing process. Figure 2 In method 200, Figures 4A to 4E The steps can continue from the above. Figure 3C After step (step S210). The embodiments of this implementation are similar to... Figures 3A to 3H Similar to each other, but differing in that, in this embodiment, the conductive support plate 140' is a one-piece structure. For example, the conductive support plate 140' has a plate body 142', and the convex structure of the conductive support plate 140' is a protrusion 144' on the plate body 142', the protrusion 144' being made of the same material as the plate body 142'.

[0057] ReferenceFigure 2 as well as Figure 4A In method 200, step S220 is performed where a conductive support plate 140' is disposed in region R1, between multilayer board structure 110 and multilayer board structure 120. In some embodiments, when the conductive support plate 140' is disposed between multilayer board structure 110 and multilayer board structure 120, the positions of opening OP3 and protrusion 144' correspond to grooves TH1 and TH2, respectively.

[0058] Reference Figure 2 as well as Figure 4B Method 200 proceeds to step S230. In this embodiment, the insulating layers 115 and 125 corresponding to the protrusions 144' of the conductive support plate 140' can be opened using a process such as drilling or computer numerical control machining to form openings OP5 and OP6 respectively. Here, the... Figure 3E The process of opening the insulating layer 800B in the conductive support plate 140'.

[0059] Continue to refer to Figure 2 as well as Figure 4B Method 200 proceeds to step S240. In region R2, between multilayer board structure 110 and multilayer board structure 120, a core structure 130' is provided.

[0060] Reference Figure 2 as well as Figure 4C Method 200 proceeds to step S250. The conductive support plate 140', multilayer board structure 110, and multilayer board structure 120 are fixed by the protrusions 144'. In this embodiment, a semi-cured adhesive layer 900' can be provided between the protrusions 144' of the conductive support plate 140'. The semi-cured adhesive layer 900' can be provided between the conductive support plate 140' and the multilayer board structure 110, and between the conductive support plate 140' and the multilayer board structure 120, and also between the core structure 130' and the multilayer board structure 110, and between the core structure 130' and the multilayer board structure 120. Subsequently, the conductive support plate 140', the core structure 130', the multilayer board structure 110, and the multilayer board structure 120 can be pressed together by the semi-cured adhesive layer 900', so that the protrusions 144' can be embedded into the openings OP5 and OP6. This bonding step involves curing the semi-cured adhesive layer 900' onto the insulating layers 800A and 800B. The cured semi-cured adhesive layer 900' is referred to as the insulating layer 900 (see reference). Figure 4D ).

[0061] Reference Figure 2 as well as Figure 4D Method 200 proceeds to step S260. In the multilayer board structure 110, multilayer board structure 120, and conductive support plate 140' (refer to...), Figure 4CIn step S260, openings OP7 and OP8 are formed. Step S260 also includes forming opening OP. In this embodiment, the protrusion 144' (refer to...) can be used... Figure 4C Position relative to conductive support plate 140' (refer to) Figure 4C The core structure 130', multilayer board structure 110, and multilayer board structure 120 are subjected to removal processes, such as drilling or computer numerical control machining, to remove the protrusion 144', thereby forming the opening OP. The opening OP penetrates the conductive support plate 140' (see reference). Figure 4C ) and multilayer board structures 110 and 120 to form regions R1 and R2, wherein opening OP exposes surface 140A of conductive support plate 140. Conductive support plate 140' (refer to Figure 4C The multilayer board structures 110 and 120 are subjected to an opening process, such as drilling or computer numerical control machining, to form openings OP8. The openings OP8 extend from the upper surface of the multilayer board structure 110 (i.e., surface 116A of the outer circuit layer 116) to the lower surface of the multilayer board structure 120 (i.e., surface 127A of the outer circuit layer 127), and penetrate the conductive support plate 140' (see reference). Figure 4C ) and insulation layer 900.

[0062] Continue to refer to Figure 2 as well as Figure 4D Method 200 proceeds to step S270. Conductive via structures 150, 160', and 170' are formed in openings OP7 and OP8. Next, method 200 proceeds to step S280. Outer circuit layers 116 and 127 are patterned.

[0063] Reference Figure 2 as well as Figure 4E Method 200 proceeds to step S290. A protective layer 180 is formed on the outer circuit layers 116 and 127. Method 200 proceeds to step S300. Back-drilling is performed on the conductive via structures 160' and 170'. (Continue to step S290) Figure 2 as well as Figure 3H Method 200 proceeds to step S310. Electronic components D1 and D2 are disposed on the multilayer board structure 110, and electronic component D2 is disposed on the protective layer 180 of the multilayer board structure 110. For example, in this embodiment, a process such as a ball grid array (BGA) can be used to dispose of electronic components D1 and D2, thereby connecting electronic components D1 and D2 to conductive via structures 160 and 170 in the multilayer board structures 110 and 120, respectively.

[0064] Some embodiments of the present invention provide a circuit board structure. This design allows a conductive support plate to be embedded within the circuit board structure via a convex structure. This conductive support plate can be paired with a corresponding ground plane, or it can be used as a ground plane without considering signal interference, thereby increasing design freedom. Furthermore, the conductive support plate also aids in heat dissipation for the circuit board structure. In summary, this circuit board structure, through the rigidity of the embedded conductive support plate, offers advantages such as good flatness, dimensional stability, and resistance to board warping. Moreover, during large-area BGA assembly, the flatness of the board and the dimensional stability during high-temperature assembly improve product assembly yield.

[0065] The foregoing summary outlines features of several embodiments, enabling those skilled in the art to better understand the various aspects of this application. Those skilled in the art will understand that they can readily use this application as a basis for designing or modifying other processes and structures to achieve the same purposes and / or advantages of the embodiments introduced herein. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of this application, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of this application.

[0066] [Symbol Explanation]

[0067] 100: Circuit board structure

[0068] 110, 120: Multi-layer board structure

[0069] 111, 121: Substrate

[0070] 112, 113, 122, 123: Line layer

[0071] 116, 117, 126, 127: External circuit layer

[0072] 114, 115, 124, 125, 800A, 800B, 900: Insulation layer

[0073] 114', 115', 700, 900': Semi-cured adhesive layer

[0074] 130, 130': Mold core structure

[0075] 132, 132': Core board

[0076] 134, 134': Metal layer

[0077] 140, 140': Conductive support plate

[0078] 142':Board

[0079] 144': Bump

[0080] 111A, 111B, 116A, 121A, 121B, 127A, 132A, 132B, 140A: Surface

[0081] 150, 160, 160', 170, 170': Conductive via structure

[0082] 180: Protective layer

[0083] 600: Convex structure

[0084] 200: Method

[0085] S210, S220, S230, S240, S250, S260, S270, S280, S290, S300, S310: Steps

[0086] D1, D2: Electronic components

[0087] VH1, VH2: Openings

[0088] R1, R2: Regions

[0089] TH1, TH2, TH3: Grooves

[0090] W1, W2, W3, W4: Width

[0091] OP, OP2, OP3, OP4, OP5, OP6, OP7, OP8: Openings.

Claims

1. A circuit board structure having a first region and a second region adjacent to the first region, characterized in that, include: A first multilayer board structure includes a plurality of first circuit layers and a plurality of first insulating layers, wherein the plurality of first insulating layers separate the plurality of first circuit layers; The second multilayer board structure includes multiple second circuit layers and multiple second insulating layers, wherein the multiple second insulating layers separate the multiple second circuit layers. A conductive support plate is located between the first multilayer plate structure and the second multilayer plate structure, and is located in the first region; A core structure is located between the first multilayer board structure and the second multilayer board structure, and is located in the second region, wherein the core structure includes a core plate and a plurality of metal layers located on the core plate; A first conductive via structure is located in the first region and extends from the upper surface of the first multilayer board structure to one of the plurality of second circuit layers of the second multilayer board structure. as well as A second conductive via structure is located in the second region and extends from the lower surface of the second multilayer plate structure toward the core structure.

2. The circuit board structure according to claim 1, characterized in that, The first multilayer board structure further includes a plurality of substrates, wherein one of the plurality of first circuit layers is disposed on the surface of the plurality of substrates.

3. The circuit board structure according to claim 1, characterized in that, Also includes: The first electronic component is located on the upper surface of the first multilayer board structure and is electrically connected to the first conductive via structure.

4. The circuit board structure according to claim 1, characterized in that, Also includes: The second electronic component is located on the lower surface of the second multilayer board structure and is electrically connected to the second conductive via structure.

5. The circuit board structure according to claim 1, characterized in that, The first conductive through-hole structure is in contact with the conductive support plate.

6. A method for manufacturing a circuit board structure, characterized in that, The circuit board structure has a first region and a second region adjacent to the first region, and the method includes: A first multilayer board structure is formed, wherein the first multilayer board structure includes a plurality of first circuit layers and a plurality of first insulating layers, wherein the plurality of first insulating layers separate the plurality of first circuit layers. A second multilayer board structure is formed, wherein the second multilayer board structure includes a plurality of second circuit layers and a plurality of second insulating layers, wherein the plurality of second insulating layers separate the plurality of second circuit layers. A conductive support plate is disposed between the first multilayer board structure and the second multilayer board structure, wherein the conductive support plate has a convex structure. A core structure is disposed between the first multilayer plate structure and the second multilayer plate structure; Multiple first through holes are formed in the first multilayer board structure, the second multilayer board structure, and the conductive support plate in the first region; A plurality of second through holes are formed in the first multilayer plate structure, the second multilayer plate structure, and the core structure in the second region; and A first conductive layer and a second conductive layer are formed in the plurality of first through holes and the plurality of second through holes, respectively.

7. The method according to claim 6, characterized in that, Also includes: Remove a portion of the first conductive layer from the plurality of first vias; as well as Remove a portion of the second conductive layer from the plurality of second vias.

8. The method according to claim 6, characterized in that, Also includes: Before forming multiple conductive layers, the convex structure of the conductive support plate is removed.

9. The method according to claim 6, characterized in that, The conductive support plate has an opening, and the convex structure is a rivet located in the opening.

10. The method according to claim 6, characterized in that, The conductive support plate has a plate body, and the convex structure of the conductive support plate is a protrusion on the plate body, and the protrusion is made of the same material as the plate body.

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