Thin film transistor with hydrogen control layer and display device including the same

Abstract

The present disclosure provides a thin film transistor including: an active layer; a gate electrode spaced apart from the active layer; and a gate insulating film between the active layer and the gate electrode, wherein the gate insulating film includes: an insulating layer; a hydrogen control layer on the insulating layer; and a hydrogen supply layer on the hydrogen control layer, in which the hydrogen supply layer has a higher hydrogen concentration than the insulating layer, and in which a portion of the active layer overlaps the hydrogen control layer in a region where the gate electrode and the active layer overlap in plan view, and another portion of the active layer does not overlap the hydrogen control layer. In addition, the invention also provides a display device comprising the thin film transistor.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0131398, filed on September 27, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a thin-film transistor having a hydrogen control layer and a display device including the thin-film transistor. Background Technology

[0004] Because thin-film transistors can be fabricated on glass or plastic substrates, they are widely used as switching or driving elements in display devices such as liquid crystal displays or organic light-emitting devices.

[0005] Thin-film transistors can be classified according to the material of the active layer: amorphous silicon thin-film transistors using amorphous silicon as the active layer, polycrystalline silicon thin-film transistors using polycrystalline silicon as the active layer, and oxide semiconductor thin-film transistors using oxide semiconductors as the active layer.

[0006] Among them, oxide semiconductor thin-film transistors (TFTs), which have high mobility and large resistance variations depending on oxygen content, have the advantage of being able to easily achieve the desired characteristics. Since the oxide constituting the active layer can be formed at relatively low temperatures during the fabrication of TFTs, the manufacturing cost is low. Furthermore, because oxide semiconductors are transparent due to the nature of oxides, they are also advantageous for realizing transparent displays.

[0007] However, when an oxide semiconductor thin-film transistor (OSBMT) is driven, a strong electric field is applied to the drain portion. Because of this strong electric field, carriers with higher kinetic energy may be collected or concentrated in the drain portion. Therefore, with prolonged use of the OSBMT, heat may be generated in the drain portion, potentially damaging it. For example, in the drain portion subjected to a strong electric field, carriers with higher kinetic energy, i.e., hot carriers, may damage the drain portion.

[0008] If charge carriers with high kinetic energy are collected or concentrated in the drain portion, the drain portion of the oxide semiconductor may be damaged, thus causing defects in thin-film transistors.

[0009] Therefore, in order to prevent damage and defects in oxide semiconductor thin film transistors, it is necessary to mitigate the phenomenon of strong electric fields being applied to the drain portion. Summary of the Invention

[0010] One embodiment of the present disclosure is to provide a technique for selectively supplying hydrogen to an active layer using a hydrogen control layer.

[0011] One embodiment of the present disclosure is to provide a technique for preventing damage to an active layer and preventing damage or malfunction of an oxide semiconductor thin film transistor by reducing an electric field applied to a drain portion.

[0012] One embodiment of the present disclosure is to provide a thin film transistor in which an electric field concentration is prevented or eliminated at a drain connection side of an active layer.

[0013] One embodiment of the present disclosure is to provide a thin film transistor including a gate insulating film having a hydrogen supply layer and a hydrogen control layer.

[0014] One embodiment of the present disclosure provides a technique for increasing a carrier concentration at a drain connection side of an active layer by supplying hydrogen to the drain connection side of the active layer using a hydrogen supply layer and a hydrogen control layer. One embodiment of the present disclosure provides a thin film transistor in which a carrier concentration of a drain connection side of an active layer is increased, thereby preventing or eliminating an electric field concentration at the drain connection side.

[0015] Another embodiment of the present disclosure is to provide a display device including the thin film transistor.

[0016] To achieve the above technical object, one embodiment of the present disclosure provides a thin film transistor including: an active layer; a gate electrode spaced apart from the active layer; and a gate insulating film between the active layer and the gate electrode, wherein the gate insulating film includes: an insulating layer; a hydrogen control layer on the insulating layer; and a hydrogen supply layer on the hydrogen control layer, wherein the hydrogen supply layer has a higher hydrogen concentration than the insulating layer, and wherein in a region in which the gate electrode and the active layer overlap in a plan view, a portion of the active layer overlaps the hydrogen control layer, and another portion of the active layer does not overlap the hydrogen control layer.

[0017] The active layer can include: a channel portion overlapping the gate electrode; a source connection portion connected to one side of the channel portion; and a drain connection portion connected to the other side of the channel portion, wherein a portion of the channel portion adjacent to the source connection portion overlaps the hydrogen control layer, and a portion of the channel portion adjacent to the drain connection portion does not overlap the hydrogen control layer.

[0018] The hydrogen control layer can not overlap a boundary between the channel portion and the drain connection portion in a plan view.

[0019] The channel portion can include: an effective channel portion overlapping the hydrogen control layer; and an offset portion not overlapping the hydrogen control layer.

[0020] The offset portion can have a higher carrier concentration than the effective channel portion.

[0021] The carrier concentration of the offset portion can increase in a direction from the effective channel portion toward the drain connection portion.

[0022] The hydrogen control layer includes a metal oxide, and the metal oxide can include an oxide of at least one of aluminum (Al), tungsten (W), titanium (Ti), chromium (Cr), vanadium (V), manganese (Mn), tantalum (Ta), hafnium (Hf), zirconium (Zr), nickel (Ni), molybdenum (Mo), and beryllium (Be).

[0023] The hydrogen supply layer can have a higher hydrogen concentration than the insulating layer.

[0024] The insulating layer can include at least one of silicon oxide (SiOx), aluminum oxide (AlOx), tantalum oxide (TaO), hafnium oxide (HfOx), and zirconium oxide (ZrOx), and the hydrogen supply layer includes silicon nitride (SiNx).

[0025] The hydrogen control layer can have a thickness of 5 nm to 10 nm.

[0026] A gradient of the carrier concentration at a boundary portion between the channel portion and the drain connection portion is less than a gradient of the carrier concentration at a boundary portion between the channel portion and the source connection portion.

[0027] The thin film transistor further includes: a source electrode and a drain electrode spaced apart from each other and respectively in direct contact with the active layer, the active layer including: a source contact portion in direct contact with the source electrode; a drain contact portion in direct contact with the drain electrode; and a channel portion between the source contact portion and the drain contact portion, wherein a portion of the channel portion adjacent to the source contact portion can overlap the hydrogen control layer, and a portion of the channel portion adjacent to the drain contact portion can not overlap the hydrogen control layer.

[0028] The channel portion can include: an effective channel portion overlapping the hydrogen control layer; and an offset portion not overlapping the hydrogen control layer.

[0029] The offset portion can have a higher carrier concentration than the effective channel portion.

[0030] The active layer can include a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer.

[0031] Another embodiment of the present disclosure provides a display device including the thin film transistor described above. BRIEF DESCRIPTION OF DRAWINGS

[0032] The above and other objects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0033] Figure 1 is a plan view of a thin film transistor according to one embodiment of the present disclosure.

[0034] Figure 2 is a cross-sectional view taken along line I-I' of Figure 1 .

[0035] Figure 3 is a schematic view illustrating hydrogen supply and hydrogen block of a hydrogen supply layer and a hydrogen control layer.

[0036] Figure 4 is a graph illustrating a carrier concentration distribution in an active layer.

[0037] Figure 5 is a cross-sectional view of a thin film transistor according to another embodiment of the present disclosure.

[0038] Figure 6A , Figure 6B and Figure 6C are cross-sectional views of a thin film transistor according to another embodiment of the present disclosure.

[0039] Figure 7 is a cross-sectional view of a thin film transistor according to another embodiment of the present disclosure.

[0040] Figure 8 is a cross-sectional view of a thin film transistor according to another embodiment of the present disclosure.

[0041] Figure 9 is a cross-sectional view of a thin film transistor according to another embodiment of the present disclosure.

[0042] Figure 10 is a cross-sectional view of a thin film transistor according to another embodiment of the present disclosure.

[0043] Figure 11 is a schematic view of a display device according to another embodiment of the present disclosure.

[0044] Figure 12 is a circuit diagram of one pixel of Figure 11 .

[0045] Figure 13 yes Figure 12 A planar image of pixels.

[0046] Figure 14 It is along Figure 13 The cross-sectional view taken from line II-II'. Detailed Implementation

[0047] The advantages, features, and implementation methods of this disclosure will be described in detail below with reference to the embodiments and appendices. Figure 1 This makes things clearer. However, this disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. These embodiments are provided to make the contents of this disclosure complete and to enable those skilled in the art to readily understand the invention.

[0048] The shapes, dimensions, ratios, angles, quantities, etc., disclosed in the accompanying drawings to illustrate embodiments of this disclosure are merely examples, and this disclosure is not limited to the matters shown in the drawings. Throughout the specification, the same reference numerals may refer to the same components. Furthermore, in interpreting this disclosure, detailed descriptions of relevant known technologies will be omitted if it is determined that such detailed descriptions would unnecessarily obscure the main points of this disclosure.

[0049] In this application, when words such as "comprising," "having," or "consisting of" are used, other parts may be added unless an expression such as "only" is used. When a component is referred to in the singular, it may include multiple components unless explicitly stated otherwise.

[0050] When interpreting components, even if there is no separate explicit description, it should be interpreted as including the error range.

[0051] For example, when the positional relationship between two parts is described as “on top of,” “above,” “below,” “next to,” etc., one or more other parts can be placed between the two parts, unless expressions such as “only” or “directly” are used.

[0052] The spatial relative terms “below,” “under,” “lower,” “above,” “upper,” etc., shown in the accompanying drawings can be used to readily describe the relationship between one element or component and another. These spatial relative terms should be understood to include different positions of the elements during use or operation, in addition to those depicted in the drawings. For example, if the elements shown in the drawings are inverted, then an element described as “below” or “under” another element could ultimately be placed “above” that element. Therefore, the exemplary term “below” can include both vertical and horizontal directions. Similarly, the exemplary terms “above” or “on” can include both vertical and horizontal directions.

[0053] When describing a temporal relationship, for example, when describing a temporal relationship such as "after," "subsequently," "next," "before," and the like, discontinuity can also be included as long as expressions such as "immediately" or "directly" are not used.

[0054] Although various components are described using the terms first, second, and the like, the components are not limited by these terms. The terms are used only to distinguish one component from another component. Thus, the first component mentioned below can also be the second component within the technical idea of the disclosure.

[0055] At least one term should be understood to include all combinations that can be presented from one or more associated items. For example, the meaning of "at least one of the first, second, and third items" can not only indicate each of the first, second, or third items, but also indicate all combinations of items that can be presented from two or more of the first, second, and third items.

[0056] Various features of the embodiments of the disclosure can be partially or wholly combined or integrated with each other, and can be technically interconnected and driven in various ways, and each embodiment can be realized independently of the other embodiments or can be realized together in a related relationship.

[0057] When adding reference numerals to components of each drawing describing the embodiments of the disclosure, the same components can have the same reference numerals as much as possible even if they are illustrated in different drawings.

[0058] In the embodiments of the disclosure, the source electrode and the drain electrode are distinguished only for convenience of explanation, and the source electrode and the drain electrode can be interchanged. In addition, the source electrode of one embodiment can become the drain electrode in another embodiment, and the drain electrode of one embodiment can become the source electrode in another embodiment.

[0059] In some embodiments of the disclosure, the source connection part and the source electrode are distinguished for convenience of explanation, and the drain connection part and the drain electrode are distinguished, but the embodiments of the disclosure are not limited thereto. The source connection part can be the source electrode, and the drain connection part can be the drain electrode. In addition, the source connection part can be the drain electrode, and the drain connection part can be the source electrode.

[0060] Figure 1 is a plan view of a thin film transistor 100 according to one embodiment of the disclosure, Figure 2 is a cross-sectional view taken along the line I-I' of Figure 1

[0061] Referring to Figure 1 and Figure 2 ​The thin film transistor 100 according to one embodiment of the present disclosure includes an active layer 130, a gate electrode 150, and a gate insulating film 140. The gate electrode 150 is spaced apart from the active layer 130. The gate insulating film 140 is provided between the active layer 130 and the gate electrode 150. The gate insulating film 140 includes an insulating layer 141, a hydrogen control layer 142, and a hydrogen supply layer 143.

[0062] According to one embodiment of the present disclosure, in a region where the gate electrode 150 and the active layer 130 overlap in a plan view, a part of the active layer 130 overlaps with the hydrogen control layer 142, and another part of the active layer 130 does not overlap with the hydrogen control layer 142.

[0063] Referring to Figure 2 The thin film transistor 100 can be provided over a substrate 110.

[0064] The substrate 110 supports components of the thin film transistor 100. Anything that supports the thin film transistor 100 can be referred to as the substrate 110 without limitation.

[0065] A glass substrate or a polymer resin substrate can be used as the substrate 110. As the polymer resin substrate, there is a plastic substrate. The plastic substrate can include at least one of polyimide (PI), polycarbonate (PC), polyethylene (PE), polyester, polyethylene terephthalate (PET), and polystyrene (PS) having a flexible property. When plastic is used as the substrate 110, a heat-resistant plastic that can withstand high temperature can be used in consideration of performing a high-temperature deposition process on the substrate 110.

[0066] The active layer 130 is provided over the substrate 110. According to one embodiment of the present disclosure, a buffer layer can be provided over the substrate 110, and the active layer 130 can be provided over the buffer layer.

[0067] According to one embodiment of the present disclosure, the active layer 130 includes an oxide semiconductor material. According to one embodiment of the present disclosure, the active layer 130 is, for example, an oxide semiconductor layer made of an oxide semiconductor material.

[0068] The active layer 130 can include at least one oxide semiconductor material selected from, for example, an IGZO (InGaZnO)-based oxide semiconductor material, an IGO (InGaO)-based oxide semiconductor material, an IGZTO (InGaZnSnO)-based oxide semiconductor material, a GZTO (GaZnSnO)-based oxide semiconductor material, a GZO (GaZnO)-based oxide semiconductor material, a GO (GaO)-based oxide semiconductor material, a TO (SnO)-based oxide semiconductor material, an ITO (InSnO)-based oxide semiconductor material, an ITZO (InSnZnO)-based oxide semiconductor material, an IZO (InZnO)-based oxide semiconductor material, a ZO (ZnO)-based, an IO (InO)-based oxide semiconductor material, and a FIZO (FeInZnO)-based oxide semiconductor material.

[0069] The active layer 130 can have a single-layer structure or can have a multi-layer structure including two or more oxide semiconductor layers.

[0070] According to one embodiment of the present disclosure, the active layer 130 can include a channel portion 130n, a source connection portion 130a, and a drain connection portion 130b.

[0071] The channel portion 130n overlaps with the gate electrode 150. The channel portion 130n has a semiconductor property. Depending on a voltage applied to the gate electrode 150, the channel portion 130n can have an electric property similar to a conductor or an electric property similar to an insulator.

[0072] The source connection portion 130a is connected to one side of the channel portion 130n, and the drain connection portion 130b is connected to the other side of the channel portion 130n. The source connection portion 130a and the drain connection portion 130b are spaced apart from each other with the channel portion 130n therebetween.

[0073] According to one embodiment of the present disclosure, the source connection portion 130a and the drain connection portion 130b do not overlap with the gate electrode 150. The source connection portion 130a and the drain connection portion 130b can also be referred to as conductorized portions.

[0074] The source connection portion 130a and the drain connection portion 130b can be formed by selective conductorization of the active layer 130. For example, the oxide semiconductor material constituting the active layer 130 can be selectively conductorized to form the source connection portion 130a and the drain connection portion 130b. According to one embodiment of the present disclosure, the selective conductorization can also be referred to as metallization.

[0075] According to one embodiment of the present disclosure, the selective conductive treatment refers to improving the conductivity of or imparting conductivity to selected portions of the active layer 130. The portions of the active layer 130 that are selectively conductively treated have excellent conductivity and can be used as wiring portions.

[0076] For example, the selective conductive treatment can be achieved by doping selected regions of the active layer 130 with a dopant. In this case, the source connection portion 130a and the drain connection portion 130b can include the dopant.

[0077] Specifically, the doping can be achieved by ion implantation. The dopant ions can be doped into selected regions of the active layer 130 by ion implantation. The dopant can include, for example, at least one of boron (B), phosphorus (P), fluorine (F), and hydrogen (H).

[0078] Further, according to one embodiment of the present disclosure, selected portions of the active layer 130 can be conductively treated by plasma treatment, and thus the source connection portion 130a and the drain connection portion 130b can be formed. For example, the selective conductive treatment can be achieved by plasma treatment in a patterning process of the gate insulating film 140 or the gate electrode 150, and thus the source connection portion 130a and the drain connection portion 130b can be formed.

[0079] According to one embodiment of the present disclosure, portions of the active layer 130 exposed from the gate insulating film 140 can be subjected to plasma treatment, and thus the source connection portion 130a and the drain connection portion 130b can be formed.

[0080] According to one embodiment of the present disclosure, the source connection portion 130a and the drain connection portion 130b can each have electrical characteristics similar to those of a metal.

[0081] The gate insulating film 140 is provided over the active layer 130.

[0082] Referring to Figure 2 The gate insulating film 140 can have a patterned structure.

[0083] For example, the gate insulating film 140 can be patterned in the same shape as the gate electrode 150. The selective conductive treatment can be achieved in a patterning process of the gate insulating film 140 and the gate electrode 150, and thus the source connection portion 130a and the drain connection portion 130b can be formed. For example, the selective conductive treatment can be achieved in a plasma treatment process during a patterning process of the gate insulating film 140 and the gate electrode 150, and thus the source connection portion 130a and the drain connection portion 130b can be formed.

[0084] The gate insulating film 140 includes an insulating layer 141, a hydrogen control layer 142, and a hydrogen supply layer 143. According to one embodiment of the present disclosure, in the gate insulating film 140, the hydrogen control layer 142 can be located between the insulating layer 141 and the hydrogen supply layer 143.

[0085] Referring to Figure 2 The insulating layer 141 is provided on the active layer 130 in the laminated structure of the gate insulating film 140 illustrated in FIG. 1. The insulating layer 141 has excellent insulating properties and protects the channel portion 130n of the active layer 130. In addition, the insulating layer 141 has a low hydrogen concentration. For example, the insulating layer 141 can have a lower hydrogen concentration than the hydrogen supply layer 143.

[0086] As the insulating layer 141, for example, at least one of silicon oxide (SiOx), aluminum oxide (AlOx), tantalum oxide (TaOx), hafnium oxide (HfOx), and zirconium oxide (ZrOx) can be used. Among them, silicon oxide (SiOx) has excellent insulating properties and can be made to have a low hydrogen concentration, and thus can be effectively used as the insulating layer 141. However, embodiments of the present disclosure are not limited to the above examples, and other known insulating materials can be applied to the insulating layer 141. In detail, in order to have excellent insulating properties, an oxide of a metal having a relatively large energy band gap can be used as a material of the insulating layer 141.

[0087] The hydrogen control layer 142 is provided on the insulating layer 141.

[0088] The hydrogen control layer 142 can block hydrogen (H). The hydrogen control layer 142 can be made of a hydrogen blocking material or a hydrogen absorbing material. For example, the hydrogen control layer 142 can include a metal oxide. The metal oxide included in the hydrogen control layer 142 can include an oxide of at least one of aluminum (Al), tungsten (W), titanium (Ti), chromium (Cr), vanadium (V), manganese (Mn), tantalum (Ta), hafnium (Hf), zirconium (Zr), nickel (Ni), molybdenum (Mo), and beryllium (Be).

[0089] The hydrogen control layer 142 can cover a portion of the active layer 130. Referring to Figure 1 and Figure 2 In the area in which the gate electrode 150 and the active layer 130 overlap in the plan view, a portion of the active layer 130 overlaps the hydrogen control layer 142, and another portion of the active layer 130 does not overlap the hydrogen control layer 142. The detailed configuration of the hydrogen control layer 142 will be described later.

[0090] The hydrogen supply layer 143 is provided on the hydrogen control layer 142.

[0091] The hydrogen supply layer 143 has a higher hydrogen concentration than the insulating layer 141. The hydrogen supply layer 143 selectively supplies hydrogen to the active layer 130. In detail, the hydrogen supply layer 143 supplies hydrogen to a region of the active layer 130 that does not overlap the hydrogen control layer 142.

[0092] The hydrogen supply layer 143 can be made of a material containing a large amount of hydrogen. In detail, the hydrogen supply layer 143 can be made of an insulating material containing a large amount of hydrogen.

[0093] According to one embodiment of the present disclosure, the hydrogen supply layer 143 can include silicon nitride (SiNx). However, one embodiment of the present disclosure is not limited thereto, and other insulating materials rich in hydrogen content can be applied to the hydrogen supply layer 143.

[0094] According to one embodiment of the present disclosure, the hydrogen supply layer 143 is disposed between the hydrogen control layer 142 and the gate electrode 150. In addition, the insulating layer 141 is disposed between the active layer 130 and the hydrogen control layer 142.

[0095] The gate electrode 150 is disposed on the gate insulating film 140. The gate electrode 150 is spaced apart from the active layer 130 and overlaps at least a portion of the active layer 130. The gate electrode 150 overlaps the channel portion 130n of the active layer 130.

[0096] In addition, a portion of the gate electrode 150 overlaps the hydrogen control layer 142.

[0097] The gate electrode 150 can include at least one of an aluminum-based metal such as aluminum (Al) or an aluminum alloy, a silver-based metal such as silver (Ag) or a silver alloy, a copper-based metal such as copper (Cu) or a copper alloy, a molybdenum-based metal such as molybdenum (Mo) or a molybdenum alloy, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti). The gate electrode 150 can also have a multi-layer film structure including at least two conductive films having different physical properties.

[0098] The interlayer insulating layer 170 can be disposed on the gate electrode 150. The interlayer insulating layer 170 is an insulating layer made of an insulating material. In detail, the interlayer insulating layer 170 can be made of an organic material, an inorganic material, or a stack of an organic material layer and an inorganic material layer.

[0099] The source electrode 161 and the drain electrode 162 are disposed on the interlayer insulating layer 170. The source electrode 161 and the drain electrode 162 are spaced apart from each other and connected to the active layer 130, respectively. The source electrode 161 and the drain electrode 162 can be connected to the active layer 130, respectively, through contact holes that penetrate the interlayer insulating layer 170.

[0100] Each of the source electrode 161 and the drain electrode 162 can include at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and an alloy thereof. Each of the source electrode 161 and the drain electrode 162 can be formed of a single layer of a metal or a metal alloy, or can be formed of a multi-layer structure having two or more layers.

[0101] Hereinafter, the hydrogen control layer 142 is described in more detail.

[0102] According to one embodiment of the present disclosure, the hydrogen control layer 142 can block hydrogen (H) by blocking the flow of hydrogen (H) or by absorbing hydrogen (H).

[0103] According to one embodiment of the present disclosure, the hydrogen control layer 142 can have excellent chemical stability. The hydrogen control layer 142 can block or capture hydrogen (H).

[0104] According to one embodiment of the present disclosure, the hydrogen control layer 142 can include a metal oxide. Accordingly, the hydrogen control layer 142 includes metal atoms and oxygen atoms. According to one embodiment of the present disclosure, the hydrogen control layer 142 can be in a stoichiometrically stable oxide state.

[0105] The hydrogen control layer 142 can include at least one of aluminum (Al), tungsten (W), titanium (Ti), chromium (Cr), vanadium (V), manganese (Mn), tantalum (Ta), hafnium (Hf), zirconium (Zr), nickel (Ni), molybdenum (Mo), and beryllium (Be) as a metal. According to one embodiment of the present disclosure, the hydrogen control layer 142 can include at least one of an aluminum (Al)-based oxide, a tungsten (W)-based oxide, a titanium (Ti)-based oxide, a chromium (Cr)-based oxide, a vanadium (V)-based oxide, a manganese (Mn)-based oxide, a tantalum (Ta)-based oxide, a hafnium (Hf)-based oxide, a zirconium (Zr)-based oxide, a nickel (Ni)-based oxide, a molybdenum (Mo)-based oxide, and a beryllium (Be)-based oxide.

[0106] The hydrogen control layer 142 can have insulating properties and can maintain a stable bond with the insulating layer 141 and the hydrogen supply layer 143. The thickness of the hydrogen control layer 142 can be less than the thickness of the insulating layer 141 or the thickness of the hydrogen supply layer 143.

[0107] According to one embodiment of the present disclosure, the hydrogen control layer 142 can have a thickness of 5 nm to 10 nm. If the thickness of the hydrogen control layer 142 is less than 5 nm, the hydrogen control layer 142 can not be sufficient to block hydrogen. In addition, if the thickness of the hydrogen control layer 142 is designed to be less than 5 nm, the hydrogen control layer 142 can be easily damaged and can have deteriorated mechanical stability.

[0108] Specifically, when the thickness of the hydrogen control layer 142 is less than 5 nm, the hydrogen control layer 142 can not be sufficient to protect the active layer 130 due to the thin thickness. In addition, when the thickness of the hydrogen control layer 142 is designed to be less than 5 nm, the hydrogen control layer 142 can be easily damaged due to the thin thickness, and the mechanical stability can also be deteriorated. Thus, according to one embodiment of the present disclosure, the thickness of the hydrogen control layer 142 can be designed to be 5 nm or more.

[0109] On the other hand, if the thickness of the hydrogen control layer 142 exceeds 10 nm, the thickness of the gate insulating film 140 can become unnecessarily thicker. Thus, according to one embodiment of the present disclosure, the thickness of the hydrogen control layer 142 can be designed to be 10 nm or less.

[0110] Specifically, according to one embodiment of the present disclosure, the hydrogen control layer 142 can have a thickness of 5 nm to 7 nm.

[0111] According to one embodiment of the present disclosure, the hydrogen control layer 142 is designed to cover a portion of the channel portion 130n without covering another portion of the channel portion 130n in a plan view.

[0112] Referring to Figure 1 , the hydrogen control layer 142 is provided on a portion of the active layer 130. In detail, the hydrogen control layer 142 is provided on a portion of the channel portion 130n.

[0113] Referring to Figure 1 and Figure 2 , the hydrogen control layer 142 is provided on a portion of the channel portion 130n located on the source connection portion 130a side (which can be referred to as an effective channel portion CN1). The hydrogen control layer 142 can be provided to overlap at least half of the area of the channel portion 130n.

[0114] The hydrogen control layer 142 overlaps a portion of the channel portion 130n located on the source connection portion 130a side and does not overlap a portion of the channel portion 130n located on the drain connection portion 130b side (which can be referred to as an offset portion CN2).

[0115] According to one embodiment of the present disclosure, a portion of the channel portion 130n toward the source connection portion 130a overlaps the hydrogen control layer 142, and a portion of the channel portion 130n toward the drain connection portion 130b does not overlap the hydrogen control layer 142.

[0116] Referring to Figure 1 and Figure 2The hydrogen control layer 142 can have a shape provided to extend from a boundary between the channel portion 130n and the source connection portion 130a toward the drain connection portion 130b, with reference to a plan view. For example, the hydrogen control layer 142 can be provided in an upper portion of a region extending from the boundary between the channel portion 130n and the source connection portion 130a toward the drain connection portion 130b.

[0117] Further, the hydrogen control layer 142 does not overlap the boundary between the channel portion 130n and the drain connection portion 130b in a plan view.

[0118] Referring to Figure 2 , the channel portion 130n can include an effective channel portion CN1 overlapping the hydrogen control layer 142 and an offset portion CN2 not overlapping the hydrogen control layer 142. One side of the effective channel portion CN1 can be in contact with the source connection portion 130a, and the other side of the effective channel portion CN1 can be in contact with the offset portion CN2. One side of the offset portion CN2 can be in contact with the effective channel portion CN1, and the other side of the offset portion CN2 can be in contact with the drain connection portion 130b.

[0119] Figure 3 is a schematic view illustrating hydrogen supply and hydrogen blocking of the hydrogen supply layer 143 and the hydrogen control layer 142.

[0120] Referring to Figure 3 , hydrogen in the hydrogen supply layer 143 can move to the channel portion 130n through a region of the gate insulating film 140 in which the hydrogen control layer 142 is not provided.

[0121] Since the offset portion CN2 does not overlap the hydrogen control layer 142, it is not protected by the hydrogen control layer 142. Thus, hydrogen in the hydrogen supply layer 143 can diffuse into the offset portion CN2. Accordingly, the offset portion CN2 can have a higher hydrogen concentration than the effective channel portion CN1.

[0122] Hydrogen (H) supplied to the offset portion CN2 can bond with elements of the active layer 130, and can exist in various bonding forms in the active layer 130. For example, hydrogen (H) supplied to the offset portion CN2 can bond with the metal M (MH), or can bond with elements at a site of an oxygen vacancy Vo (e.g., "Vo" + "O-H", etc.). As a result, a shallow donor state can increase, whereby a free electron is formed, and thus a carrier concentration in the offset portion CN2 can increase.

[0123] According to one embodiment of the present disclosure, the offset portion CN2 can have a higher carrier concentration than the effective channel portion CN1.

[0124] In addition, the portion of the channel portion 130n that is in contact with the drain connection portion 130b is not protected by the hydrogen control layer 142, and is also not sufficiently protected by the gate electrode 150. Thus, the portion of the channel portion 130n that is in contact with the drain connection portion 130b is affected by external factors, and can be affected by a conductive process. Due to such an effect, the portion of the channel portion 130n that is in contact with the drain connection portion 130b can have a relatively high carrier concentration.

[0125] Thus, according to one embodiment of the present disclosure, the carrier concentration of the offset portion CN2 can increase along a direction from the effective channel portion CN1 toward the drain connection portion 130b.

[0126] Figure 4 is a graph that illustrates a carrier concentration distribution of the active layer 130.

[0127] Since the offset portion CN2 does not overlap with the hydrogen control layer 142, hydrogen from the hydrogen supply layer 143 can be supplied to the offset portion CN2. The hydrogen (H) supplied to the offset portion CN2 can form a bond with the metal M or with an element at the site of the oxygen vacancy Vo, thereby increasing a shallow donor state. As a result, a free electron can be formed, and the carrier concentration of the offset portion CN2 can increase.

[0128] In addition, the portion of the offset portion CN2 that is in contact with the drain connection portion 130b is not protected by the hydrogen control layer 142, and is also not sufficiently protected by the gate electrode 150. Thus, the portion of the offset portion CN2 that is in contact with the drain connection portion 130b can be indirectly affected by a conductive process. Due to such an effect, the portion of the offset portion CN2 that is in contact with the drain connection portion 130b can have a relatively high carrier concentration. Thus, the offset portion CN2 can have a gradient of the carrier concentration that gradually increases along a direction from a boundary between the effective channel portion CN1 and the offset portion CN2 toward the drain connection portion 130b. As a result, a carrier concentration distribution as shown in Figure 4 may be produced.

[0129] Referring to Figure 4 , the offset portion CN2 can have a gradient of the carrier concentration that gradually increases along a direction from the effective channel portion CN1 toward the drain connection portion 130b.

[0130] During operation of a device to which the thin film transistor 100 is applied, for example, during operation of a display device, the drain connection portion 130b of the thin film transistor 100 is sometimes applied with a high voltage. In this case, a strong electric field, for example, a strong horizontal electric field, can be applied on the drain connection portion 130b side, and in detail, a portion of the channel portion 130n adjacent to the drain connection portion 130b can be applied with a relatively high horizontal electric field. As a result, carriers can be accelerated on the drain connection portion 130b side, and hot carriers having high energy can be formed. These hot carriers can damage the channel portion 130n and the drain connection portion 130b.

[0131] According to one embodiment of the present disclosure, as Figure 4 indicated, the concentration of carriers gradually increases in the offset portion CN2, which is a portion of the channel portion 130n corresponding to the drain connection portion 130b side. As a result, the concentration of carriers in the portion of the channel portion 130n adjacent to the drain connection portion 130b (i.e., the offset portion CN2) can be mitigated.

[0132] According to one embodiment of the present disclosure, since the horizontal electric field gradually changes in the portion of the channel portion 130n adjacent to the drain connection portion 130b (i.e., the offset portion CN2), acceleration of carriers can be prevented. Thus, formation of hot carriers can be suppressed, and damage to the channel portion 130n by hot carriers can be prevented.

[0133] According to one embodiment of the present disclosure, from Figure 4 It can be seen that the slope of the curve of the carrier concentration at the portion where the channel portion 130n and the drain connection portion 130b contact is smaller than the slope of the curve of the carrier concentration at the portion where the channel portion 130n and the source connection portion 130a contact. That is, the gradient of the carrier concentration at the boundary portion between the channel portion 130n and the drain connection portion 130b can be smaller than the gradient of the carrier concentration at the boundary portion between the channel portion 130n and the source connection portion 130a. As Figure 4 indicated, the carrier concentration changes rapidly at the portion where the channel portion 130n and the source connection portion 130a contact. On the other hand, the carrier concentration changes relatively gently at the portion where the channel portion 130n and the drain connection portion 130b contact.

[0134] In the oxide semiconductor, carriers can flow from the source connection portion 130a to the drain connection portion 130b, and a relatively high horizontal electric field is applied on the drain connection portion 130b side and a relatively low horizontal electric field is applied on the source connection portion 130a side. Thus, according to one embodiment of the present disclosure, even if the offset portion is not formed at the portion of the channel portion 130n adjacent to the source connection portion 130a, damage to the channel portion 130n does not significantly occur.

[0135] Further, if the offset portion is formed at the portion of the channel portion 130n adjacent to the source connection portion 130a, the effective channel length is reduced. Thus, according to one embodiment of the present disclosure, the offset portion is not formed at the portion of the channel portion 130n adjacent to the source connection portion 130a.

[0136] Since the offset portion does not need to be formed at the portion of the channel portion 130n adjacent to the source connection portion 130a, according to one embodiment of the present disclosure, the hydrogen control layer 142 is provided to cover only the entire portion of the channel portion 130n on the source connection portion 130a side, i.e., the effective channel portion CN1.

[0137] According to one embodiment of the present disclosure, the direction from the source connection portion 130a toward the drain connection portion 130b can be referred to as the length direction of the channel portion 130n. Further, the length L of the channel portion 130n can be measured in the direction from the source connection portion 130a toward the drain connection portion 130b. In detail, the length L of the channel portion 130n can be defined as the distance between the source connection portion 130a and the drain connection portion 130b.

[0138] According to one embodiment of the present disclosure, the hydrogen control layer 142 can be provided along the length direction of the channel portion 130n from the boundary between the channel portion 130n and the source connection portion 130a.

[0139] Referring to Figure 3 , the hydrogen control layer 142 can have a length LI along the length direction of the channel portion 130n. According to one embodiment of the present disclosure, the length of the hydrogen control layer 142 overlapping with the gate electrode 150 can be referred to as LI.

[0140] The hydrogen control layer 142 can be provided in at least half of the region overlapping with the channel portion 130n. The length LI of the hydrogen control layer 142 can be at least half of the length L of the channel portion 130n. In detail, the overlapping length LI of the hydrogen control layer 142 and the channel portion 130n can be designed to be at least half of the length L of the channel portion 130n. In detail, the overlapping length LI of the hydrogen control layer 142 and the channel portion 130n can be in the range of 70% to 90% of the length L of the channel portion 130n. The overlapping length LI of the hydrogen control layer 142 and the channel portion 130n is measured in a direction parallel to the line connecting the source connection portion 130a and the drain connection portion 130b.

[0141] According to one embodiment of the present disclosure, the region of the channel portion 130n overlapping with the gate electrode 150 and the hydrogen control layer 142 can become an effective channel portion CN1. Further, the overlapping length of the gate electrode 150, the channel portion 130n, and the hydrogen control layer 142 can become the length of the effective channel portion CN1.

[0142] As shown in Figure 2 and Figure 3 , when the gate insulating film 140 is patterned to have the same shape as the gate electrode 150, the length LI of the hydrogen control layer 412 can be referred to as the length of the effective channel portion CN1.

[0143] According to one embodiment of the present disclosure, the offset portion CN2 can be a region of the channel portion 130n that does not overlap with the hydrogen control layer 142. In detail, among the regions where the channel portion 130n and the gate electrode 150 overlap, the portion that does not overlap with the hydrogen control layer 142 can be the offset portion CN2.

[0144] The length ΔL of the offset portion CN2 can be defined as the length of the region where the channel portion 130n overlaps with the gate electrode 150 but does not overlap with the hydrogen control layer 142.

[0145] Referring to Figure 2 and Figure 3 , the length ΔL of the offset portion CN2 can be a value obtained by subtracting the length LI of the effective channel portion CN1 from the length L of the channel portion 130n (ΔL = L - LI). Referring to Figure 3 , the length ΔL of the offset portion CN2 can be the length of the region where the hydrogen control layer 142 is not provided in the region overlapping with the gate electrode 150.

[0146] As shown in Figure 3As illustrated, the hydrogen (H) of the hydrogen supply layer 143 can pass through the region where the hydrogen control layer 142 is not provided and move to the channel portion 130n. At this time, if the region where the hydrogen control layer 142 is not provided is too large, the carrier concentration of the channel portion 130n can increase beyond a necessary range, so that the channel portion 130n can be conductive, and thus can not be able to perform its function as a channel. On the other hand, if the region where the hydrogen control layer 142 is not provided is too small, the amount of hydrogen supplied to the portion of the channel portion 130n adjacent to the drain connection portion 130b can be small, and thus the electric field relaxation effect on the drain region side can be reduced.

[0147] In consideration of the above points, the length ΔL of the region of the gate insulating film 140 where the hydrogen control layer 142 is not provided can be 10% to 30% of the length L of the channel portion 130n. Alternatively, the length ΔL of the offset portion CN2 can be 10% to 30% of the length L of the channel portion 130n. For example, the ratio of the length L1 of the effective channel portion CN1 to the length ΔL of the offset portion CN2 can be in the range of 7:3 to 9:1 (L:ΔL=7:3 to 9:1). When the length ΔL of the offset portion CN2 is less than 10% of the length L of the channel portion 130n, the amount of hydrogen supplied to the portion of the channel portion 130n adjacent to the drain connection portion 130b can be small, and thus the electric field relaxation effect on the drain region side can be reduced. On the other hand, if the length ΔL of the offset portion CN2 exceeds 30% of the length L of the channel portion 130n, deterioration such as excessive shift of the threshold voltage (Vth) of the thin film transistor 100 in the negative (-) direction can occur.

[0148] According to one embodiment of the present disclosure, the length ΔL of the offset portion CN2 can be designed to be 0.5 μm to 2.0 μm.

[0149] Specifically, in the region where the channel portion 130n and the gate electrode 150 overlap, the region which does not overlap with the hydrogen control layer 142 can be designed to be in the range of 0.5 μm to 2.0 μm.

[0150] When the length of the region which overlaps with the channel portion 130n and the gate electrode 150 but does not overlap with the hydrogen control layer 142 is less than 0.5 μm, the amount of hydrogen supplied to the portion of the channel portion 130n adjacent to the drain connection portion 130b can be small, and thus the electric field relaxation effect on the drain region side can be reduced.

[0151] On the other hand, if the length of the region which overlaps with the channel portion 130n and the gate electrode 150 but does not overlap with the hydrogen control layer 142 exceeds 2.0 μm, deterioration such as excessive shift of the threshold voltage (Vth) of the thin film transistor 100 in the negative (-) direction can occur, and thus the stability of the thin film transistor 100 can be reduced.

[0152] In addition, since the length ΔL of the region of the gate insulating film 140 in which the hydrogen control layer 142 is not provided is designed to be 10% to 30% of the length L of the channel portion 130n, the length L1 of the hydrogen control layer 142 overlapping with the gate electrode 150 can be 70% to 90% of the length L of the channel portion 130n.

[0153] According to one embodiment of the present disclosure, the ratio of the length L1 of the effective channel portion CN1 to the length ΔL of the offset portion CN2 can be in the range of 7:3 to 9:1 (L1:ΔL=7:3 to 9:1).

[0154] In addition, according to one embodiment of the present disclosure, the ratio of the length L1 in which the gate electrode 150 and the hydrogen control layer 142 overlap to the length ΔL in which the gate electrode 150 and the hydrogen control layer 142 do not overlap can be in the range of 7:3 to 9:1 (L1:ΔL=7:3 to 9:1).

[0155] In one embodiment of the present disclosure, the source connection portion 130a and the drain connection portion 130b shown in the drawings are merely distinguished from each other for convenience of explanation, and the source connection portion 130a and the drain connection portion 130b can be interchangeable with each other. The source connection portion 130a shown in the drawings can become a drain connection portion, and the drain connection portion 130b can become a source connection portion.

[0156] According to one embodiment of the present disclosure, the source connection portion 130a can function as a source electrode or a drain electrode. In addition, the drain connection portion 130b can function as a drain electrode or a source electrode.

[0157] Figure 5 is a cross-sectional view of a thin film transistor 200 according to another embodiment of the present disclosure.

[0158] Hereinafter, the description of the components already described is omitted or briefly described in order to avoid redundancy.

[0159] Referring to Figure 5 The light-blocking layer 111 can be provided on the substrate 110. The light-blocking layer 111 has a light-blocking property. The light-blocking layer 111 can block light incident from the substrate 110 and protect the channel portion 130n of the active layer 130.

[0160] The light-blocking layer 111 can be made of a material having a light-blocking property. The light-blocking layer 111 can include at least one of an aluminum-based metal such as aluminum (Al) or an aluminum alloy, a molybdenum-based metal such as molybdenum (Mo) or a molybdenum alloy, chromium (Cr), tantalum (Ta), neodymium (Nd), titanium (Ti), and iron (Fe).

[0161] According to one embodiment of the present disclosure, the light-blocking layer 111 can have an electrically conductive property. The light-blocking layer 111 can be electrically connected with any one of the source electrode 161 and the drain electrode 162. Referring to Figure 5 , the light-blocking layer 111 can be connected with the source electrode 161.

[0162] The buffer layer 120 is disposed on the light-blocking layer 111. The buffer layer 120 covers the upper surface of the substrate 110 and the upper surface of the light-blocking layer 111. The buffer layer 120 has an insulating property and protects the active layer 130.

[0163] Referring to Figure 5 , the active layer 130 can be disposed on the buffer layer 120.

[0164] Figure 6A is a cross-sectional view of a thin film transistor 300 according to another embodiment of the present disclosure.

[0165] Referring to Figure 6A , the gate insulating film 140 covers the entire upper portion of the active layer 130. In addition, the gate insulating film 140 can be disposed to cover the entire surface of the upper portion of the substrate 110.

[0166] According to another embodiment of the present disclosure, selective conductive can be achieved by doping a selected region of the active layer 130 with a dopant. For example, doping can be achieved by ion implantation. Specifically, dopant ions can be doped into the selected region of the active layer 130 by ion implantation.

[0167] According to one embodiment of the present disclosure, the dopant can include at least one of boron (B), phosphorus (P), fluorine (F), and hydrogen (H).

[0168] Referring to Figure 6A , a portion of the active layer 130 can be selectively conductive by dopant doping using the gate electrode 150 as a mask. As a result, a source connection portion 130a and a drain connection portion 130b can be formed. In this case, the source connection portion 130a and the drain connection portion 130b can include the dopant.

[0169] Referring to Figure 6A , since the offset portion CN2 does not overlap the hydrogen control layer 142, hydrogen from the hydrogen supply layer 143 can be supplied to the offset portion CN2. A free electron can be formed by the hydrogen (H) supplied to the offset portion CN2, and as a result, the carrier concentration of the offset portion CN2 can increase.

[0170] The drain connection portion 130b in contact with the offset portion CN2 is not covered with the gate electrode 150. Thus, the portion of the offset portion CN2 in contact with the drain connection portion 130b can be affected by the conductive process or the dopant. As a result, the portion of the offset portion CN2 in contact with the drain connection portion 130b can have a relatively high carrier concentration. As a result, the offset portion CN2 can have a gradient of the carrier concentration gradually increasing toward the drain connection portion 130b, as shown in Figure 4

[0171] To form the gradient of the carrier concentration, the ratio of the length LI of the effective channel portion CN1 to the length ΔL of the offset portion CN2 can be in the range of 7:3 to 9:1 (L:ΔL=7:3 to 9:1).

[0172] Figure 6A A structure in which the light-blocking layer 111 is provided on the substrate 110 is shown in FIG. 1. However, another embodiment of the present disclosure is not limited to this, and the light-blocking layer 111 can be omitted. If the light-blocking layer 111 is omitted, the buffer layer 120 can also be omitted. The light-blocking layer 111 can also be omitted in the following embodiments.

[0173] Figure 6B is a cross-sectional view of a thin film transistor 301 according to another embodiment of the present disclosure.

[0174] According to another embodiment of the present disclosure, the end of the hydrogen control layer 142 provided to overlap with the source connection portion 130a can not be aligned with the end of the gate electrode 150. Referring to Figure 6B , the end of the hydrogen control layer 142 provided to overlap with the source connection portion 130a protrudes from the gate electrode 150. When the protruding length of the hydrogen control layer 142 is 0.2 μm or less, the thin film transistor 301 can be driven without any problem. Here, the protruding length is the length by which the hydrogen control layer 142 protrudes from the gate electrode 150.

[0175] In detail, even if the end of the hydrogen control layer 142 provided on the source connection portion 130a protrudes from the gate electrode 150, the thin film transistor 301 can operate without any problem because the source connection portion 130a can be conductivized by dopant doping.

[0176] Figure 6C is a cross-sectional view of a thin film transistor 302 according to another embodiment of the present disclosure.

[0177] Referring to Figure 6C ​The end of the hydrogen control layer 142 on the side of the source connection portion 130a can be provided in a region overlapping with the gate electrode 150. When the end of the hydrogen control layer 142 on the side of the source connection portion 130a is in a region of the gate electrode 150 inward from an end of the gate electrode 150, if the distance between the end of the hydrogen control layer 142 and the end of the gate electrode 150 is 0.2 μm or less in a plan view, the thin film transistor 301 can operate without problems.

[0178] In Figure 6C In the structure illustrated in FIG. 6, when the distance between the end of the hydrogen control layer 142 and the end of the gate electrode 150 is 0.2 μm or less in a plan view, the length of the offset portion of the channel portion 130n formed on the side of the source connection portion 130a is not large, and thus the length of the effective channel portion CN1 does not significantly decrease.

[0179] Figure 7 FIG. 7 is a cross-sectional view of a thin film transistor 400 according to another embodiment of the present disclosure.

[0180] Referring to Figure 7 The source electrode 161 and the drain electrode 162 can be provided on the gate insulating film 140. According to one embodiment of the present disclosure, the source electrode 161 and the drain electrode 162 can be provided on the same layer as the gate electrode 150.

[0181] When the source electrode 161 and the drain electrode 162 are provided on the gate insulating film 140, the source electrode 161 and the drain electrode 162 can be made of the same material as the gate electrode 150. The source electrode 161 and the drain electrode 162 can be formed together with the gate electrode 150 by the same process as the process of forming the gate electrode 150.

[0182] Figure 8 FIG. 8 is a cross-sectional view of a thin film transistor 500 according to another embodiment of the present disclosure.

[0183] Referring to Figure 8 A contact hole CH1, CH2 can be formed in the gate insulating film 140. Specifically, the source electrode 161 can be in contact with the active layer 130 through the first contact hole CH1, and the drain electrode 162 can be in contact with the active layer 130 through the second contact hole CH2.

[0184] In addition, a region of the gate insulating film 140 overlapping with the gate electrode 150 can be patterned into the same shape as the gate electrode 150.

[0185] Figure 9 FIG. 9 is a cross-sectional view of a thin film transistor 600 according to another embodiment of the present disclosure.

[0186] According to another embodiment of this disclosure, the active layer 130 may have a multi-layer structure. (See also...) Figure 9 The active layer 130 may include a first oxide semiconductor layer 131 and a second oxide semiconductor layer 132 on the first oxide semiconductor layer 131.

[0187] The first oxide semiconductor layer 131 can be used as a support layer to support the second oxide semiconductor layer 132. The second oxide semiconductor layer 132 can be used as the main channel layer.

[0188] The first oxide semiconductor layer 131, used as a support layer, can exhibit excellent film stability and mechanical stability. The first oxide semiconductor layer 131 may, for example, comprise at least one of IGO (InGaO)-based oxide semiconductor materials, IGZO (InGaZnO)-based oxide semiconductor materials, IGZTO (InGaZnSnO)-based oxide semiconductor materials, GZTO (GaZnSnO)-based oxide semiconductor materials, GZO (GaZnO)-based oxide semiconductor materials, and GO (GaO)-based oxide semiconductor materials. However, one embodiment of this disclosure is not limited thereto, and the first oxide semiconductor layer 131 may be made of other oxide semiconductor materials known in the art.

[0189] The second oxide semiconductor layer 132 may, for example, include at least one of IZO (InZnO)-based oxide semiconductor materials, FIZO (FeInZnO)-based oxide semiconductor materials, TO (SnO)-based oxide semiconductor materials, IGO (InGaO)-based oxide semiconductor materials, ITO (InSnO)-based oxide semiconductor materials, IGZO (InGaZnO)-based oxide semiconductor materials, IGZTO (InGaZnSnO)-based oxide semiconductor materials, GZTO (GaZnSnO)-based oxide semiconductor materials, ITZO (InSnZnO)-based oxide semiconductor materials, and IO (InO)-based oxide semiconductor materials. However, one embodiment of this disclosure is not limited thereto, and the second oxide semiconductor layer 132 may be made of other oxide semiconductor materials known in the art.

[0190] Regarding the structure of the active layer 130, another embodiment of this disclosure is not limited to... Figure 9 The structure. Figure 5 , Figure 6A , Figure 6B , Figure 6C , Figure 7 and Figure 8 The active layer 130 included in the thin-film transistors 200, 300, 301, 302, 400, and 500 can also have a multilayer structure. For example, Figure 5 , Figure 6A , Figure 6B, Figure 6C , Figure 7 and Figure 8 The active layer 130 included in the thin film transistors 200, 300, 301, 302, 400, 500 of

[0191] Figure 10 is a cross-sectional view of a thin film transistor 700 according to another embodiment of the present disclosure.

[0192] Referring to Figure 10 , the thin film transistor 700 according to another embodiment of the present disclosure includes the gate electrode 150 over the substrate 110, the gate insulating film 140 over the gate electrode 150, and the active layer 130 over the gate insulating film 140. Further, the thin film transistor 700 according to another embodiment of the present disclosure can include the source electrode 161 and the drain electrode 162 provided over the gate insulating film 140. The source electrode 161 and the drain electrode 162 are spaced apart from each other and are each in direct contact with the active layer 130.

[0193] The gate insulating film 140 includes the insulating layer 141, the hydrogen control layer 142, and the hydrogen supply layer 143. According to another embodiment of the present disclosure, in the gate insulating film 140, the hydrogen control layer 142 can be provided between the insulating layer 141 and the hydrogen supply layer 143.

[0194] Referring to the stack structure of the gate insulating film 140 illustrated in Figure 10 , the hydrogen supply layer 143 can be provided over the gate electrode 150, the hydrogen control layer 142 can be provided over the hydrogen supply layer 143, and the insulating layer 141 can be provided over the hydrogen control layer 142.

[0195] The hydrogen control layer 142 can cover part of the active layer 130. Referring to Figure 10 , in a region where the gate electrode 150 and the active layer 130 overlap in plan view, part of the active layer 130 overlaps with the hydrogen control layer 142, and another part of the active layer 130 does not overlap with the hydrogen control layer 142.

[0196] According to another embodiment of the present disclosure, the active layer 130 includes a source contact portion 130s in direct contact with the source electrode 161, a drain contact portion 130d in direct contact with the drain electrode 162, and a channel portion 130n between the source contact portion 130s and the drain contact portion 130d.

[0197] Further, Figure 10 The active layer 130 included in the thin film transistor 700 of Figure 10The active layer 130 included in the thin film transistor 700 can include a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer.

[0198] In the channel portion 130n, a portion of the channel portion 130n adjacent to the source contact portion 130s (i.e., an effective channel portion CN1) overlaps with the hydrogen control layer 142, and a portion of the channel portion 130n adjacent to the drain contact portion 130d (i.e., an offset portion CN2) does not overlap with the hydrogen control layer 142.

[0199] Referring to Figure 10 In a portion of the active layer 130 that does not overlap with the source electrode 161 and the drain electrode 162 (i.e., the channel portion 130n), a portion provided on the drain electrode 162 side (i.e., the offset portion CN2) does not overlap with the hydrogen control layer 142.

[0200] The channel portion 130n can include an effective channel portion CN1 overlapping with the hydrogen control layer 142 and an offset portion CN2 not overlapping with the hydrogen control layer 142.

[0201] According to one embodiment of the present disclosure, hydrogen in the hydrogen supply layer 143 can diffuse and move to the offset portion CN2 of the active layer 130 through a portion where the hydrogen control layer 142 is not provided. As a result, free electrons are formed in the offset portion CN2, so that the offset portion CN2 can have a higher carrier concentration. Thus, according to one embodiment of the present disclosure, the offset portion CN2 can have a higher carrier concentration than the effective channel portion CN1.

[0202] As Figure 10 indicated, a thin film transistor in which the gate electrode 150 is positioned below the active layer 130 is a thin film transistor having a bottom gate structure. On the other hand, as Figure 2 , Figure 5 , Figure 6A , Figure 6B , Figure 6C , Figure 7 , Figure 8 and Figure 9 indicated, a thin film transistor in which the gate electrode 150 is provided above the active layer 130 is referred to as a thin film transistor having a top gate structure.

[0203] According to an embodiment of the present disclosure, by providing the hydrogen control layer 142 in the gate insulating film 140, damage to the active layer 130 and the channel portion 130n can be prevented or reduced. As a result, the thin film transistor 100, 200, 300, 301, 302, 400, 500, 600, 700 according to an embodiment of the present disclosure can have excellent driving stability.

[0204] Another embodiment of the present disclosure provides a display device including the thin film transistor 100, 200, 300, 301, 302, 400, 500, 600, 700 described above.

[0205] Figure 11 is a schematic view of a display device 800 according to another embodiment of the present disclosure.

[0206] The display device 800 according to another embodiment of the present disclosure includes a display panel 310, a gate driver 320, a data driver 330, and a control unit 340, as Figure 11 indicated.

[0207] Gate lines GL and data lines DL are disposed on the display panel 310, and pixels P are disposed at the intersection regions of the gate lines GL and the data lines DL. An image is displayed by driving the pixels P.

[0208] The control unit 340 controls the gate driver 320 and the data driver 330.

[0209] The control unit 340 outputs a gate control signal GCS for controlling the gate driver 320 and a data control signal DCS for controlling the data driver 330 using a signal supplied from an external system. In addition, the control unit 340 samples input image data input from the external system, rearranges it, and provides the rearranged digital image data RGB to the data driver 330.

[0210] The gate control signal GCS includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (GOE), a start signal (Vst), and a gate clock (GCLK). In addition, the gate control signal GCS can include a control signal for controlling the shift register 350.

[0211] The data control signal DCS includes a source start pulse (SSP), a source shift clock signal (SSC), a source output enable signal (SOE), and a polarity control signal (POL).

[0212] The data driver 330 provides a data voltage to the data lines DL of the display panel 310. In detail, the data driver 330 converts the image data RGB input from the control unit 340 into an analog data voltage and provides the data voltage to the data lines DL.

[0213] The gate driver 320 can include a shift register 350.

[0214] The shift register 350 sequentially supplies a gate pulse to the gate line GL in a frame using a start signal and a gate clock transmitted from the control unit 340. Here, a frame refers to a period of time in which one image is output by the display panel 310. The gate pulse has an on voltage capable of turning on a switching element (thin film transistor) provided in the pixel P.

[0215] Further, the shift register 350 supplies a gate off signal capable of turning off the switching element to the gate line GL during a remaining period of time in which no gate pulse is supplied during a frame. Hereinafter, the gate pulse and the gate off signal are collectively referred to as a scan signal (SS or Scan).

[0216] According to one embodiment of the present disclosure, the gate driver 320 can be mounted on the substrate 110. In this case, a structure in which the gate driver 320 is directly mounted on the substrate 110 is referred to as a gate-in-panel (GIP) structure. The gate driver 320 can include at least one of the above-described thin film transistors 100, 200, 300, 301, 302, 400, 500, 600, 700.

[0217] Figure 12 is a circuit diagram of a pixel P of Figure 11 Figure 13 is a plan view of the pixel P of Figure 12 Figure 14 is a cross-sectional view taken along line II-II' of Figure 13

[0218] A circuit diagram of the pixel P of the display device 800 including an organic light emitting diode (OLED) as a display element 710 is shown in FIG. 8. Figure 12 The pixel P includes the display element 710 and a pixel driver PDC that drives the display element 710.

[0219]

[0220] The pixel driver PDC of the display device 800 includes a first thin film transistor TR1 as a switching transistor and a second thin film transistor TR2 as a driving transistor. Figure 12 The display device 800 according to another embodiment of the present disclosure can include at least one of the above-described thin film transistors 100, 200, 300, 301, 302, 400, 500, 600, 700. As the first thin film transistor TR1 or the second thin film transistor TR2 of

[0221] Figure 12 Any one of the above-described thin film transistors 100, 200, 300, 301, 302, 400, 500, 600, 700 can be used as the first thin film transistor TR1 or the second thin film transistor TR2 of

[0222] ​​​The first thin film transistor TR1 is connected to the gate line GL and the data line DL, and turned on or off with a scan signal SS supplied through the gate line GL.

[0223] The data line DL supplies a data voltage Vdata to the pixel driver PDC, and the first thin film transistor TR1 controls application of the data voltage Vdata.

[0224] The drive power line PL supplies a drive voltage Vdd to the display element 710, and the second thin film transistor TR2 controls the drive voltage Vdd. The drive voltage Vdd is a pixel drive voltage for driving an organic light emitting diode (OLED) as the display element 710.

[0225] When the first thin film transistor TR1 is turned on by the scan signal SS applied from the gate driver 320 via the gate line GL, the data voltage Vdata supplied via the data line DL is supplied to the gate electrode G2 of the second thin film transistor TR2 connected to the display element 710. The data voltage Vdata is charged in the first capacitor C1 formed between the gate electrode G2 and the source electrode S2 of the second thin film transistor TR2. The first capacitor C1 is a storage capacitor Cst.

[0226] The amount of current supplied to the organic light emitting diode (OLED) as the display element 710 by the second thin film transistor TR2 is controlled in accordance with the data voltage Vdata, and thus the gradation of light output from the display element 710 can be controlled.

[0227] Reference Figure 13 and Figure 14 The first thin film transistor TR1 and the second thin film transistor TR2 are provided on the substrate 110.

[0228] The substrate 110 can be made of glass or plastic. As the substrate 110, plastic having a flexible property, such as polyimide (PI), can be used.

[0229] The light shielding layer 111 can be provided on the substrate 110. The light shielding layer 111 can block light incident from the outside to protect the active layer A2. The light shielding layer 111 can be omitted.

[0230] Although a configuration in which the light shielding layer 111 is provided under the active layer A2 of the second thin film transistor TR2 is shown in Figure 13 and Figure 14 Another embodiment of the present disclosure is not limited to this. The light shielding layer 111 can also be provided under the active layer A1 of the first thin film transistor TR1.

[0231] The buffer layer 120 is provided on the light shielding layer 111. The buffer layer 120 is made of an insulating material and protects the active layers A1, A2 from moisture or oxygen flowing in from the outside.

[0232] The active layer A1 of the first thin film transistor TR1 and the active layer A2 of the second thin film transistor TR2 are provided over the buffer layer 120.

[0233] The active layers A1, A2 include an oxide semiconductor material. According to another embodiment of the present disclosure, the active layers A1, A2 are oxide semiconductor layers made of an oxide semiconductor material.

[0234] A gate insulating film 140 is provided over the active layers A1, A2. The gate insulating film 140 has insulating properties and separates the active layers A1, A2 from the gate electrodes G1, G2. As Figure 14 indicated, the gate insulating film 140 can not be patterned. However, another embodiment of the present disclosure is not limited thereto, and the gate insulating film 140 can be patterned.

[0235] The gate insulating film 140 includes an insulating layer 141, a hydrogen control layer 142, and a hydrogen supply layer 143. According to one embodiment of the present disclosure, in the gate insulating film 140, the hydrogen control layer 142 can be provided between the insulating layer 141 and the hydrogen supply layer 143.

[0236] The hydrogen control layer 142 can cover a part of the active layers A1, A2.

[0237] The gate electrode G1 of the first thin film transistor TR1 and the gate electrode G2 of the second thin film transistor TR2 are provided over the gate insulating film 140.

[0238] The gate electrode G1 of the first thin film transistor TR1 overlaps with the active layer A1 of the first thin film transistor TR1. The gate electrode G2 of the second thin film transistor TR2 overlaps with the active layer A2 of the second thin film transistor TR2.

[0239] Referring to Figure 13 and Figure 14 the first capacitor electrode CE1 of the first capacitor C1 is provided on the same layer as the gate electrodes G1, G2. The gate electrodes G1, G2 and the first capacitor electrode CE1 can be manufactured together using the same material by the same process.

[0240] An interlayer insulating layer 170 is provided over the gate electrodes G1, G2 and the first capacitor electrode CE1.

[0241] The source electrodes S1 and S2 and the drain electrodes D1 and D2 are provided over the interlayer insulating layer 170. According to one embodiment of the present disclosure, the source electrodes S1 and S2 and the drain electrodes D1 and D2 are distinguished from each other only for convenience of explanation, and the source electrodes S1 and S2 and the drain electrodes D1 and D2 can be interchangeable with each other. Thus, the source electrodes S1 and S2 can be the drain electrodes D1 and D2, and the drain electrodes D1 and D2 can be the source electrodes S1 and S2.

[0242] Further, a data line DL and a drive power supply line PL are provided over the interlayer insulating layer 170. The source electrode S1 of the first thin film transistor TR1 can be formed integrally with the data line DL. The drain electrode D2 of the second thin film transistor TR2 can be formed integrally with the drive power supply line PL.

[0243] According to one embodiment of the present disclosure, the source electrode S1 and the drain electrode D1 of the first thin film transistor TR1 are spaced apart from each other and connected to the active layer A1 of the first thin film transistor TR1, respectively. The source electrode S2 and the drain electrode D2 of the second thin film transistor TR2 are spaced apart from each other and connected to the active layer A2 of the second thin film transistor TR2, respectively.

[0244] In detail, the source electrode S1 of the first thin film transistor TR1 is in contact with a source connection portion of the active layer A1 through a first contact hole H1.

[0245] The drain electrode D1 of the first thin film transistor TR1 is in contact with a drain connection portion of the active layer A1 through a second contact hole H2 and connected to the first capacitor electrode CE1 through a third contact hole H3.

[0246] The source electrode S2 of the second thin film transistor TR2 extends over the interlayer insulating layer 170, and a portion of the source electrode S2 serves as a second capacitor electrode CE2. The first capacitor electrode CE1 and the second capacitor electrode CE2 overlap with each other to form a first capacitor C1.

[0247] The source electrode S2 of the second thin film transistor TR2 is in contact with the light-blocking layer 111 through a fourth contact hole H4 and in contact with a source connection portion of the active layer A2 through a fifth contact hole H5.

[0248] The drain electrode D2 of the second thin film transistor TR2 is in contact with a drain connection portion of the active layer A2 through a sixth contact hole H6.

[0249] The first thin film transistor TR1 includes the active layer A1, the gate electrode G1, the source electrode S1, and the drain electrode D1, and functions as a switching transistor which controls a data voltage Vdata applied to the pixel driver PDC.

[0250] The second thin film transistor TR2 includes an active layer A2, a gate electrode G2, a source electrode S2, and a drain electrode D2, and functions as a drive transistor that controls a drive voltage Vdd applied to the display element 710.

[0251] A planarization layer 180 is provided over the source electrodes S1, S2; the drain electrodes D1, D2; the data line DL; and the drive power supply line PL. The planarization layer 180 planarizes the upper portions of the first thin film transistor TR1 and the second thin film transistor TR2, and protects the first thin film transistor TR1 and the second thin film transistor TR2.

[0252] A first electrode 711 of the display element 710 is provided over the planarization layer 180. The first electrode 711 of the display element 710 is connected to the source electrode S2 of the second thin film transistor TR2 through a seventh contact hole H7 formed in the planarization layer 180.

[0253] A bank layer 750 is provided at the edge of the first electrode 711. The bank layer 750 defines a light emitting region of the display element 710.

[0254] An organic light emitting layer 712 is provided over the first electrode 711, and a second electrode 713 is provided over the organic light emitting layer 712. Thus, the display element 710 is implemented. Figure 14 The display element 710 illustrated in FIG. 8 is an organic light emitting diode (OLED). Thus, the display device 800 according to the embodiment of the present disclosure is an organic light emitting display device.

[0255] The pixel driver PDC according to another embodiment of the present disclosure can be formed in various structures other than the above-described structure. The pixel driver PDC can include, for example, three or more thin film transistors and two or more capacitors.

[0256] The present disclosure described above is not limited to the above-described embodiments and the drawings, and it is obvious to those skilled in the art to which the present disclosure pertains that various substitutions, modifications, and changes are possible within the scope of technical details of the present disclosure.

[0257] According to the embodiment of the present disclosure, by selectively supplying hydrogen to the active layer using the hydrogen control layer, damage to the active layer can be prevented, and the stability and reliability of the thin film transistor can be improved.

[0258] According to the embodiment of the present disclosure, the gate insulating film of the thin film transistor includes a hydrogen supply layer and a hydrogen control layer. By the hydrogen supply layer and the hydrogen control layer provided in the gate insulating film, hydrogen can be supplied to the drain connection side of the channel portion. As a result, according to the embodiment of the present disclosure, the carrier concentration of the drain connection side of the channel portion is increased, thereby preventing or mitigating the electric field concentration of the drain connection side.

[0259] According to embodiments of the present disclosure, since the concentration of the electric field at the drain connection side of the channel portion is mitigated, damage to the active layer can be prevented, so that damage to the thin film transistor can be prevented or suppressed. According to embodiments of the present disclosure, since damage to the active layer is prevented, the thin film transistor can have excellent stability.

[0260] According to embodiments of the present disclosure, the electric field applied to the drain region of the active layer is mitigated, so that damage to the active layer is prevented and defects or damage in the oxide semiconductor thin film transistor are prevented.

[0261] A display device according to embodiments of the present disclosure includes a thin film transistor having excellent stability. As a result, the display device according to embodiments of the present disclosure can exhibit stable display performance.

Claims

1. A thin-film transistor, comprising: Active layer; A gate electrode spaced apart from the active layer; and The gate insulating film between the active layer and the gate electrode, The gate insulating film comprises: Insulating layer; Hydrogen control layer on the insulating layer; and The hydrogen supply layer on the hydrogen control layer, The hydrogen supply layer has a higher hydrogen concentration than the insulating layer, and In the region where the gate electrode and the active layer overlap in the planar view, a portion of the active layer overlaps with the hydrogen control layer, and another portion of the active layer does not overlap with the hydrogen control layer.

2. The thin-film transistor according to claim 1, The active layer includes: The channel portion overlapping with the gate electrode; A source connection portion connected to one side of the channel portion; and The drain connection portion is connected to the other side of the channel portion. The portion of the channel section adjacent to the source connection portion overlaps with the hydrogen control layer, and The portion of the channel adjacent to the drain connection portion does not overlap with the hydrogen control layer.

3. The thin-film transistor according to claim 2, In the plan view, the hydrogen control layer does not overlap with the boundary between the channel portion and the drain connection portion.

4. The thin-film transistor according to claim 2, The channel portion includes: The effective channel portion overlapping the hydrogen control layer; and Offset portion that does not overlap with the hydrogen control layer.

5. The thin-film transistor according to claim 4, The offset portion has a higher carrier concentration than the effective channel portion.

6. The thin-film transistor according to claim 4, The carrier concentration in the offset portion increases along the direction from the effective channel portion toward the drain connection portion.

7. The thin-film transistor according to claim 1, The hydrogen control layer comprises a metal oxide, and The metal oxides mentioned therein include oxides of at least one of aluminum (Al), tungsten (W), titanium (Ti), chromium (Cr), vanadium (V), manganese (Mn), tantalum (Ta), hafnium (Hf), zirconium (Zr), nickel (Ni), molybdenum (Mo), and beryllium (Be).

8. The thin-film transistor according to claim 1, The insulating layer comprises at least one of silicon oxide, aluminum oxide, tantalum oxide, hafnium oxide, and zirconium oxide, and The hydrogen supply layer described therein comprises silicon nitride.

9. The thin-film transistor according to claim 1, The thickness of the hydrogen control layer is 5 nm to 10 nm.

10. The thin-film transistor according to claim 2, The carrier concentration gradient at the boundary between the channel portion and the drain connection portion is smaller than the carrier concentration gradient at the boundary between the channel portion and the source connection portion.

11. The thin-film transistor of claim 1, further comprising: The source electrode and drain electrode are spaced apart from each other and are in direct contact with the active layer, respectively. The active layer includes: The source contact portion that is in direct contact with the source electrode; The drain contact portion that is in direct contact with the drain electrode; and In the channel portion between the source contact portion and the drain contact portion The portion of the channel portion adjacent to the source contact portion overlaps with the hydrogen control layer, and The portion of the channel that is adjacent to the drain contact portion does not overlap with the hydrogen control layer.

12. The thin-film transistor according to claim 11, The channel portion includes: The effective channel portion overlapping the hydrogen control layer; and Offset portion that does not overlap with the hydrogen control layer.

13. The thin-film transistor according to claim 12, The offset portion has a higher carrier concentration than the effective channel portion.

14. The thin-film transistor according to claim 1, The active layer includes a first oxide semiconductor layer and a second oxide semiconductor layer on the first oxide semiconductor layer.

15. A display device, comprising: The thin-film transistor according to any one of claims 1 to 14.

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