Technological method for improving uniformity and appearance of LED chip based on ICP multi-section etching

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a technological method for improving uniformity and appearance of an LED chip based on ICP multi-stage etching, which comprises the following steps: placing an LED epitaxial wafer to be etched in an ICP reaction chamber, and introducing etching gas; plasma is started, at least two etching stages are executed in sequence, the set values of the upper electrode power and / or the lower electrode power of the at least two etching stages are different, and all the etching stages are switched according to the preset etching depth or time; and after the etching reaches the target total depth, the process is stopped. And the plasma density and the ion bombardment energy are effectively balanced through the optimized parameters in the second stage, so that the consistency of the etching rates in the wafers and between the wafers is greatly improved. The data of the embodiment shows that the inter-disk uniformity can be optimized to be within 4.80% from 4.50% of a traditional method.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a manufacturing process for LED chips, specifically a multi-stage etching process based on inductively coupled plasma (ICP) to improve the etching uniformity and surface appearance of LED chips after etching. Background Technology

[0002] In the LED chip manufacturing process, ICP etching is a crucial step in forming mesa, exposing the N-type layer, and defining chip cells and isolation regions. Its process quality directly affects the electrical performance, luminous efficiency, and product yield of the LED chip.

[0003] Traditional ICP etching processes typically employ a single procedure or fixed parameters, meaning that the power of the upper electrode (used to generate high-density plasma) and the power of the lower electrode (used for bias control of ion bombardment energy) remain constant throughout the etching process. This process has the following inherent drawbacks: Poor etching uniformity: Due to the uneven distribution of plasma in the reaction chamber and the difference in electric field effect between the wafer edge and center, it is difficult to maintain a uniform etching rate throughout the etching process (especially at different depths). This leads to inconsistent etching depths on the chip surface or wafer, resulting in large dispersion in parameters such as brightness and voltage of the LED chip, affecting the consistency and yield of device performance.

[0004] Post-etching surface defects (black spots): During the growth of LED epitaxial wafers, a layer of "dust" or contaminants forms on the surface that is difficult to remove completely through conventional cleaning. In the initial stages of etching, insufficient ion bombardment energy may fail to effectively remove this layer, leading to incomplete etching and microscopic defects. Conversely, excessive bombardment energy throughout the process may damage the material. These factors can easily result in visible "black spots" or micromask residue on the etched surface, affecting product appearance and potentially posing a reliability hazard.

[0005] Limited process adaptability: A single etching process cannot simultaneously optimize for the needs of different stages such as surface cleaning, rapid body etching, and bottom morphology control. For example, the parameters required for high etching rates may conflict with those required to obtain optimal sidewall morphology and surface quality.

[0006] Therefore, there is an urgent need for an ICP etching process that can dynamically adjust etching parameters to adapt to the needs of different etching stages, thereby simultaneously improving uniformity and surface quality. Summary of the Invention

[0007] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a process method for improving the uniformity and appearance of LED chips based on ICP multi-stage etching. This method divides the etching process into multiple stages and independently controls the power of the upper and lower electrodes at different stages, achieving targeted process optimization. This significantly improves etching uniformity, eliminates black spots after etching, and enhances the product quality and consistency of LED chips.

[0008] To achieve the above objectives, the present invention provides the following technical solution: a process method for improving the uniformity and appearance of LED chips based on ICP multi-segment etching, comprising the following steps: The LED epitaxial wafer to be etched is placed in the ICP reaction chamber, and etching gas is introduced. Perform multi-stage etching: Start the plasma and execute at least two etching stages in sequence, wherein the upper electrode power and / or lower electrode power settings are different for at least two etching stages, and each etching stage is switched according to a preset etching depth or time. Once the etching reaches the target total depth, the process is stopped.

[0009] Preferably, the multi-stage etching process includes three etching stages: a first etching stage, a second etching stage, and a third etching stage; the upper electrode power of the first etching stage is higher than that of the second etching stage, and the lower electrode power of the second etching stage is higher than that of the first etching stage and the third etching stage.

[0010] Preferably, the upper electrode power in the first etching stage is 600W to 1000W, and the lower electrode power is 50W to 150W. The upper electrode power in the second etching stage is 300W to 550W, and the lower electrode power is 150W to 300W. The upper electrode power of the third etching stage is 600W to 1000W, and the lower electrode power is 50W to 200W.

[0011] Preferably, the target etching depth of the first etching stage is 200 Å to 500 Å; the target etching depth of the second etching stage is 8000 Å to 12000 Å; and the target etching depth of the third etching stage is 1500 Å to 2500 Å.

[0012] Preferably, the etching gas comprises chlorine and boron trichloride.

[0013] Preferably, the flow rate of the chlorine gas is 140-160 sccm, and the flow rate of the boron trichloride gas is 4-6 sccm.

[0014] Preferably, the process pressure in the ICP reaction chamber is 3-5 mTorr, and the process temperature is -10°C to 10°C.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. Significantly Improved Etching Uniformity: Through the optimization of parameters in the second stage, plasma density and ion bombardment energy are effectively balanced, resulting in a significant improvement in the consistency of etching rates within and between wafers. Example data shows that inter-disk uniformity can be optimized from 4.50% using conventional methods to within 4.80%.

[0016] 2. Effectively eliminates black spots after etching: Through the first and third stage surface cleaning modes, the "gray layer" on the surface of the epitaxial wafer and the by-product residues during the etching process are thoroughly removed, which improves the yield of subsequent AOI (automatic optical inspection) from 98% to over 98.70%.

[0017] 3. Improve product performance and yield: Improved uniformity directly leads to increased consistency of LED chip photoelectric parameters (such as brightness, wavelength, and voltage), reduces product dispersion, and improves overall yield and reliability.

[0018] 4. High process flexibility: The core of this method lies in the concept of multi-segment independent power control, which can adjust parameters according to different epitaxial structures, etching materials and target morphologies, and has good process window and adaptability. Attached Figure Description

[0019] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 This is a flowchart of a process method for improving the uniformity and appearance of LED chips based on ICP multi-segment etching according to the present invention. Figure 2 This is a data comparison chart between Embodiment 1 and Comparative Example 1 of the present invention. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Please see Figures 1 to 2 The present invention provides a technical solution: A process method for improving the uniformity and appearance of LED chips based on ICP multi-segment etching includes the following steps: S1. Preparation stage: Load the LED epitaxial wafer to be etched into the ICP reaction chamber, evacuate and introduce etching gas to stabilize the pressure and temperature in the reaction chamber; S2. Multi-stage etching: The plasma is started and at least two etching stages with different combinations of process parameters are executed. Each stage corresponds to a different target etching depth or process focus. The upper electrode power and / or lower electrode power settings are different for at least two stages. S3. Final Stage: After etching to the target total depth, stop the plasma process and proceed with subsequent cleaning and inspection.

[0023] Specifically, the multi-stage etching process includes three sub-stages: The first etching stage corresponds to the initial etching stage, with a target etching depth of 200 Å to 500 Å. The process parameters for this stage are set as follows: upper electrode power of 600 W to 1000 W and lower electrode power of 50 W to 150 W.

[0024] Process Objectives and Principles: This stage employs a combination of high upper electrode power and low lower electrode power. High upper electrode power generates high-density plasma, ensuring sufficient active groups; low lower electrode power reduces the vertical bombardment energy of ions on the substrate. This combination effectively removes "dust layers" and contaminants from the epitaxial wafer surface, achieving surface cleanliness and providing a uniform starting surface for subsequent etching, thereby suppressing the formation of "black spots" at the source.

[0025] The second etching stage corresponds to the main etching stage, with a target etching depth of 8000 Å to 12000 Å. The process parameters for this stage are set as follows: upper electrode power of 300W to 550W and lower electrode power of 150W to 300W.

[0026] Process Objectives and Principles: This stage appropriately reduces the upper electrode power to avoid excessive dissociation while significantly increasing the lower electrode power. Higher lower electrode power enhances the directional bombardment of the substrate by ions, effectively removing etching byproducts, preventing their redeposition, and promoting anisotropic etching to achieve good sidewall morphology. This parameter combination helps achieve a more stable etching rate across the entire wafer and is a key stage for improving etching uniformity.

[0027] The third etching stage corresponds to the etching termination stage, with a target etching depth of 1500 Å to 2500 Å. The process parameters for this stage are set as follows: upper electrode power of 600 W to 1000 W and lower electrode power of 50 W to 200 W.

[0028] Process purpose and principle: The parameters of this stage are similar to those of the first stage. The purpose is to further enhance the surface cleaning effect when the etching is nearing its end, remove any residue that may accumulate in deep holes or at the bottom of the structure, ensure that the etched bottom is flat and clean, further prevent the formation of micro-defects, and consolidate the appearance improvement effect.

[0029] Specifically, the etching gas is a mixture of chlorine and boron trichloride, wherein the flow rate of chlorine is 140-160 sccm (standard milliliters per minute) and the flow rate of boron trichloride is 4-6 sccm.

[0030] Specifically, the pressure inside the reaction chamber is 3-5 mTorr, and the temperature is -10°C to 10°C.

[0031] Example 1 An ICP multi-segment etching process for improving the etching uniformity and appearance of blue LED chips, the specific steps of which are as follows: S1. Preparation Stage: Load a 6-inch GaN-based LED epitaxial wafer into the ICP reaction chamber. Introduce etching gases: chlorine at a flow rate of 150 sccm and boron trichloride at a flow rate of 5 sccm. Stabilize the reaction chamber pressure to 4 mTorr and maintain the temperature at 0°C.

[0032] S2. Multi-stage etching process: Phase 1 (Surface Cleaning): Set the upper electrode power to 800W and the lower electrode power to 100W. Control the etching time to approximately 30 seconds, with a target etching depth of approximately 300 Å.

[0033] Second stage (main body etching): Adjust the upper electrode power to 400W and the lower electrode power to 200W. Perform the main etching, which lasts for several minutes and reaches a depth of approximately 10,000 Å.

[0034] Third stage (bottom cleaning): Adjust the upper electrode power to 800W and the lower electrode power to 100W. Control the etching time to approximately tens of seconds, with a target etching depth of approximately 2000 Å.

[0035] S3. Final Stage: After the total etching depth reaches approximately 12,500 Å, the etching gas and radio frequency power are stopped, and the wafer is removed for standard cleaning and testing.

[0036] Comparative Example 1 A traditional single-stage etching process was used: the basic conditions such as etching gas, pressure, and temperature were the same as in Example 1. However, throughout the etching process, the power of the upper electrode was kept constant at 400W, and the power of the lower electrode was kept constant at 200W. The etching was completed to a total depth of approximately 12,500 Å.

[0037] Effect Comparison The wafers obtained in Example 1 and Comparative Example 1 were tested, and the results are shown in the table below:

[0038] The results show that the three-stage etching process of the present invention is superior to the traditional single-stage process in terms of etching uniformity and surface quality.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A process method for improving uniformity and appearance of LED chips based on ICP multi-stage etching, characterized in that, The method comprises the following steps: Placing the LED epitaxial wafer to be etched in an ICP reaction chamber and introducing etching gas; Carrying out multi-stage etching: starting the plasma and sequentially executing at least two etching stages, wherein the set values of the upper electrode power and / or the lower electrode power of the at least two etching stages are different, and each etching stage is switched according to a preset etching depth or time; Stopping the process after etching to a target total depth.

2. The process method for improving uniformity and appearance of LED chip based on ICP multi-stage etching according to claim 1, wherein, The multi-stage etching stage comprises three etching stages: a first etching stage, a second etching stage and a third etching stage; the upper electrode power of the first etching stage is higher than that of the second etching stage, and the lower electrode power of the second etching stage is higher than that of the first etching stage and the third etching stage.

3. The process method for improving the uniformity and appearance of LED chips based on ICP multi-stage etching according to claim 2, characterized in that: The upper electrode power of the first etching stage is 600W to 1000W, and the lower electrode power is 50W to 150W; The upper electrode power of the second etching stage is 300W to 550W, and the lower electrode power is 150W to 300W; The upper electrode power of the third etching stage is 600W to 1000W, and the lower electrode power is 50W to 200W.

4. The process for improving the uniformity and appearance of LED chips based on ICP multi-stage etching according to claim 2 or 3, characterized in that: The target etching depth of the first etching stage is 200A to 500A; the target etching depth of the second etching stage is 8000A to 12000A; and the target etching depth of the third etching stage is 1500A to 2500A.

5. The process for improving uniformity and appearance of LED chip based on ICP multi-stage etching according to claim 1, characterized in that, The etching gas comprises chlorine and boron trichloride.

6. The process for improving uniformity and appearance of LED chip based on ICP multi-stage etching according to claim 5, wherein, The flow rate of the chlorine is 140-160sccm, and the flow rate of the boron trichloride is 4-6sccm.

7. The process for improving uniformity and appearance of LED chip based on ICP multi-stage etching according to claim 1, characterized in that, The process pressure in the ICP reaction chamber is 3-5mTorr, and the process temperature is -10℃ to 10℃.

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