Array substrate, display panel and display device

Abstract

The embodiment of the invention provides an array substrate, a display panel and a display device, and relates to the technical field of display. The array substrate comprises a pixel circuit; the pixel circuit comprises a driving module, the driving module is connected between a first power supply signal line and a first electrode of a light-emitting element, the driving module comprises a driving transistor, and the driving transistor comprises a first grid electrode and a second grid electrode; the data writing module is electrically connected with the driving module and is used for writing data voltage into the first grid electrode; the first end of the threshold value adjusting module and the control end of the threshold value adjusting module are electrically connected with the second grid electrode of the driving module, and the second end of the threshold value adjusting module is electrically connected with the first electrode of the light-emitting element; wherein the threshold adjusting module is used for adjusting the threshold voltage of the driving module. According to the embodiment of the invention, the display performance of the display panel can be improved.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to an array substrate, a display panel, and a display device. Background Technology

[0002] With the rapid development of display technology, new types of display panels, such as Organic Light Emitting Diode (OLED), Micro LED, and Active Matrix Organic Light Emitting Diode (AMOLED), are emerging in large numbers, and full-screen displays have become the development trend of mobile display devices such as smartphones. As display technology continues to advance and consumers' demands for display panels increase, the functions integrated into display panels are becoming increasingly diverse. However, at present, the display performance of display panels still needs improvement. Summary of the Invention

[0003] This application provides an array substrate, a display panel, and a display device, which helps to improve the display performance of the display panel.

[0004] In a first aspect, embodiments of this application provide an array substrate, the array substrate including a pixel circuit; the pixel circuit includes: a driving module, the driving module being connected between a first power signal line and a first electrode of a light-emitting element, the driving module including a driving transistor, the driving transistor including a first gate and a second gate; a data writing module, the data writing module being electrically connected to the driving module, used to write a data voltage to the first gate; a threshold adjustment module, the first end of the threshold adjustment module and the control end of the threshold adjustment module being electrically connected to the second gate of the driving module, the second end of the threshold adjustment module being electrically connected to the first electrode of the light-emitting element; wherein, the threshold adjustment module is used to adjust the threshold voltage of the driving module.

[0005] According to an embodiment of the first aspect of this application, the pixel circuit further includes: a first storage module, a first end of the first storage module being electrically connected to the second gate of the driving module, and a second end of the first storage module being electrically connected to the first electrode of the light-emitting element.

[0006] According to an embodiment of the first aspect of this application, the threshold adjustment module is used to adjust the threshold voltage of the drive module to be greater than 0.

[0007] According to an embodiment of the first aspect of this application, the driving transistor is an N-type thin-film transistor.

[0008] According to an embodiment of the first aspect of this application, in the thickness direction of the array substrate, the array substrate includes: a substrate; a first metal layer disposed on one side of the substrate; a first insulating layer disposed on the side of the first metal layer away from the substrate; a semiconductor layer disposed on the side of the first insulating layer away from the substrate; a second insulating layer disposed on the side of the semiconductor layer away from the substrate; and a second metal layer disposed on the side of the second insulating layer away from the substrate; wherein, the first gate of the driving module is located in one of the first metal layer and the second metal layer, and the second gate of the driving module is located in the other of the first metal layer and the second metal layer.

[0009] According to an embodiment of the first aspect of this application, the ratio of the first thickness to the second thickness is used to adjust the threshold voltage of the first gate of the driving module, wherein the first thickness is the thickness of the insulating layer between the first gate and the semiconductor layer, and the second thickness is the thickness of the insulating layer between the second gate and the semiconductor layer.

[0010] According to an embodiment of the first aspect of this application, the threshold voltage of the driving module is controlled based on a first formula, which includes: Vth1=Vth0-(Vg2-Vs)*d(G1) / d(G2), where Vth1 is the threshold voltage after control by the driving module, Vth0 is the initial threshold voltage of the driving module, Vg2 is the voltage written to the second gate during the non-light-emitting stage, Vs is the voltage written to the second terminal of the driving module during the non-light-emitting stage, d(G1) is the first thickness, and d(G2) is the second thickness.

[0011] According to an embodiment of the first aspect of this application, the threshold voltage of the driving module is controlled based on a first formula, and the first insulating layer and the second insulating layer use the same insulating material.

[0012] According to an embodiment of the first aspect of this application, the threshold voltage of the driving module is controlled based on a second formula, the second formula including: Vth1=Vth0-(Vg2-Vs)*Cox2 / Cox1 Wherein, Vth1 is the threshold voltage after adjustment by the driving module, Vth0 is the initial threshold voltage of the driving module, Vg2 is the voltage written to the second gate during the non-light-emitting stage, Vs is the voltage written to the second terminal of the driving module during the non-light-emitting stage, Cox2 is the unit area capacitance of the insulating layer between the second gate and the semiconductor layer, and Cox1 is the unit area capacitance of the insulating layer between the first gate and the semiconductor layer.

[0013] According to an embodiment of the first aspect of this application, the threshold voltage of the driving module is controlled based on a second formula, and the first insulating layer and the second insulating layer are made of different insulating materials.

[0014] According to an embodiment of the first aspect of this application, the difference between the initial threshold voltage of the driving module and 0 is less than a preset difference.

[0015] According to an embodiment of the first aspect of this application, the pixel circuit further includes: a threshold compensation module, the control terminal of the threshold compensation module being electrically connected to a first scan signal line, the first terminal of the threshold compensation module being electrically connected to a first gate of a driving module, and the second terminal of the threshold compensation module being electrically connected to a first terminal of the driving module.

[0016] According to an embodiment of the first aspect of this application, the operation of the pixel circuit includes a threshold compensation stage, wherein the threshold compensation module is used to be turned on during the threshold compensation stage.

[0017] According to the first aspect of this application, the control terminal of the data writing module is electrically connected to the second scan signal line, the first terminal of the data writing module is electrically connected to the data voltage signal line, and the second terminal of the data writing module is electrically connected to the second terminal of the drive module.

[0018] According to an embodiment of the first aspect of this application, the operation of the pixel circuit includes a data writing stage, wherein the data writing module is used to be turned on during the data writing stage.

[0019] According to the implementation of the first aspect of this application, the data writing phase and the threshold compensation phase overlap for at least a portion of the time period.

[0020] According to an embodiment of the first aspect of this application, the pixel circuit further includes: The second storage module has its first end electrically connected to the first gate of the driving module, and its second end electrically connected to the first electrode of the light-emitting element.

[0021] According to an embodiment of the first aspect of this application, the pixel circuit further includes: a first light emission control module, the control terminal of the first light emission control module being electrically connected to a first light emission control signal line, the first terminal of the first light emission control module being electrically connected to a first power supply signal line, and the second terminal of the first light emission control module being electrically connected to the first terminal of the driving module.

[0022] According to an embodiment of the first aspect of this application, the operation of the pixel circuit includes an initialization stage and an emission stage, and the first emission control module is used to turn on during the initialization stage and the emission stage.

[0023] According to an embodiment of the first aspect of this application, the pixel circuit further includes: an initialization module, wherein the control terminal of the initialization module is electrically connected to a third scan signal line, the first terminal of the initialization module is electrically connected to a reference signal line, and the second terminal of the initialization module is electrically connected to the first electrode of the light-emitting element.

[0024] According to an embodiment of the first aspect of this application, the operation of the pixel circuit includes an initialization phase, wherein the initialization module is used to turn on during the initialization phase.

[0025] According to the first aspect of this application, the operation of the pixel circuit further includes a data writing stage, and the initialization module is also used to turn on during the data writing stage.

[0026] According to an embodiment of the first aspect of this application, the pixel circuit further includes: a second light-emitting control module, the control terminal of the second light-emitting control module being electrically connected to a second light-emitting control signal line, the first terminal of the second light-emitting control module being electrically connected to the second terminal of the driving module, and the second terminal of the second light-emitting control module being electrically connected to the first electrode of the light-emitting element.

[0027] According to an embodiment of the first aspect of this application, the operation of the pixel circuit includes a light-emitting stage, and the second light-emitting control module is used to turn on during the light-emitting stage.

[0028] According to an embodiment of the first aspect of this application, the first end of the driving transistor is electrically connected to a first power signal line, and the second end of the driving transistor is coupled to the first electrode of the light-emitting element.

[0029] According to an embodiment of the first aspect of this application, the first gate of the driving transistor is a top gate, and the second gate of the driving transistor is a bottom gate.

[0030] According to an embodiment of the first aspect of this application, the threshold adjustment module includes: a first transistor, a first terminal of the first transistor and a gate of the first transistor electrically connected to a second gate of the first transistor, and a second terminal of the first transistor electrically connected to a first electrode of a light-emitting element.

[0031] According to an embodiment of the first aspect of this application, the data writing module includes: a second transistor, which is electrically connected to a driving transistor and is used to write a data voltage to a first gate.

[0032] According to an embodiment of the first aspect of this application, the pixel circuit further includes a first storage module, the first storage module including: a first capacitor, the first plate of the first capacitor being electrically connected to the second gate of the first transistor, and the second plate of the first capacitor being electrically connected to the first electrode of the light-emitting element.

[0033] Secondly, based on the same inventive concept, embodiments of this application provide a display panel, which includes an array substrate as described in any of the embodiments of the first aspect of this application.

[0034] Thirdly, based on the same inventive concept, embodiments of this application provide a display device, which includes a display panel as described in any of the embodiments of the second aspect of this application.

[0035] As described above, the present application provides an array substrate including a pixel circuit. The pixel circuit includes a driving module, a data writing module, and a threshold adjustment module. The driving module is connected between a first power signal line and a first electrode of a light-emitting element. The driving module includes a driving transistor, which includes a first gate and a second gate. The data writing module is electrically connected to the driving module and is used to write data voltage to the first gate. The first terminal of the threshold adjustment module is electrically connected to the second gate of the driving module, and the control terminal and the second terminal of the threshold adjustment module are electrically connected to the first electrode of the light-emitting element. The threshold adjustment module is used to adjust the threshold voltage of the driving module.

[0036] Compared to related technologies, where source-follower compensation circuits suffer from compensation losses due to parasitic capacitance during the transfer of compensation potential to the gate, this application provides an array substrate, display panel, and display device. By designing the driving transistor as a dual-gate transistor and adding a diode-type threshold adjustment module, and short-circuiting the first terminal and control terminal of this module, the threshold adjustment module exhibits the unidirectional conduction characteristics of a diode. This allows for the regulation of the threshold voltage of the driving module based on the dual-gate characteristic of the driving transistor. Thus, this application can regulate the threshold voltage of the driving module to the desired state through the threshold adjustment module, enabling the compensation potential to be directly written to the first gate of the driving module using diode compensation. This reduces compensation losses caused by parasitic capacitance, improves the accuracy of the compensation effect, and contributes to enhancing the overall performance of the display panel. Attached Figure Description

[0037] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the structure of an array substrate provided in an embodiment of this application; Figure 2 This is a schematic diagram of a pixel circuit provided in an embodiment of this application; Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of this application; Figure 4 This is a schematic cross-sectional view of an array substrate provided in an embodiment of this application; Figure 5 This is a schematic diagram of another pixel circuit provided in an embodiment of this application; Figure 6This is a schematic diagram of another pixel circuit provided in an embodiment of this application; Figure 7 This is a timing diagram of a pixel circuit provided in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application; Figure 9 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0039] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0040] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0041] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0042] It should be noted that the transistors in the embodiments of this application can be either N-type or P-type transistors. For N-type transistors, the on-state level is high and the off-state level is low. That is, when the gate of an N-type transistor is high, its first and second terminals are connected; when the gate of an N-type transistor is low, its first and second terminals are off. For P-type transistors, the on-state level is low and the off-state level is high. That is, when the control terminal of a P-type transistor is low, its first and second terminals are connected; when the control terminal of a P-type transistor is high, its first and second terminals are off. In specific implementations, the gate of each transistor is used as its control terminal. Furthermore, depending on the signal and type of the gate of each transistor, its first terminal can be used as the source and its second terminal as the drain, or vice versa. No distinction is made here. Additionally, the on-state and off-state levels in the embodiments of this invention are general terms. The on-state level refers to any level that enables the transistor to conduct, and the off-state level refers to any level that enables the transistor to turn off / become off.

[0043] In the embodiments of this application, the term "electrical connection" can refer to a direct electrical connection between two components, or it can refer to an electrical connection between two components via one or more other components.

[0044] In the embodiments of this application, the first node, the second node, and the third node are defined only for the convenience of describing the circuit structure, and the first node, the second node, and the third node are not actual circuit units.

[0045] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0046] Before describing the technical solutions provided in the embodiments of this application, in order to facilitate understanding of the embodiments of this application, this application first specifically explains the problems existing in the related technologies: As mentioned above, the inventors of this application have discovered that in recent years, with the continuous development of display technology, thin-film transistors (TFTs) have gradually become the preferred material for the backplane of large-size products in high-generation active-matrix organic light-emitting diode (AMOLED) display technology due to their unique performance advantages, demonstrating great potential. However, in practical applications, the threshold voltage (Vth) control problem of TFT devices has always been a key factor affecting display performance and device reliability.

[0047] In traditional low-temperature polycrystalline silicon (LTPS) TFT technology, device reliability is independent of Vth, thus a mature 7T1C diode pinch-off circuit scheme has been developed. This scheme requires the Vth of the p-type driving transistor to be less than 0V, typically controlled at around -2V, to ensure normal circuit operation. However, for oxide TFT devices, reliability is closely related to Vth; device stability is optimal when Vth is controlled at 0V. In this case, the traditional diode pinch-off circuit structure (requiring the Vth of the n-type driving transistor to be greater than 0V) is no longer applicable, and only a source follower compensation circuit can be used.

[0048] However, source-follower compensation circuits have significant drawbacks. While they don't have specific requirements for the TFT's Vth, current source-follower circuits first write the compensation potential into the anode and then transfer it to the gate via coupling. However, during coupling, parasitic capacitance causes potential loss, leading to inaccurate compensation and affecting display quality. Therefore, source-follower compensation circuits have extremely poor compensation performance and cannot meet the requirements of display panels in terms of uniformity, image retention, and lifespan.

[0049] Based on the above background, embodiments of this application provide an array substrate, a display panel, and a display device, aiming to improve the problems existing in related technologies, ensuring the reliability of TFT devices and achieving good compensation effects, thereby improving the overall performance of the display panel.

[0050] Please see first. Figure 1 , Figure 1 This is a schematic diagram of the structure of an array substrate provided in an embodiment of this application. Figure 1 As shown, this application embodiment provides an array substrate 100. In Figure 1In the array substrate 100, a pixel circuit 101 is included. The pixel circuit 101 can be coupled to the first electrode of the light-emitting element D, and the pixel circuit 101 is used to drive the light-emitting element D to emit light, and the light-emitting element D emits light through a light-emitting material.

[0051] In some examples, the first electrode of the light-emitting element D is, for example, Figure 1 The anode of the light-emitting element D shown. The light-emitting element D can be an LED (Light-Emitting Diode), an OLED (Organic Electroluminescence Display), or others.

[0052] Please see below. Figure 2 , Figure 2 This is a schematic diagram of a pixel circuit provided in an embodiment of this application. Figure 2 As shown, the pixel circuit 101 includes: The driving module 11 is connected to the first power signal line VDD and the first pole of the light-emitting element D. The driving module 11 includes a driving transistor T1, and the driving transistor T1 includes a first gate and a second gate. The data writing module 12 is electrically connected to the driving module 11 and is used to write data voltage to the first gate. The threshold adjustment module 13 has its first end and control end electrically connected to the second gate of the drive module 11, and its second end electrically connected to the first electrode of the light-emitting element D. The threshold adjustment module 13 is used to adjust the threshold voltage of the drive module 11.

[0053] Specifically, the array substrate 100 may include a plurality of sub-pixels arranged in an array, and each sub-pixel may include a pixel circuit 101 and a light-emitting element D. In the pixel circuit 101, the driving module 11 can provide a driving current to the light-emitting element D, thereby causing it to emit light. In actual light emission, the magnitude of the driving current flowing through the light-emitting element D is controlled by controlling the conduction level of the driving module 11, thereby adjusting the brightness of the light-emitting element D.

[0054] The first terminal of the aforementioned driving module 11 is electrically connected to the first power signal line VDD, which provides a positive voltage, such as 12V. The second terminal of the driving module 11 is coupled to the first electrode of the light-emitting element D, which is, for example, the anode of the light-emitting element D. The cathode of the light-emitting element D can also be electrically connected to the second power signal line VSS. The voltage provided by the second power signal line VSS is a negative voltage, such as -3.3V, etc., which is not limited here.

[0055] In this application, the driving module 11 includes a dual-gate driving transistor T1, which has a first gate and a second gate. The first gate of the driving transistor T1 can serve as a driving gate, and the voltage of the first gate determines its conduction level, thereby affecting the driving current flowing through the light-emitting element D. The second gate of the driving transistor T1 can serve as a control gate, and this application utilizes the control gate to achieve threshold adjustment of the driving transistor T1.

[0056] The first gate of the driving transistor T1 is a top gate, and the second gate of the driving transistor T1 is a bottom gate. Alternatively, the first gate of the driving transistor T1 can also be a bottom gate, and the second gate of the driving transistor T1 can be a top gate; this is not strictly limited. The data writing module 12 is electrically connected to the driving module 11 to write data voltage to the first gate of the driving module 11. The data voltage written to the first gate by the data writing module 12 determines the brightness of the light-emitting element D. By writing different data voltages to the first gate of the driving module 11, the driving transistor T1 is controlled to be in different conduction states, thereby affecting the current flowing through the light-emitting element D.

[0057] The first terminal and control terminal of the threshold adjustment module 13 are connected to the second gate of the driving transistor T1, and the second terminal is connected to the first electrode of the light-emitting element D. This connection method allows the threshold adjustment module 13 to be connected via a diode short circuit, utilizing the unidirectional conduction characteristic of the diode to make the voltage of the second gate of the driving transistor T1 related to the on-state voltage of the threshold adjustment module 13. Then, based on the dual-gate structure of the driving transistor T1, the threshold voltage of the driving transistor T1 is adjusted by utilizing the threshold adjustment module 13 to adjust the voltage of the second gate of the driving transistor T1.

[0058] As described above, the present application provides an array substrate 100, which includes a pixel circuit 101. The pixel circuit 101 includes a driving module 11, a data writing module 12, and a threshold adjustment module 13. The driving module 11 is connected between a first power signal line VDD and a first terminal of the light-emitting element D. The driving module 11 includes a driving transistor T1, which has a first gate and a second gate. The data writing module 12 is electrically connected to the driving module 11 and is used to write data voltage to the first gate. The first terminal of the threshold adjustment module 13 is electrically connected to the second gate of the driving module 11, and the control terminal and the second terminal of the threshold adjustment module 13 are electrically connected to the first terminal of the light-emitting element D. The threshold adjustment module 13 is used to adjust the threshold voltage of the driving module 11.

[0059] Compared to related technologies, where source-follower compensation circuits suffer from compensation losses due to parasitic capacitance during the transfer of compensation potential to the gate, this application provides an array substrate 100. By designing the driving transistor T1 as a dual-gate transistor and adding a diode-type threshold adjustment module 13, and short-circuiting the first terminal and control terminal of the threshold adjustment module 13, the threshold adjustment module 13 exhibits the unidirectional conduction characteristics of a diode. This allows for the regulation of the threshold voltage of the driving module 11 based on the dual-gate characteristics of the driving transistor in the driving module. Thus, this application embodiment can regulate the threshold voltage of the driving module 11 to a desired state, such as adjusting it to be greater than zero, through the threshold adjustment module 13. This enables the compensation potential to be directly written to the first gate of the driving transistor T1 via diode compensation, reducing compensation losses caused by parasitic capacitance, improving the accuracy of the compensation effect, and contributing to the overall performance improvement of the display panel.

[0060] Please see below. Figure 3 , Figure 3 This is a schematic diagram of another pixel circuit 101 provided in an embodiment of this application. Optionally, according to some embodiments of this application, such as... Figure 3 As shown, the pixel circuit 101 also includes: The first storage module 14 has its first end electrically connected to the second gate of the driving module 11, and its second end electrically connected to the first electrode of the light-emitting element D.

[0061] In this embodiment, the main function of the first storage module 14 is to store charge, thereby maintaining a stable voltage at the second gate of the driving module 11. This helps maintain a stable potential during different operating stages of the pixel circuit 101 (such as data writing and light emission stages), ensuring that the threshold voltage of the driving transistor T1 remains in the adjusted state.

[0062] Furthermore, the first storage module 14 also helps to maintain the stability of the voltage of the second gate of the driving transistor T1 when the pixel circuit 101 is in the light-emitting stage, thereby helping to ensure the stability of the threshold voltage of the driving transistor T1.

[0063] Optionally, according to some embodiments of this application, the threshold adjustment module 13 is used to adjust the threshold voltage of the drive module 11 to be greater than 0.

[0064] In this embodiment, the threshold adjustment module 13 adjusts the threshold voltage of the driving module 11 to a value greater than 0. This fully satisfies the compensation mechanism of the diode compensation method, reducing the likelihood of compensation failure due to the compensated threshold voltage being less than 0.

[0065] Specifically, in the case of adopting the diode compensation method (adding a threshold compensation module as described later), during the threshold compensation stage, when the potential of the first gate decreases from the power supply voltage Vdd provided by the first power supply signal line VDD (the potential of the second end of the driving module 11 is understood as Vs, and the first gate is initialized to Vdd), it is necessary to ensure that when the potential of the first gate is at Vref + Vth, the driving transistor T1 can be pinched off to achieve compensation. When the threshold voltage Vth adjusted by the driving module 11 > 0, as the potential of the first gate decreases, when Vgs = Vg1 - Vs = (Vref + Vth) - Vref = Vth, the driving transistor T1 is exactly at the pinch-off critical point, the channel charge is fully released, and the Vth information is accurately sampled, which helps to improve the compensation effect of the display panel.

[0066] However, when Vth < 0V (depletion type), since the threshold voltage of the driving module 11 is negative, the potential of the first gate needs to drop to Vref + Vth (< Vref) in theory to be pinched off. However, in the actual circuit, the potential of the first gate is limited by the potential Vref of the second end of the driving module 11 and the characteristics of the driving transistor T1, and cannot effectively drop to a potential lower than Vref (or the dropping speed is extremely slow), resulting in that the driving transistor T1 cannot be pinched off before the first gate drops to Vref. Eventually, the potential of point G will be clamped near Vref, and the correct relationship of Vgs = Vth < 0 cannot be established, so there is no compensation effect.

[0067] It should be added that, optionally, the threshold voltage of the above driving module 11 is adjusted by the voltage written to the second gate during the non-emitting stage and the voltage written to the second end of the driving module 11 during the non-emitting stage.

[0068] Optionally, according to some embodiments of the present application, the driving transistor T1 is an N-type thin film transistor. Thus, the threshold adjustment module 13 adjusts the threshold voltage of the N-type thin film transistor to be greater than 0V by adjusting the second gate voltage of the N-type thin film transistor, which can ensure the stable operation of the N-type driving TFT under the forward bias condition, and further ensure the reliability and stability of the device.

[0069] Please refer to the following Figure 4 , Figure 4 which is a schematic cross-sectional structure diagram of an array substrate 100 provided by an embodiment of the present application. Optionally, according to some embodiments of the present application, as Figure 4 shown, in the thickness direction Z of the array substrate 100, the array substrate 100 includes: a substrate 01, a first metal layer 10, disposed on one side of the substrate 01; a first insulating layer GI1, disposed on the side of the first metal layer 10 away from the substrate 01, Semiconductor layer 30 is disposed on the side of the first insulating layer GI1 opposite to the substrate 01; The second insulating layer GI2 is disposed on the side of the semiconductor layer 30 away from the substrate 01; The second metal layer 20 is disposed on the side of the second insulating layer GI2 that is away from the substrate 01; The first gate of the driving module 11 is located in one of the first metal layer 10 and the second metal layer 20, and the second gate of the driving module 11 is located in the other of the first metal layer 10 and the second metal layer 20.

[0070] Specifically, combined Figure 4 As shown, the substrate 01 can serve as the basic support material for the entire array substrate 100, and can be made of glass or flexible material. A first metal layer 10 is disposed on one side of the substrate 01 and is used to form metal structures such as the gate and interconnects of transistors, for example, the first or second gate of a driving transistor T1. A first insulating layer GI1 isolates the first metal layer 10 and the semiconductor layer 30, preventing electrical short circuits, and simultaneously affecting the effect of the gate electric field on the semiconductor layer 30. The semiconductor layer 30 can serve as the active region of the transistor, used to control the conduction and cutoff of current.

[0071] The aforementioned second insulating layer GI2 is disposed on the side of the semiconductor layer 30 facing away from the substrate 01, which can further isolate the semiconductor layer 30 and the second metal layer 20, and at the same time affect the effect of the gate electric field on the semiconductor layer 30. The second metal layer 20 can be used to form metal structures such as the source, drain, and interconnects of the transistor, and in the dual-gate driving transistor T1, the second metal layer 20 can be used to form a first gate or a second gate of the driving transistor T1 that is different from the first metal layer 10.

[0072] It should be added that, in the actual design of the array substrate 100, a barrier layer BL can also be provided between the first metal layer 10 and the substrate 01 in the thickness direction Z of the array substrate 100. This barrier layer is used to prevent oxygen, water vapor, or other harmful substances from diffusing into the sensitive organic light-emitting layer or semiconductor layer 30, thereby avoiding degradation of electrical properties. Furthermore, the array substrate 100 can also have an interlayer insulating layer (ILD) provided on the side of the second insulating layer GI2 facing away from the substrate 01. The ILD layer can be used to prevent short circuits between different metal layers and provide electrical isolation.

[0073] Optionally, according to some embodiments of this application, the ratio of the first thickness to the second thickness is used to adjust the threshold voltage of the first gate of the driving module 11. The first thickness is the thickness of the insulating layer between the first gate and the semiconductor layer 30, and the second thickness is the thickness of the insulating layer between the second gate and the semiconductor layer 30. For example, when the first gate is disposed in the first metal layer 10, the first thickness is the thickness of the insulating layer between the first metal layer 10 and the semiconductor layer 30; when the second gate is disposed in the second metal layer 20, the second thickness is the thickness of the insulating layer between the second metal layer 20 and the semiconductor layer 30. In this case, combined with the actual film layer design ( Figure 4 Using a simplified film layer drawing method, the first thickness is equal to the thickness of the first insulating layer GI1, and the second thickness is equal to the thickness of the second insulating layer GI2.

[0074] Conversely, when the first gate is disposed in the second metal layer 20, the first thickness is the thickness of the insulating layer between the second metal layer 20 containing the first gate and the semiconductor layer 30; when the second gate is disposed in the first metal layer 10, the second thickness is the thickness of the insulating layer between the first metal layer 10 containing the second gate and the semiconductor layer 30. In this case, combined with the actual film layer design, the second thickness is equal to the thickness of the second insulating layer GI2, and the first thickness is equal to the thickness of the first insulating layer GI1.

[0075] In this embodiment, based on the threshold voltage of the aforementioned threshold adjustment module 13 to adjust the threshold voltage of the driving transistor T1, it is further proposed that the threshold voltage can also be controlled by utilizing the thickness of the gate insulating layer. Specifically, in combination with Figure 4 As shown, the ratio of the first thickness to the second thickness affects the effect of the gate electric field on the semiconductor layer 30, thereby changing the threshold voltage of the driving transistor T1.

[0076] Therefore, in the process of manufacturing the array substrate 100, by adjusting the thickness ratio between the first thickness and the second thickness, the effect of the gate electric field on the semiconductor layer 30 can be optimized, and the threshold voltage of the driving transistor T1 can be precisely controlled, thereby helping to improve the brightness uniformity and consistency of the display panel.

[0077] Optionally, according to some embodiments of this application, the threshold voltage of the driving module 11 is controlled based on a first formula, which includes: Vth1=Vth0-(Vg2-Vs)*d(G1) / d(G2) Wherein, Vth1 is the threshold voltage after adjustment by the driving module 11, Vth0 is the initial threshold voltage of the driving module 11, Vg2 is the voltage written to the second gate during the non-light-emitting stage, Vs is the voltage written to the second terminal of the driving module 11 during the non-light-emitting stage, d(G1) is the first thickness, and d(G2) is the second thickness.

[0078] In this embodiment, the threshold voltage of the controlled driving transistor T1 is affected by the threshold voltage of the threshold adjustment module 13 and the ratio of the gate insulating layer thickness. In specific threshold adjustment, precise control of the threshold voltage of the driving transistor T1 is achieved based on a specific first formula.

[0079] The initial threshold voltage of the aforementioned driving module 11 is its inherent value when no external adjustment is performed. In some examples, the initial threshold voltage can be understood as the threshold voltage of the driving transistor T1 when the second gate of the driving transistor T1 is short-circuited to the second terminal of the driving transistor T1.

[0080] In the first formula, d(G1) is the first thickness mentioned above; d(G2) is the second thickness.

[0081] For example, taking a first gate as the top gate and a second gate as the bottom gate, the first gate is disposed in the second metal layer 20, and the insulating layer adjacent to the second metal layer 20 where the first gate is located is the second insulating layer GI2; the second gate is disposed in the first metal layer 10, and the insulating layer adjacent to the first metal layer 10 where the second gate is located is the first insulating layer GI1. Therefore, in the first formula, d(G1) / d(G2) is the ratio of the thickness of the second insulating layer GI2 between the first gate and the semiconductor layer 30 to the thickness of the first insulating layer GI1 between the second gate and the semiconductor layer 30.

[0082] In this embodiment, by precisely controlling the threshold voltage of the driving module 11 using the first formula described above, the threshold voltage of the driving module 11 can be effectively controlled to the required state, such as being adjusted to be greater than zero. This not only improves the stability and display performance of the driving transistor T1, but also helps to improve the overall performance of the display panel.

[0083] Optionally, according to some embodiments of this application, the threshold voltage of the driving module 11 is controlled based on a first formula, and the first insulating layer GI1 and the second insulating layer GI2 use the same insulating material. Thus, when the materials of the first insulating layer GI1 and the second insulating layer GI2 are the same, reliable control of the threshold voltage can be achieved directly based on the insulation layer thickness.

[0084] Optionally, according to some embodiments of this application, the threshold voltage of the driving module 11 is controlled based on a second formula, which includes: Vth1=Vth0-(Vg2-Vs)*Cox2 / Cox1.

[0085] Wherein, Vth1 is the threshold voltage after adjustment by the driving module, Vth0 is the initial threshold voltage of the driving module, Vg2 is the voltage written to the second gate during the non-light-emitting stage, Vs is the voltage written to the second terminal of the driving module 11 during the non-light-emitting stage, Cox2 is the unit area capacitance of the insulating layer between the second gate and the semiconductor layer, and Cox1 is the unit area capacitance of the insulating layer between the first gate and the semiconductor layer.

[0086] Optionally, according to some embodiments of this application, the threshold voltage of the driving module is controlled based on a second formula, and the first insulating layer GI1 and the second insulating layer GI2 are made of different insulating materials. Thus, when the materials of the first insulating layer GI1 and the second insulating layer GI2 are different, the ratio between the capacitances per unit area is used to more reasonably and reliably control the threshold voltage.

[0087] Optionally, according to some embodiments of this application, the difference between the initial threshold voltage of the driving module 11 and 0 is less than a preset difference.

[0088] In this embodiment, the initial threshold voltage of the driving module 11 is designed to be close to 0V. When the initial threshold voltage Vth0 is close to 0V, the electrical stress experienced by the driving transistor T1 during operation is minimized, thereby reducing device aging and performance degradation caused by long-term electric field effects, and achieving optimal device reliability. This improves the stability and lifespan of the device during long-term use.

[0089] Furthermore, when the initial threshold voltage Vth0 is close to 0V, the diode pinch-off circuit implemented based on the threshold adjustment module 13 can adjust the threshold voltage more precisely, improve the compensation effect of the circuit, and help drive the transistor T1 to maintain stable display performance under various complex working conditions.

[0090] Please see below. Figure 5 , Figure 5 This is a schematic diagram of another pixel circuit 101 provided in an embodiment of this application. Optionally, according to some embodiments of this application, such as... Figure 5 As shown, the pixel circuit 101 further includes: The threshold compensation module 15 has its control terminal electrically connected to the first scan signal line Scan1, its first terminal electrically connected to the first gate of the drive module 11, and its second terminal electrically connected to the first terminal of the drive module 11.

[0091] In this embodiment, the control terminal of the threshold compensation module 15 is connected to the first scan signal line Scan1 to receive control signals to determine the on or off state of the threshold compensation module 15. The first terminal of the threshold compensation module 15 is connected to the first gate of the drive module 11, and the second terminal is connected to the first terminal of the drive module 11. The second terminal of the threshold compensation module 15 can be connected to the first power signal line VDD, so that the first gate of the drive transistor T1 is initialized in advance through the first power signal line VDD, thereby turning on the drive transistor T1 and connecting the first gate and the second terminal of the drive transistor T1 to achieve threshold voltage compensation for the drive transistor T1.

[0092] Optionally, according to some embodiments of this application, the operation of the pixel circuit 101 includes a threshold compensation stage, during which the threshold compensation module 15 is turned on.

[0093] Combination Figure 5 As shown, during the threshold compensation stage, the threshold compensation module 15 is turned on under the control of the on-level of the first scan signal line Scan1, connecting the first gate of the driving module 11 and the first terminal of the driving module 11. The first terminal of the driving module 11 then adjusts the potential of the first gate of the driving module 11 to compensate for the threshold voltage change of the driving module 11, thereby helping to improve the uniformity and stability of the display.

[0094] Please continue reading Figure 5 Optionally, according to some embodiments of this application, the control terminal of the data writing module 12 is electrically connected to the second scan signal line Scan2, the first terminal of the data writing module 12 is electrically connected to the data voltage signal line Vdata, and the second terminal of the data writing module 12 is electrically connected to the second terminal of the drive module 11.

[0095] Optionally, according to some embodiments of this application, the operation of the pixel circuit 101 includes a data writing stage, and the data writing module 12 is used to be turned on during the data writing stage.

[0096] In this embodiment, the first end of the data writing module 12 is connected to the data voltage signal line Vdata, which is responsible for receiving the data voltage; the second end is connected to the second end of the driving module 11. During the data writing stage, the data writing module 12 is turned on in response to the on-level of the second scan signal line Scan2, writing the data voltage to the second end of the driving module 11. Then, the data is transmitted through the turned-on driving module 11 to the first end and then to its first gate, thereby realizing the writing of the data voltage to the first gate of the driving module 11. In this way, the data writing module 12 controls the current output of the driving module 11 by controlling the data voltage written to the first gate, thereby adjusting the brightness of the light-emitting element D.

[0097] Optionally, according to some embodiments of this application, the data writing phase and the threshold compensation phase overlap for at least a portion of the time. Therefore, during this overlapping period, both the data writing module 12 and the threshold compensation module 15 are turned on. The data writing module 12 transmits the data voltage to the second terminal of the driving module 11, then through the turned-on driving module 11 to the first terminal of the driving module 11, and finally through the turned-on threshold compensation module 15 to the first gate of the driving module 11, thereby achieving a more reasonable and reliable data voltage writing process.

[0098] Please see below. Figure 6 , Figure 6 This is a schematic diagram of another pixel circuit 101 provided in the embodiments of this application. Optionally, according to some embodiments of this application, the pixel circuit 101 further includes: The second storage module 16 has its first end electrically connected to the first gate of the driving module 11, and its second end electrically connected to the first electrode of the light-emitting element D.

[0099] In this embodiment, the first terminal of the second storage module 16 is electrically connected to the first gate of the driving module 11. This allows the second storage module 16 to store the charge associated with the first gate of the driving module 11, thereby maintaining a stable voltage at the first gate during different operating phases (such as the data writing phase and the light emission phase). For example, during the data writing phase, the second storage module 16 can store the data voltage, ensuring that the first gate of the driving module 11 maintains a stable voltage during the light emission phase, thus reducing brightness unevenness caused by voltage fluctuations.

[0100] Furthermore, the second terminal of the second storage module 16 is electrically connected to the first electrode of the light-emitting element D (such as the anode of an OLED). In this way, the second storage module 16 can maintain the potential of the first electrode of the light-emitting element D stable, ensuring that the light-emitting element D can receive a stable current during the light-emitting stage, thereby achieving a uniform light-emitting effect.

[0101] Please continue reading Figure 6 Optionally, according to some embodiments of this application, the pixel circuit 101 further includes: The first light-emitting control module 17 has its control terminal electrically connected to the first light-emitting control signal line EM1, its first terminal electrically connected to the first power signal line VDD, and its second terminal electrically connected to the first terminal of the driver module 11.

[0102] In this embodiment, the control terminal of the first light-emitting control module 17 is electrically connected to the first light-emitting control signal line EM1, and is used to receive control signals to determine the on or off state of the module. During the light-emitting stage, the first light-emitting control module 17 is turned on after receiving the on signal through the control signal line, and transmits the voltage of the first power signal line VDD to the first terminal of the driving module 11, providing a stable power supply voltage for the driving module 11, ensuring that the driving module 11 can work normally and drive the light-emitting element D to emit light.

[0103] More specifically, the operation of the pixel circuit 101 includes an initialization phase and an emission phase, and the first emission control module 17 is used to turn on during the initialization phase and the emission phase.

[0104] When the pixel circuit 101 is in the initialization phase, the first light-emitting control module 17 is turned on, thereby initializing the first terminal of the first storage module 14 using the power supply voltage provided by the first power signal line VDD through the turned-on threshold compensation module 15. When the pixel circuit 101 is in the light-emitting phase, the first light-emitting control module 17 is turned on, and the driving transistor T1 determines the magnitude of the driving current flowing through the first and second terminals of the driving transistor T1 according to the degree of conduction. This driving current is transmitted to the anode of the light-emitting element D, ultimately driving the light-emitting element D to emit light.

[0105] Please continue reading Figure 6 Optionally, according to some embodiments of this application, the pixel circuit 101 further includes: The initialization module 18 is initialized. The control terminal of the initialization module 18 is electrically connected to the third scan signal line Scan3. The first terminal of the initialization module 18 is electrically connected to the reference signal line Vref. The second terminal of the initialization module 18 is electrically connected to the first electrode of the light-emitting element D.

[0106] More specifically, the operation of the pixel circuit 101 includes an initialization phase, during which the initialization module 18 is turned on.

[0107] In this embodiment, the control terminal of the initialization module 18 is electrically connected to the third scan signal line Scan3. The control signal received via the third scan signal line Scan3 determines the on or off state of the initialization module 18. The first terminal of the initialization module 18 is electrically connected to the reference signal line Vref, and the second terminal of the initialization module 18 is electrically connected to the first electrode of the light-emitting element D. Thus, during the initialization phase, the initialization module 18 can set the potential of the first electrode of the light-emitting element D to the reference potential provided by the reference signal line Vref, thereby completing the initialization process.

[0108] Furthermore, when the initialization module 18 is turned on, it can also initialize the potential of the second terminal of the first storage module 14 and the second terminal of the second storage module 16, thereby ensuring that the second terminals of the first storage module 14 and the second storage module 16 have a stable reference potential, which helps to ensure the reliability of the pixel circuit 101 during operation.

[0109] More specifically, the operation of the pixel circuit 101 also includes a data writing phase, during which the initialization module 18 is also used to turn on the circuit. By continuously writing a reference potential to the second terminal of the first storage module 14 during the data writing phase, the initialization module 18 helps to further ensure the potential stability of the second gate of the driving transistor T1 through the first storage module 14.

[0110] Optionally, according to some embodiments of this application, the pixel circuit 101 further includes: The second light-emitting control module 19 has its control terminal electrically connected to the second light-emitting control signal line EM2, its first terminal electrically connected to the second terminal of the drive module 11, and its second terminal electrically connected to the first electrode of the light-emitting element D.

[0111] In a specific implementation, the control terminal of the second light-emitting control module 19 is electrically connected to the second light-emitting control signal line EM2 to receive control signals to determine the on or off state of the module.

[0112] More specifically, the operation of the pixel circuit 101 includes a light-emitting stage, during which the second light-emitting control module 19 is turned on. During the light-emitting stage, the second light-emitting control module 19 is turned on after receiving a turn-on signal through the control signal line, and transmits the current from the driving module 11 to the first electrode of the light-emitting element D, ensuring that the light-emitting element D can receive a stable current and emit light normally.

[0113] Please continue reading Figure 6 Optionally, according to some embodiments of this application, the first terminal of the driving transistor T1 is electrically connected to the first power signal line VDD, and the second terminal of the driving transistor T1 is coupled to the first electrode of the light-emitting element D.

[0114] Optionally, according to some embodiments of this application, the first gate of the driving transistor T1 is a top gate, and the second gate of the driving transistor T1 is a bottom gate. It should be noted that, in the thickness direction Z of the array substrate 100, the gate of the driving transistor T1 that is closer to the substrate 01 is the bottom gate, and vice versa.

[0115] In this embodiment, considering the influence of the PVD (Physical Vapor Deposition) process, the bottom gate structure generally has better physical and chemical stability, which helps to more accurately control the threshold voltage variation; while the top gate drive can more accurately control the conduction and cutoff states of the transistor, ensuring stable current output. Therefore, this embodiment adopts a bottom gate control and top gate drive approach to further improve the stability and reliability of the driving transistor T1 device, ensuring the long-term reliable operation of the display panel.

[0116] Please continue reading below. Figure 6 Optionally, according to some embodiments of this application, the threshold adjustment module 13 includes: a first transistor T2, a first terminal of the first transistor T2 and a gate of the first transistor T2 electrically connected to a second gate of the first transistor T2, and a second terminal of the first transistor T2 electrically connected to a first electrode of the light-emitting element D.

[0117] Optionally, according to some embodiments of this application, the data writing module 12 includes: a second transistor T3, which is electrically connected to the driving transistor T1, for writing a data voltage to the first gate.

[0118] Optionally, according to some embodiments of this application, the pixel circuit 101 further includes a first storage module 14, the first storage module 14 including: a first capacitor C1, the first plate of the first capacitor C1 being electrically connected to the second gate of the first transistor T2, and the second plate of the first capacitor C1 being electrically connected to the first electrode of the light-emitting element D.

[0119] Optionally, please continue to see Figure 6 The threshold compensation module 15 includes a transistor T4. The control terminal of transistor T4 is electrically connected to the first scan signal line Scan1. The first terminal of transistor T4 is electrically connected to the first gate of driving transistor T1. The second terminal of transistor T4 is electrically connected to the first terminal of driving transistor T1.

[0120] The first light-emitting control module 17 includes transistor T5. The control terminal of transistor T5 is electrically connected to the first light-emitting control signal line EM1, the first terminal of transistor T5 is electrically connected to the first power supply signal line VDD, and the second terminal of transistor T5 is electrically connected to the first terminal of driving transistor T1. The initialization module 18 includes transistor T6. The control terminal of transistor T6 is electrically connected to the third scan signal line Scan3, the first terminal of transistor T6 is electrically connected to the reference signal line Vref, and the second terminal of transistor T6 is electrically connected to the first electrode of the light-emitting element D.

[0121] The second light-emitting control module 19 includes a transistor T7. The control terminal of transistor T7 is electrically connected to the second light-emitting control signal line EM2. The first terminal of transistor T7 is electrically connected to the second terminal of driving transistor T1. The second terminal of transistor T7 is electrically connected to the first electrode of light-emitting element D. The second storage module 16 includes a second capacitor C2. The first terminal of the second capacitor C2 is electrically connected to the first gate of driving transistor T1. The second terminal of the second capacitor C2 is electrically connected to the first electrode of light-emitting element D.

[0122] Based on the above Figure 6 To better understand the operation of the pixel circuit 101 shown in this embodiment, please refer to the following. Figure 7 , Figure 7 This is a timing diagram of a pixel circuit 101 provided in an embodiment of this application.

[0123] like Figure 7 As shown, taking a low on-level and a high off-level as an example, the operation of pixel circuit 101 includes: In the initialization phase t1, the first light-emitting control signal line EM1 is controlled to provide a conduction level, the second light-emitting control signal line EM2 is controlled to provide a cutoff level, the first scan signal line Scan1 is controlled to provide a conduction level, the second scan signal line Scan2 is controlled to provide a cutoff level, and the third scan signal line Scan3 is controlled to provide a conduction level. The first light-emitting control module 17 is turned on according to the first light-emitting control signal line EM1, the second light-emitting control module 19 is turned off according to the second light-emitting control signal line EM2, the threshold compensation module 15 is turned on according to the first scan signal line Scan1, the data writing module 12 is turned off according to the second scan signal line Scan2, and the initialization module 18 is turned on according to the third scan signal line Scan3. Specifically, as shown in the figure... Figure 7 In the illustrated embodiment, transistors T4, T5, and T6 are turned on, while transistors T3 and T7 are turned off.

[0124] During this stage, the power signal provided by the first power signal line VDD is written to the first terminal of the driving transistor T1 through the conducting transistor T5, and then transmitted to the first gate of the driving transistor T1 through the conducting transistor T4, thereby initializing the first gate of the driving transistor T1 and the first plate of the second capacitor C2. The reference voltage provided by the reference signal line Vref is transmitted to the first terminal of the light-emitting element D through the conducting transistor T6, thereby initializing the first terminal of the light-emitting element D and the second plates of the first capacitor C1 and the second capacitor C2.

[0125] During the threshold compensation phase t2 and the data writing phase t3, the first light emission control signal line EM1 and the second light emission control signal line EM2 are controlled to provide a cutoff level, the first scan signal line Scan1 is controlled to provide a conduction level, and the third scan signal line Scan3 is controlled to provide a conduction level. The first light emission control module 17 is cut off according to the first light emission control signal line EM1, the second light emission control module 19 is cut off according to the second light emission control signal line EM2, the threshold compensation module 15 is turned on according to the first scan signal line Scan1, and the initialization module 18 is turned on according to the third scan signal line Scan3.

[0126] Specifically, such as Figure 7 In the illustrated embodiment, transistors T4 and T6 are turned on, while transistors T5 and T7 are turned off. The reference potential provided by the reference signal line Vref initializes the second terminal of the second capacitor C2, the first terminal of the light-emitting element D, the second terminal of the first capacitor C1, and the second terminal of T2 through transistor T6. The potentials at the second terminal of the second capacitor C2, the first terminal of the light-emitting element D, the second terminal of the first capacitor C1, and the second terminal of the first transistor T2 are all Vref. The potential at the second gate is Vref + Vth(T2). Simultaneously, during this stage, the turn-on of transistor T4 connects the first gate of driving transistor T1 and the first terminal of driving transistor T1. Since the power signal provided by the first power signal line VDD has been transmitted to the first gate of driving transistor T1 during the initialization stage, driving transistor T1 is turned on. Therefore, the second terminal of driving transistor T1 is connected to the gate of driving transistor T1 through the turned-on transistor T4 and driving transistor T1, thereby achieving threshold voltage compensation for driving transistor T1 and contributing to uniform display. This threshold compensation method directly writes the compensation potential into the first gate of the driving transistor T1, reducing the compensation loss caused by parasitic capacitance, improving the accuracy of the compensation effect, and helping to improve the overall performance of the display panel.

[0127] During the data writing phase t3, the system also includes controlling the second scan signal line Scan2 to provide a conduction level. The data writing module 12 is turned on according to the second scan signal line Scan2. Specifically, as shown in... Figure 7In the illustrated embodiment, transistor T3 is turned on. Transistor T3 transmits the data voltage transmitted via the data voltage signal line Vdata to the second terminal of driving transistor T1, and then writes it to the first gate of driving transistor T1 via the turned-on driving transistor T1 and the turned-on transistor T4, realizing data writing and threshold compensation. The potential of the first gate becomes Vdata + Vth1. The potential Vs of the second terminal of driving transistor T1 is written as the data voltage Vdata. Since the potential Vg2 of the second gate of driving transistor T1 is adjusted to Vref + Vth(T2), the voltage difference between the second gate and the second terminal of driving transistor T1, i.e., the control potential, is (Vref + Vth(T2) - Vdata) during the data writing stage t3. By setting the voltage, this term is ensured to be negative, thus correcting the threshold voltage of driving transistor T1. At this time, the expression for the threshold voltage of driving transistor T1 is: Vth1= Vth0-(Vg2-Vs)*d(G1) / d(G2) =Vth0-(Vref+Vth(T2)-Vdata)*d(G1) / d(G2) Where Vth0 is the initial threshold voltage driving transistor T1. It should be noted that to ensure (Vref + Vth(T2) - Vdata) is negative, thus guaranteeing the threshold voltage regulation effect, (Vref + Vth(T2)) is set to be less than Vdata. Specifically, (Vref + Vth(T2)) can be set to be less than the minimum Vdata value in the display panel to ensure that (Vref + Vth(T2) - Vdata) remains negative, thereby making Vth1 > 0. In practical applications, Vref can be set to a negative voltage, or Vth(T2) can be set to be less than 0, to fully meet the threshold voltage regulation requirements.

[0128] During the light emission stage t4, the first light emission control signal line EM1 and the second light emission control signal line EM2 are both activated, while the first scan signal line Scan1, the second scan signal line Scan2, and the third scan signal line Scan3 are deactivated. The first light emission control module 17 is activated according to the first light emission control signal line EM1, the second light emission control module 19 is activated according to the second light emission control signal line EM2, the threshold compensation module 15 is deactivated according to the first scan signal line Scan1, the data writing module 12 is deactivated according to the second scan signal line Scan2, and the initialization module 18 is deactivated according to the third scan signal line Scan3.

[0129] Specifically, such as Figure 7In the illustrated embodiment, transistors T2, T3, T4, and transistor T6 are turned off. During the light-emitting stage t4, the second capacitor C2 stores the potential of Vref + Vth(T2). Since the first pole of the light-emitting element D is higher than the reference voltage Vref, the voltage difference between the voltage at the first end of transistor T2 minus the voltage at the second end of transistor T2 will not be greater than its threshold voltage Vth(T2). Therefore, transistor T2 will not turn on, and the voltage of the second gate of driving transistor T1 remains stable under the action of the second capacitor C2. The driving transistor T1 can operate in a stable threshold voltage state.

[0130] It should be noted that in this embodiment, the threshold voltage of the driving transistor T1 is regulated to a state greater than 0. During the threshold compensation stage, when the potential of the first gate decreases from the power supply voltage Vdd provided by the first power supply signal line VDD (the potential of the second end of the driving module 11 is understood as Vs, and the first gate is initialized to Vdd), taking Vs voltage as Vref as an example, to ensure that when the potential of the first gate is at Vref + Vth, the driving transistor T1 can be pinched off to achieve compensation. When the threshold voltage Vth > 0 after the driving module 11 is regulated, as the potential of the first gate drops, when Vgs = Vg1 - Vs = (Vref + Vth) - Vref = Vth, the driving transistor T1 is exactly at the pinch-off critical point, the channel charge is fully released, and the Vth information is accurately sampled, which helps to improve the compensation effect of the display panel.

[0131] However, when Vth < 0V (depletion type), since the threshold voltage of the driving module 11 is negative, the potential of the first gate needs to drop to Vref + Vth (<Vref) in theory to be pinched off. However, in the actual circuit, the potential of the first gate is affected by the potential Vref of the second end of the driving module 11 and the characteristics of the driving transistor T1, and cannot effectively drop to a potential lower than Vref (or the dropping speed is extremely slow), resulting in that the driving transistor T1 cannot be pinched off before the first gate drops to Vref. Eventually, the potential of point G will be clamped near Vref, and the correct relationship of Vgs = Vth < 0 cannot be established, so there is no compensation effect.

[0132] It should be added that in practical applications, in order to fully save the wiring quantity of the signal lines in the array substrate 100, thereby reducing the wiring space and manufacturing complexity, the above-mentioned first scan signal line Scan1 can be multiplexed as the third scan signal line Scan3.

[0133] And, in Figure 6In this example, transistors T1 to T7 are all N-type thin-film transistors. N-type thin-film transistors conduct when the gate receiving signal is high and are cut off when the gate receiving signal is low. However, in other embodiments, at least some of the transistors may also be P-type thin-film transistors. Correspondingly, the circuit structure can be flexibly adjusted, and this application does not impose strict limitations on this.

[0134] It should be noted that the driving timing given in the embodiments of this application is only a possible example. In some other embodiments, the operating timing of the pixel circuit 101 can be flexibly adjusted according to the actual situation and needs. This application does not impose specific restrictions on it here.

[0135] Based on the array substrate 100 provided in the above embodiments, and with the same inventive concept, this application also provides a display panel, including the array substrate 100 provided in this application. Please refer to... Figure 8 , Figure 8 This is a schematic diagram of a display panel 1000 provided in an embodiment of this application. Figure 8 The provided display panel 1000 includes the array substrate 100 provided in any of the above embodiments of this application.

[0136] Understandably, the display panel 1000 can be an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, or a micro-flat panel (Micro-OLED or Micro-LED), etc.

[0137] The display panel 1000 provided in this embodiment of the invention can be applied to mobile phones or any electronic product with display function, including but not limited to the following categories: televisions, laptops, desktop monitors, tablets, digital cameras, smart bracelets, smart glasses, in-vehicle displays, medical devices, industrial control equipment, touch interactive terminals, etc. This embodiment of the invention does not impose any special limitations on these.

[0138] The display panel 1000 provided in this application embodiment has the beneficial effects of the array substrate 100 provided in this application embodiment. For details, please refer to the specific description of the array substrate 100 in the above embodiments. This embodiment will not repeat the description here.

[0139] Based on the display panel provided in the above embodiments, and in accordance with the same inventive concept, this application also provides a display device, including the display panel provided in this application. Please refer to... Figure 9 , Figure 9This is a schematic diagram of a display device provided in an embodiment of this application. Figure 9 The provided display device 10000 includes the display panel 1000 provided in any of the above embodiments of this application. Figure 9 The embodiments use a mobile phone as an example to describe the display device 10000. It is understood that the display device provided in this application embodiment can be other display devices with display functions, such as wearable products, computers, televisions, and in-vehicle display devices; this application does not impose specific limitations on these. The display device provided in this application embodiment has the beneficial effects of the display panel 1000 provided in this application embodiment. For details, please refer to the specific descriptions of the display panel 1000 in the above embodiments; these will not be repeated here.

[0140] It should be understood that the specific circuit structures and cross-sectional structures of the display panels provided in the accompanying drawings of the embodiments of this application are merely examples and are not intended to limit this application. Furthermore, the above embodiments provided in this application can be combined with each other unless there is contradiction.

[0141] It should be clarified that the various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. According to the embodiments described above, these embodiments do not exhaustively describe all details, nor do they limit this application to only the specific embodiments described. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to make good use of this application and modifications based on it. This application is limited only by the claims and their full scope and equivalents.

[0142] Those skilled in the art will understand that the above embodiments are exemplary and not restrictive. Different technical features appearing in different embodiments can be combined to achieve beneficial effects. Based on a study of the drawings, specification, and claims, those skilled in the art should be able to understand and implement other variations of the disclosed embodiments. In the claims, the term "comprising" does not exclude other structures; the quantity refers to "one" but does not exclude multiple; the terms "first" and "second" are used to identify names and not to indicate any particular order. Any reference numerals in the claims should not be construed as limiting the scope of protection. The appearance of certain technical features in different dependent claims does not mean that these technical features cannot be combined to achieve beneficial effects.

Claims

1. An array substrate, characterized in that, The array substrate includes pixel circuitry; The pixel circuit includes: A driving module is connected between a first power signal line and a first electrode of a light-emitting element. The driving module includes a driving transistor, which includes a first gate and a second gate. A data writing module, which is electrically connected to the driving module, is used to write a data voltage to the first gate. A threshold adjustment module, wherein the first end of the threshold adjustment module and the control end of the threshold adjustment module are electrically connected to the second gate of the driving module, and the second end of the threshold adjustment module is electrically connected to the first electrode of the light-emitting element; The threshold adjustment module is used to adjust the threshold voltage of the drive module.

2. The array substrate according to claim 1, characterized in that, The pixel circuit also includes: A first storage module, wherein a first terminal of the first storage module is electrically connected to the second gate of the driving module, and a second terminal of the first storage module is electrically connected to the first electrode of the light-emitting element; Preferably, the threshold adjustment module is used to adjust the threshold voltage of the drive module to be greater than 0; Preferably, the driving transistor is an N-type thin-film transistor.

3. The array substrate according to claim 1, characterized in that, In the thickness direction of the array substrate, the array substrate includes: Substrate, A first metal layer is disposed on one side of the substrate; A first insulating layer is disposed on the side of the first metal layer facing away from the substrate. A semiconductor layer is disposed on the side of the first insulating layer opposite to the substrate; A second insulating layer is disposed on the side of the semiconductor layer opposite to the substrate; A second metal layer is disposed on the side of the second insulating layer opposite to the substrate; Wherein, the first gate of the driving module is located in one of the first metal layer and the second metal layer, and the second gate of the driving module is located in the other of the first metal layer and the second metal layer; Preferably, the ratio of the first thickness to the second thickness is used to adjust the threshold voltage of the first gate of the driving module, wherein the first thickness is the thickness of the insulating layer between the first gate and the semiconductor layer, and the second thickness is the thickness of the insulating layer between the second gate and the semiconductor layer; Preferably, the threshold voltage of the driving module is controlled based on a first formula, which includes: Vth1=Vth0-(Vg2-Vs)*d(G1) / d(G2) Wherein, Vth1 is the threshold voltage after adjustment by the driving module, Vth0 is the initial threshold voltage of the driving module, Vg2 is the voltage written to the second gate in the non-light-emitting stage, Vs is the voltage written to the second terminal of the driving module in the non-light-emitting stage, d(G1) is the first thickness, and d(G2) is the second thickness. Preferably, the threshold voltage of the driving module is controlled based on the first formula, and the first insulating layer and the second insulating layer use the same insulating material; Preferably, the threshold voltage of the driving module is controlled based on a second formula, which includes: Vth1=Vth0-(Vg2-Vs)*Cox2 / Cox1 Wherein, Vth1 is the threshold voltage after adjustment by the driving module, Vth0 is the initial threshold voltage of the driving module, Vg2 is the voltage written to the second gate in the non-light-emitting stage, Vs is the voltage written to the second terminal of the driving module in the non-light-emitting stage, Cox2 is the unit area capacitance of the insulating layer between the second gate and the semiconductor layer, and Cox1 is the unit area capacitance of the insulating layer between the first gate and the semiconductor layer. Preferably, the threshold voltage of the driving module is controlled based on the second formula, and the first insulating layer and the second insulating layer are made of different insulating materials; Preferably, the difference between the initial threshold voltage of the driving module and 0 is less than a preset difference.

4. The array substrate according to claim 1, characterized in that, The pixel circuit also includes: A threshold compensation module, wherein the control terminal of the threshold compensation module is electrically connected to the first scan signal line, the first terminal of the threshold compensation module is electrically connected to the first gate of the driving module, and the second terminal of the threshold compensation module is electrically connected to the first terminal of the driving module; Preferably, the operation of the pixel circuit includes a threshold compensation stage, and the threshold compensation module is used to be turned on during the threshold compensation stage.

5. The array substrate according to claim 4, characterized in that, The control terminal of the data writing module is electrically connected to the second scan signal line, the first terminal of the data writing module is electrically connected to the data voltage signal line, and the second terminal of the data writing module is electrically connected to the second terminal of the drive module. Preferably, the operation of the pixel circuit includes a data writing stage, and the data writing module is used to be turned on during the data writing stage; Preferably, the data writing phase and the threshold compensation phase overlap for at least a portion of their time periods.

6. The array substrate according to claim 1, characterized in that, The pixel circuit also includes: The second storage module has a first terminal electrically connected to the first gate of the driving module and a second terminal electrically connected to the first electrode of the light-emitting element. Preferably, the pixel circuit further includes: A first light-emitting control module, wherein the control terminal of the first light-emitting control module is electrically connected to a first light-emitting control signal line, the first terminal of the first light-emitting control module is electrically connected to the first power signal line, and the second terminal of the first light-emitting control module is electrically connected to the first terminal of the driving module. Preferably, the operation of the pixel circuit includes an initialization phase and an emission phase, and the first emission control module is used to turn on during the initialization phase and the emission phase.

7. The array substrate according to claim 1, characterized in that, The pixel circuit also includes: An initialization module is provided, wherein the control terminal of the initialization module is electrically connected to the third scan signal line, the first terminal of the initialization module is electrically connected to the reference signal line, and the second terminal of the initialization module is electrically connected to the first electrode of the light-emitting element. Preferably, the operation of the pixel circuit includes an initialization phase, and the initialization module is used to turn on during the initialization phase; Preferably, the operation of the pixel circuit further includes a data writing stage, and the initialization module is also used to turn on the circuit during the data writing stage. Preferably, the pixel circuit further includes: The second light-emitting control module has its control terminal electrically connected to the second light-emitting control signal line, its first terminal electrically connected to the second terminal of the driving module, and its second terminal electrically connected to the first electrode of the light-emitting element. Preferably, the operation of the pixel circuit includes a light-emitting stage, and the second light-emitting control module is used to turn on during the light-emitting stage.

8. The array substrate according to claim 1, characterized in that, The first terminal of the driving transistor is electrically connected to the first power signal line, and the second terminal of the driving transistor is coupled to the first electrode of the light-emitting element; Preferably, the first gate of the driving transistor is a top gate, and the second gate of the driving transistor is a bottom gate; Preferably, the threshold adjustment module includes: A first transistor, wherein a first terminal of the first transistor and a gate of the first transistor are electrically connected to a second gate of the first transistor, and a second terminal of the first transistor is electrically connected to a first electrode of the light-emitting element; Preferably, the data writing module includes: The second transistor, which is electrically connected to the driving transistor, is used to write a data voltage to the first gate. Preferably, the pixel circuit further includes a first storage module, the first storage module comprising: A first capacitor, the first plate of which is electrically connected to the second gate of the first transistor, and the second plate of which is electrically connected to the first electrode of the light-emitting element.

9. A display panel, characterized in that, The display panel includes an array substrate as described in any one of claims 1-8.

10. A display device, characterized in that, The display device includes the display panel as described in claim 9.

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