Polycrystalline diamond memristor based on grain boundary engineering and preparation method thereof

Abstract

The invention discloses a polycrystalline diamond memristor based on grain boundary engineering and a preparation method thereof, and relates to the technical field of semiconductor electronic devices. In order to solve the problems that an existing oxide or sulfide memristor is difficult to adapt to high-temperature, high-frequency, high-power and other extreme working conditions, and an existing diamond memristor is low in switching ratio and large in randomness of a conductive channel, so that the stability is poor, the following technical scheme is provided: the memristor comprises a conductive silicon bottom electrode, a polycrystalline diamond resistive layer and a top electrode layer; the preparation method comprises the following steps: growing a polycrystalline diamond film by using a microwave plasma chemical vapor deposition technology, carrying out preferential catalytic etching on a diamond grain boundary at a high temperature by using metallic nickel so as to construct a controllable micro-nano scale conductive channel in the film, and finally removing nickel and depositing the top electrode layer. The device has the advantages of simple structure, high temperature resistance, high voltage resistance, high radiation resistance and the like, and has a wide application prospect in the field of nonvolatile storage and calculation in extreme environments such as aerospace and nuclear energy monitoring.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor electronic devices, and particularly relates to a polycrystalline diamond memristor based on grain boundary engineering. BACKGROUND

[0002] With the rapid development of big data, artificial intelligence and Internet of Things technology, higher requirements are put forward for the high density, low power consumption and high speed read-write performance of memory devices. As the fourth basic circuit element after resistance, capacitance and inductance, the memristor is considered to be a strong competitor for the next generation of high-density memory and neuromorphic computing systems due to its simple structure, small cell size, fast read-write speed and non-volatile storage characteristics.

[0003] Current research on memristors mainly focuses on resistive random access memory based on transition metal oxides (such as HfO2, TiO2, Ta2O5, etc.) or sulfide materials. However, these traditional materials have inherent limitations in terms of physical and chemical stability. Specifically, in extreme environments such as aerospace, nuclear energy monitoring, and earth exploration, or in high-frequency and high-power application scenarios such as radar transmitters, traditional oxide or sulfide materials are prone to thermal breakdown or chemical decomposition, leading to device failure. Therefore, finding a resistive random access memory that can withstand high temperature, high pressure, high radiation and has excellent thermal stability is the key to promoting the application of memristors in extreme environments.

[0004] Diamond, as a semiconductor material with an ultra-wide bandgap (5.5eV), high thermal conductivity, high breakdown field strength and excellent chemical inertness, is known as the "ultimate semiconductor" and is theoretically very suitable for the preparation of electronic devices that can withstand extreme environments. There have been attempts to use diamond to prepare memristors, but existing diamond memristor technology still has significant defects: Low switching ratio: Existing diamond memristors often rely on randomly distributed defects or simple doping within the diamond to form conductive channels, resulting in a small resistance difference (usually less than 10²) between the high resistance state and the low resistance state, which easily causes reading errors and is difficult to meet the high signal-to-noise ratio requirements in practical applications.

[0005] Conductive channel is uncontrollable and has poor stability: Due to the lack of effective constraints on the formation path of the conductive filament, the formation and rupture of the conductive filament during multiple cycle erase-write processes are random, resulting in poor retention characteristics and durability of the device, and thermal instability due to Joule heating effect.

[0006] Complex preparation process: Some high-performance diamond devices require expensive single-crystal diamond substrates or complex ion implantation processes, which are costly and difficult to be compatible with existing microelectronic processes.

[0007] Therefore, how to develop a diamond memristor with simple process, effective regulation of conductive channel formation, high on-off ratio and high stability by utilizing the naturally existing grain boundary network in polycrystalline diamond is a technical problem to be solved in the field. SUMMARY

[0008] The polycrystalline diamond memristor based on grain boundary engineering is provided to solve the problems that the existing memristor based on traditional oxides and sulfides is difficult to be applied under high temperature, high frequency and high power working conditions, and the existing diamond memristor has low on-off ratio and poor thermal stability.

[0009] The technical scheme for solving the above technical problems is as follows: The polycrystalline diamond memristor based on grain boundary engineering comprises a bottom electrode layer, a polycrystalline diamond variable resistance layer and a top electrode layer. The polycrystalline diamond variable resistance layer is deposited on the surface of the bottom electrode layer by microwave plasma chemical vapor deposition technology, and the top electrode layer is deposited on the top end of the polycrystalline diamond variable resistance layer by magnetron sputtering technology.

[0010] Further, the bottom electrode layer is a conductive silicon substrate with a thickness of 400-600 μm and is treated by heavy phosphorus doping, and the conductivity is 0.0015 Ω·cm.

[0011] Further, the polycrystalline diamond variable resistance layer is a polycrystalline diamond film polished by argon ions, and the thickness is 100-300 nm.

[0012] Further, the top electrode layer is metal silver Ag, and the thickness is 50-60 nm.

[0013] A preparation method of a polycrystalline diamond memristor based on grain boundary engineering comprises the following steps: S1: clean the bottom electrode layer, and then deposit a polycrystalline diamond film on it by microwave plasma chemical vapor deposition technology to form a polycrystalline diamond variable resistance layer; S2: polish the surface of the deposited polycrystalline diamond variable resistance layer by argon ion etching technology; S3: deposit metal nickel Ni on the surface of the polished polycrystalline diamond variable resistance layer and perform heat treatment to preferentially catalyze etching of the grain boundaries of the polycrystalline diamond variable resistance layer by the metal Ni, and construct a conductive channel; S4: immerse the heat-treated polycrystalline diamond variable resistance layer in a mixed solution of nitric acid and hydrochloric acid to remove the remaining metal Ni; S5: deposit active metal Ag on the polycrystalline diamond variable resistance layer by magnetron sputtering technology to obtain a top electrode layer.

[0014] The thickness of the polycrystalline diamond film deposited by microwave plasma chemical vapor deposition in S1 is 1-3 μm; the deposition conditions include the use of high-purity hydrogen and methane, and a substrate temperature of 750 °C.

[0015] In S2, argon ion etching technology is used to polish the surface of the polycrystalline diamond resistive switching layer to 100-300nm.

[0016] In S3, the heat treatment temperature is 900-920℃; in S4, the mixed solution is made by mixing nitric acid and hydrochloric acid in a volume ratio of 3:1, and the conditions for soaking to remove metallic Ni are: soaking at 50-70℃ for 180 minutes.

[0017] After S5, a scanning voltage of -15V to 15V is applied to the polycrystalline diamond resistive switching layer through the bottom electrode layer and the top electrode layer, and the current limit is set to 0.1A. This induces Ag in the top electrode layer to enter the grain boundary channel of the polycrystalline diamond resistive switching layer to form conductive filaments, thus completing the initialization of the memristor.

[0018] This invention offers the following advantages: By employing grain boundary engineering technology, this invention utilizes nickel-based preferential catalytic etching of polycrystalline diamond grain boundaries to artificially construct controllable conductive channels. Compared to traditional diamond devices that rely on random defects, the memristor of this invention exhibits an extremely high on / off ratio (>10). 4 It exhibits excellent non-volatile retention characteristics, a large read / write window, and a low bit error rate. Furthermore, this invention directly grows a polycrystalline diamond film as a resistive switching layer on a conductive silicon substrate, eliminating the need for an additional resistive switching material layer, expensive single-crystal diamond substrates, or complex ion implantation processes. The fabrication method boasts good compatibility, relatively low cost, and ease of large-scale production. Attached Figure Description

[0019] Figure 1 This is an isometric view of the device structure of Embodiment 1 of a polycrystalline diamond memristor based on grain boundary engineering; Figure 2 This is a side view of the device structure of Embodiment 1 of a polycrystalline diamond memristor based on grain boundary engineering; Figure 3 This is a flowchart of a method for fabricating polycrystalline diamond memristors based on grain boundary engineering. Figure 4 The IV curve of a polycrystalline diamond memristor based on grain boundary engineering; Figure 5 The IV curves of five positive and negative scans for a polycrystalline diamond memristor based on grain boundary engineering; Figure 6 The retention characteristic curve of a polycrystalline diamond memristor based on grain boundary engineering is shown. Figures 1 to 6The reference numerals in the figures are respectively: 1-bottom electrode layer, 2-polycrystalline diamond resistive switching layer, and 3-top electrode layer. Detailed Implementation

[0020] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Example 1 As attached Figures 1-2 As shown, a polycrystalline diamond memristor based on grain boundary engineering includes a bottom electrode layer 1, a polycrystalline diamond resistive switching layer 2, and a top electrode layer 3. The bottom electrode layer 1 is a conductive silicon (Si) substrate with dimensions of 1 cm × 1 cm, a thickness of 600 μm, and a conductivity of 0.0015 Ω·cm. The polycrystalline diamond resistive switching layer 2 is located on the surface of the bottom electrode layer 1 and has a thickness of 300 nm. The top electrode layer 3 is located at the top of the resistive switching layer 2, is made of metallic silver (Ag), and has a thickness of 60 nm.

[0022] As attached Figure 3 As shown, a method for fabricating a polycrystalline diamond memristor based on grain boundary engineering includes the following steps: Substrate cleaning: The conductive Si bottom electrode layer 1 with a size of 1cm×1cm was sequentially immersed in acetone, anhydrous ethanol and deionized water, and ultrasonically cleaned for 15 minutes at a power of 100W. After cleaning, it was dried with a nitrogen gun for later use.

[0023] Depositing diamond film: The cleaned bottom electrode layer 1 is placed in a microwave plasma chemical vapor deposition (MPCVD) system, and high-purity hydrogen (H2) and methane (CH4) are introduced. Under the condition of substrate temperature of 750℃, a polycrystalline diamond film with an initial thickness of about 2~3μm is grown.

[0024] Surface polishing: using argon ion (Ar) polishing + The etching technique is used to polish the surface of the deposited polycrystalline diamond film, making the film surface smooth and reducing the final thickness to 300nm, forming a polycrystalline diamond resistive switching layer 2.

[0025] Grain boundary engineering (construction of conductive channels): Metallic nickel (Ni) is deposited on the polished polycrystalline diamond resistive switching layer 2, and then placed in a high-temperature furnace for heat treatment at 920°C. Utilizing the preferential catalytic etching effect of metallic Ni on diamond grain boundaries at high temperatures, micro- and nano-scale conductive channels are constructed within the dense polycrystalline diamond film.

[0026] Removal of metal catalyst: The heat-treated sample was placed in a mixed solution of nitric acid and hydrochloric acid with a volume ratio of 3:1 and immersed at 60°C for 180 minutes to completely remove residual metallic Ni while preserving grain boundary channels.

[0027] Preparation of the top electrode: Under vacuum conditions, a 60 nm thick layer of metallic Ag was deposited on the surface of the treated polycrystalline diamond resistive switching layer 2 using magnetron sputtering technology to obtain the top electrode layer 3.

[0028] Device initialization: The bottom electrode layer 1 and the top electrode layer 3 are connected by a probe, and a scanning voltage of -15V to 15V (current limited to 0.1A) is applied to induce the formation of Ag conductive filaments in the grain boundary channels, thus completing the device fabrication.

[0029] Example 2 The only difference between this embodiment and Embodiment 1 is the structural parameters of the device and some fabrication process parameters; the remaining fabrication steps are exactly the same as in Embodiment 1.

[0030] The specific differences are as follows: Device structure parameters were adjusted as follows: The thickness of the bottom electrode layer 1 (conductive Si) is 400 μm. The final thickness of the polycrystalline diamond resistive switching layer 2 is 100 nm. The thickness of the top electrode layer 3 (Ag) is 50 nm.

[0031] Preparation process parameter adjustments: In step S1, the initial thickness of the polycrystalline diamond film deposited by MPCVD is 1 μm. In step S2, argon ion polishing is performed to 100 nm. In step S3, the heat treatment temperature is set to 900 °C. In step S4, the acid pickling and immersion temperature is set to 50 °C.

[0032] Because the resistive switching layer is thin (100nm), the device fabricated in this embodiment has a lower forming voltage, which helps to reduce the initial power consumption of the device.

[0033] Example 3 The only difference between this embodiment and Embodiment 1 is the structural parameters of the device and some fabrication process parameters; the remaining fabrication steps are exactly the same as in Embodiment 1.

[0034] The specific differences are as follows: Device structure parameters were adjusted as follows: the thickness of the bottom electrode layer 1 is 600 μm. The final thickness of the polycrystalline diamond resistive switching layer 2 is 300 nm. The thickness of the top electrode layer 3 (Ag) is 60 nm.

[0035] Adjustment of fabrication process parameters: In step S1, the initial thickness of the polycrystalline diamond film deposited by MPCVD is 3 μm. In step S2, argon ion polishing is performed to 300 nm. In step S3, the heat treatment temperature is set to 920 °C. In step S4, the acid pickling and immersion temperature is set to 70 °C.

[0036] Example 3 Effect Description: The thicker resistive switching layer (300nm) combined with the higher heat treatment temperature (920℃) gives the device prepared in this example higher withstand voltage and excellent thermal stability, making it suitable for harsh working environments.

[0037] The electrical performance of the memristor prepared in this embodiment was tested: Figure 4 The typical IV characteristic curves of the device under DC voltage scanning are shown. It can be seen that the device exhibits significant bipolar resistive switching behavior and has clear SET and RESET processes.

[0038] To verify the stability of the device, five consecutive positive and negative voltage scans were performed, and the results are as follows: Figure 5 As shown in the figure, the IV curves of the five scans exhibit high consistency, indicating that the memristor has excellent cycle stability.

[0039] In addition, retention characteristics of the device in the high-resistivity state (HRS) and low-resistivity state (LRS) were tested, and the results are as follows: Figure 6 As shown, under room temperature conditions, the high and low resistance states of the device did not show significant decay over a long period of time, proving that the polycrystalline diamond memristor based on grain boundary engineering has good non-volatile data retention capability.

[0040] Comparative Example 1 To further illustrate the beneficial effects of the key technical feature of "grain boundary engineering (Ni catalytic etching)" in this invention, Comparative Example 1 is provided.

[0041] Preparation process: The preparation method of Comparative Example 1 is basically the same as that of Example 1, except that steps S3 (Ni deposition and heat treatment) and S4 (acid washing to remove Ni) are omitted. That is, after depositing polycrystalline diamond on a conductive Si substrate and polishing it, Ag top electrode is directly sputtered on the diamond surface.

[0042] Test Result Comparison: The device prepared in Comparative Example 1 and the device prepared in Example 1 were subjected to IV characteristic tests under the same conditions (limited current 0.1A, scan voltage -15V~15V): Example 1 (Invention): Exhibits stable bipolar resistive switching behavior, with the Set voltage (turn-on voltage) stabilizing at around 10.5V and the Reset voltage (turn-off voltage) stabilizing at around -10V, and an on / off ratio >10. 4 This is because after Ni etching, channels that facilitate the migration of Ag ions are formed at the diamond grain boundaries.

[0043] Comparative Example 1 (Granule-less Engineering): After applying voltage, the device exhibits little to no resistive switching, or it shows a one-time hard breakdown, making repeated erasing and writing impossible. This is because the unetched polycrystalline diamond grain boundaries are extremely dense, making it difficult for Ag ions to migrate effectively and form reversible conductive filaments. Conclusion: The comparative analysis shows that preferential catalytic etching of polycrystalline diamond grain boundaries using metallic Ni is key to achieving high-performance diamond memristors.

[0044] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A polycrystalline diamond memristor based on grain boundary engineering, characterized in that, It includes a bottom electrode layer (1), a polycrystalline diamond resistive switching layer (2) and a top electrode layer (3); the polycrystalline diamond resistive switching layer (2) is deposited on the surface of the bottom electrode layer (1) by microwave plasma chemical vapor deposition technology, and the top electrode layer (3) is deposited on the top of the polycrystalline diamond resistive switching layer (2) by magnetron sputtering technology.

2. The polycrystalline diamond memristor based on grain boundary engineering according to claim 1, characterized in that, The bottom electrode layer (1) is a conductive silicon (Si) substrate with a thickness of 400-600 μm and is heavily doped with phosphorus, with a conductivity of 0.0015 Ω·cm.

3. The polycrystalline diamond memristor based on grain boundary engineering according to claim 1, characterized in that, The polycrystalline diamond resistive switching layer (2) is a polycrystalline diamond film polished by argon ions, with a thickness of 100-300nm.

4. The polycrystalline diamond memristor based on grain boundary engineering according to claim 1, characterized in that, The top electrode layer (3) is metallic silver (Ag) with a thickness of 50-60 nm.

5. A method for fabricating a polycrystalline diamond memristor based on grain boundary engineering, characterized in that, The polycrystalline diamond memristor based on grain boundary engineering as described in any one of claims 1-4 includes the following steps: S1: Clean the bottom electrode layer (1), and then deposit a polycrystalline diamond film on it using microwave plasma chemical vapor deposition technology to form a polycrystalline diamond resistive switching layer (2). S2: The surface of the deposited polycrystalline diamond resistive switching layer (2) is polished using argon ion etching technology; S3: Deposit metallic nickel (Ni) on the surface of the polished polycrystalline diamond resistive switching layer (2) and perform heat treatment to preferentially catalytically etch the grain boundaries of the polycrystalline diamond resistive switching layer (2) using metallic Ni to construct conductive channels. S4: The heat-treated polycrystalline diamond resistive switching layer (2) is immersed in a mixed solution of nitric acid and hydrochloric acid to remove the remaining metallic Ni. S5: Active metal Ag is deposited on the polycrystalline diamond resistive switching layer (2) using magnetron sputtering technology to obtain the top electrode layer (3).

6. The method for fabricating a polycrystalline diamond memristor based on grain boundary engineering according to claim 5, characterized in that, The thickness of the polycrystalline diamond film deposited by microwave plasma chemical vapor deposition in S1 is 1-3 μm; the deposition conditions include the use of high-purity hydrogen and methane, and a substrate temperature of 750°C.

7. The method for fabricating a polycrystalline diamond memristor based on grain boundary engineering according to claim 5, characterized in that, In S2, the surface of the polycrystalline diamond resistive switching layer (2) is polished to 100-300nm using argon ion etching technology.

8. The method for fabricating a polycrystalline diamond memristor based on grain boundary engineering according to claim 5, characterized in that, In step S3, the heat treatment temperature is 900-920℃; in step S4, the mixed solution is composed of nitric acid and hydrochloric acid mixed in a volume ratio of 3:1, and the conditions for soaking to remove metallic Ni are: soaking at 50-70℃ for 180 minutes.

9. The method for fabricating a polycrystalline diamond memristor based on grain boundary engineering according to claim 5, characterized in that, After S5, a scanning voltage of -15V to 15V is applied to the polycrystalline diamond resistive switching layer (2) through the bottom electrode layer (1) and the top electrode layer (3), and the limiting current is set to 0.1A. This induces Ag in the top electrode layer (3) to enter the grain boundary channel of the polycrystalline diamond resistive switching layer (2) to form conductive filaments, thus completing the initialization of the memristor.

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