Display substrate, manufacturing method thereof and display device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-25
- Publication Date
- 2026-03-27
AI Technical Summary
In existing LED display substrates, LED light-emitting chips are difficult to repair once damaged.
By introducing an intermetallic compound barrier layer and a bonding layer into the display substrate, and connecting the light-emitting unit to the driving trace layer through eutectic bonding technology, the light-emitting unit can be replaced and rebonded in case of bonding abnormality.
This achieves repairability of LED light-emitting chips, improving the reliability and ease of maintenance of the display substrate.
Smart Images

Figure CN121753515A_ABST
Abstract
Description
Display substrate, manufacturing method thereof and display device TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of display, in particular to a display substrate, a manufacturing method thereof and a display device. BACKGROUND
[0002] With the development of the display technical field, the mini Light-Emitting Diode (LED) display substrate has the advantages of high color purity, wide dynamic range, high brightness, high definition, low working voltage, low power consumption, long service life, impact resistance, large viewing angle and stable and reliable working, etc. The LED display substrate will become the most advantageous new generation of display media, wherein the LED display substrate includes a plurality of LED light emitting chips arranged in an array. The research and development of the LED light emitting chips, especially the mini-LED and micro-LED light emitting chips, has become an important issue in the display field.
[0003] In the current LED display substrate, once the LED light emitting chip is damaged, it is difficult to repair the LED light emitting chip.
[0004] SUMMARY
[0005] The present disclosure aims to at least solve one of the technical problems existing in the prior art, and proposes a display substrate, a manufacturing method thereof and a display device.
[0006] In order to achieve the above-mentioned purpose, the present disclosure provides a display substrate, comprising:
[0007] a substrate;
[0008] a driving wire layer disposed on the substrate, the driving wire layer comprising a plurality of first conductive pads;
[0009] a plurality of bonding structures disposed on a side of the driving wire layer away from the substrate; the bonding structures are connected one by one with the first conductive pads, the bonding structure comprises a bonding part, the bonding part comprises an intermetallic compound barrier layer and a bonding layer disposed in sequence in a direction away from the substrate; wherein at least one of the plurality of bonding structures comprises a plurality of bonding parts stacked in a direction away from the substrate;
[0010] a plurality of light emitting units disposed on a side of the plurality of bonding structures away from the substrate, the light emitting units being bonded with the bonding layer.
[0011] In some embodiments, the intermetallic compound barrier layer comprises a first surface facing the substrate and a second surface away from the substrate, the roughness of the second surface is greater than the roughness of the first surface.
[0012] In some embodiments, the intermetallic compound barrier layer has a thickness between 0.1 and 0.5 microns.
[0013] In some embodiments, the plurality of light emitting units comprises a plurality of first light emitting units and at least one second light emitting unit.
[0014] The plurality of bonding structures comprises a first bonding structure bonded with the first light emitting unit and a second bonding structure bonded with the second light emitting unit, the first bonding structure comprises M bonding portions, the second bonding structure comprises N bonding portions, M and N are integers greater than 0, and M>N.
[0015] In some embodiments, the light emitting unit comprises a light emitting chip and a second conductive pad electrically connected with the light emitting chip, the second conductive pad is located on a side of the light emitting chip facing the substrate and is bonded with the bonding layer.
[0016] The thickness of the second conductive pad of the second light emitting unit is greater than or equal to the thickness of the second conductive pad of the first light emitting unit.
[0017] In some embodiments, the distance from the surface of the first light emitting unit away from the substrate to the substrate is equal to the distance from the surface of the second light emitting unit away from the substrate to the substrate.
[0018] In some embodiments, the light emitting unit comprises a light emitting chip and a second conductive pad electrically connected with the light emitting chip; the light emitting chip comprises a first electrode, a light emitting body and a second electrode arranged in sequence in a direction away from the substrate, the second conductive pad is electrically connected with the first electrode and is bonded with the bonding layer.
[0019] In some embodiments, the driving wire layer further comprises a third conductive pad; the display substrate further comprises:
[0020] A plurality of insulating portions, each of the insulating portions surrounds one of the light emitting units and the bonding structure bonded with the light emitting unit, a first via hole is formed on the insulating portion, the first via hole exposes the second electrode; there is a spacing region between two adjacent insulating portions, the orthogonal projection of the spacing region on the substrate covers the orthogonal projection of the third conductive pad on the substrate.
[0021] A connecting electrode, the connecting electrode is electrically connected with the second electrode through the first via hole and is electrically connected with the third conductive pad.
[0022] In some embodiments, the first conductive pad and the connecting electrode are respectively used to provide a first signal and a second signal to the light emitting chip; wherein,
[0023] Each of the connection electrodes is electrically connected with a second electrode of a light emitting chip; or,
[0024] A first end of each of the connection electrodes is electrically connected with a second electrode of a light emitting chip through the first via, and a second end of the connection electrode is electrically connected with the driving trace layer.
[0025] In some embodiments, the display area of the display substrate is divided into a plurality of sub-pixel areas, and each of the light emitting units is located in a sub-pixel area.
[0026] Each of the connection electrodes is electrically connected with a second electrode of a light emitting chip, the plurality of light emitting units are divided into a plurality of groups, each group includes at least two light emitting units connected in series, and the light emitting units in the same group correspond to sub-pixel areas of the same light emitting color.
[0027] For two light emitting units connected in series, the second electrode of one of the light emitting units is electrically connected with the connection electrode corresponding to the second electrode of the other light emitting unit.
[0028] In some embodiments, the insulating part includes:
[0029] A first sub-insulating part having a receiving groove, the light emitting unit and the bonding structure bonded with the light emitting unit are located in the receiving groove, and a first reflective layer is arranged on the sidewall of the receiving groove.
[0030] A second sub-insulating part, at least part of the second sub-insulating part is located in the receiving groove, and the first via penetrates the second sub-insulating part.
[0031] In some embodiments, the cross section of the receiving groove gradually decreases in the direction close to the substrate.
[0032] In some embodiments, the light emitting unit includes a light emitting chip and a second conductive pad electrically connected with the light emitting chip; the light emitting chip includes a light emitting body, and a first electrode and a second electrode located on the side of the light emitting body facing the substrate; the first electrode and the second electrode are both electrically connected with the respective corresponding second conductive pad, and each of the second conductive pads is bonded with the bonding structure.
[0033] In the same light emitting unit, the bonding structures corresponding to the first electrode and the second electrode have the same number of bonding parts.
[0034] In some embodiments, the display substrate further includes a barrier wall between adjacent two light emitting units, and a second reflective layer is arranged on the sidewall of the barrier wall facing the light emitting unit.
[0035] In some embodiments, the width of the barrier wall gradually increases in a direction close to the substrate.
[0036] In some embodiments, the light-emitting color of the plurality of light-emitting units comprises multiple colors.
[0037] In some embodiments, the display substrate further comprises:
[0038] a planarization layer located on a side of the light-emitting unit away from the substrate;
[0039] a light-blocking layer located on a side of the planarization layer away from the substrate, the light-blocking layer having openings corresponding to the light-emitting units, the openings overlapping with the corresponding light-emitting units in orthographic projection on the substrate.
[0040] In some embodiments, the light-emitting unit is configured to emit light of a first color;
[0041] The display substrate further comprises a plurality of optical functional units, each optical functional unit being disposed on a side of a corresponding light-emitting unit away from the substrate; the plurality of optical functional units comprises a plurality of first optical functional units, a plurality of second optical functional units, and a plurality of third optical functional units; the first optical functional units are configured to convert light of the first color emitted by the light-emitting units into light of a second color; the second optical functional units are configured to convert light of the first color emitted by the light-emitting units into light of a third color; and the third optical functional units are configured to maintain the first color light.
[0042] In some embodiments, the display substrate further comprises a plurality of filter units, the plurality of filter units comprising:
[0043] a plurality of first filter units, each first filter unit being disposed on a side of a corresponding first optical functional unit away from the substrate and configured to transmit the light of the second color and filter out the rest of the light other than the light of the second color;
[0044] a plurality of second filter units, each second filter unit being disposed on a side of a corresponding second optical functional unit away from the substrate and configured to transmit the light of the third color and filter out the rest of the light other than the light of the third color.
[0045] In some embodiments, the display substrate further comprises:
[0046] a planarization layer located on a side of the light-emitting unit away from the substrate;
[0047] a light-blocking layer located on a side of the filling layer away from the substrate, the light-blocking layer having openings corresponding to the optical functional units, the optical functional units being disposed in the corresponding openings.
[0048] The display device also includes the display substrate as described above.
[0049] The display substrate manufacturing method also includes:
[0050] forming a driving wire layer on the substrate, the driving wire layer including a plurality of first conductive pads;
[0051] forming a plurality of bonding structures on the driving wire layer away from the substrate; the bonding structure including a plurality of bonding portions stacked in a direction away from the substrate; the bonding portion including an intermetallic compound barrier layer and a bonding layer arranged in sequence in a direction away from the substrate;
[0052] bonding each of the plurality of light emitting units to the bonding layer of the bonding structure.
[0053] In some embodiments, the manufacturing method further includes:
[0054] detecting whether the light emitting unit has a bonding abnormality;
[0055] if there is a light emitting unit with a bonding abnormality, removing the light emitting unit with a bonding abnormality and the bonding portion directly bonded thereto;
[0056] at the position of the removed light emitting unit, arranging a new light emitting unit and bonding the new light emitting unit to the remaining bonding portion.
[0057] In some embodiments, the bonding layer includes a plurality of sub-bonding layers, the plurality of sub-bonding layers including: first sub-bonding layers and second sub-bonding layers arranged alternately in a direction away from the substrate, the first sub-bonding layers having a higher melting point than the second sub-bonding layers; among the plurality of sub-bonding layers, the one closest to the substrate is the first sub-bonding layer, and the one farthest from the substrate is the second bonding layer.
[0058] In some embodiments, the first sub-bonding layer and the second sub-bonding layer each have a thickness of 0.3-3 microns. BRIEF DESCRIPTION OF DRAWINGS
[0059] The accompanying drawings are included to provide a further understanding of the present disclosure and constitute a part of the specification, which together with the specific embodiments described below, serve to explain the present disclosure. The drawings are as follows:
[0060] FIG. 1 is a schematic diagram of a display substrate provided in a first embodiment of the present disclosure.
[0061] FIG. 2 is a schematic diagram of a display substrate provided in a second embodiment of the present disclosure.
[0062] FIG. 3 is a schematic view of a display substrate provided in a third embodiment of the present disclosure.
[0063] FIG. 4 is a schematic view of a display substrate provided in a fourth embodiment of the present disclosure.
[0064] FIG. 5 is a schematic view of a display substrate provided in a fifth embodiment of the present disclosure.
[0065] FIG. 6 is a schematic view of a display substrate provided in a sixth embodiment of the present disclosure.
[0066] FIG. 7 is a schematic view of a display substrate provided in a seventh embodiment of the present disclosure.
[0067] FIG. 8 is a schematic view of a display substrate provided in an eighth embodiment of the present disclosure.
[0068] FIG. 9 is a schematic view of a display substrate provided in a ninth embodiment of the present disclosure.
[0069] FIG. 10 is a schematic view of a display substrate provided in a tenth embodiment of the present disclosure.
[0070] FIGS. 11A to 11K are schematic views of a manufacturing process of a display substrate provided in some embodiments of the present disclosure. DETAILED DESCRIPTION
[0071] The specific embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely intended to illustrate and explain the present disclosure, and are not intended to limit the present disclosure.
[0072] To make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without any inventive effort belong to the scope of protection of the present disclosure.
[0073] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the meanings as understood by a person of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", and similar terms are used herein to distinguish one element from another, but do not necessarily indicate an order of importance, a number or one of several. Similarly, the terms "comprises", "comprising", "includes", "including" and the like can be used herein to indicate that elements or objects appearing before the terms are included in the terms, and the like, and do not exclude other elements or objects. The terms "connected", "coupled" and the like can not be limited to physical or mechanical connections or couplings, but can include electrical connections or couplings, whether direct or indirect. The terms "upper", "lower", "left", "right" and the like are used herein only to represent relative positional relationships, and can change when the absolute positions of the described objects change.
[0074] As used herein, "parallel", "perpendicular" include the recited condition and conditions that are approximately the recited condition, the range of which is within an acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and approximately parallel, wherein the acceptable deviation range of approximately parallel can be, for example, within 5°; "perpendicular" includes absolute perpendicular and approximately perpendicular, wherein the acceptable deviation range of approximately perpendicular can also be, for example, within 5°.
[0075] It should be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present.
[0076] Exemplary embodiments are described herein with reference to cross-sectional and / or plan view illustrations that are idealized examples. In the interest of clarity, not all of the layer and regions are shown in the drawings with the same dimensions. For example, the thickness of layers and regions can be exaggerated in the drawings. Thus, the exemplary embodiments are not intended to be limited to the illustrations as shown in the drawings, but include variations as would be known to persons of ordinary skill in the art. Therefore, the regions shown in the drawings are intended to be illustrative only and are not necessarily drawn to scale. The same or similar reference numerals can be used in different drawings to indicate the same or similar elements.
[0077] In the manufacturing process of the LED display substrate, the LED light emitting chip is transferred to the driving backboard (the driving backboard includes a substrate and a driving trace layer arranged on the substrate) through a mass transfer technology, so as to form various different sizes of LED displays.
[0078] Currently, the repair technology of LED light emitting chips mainly includes two kinds. One is to remove the damaged LED light emitting chip and then transfer a new LED light emitting chip. For small-sized LED light emitting chips (for example, Micro LED light emitting chips below 100 microns), eutectic bonding technology is mainly used. The main process is to form a plurality of first conductive pads on the driving backplane, and then bond the LED light emitting chip with the first conductive pad. Since the first conductive pad is difficult to be deposited again, it is difficult to repair the LED light emitting chip once the LED light emitting chip is damaged.
[0079] In order to facilitate the repair of the LED light emitting chip, the display substrate provided by the embodiments of the present disclosure. FIG. 1 is a schematic diagram of a display substrate provided in a first embodiment of the present disclosure, and FIG. 2 is a schematic diagram of a display substrate provided in a second embodiment of the present disclosure. As shown in FIGS. 1 and 2, the display substrate includes a substrate 10, a driving trace layer 20, a plurality of bonding structures 40, and a plurality of light emitting units 30. The substrate 10 can be a hard substrate made of glass material, or a flexible substrate made of polyimide (PI) material, etc. The driving trace layer 20 is disposed on the substrate 10 and includes a plurality of first conductive pads 21, which can be made of metal material. For example, the driving trace layer 20 can include a signal line layer 22 and a plurality of first conductive pads 21 electrically connected to the signal line layer 22. The side of the signal line layer 22 away from the substrate 10 can be provided with an insulating layer 11, and the first conductive pads 21 are electrically connected to the signal line layer 22 through a via hole on the insulating layer 11. The material of the insulating layer 11 can include silicon nitride, silicon oxide, silicon oxynitride, etc., and the insulating layer 11 can be a single film layer or a plurality of film layers stacked.
[0080] The plurality of bonding structures 40 are disposed on the side of the driving trace layer 20 away from the substrate 10. The bonding structure 40 is connected one by one with the first conductive pad 21, and the bonding structure 40 includes at least one bonding part 41, which includes an intermetallic compound (IMC) barrier layer 412 and a bonding layer 411 disposed in sequence away from the substrate 10. The intermetallic compound barrier layer 412 is made of conductive material and is used to prevent the metal materials on both sides from reacting with each other to form intermetallic compounds. At least one of the plurality of bonding structures 40 includes a plurality of bonding parts 41 stacked in sequence away from the substrate 10.
[0081] The plurality of light emitting units 30 are disposed on the side of the plurality of bonding structures 40 away from the substrate 10, and the light emitting unit 30 is bonded with the bonding layer 411. For example, the light emitting unit 30 in the embodiments of the present disclosure is bonded with the bonding layer 411, which means eutectic bonding.
[0082] The display substrate has a display area, which can be divided into a plurality of sub-pixel areas, and each light emitting unit 30 is located in a sub-pixel area.
[0083] In the embodiments of the present disclosure, the at least one bonding structure 40 includes a plurality of bonding parts 41, and the light emitting unit 30 is bonded to the bonding layer 411 of the bonding part 41. When a bonding abnormality occurs in a certain light emitting unit 30, the light emitting unit 30 with the bonding abnormality and the bonding part 41 connected thereto can be removed, and a new light emitting unit 30 is bonded to the remaining bonding part 41 at the position of the bonding abnormality, so as to achieve the purpose of repairing the light emitting unit 30. Due to the arrangement of the intermetallic compound barrier layer 412, when the light emitting unit 30 is bonded to the bonding layer 411 of the upper layer, the metal below the intermetallic compound barrier layer 412 will not form an intermetallic compound, so as to ensure that the metal below the intermetallic compound barrier layer 412 will not be affected when the light emitting unit 30 with the bonding abnormality is removed.
[0084] The intermetallic compound barrier layer 412 has a first surface facing the substrate 10 and a second surface away from the substrate 10. In some embodiments, the roughness of the second surface is greater than the roughness of the first surface, so that the adhesion of the intermetallic compound barrier layer 412 to the film layer above it is greater, so as to facilitate the removal of the light emitting unit 30 with the bonding abnormality and the bonding part 41 directly bonded thereto without affecting the bonding part 41 below when the light emitting unit 30 has a bonding abnormality.
[0085] In some embodiments, the material of the intermetallic compound barrier layer 412 includes at least one of Mo and Ti. For example, the intermetallic compound barrier layer 412 can be a Mo metal layer, a Ti metal layer, or a stacked structure of the two.
[0086] In some embodiments, the thickness of the intermetallic compound barrier layer 412 is between 0.1 and 0.5 microns, so as to prevent the overall thickness of the bonding structure 40 from being too large while ensuring the blocking effect. For example, the thickness of the intermetallic compound barrier layer 412 is 0.1 microns, or 0.25 microns, or 0.35 microns, or 0.5 microns.
[0087] In some embodiments, the light emitting unit 30 includes a light emitting chip 31 and a second conductive pad 32 electrically connected to the light emitting chip 31, and the second conductive pad 32 is located on the side of the light emitting chip 31 close to the substrate 10 and is bonded to the bonding layer 411.
[0088] The light emitting chip 31 can be a Micro-LED light emitting chip or a Mini-LED light emitting chip.
[0089] In some embodiments, a part of the plurality of light emitting units 30 are first light emitting units 301, and another part of the plurality of light emitting units 30 are second light emitting units 302. The number of the first light emitting units 301 is plural. In the plurality of bonding structures 40, the bonding structures 40 bonded with the first light emitting units 301 are first bonding structures, and the bonding structures 40 bonded with the second light emitting units 302 are second bonding structures. The first bonding structures include M bonding parts 41, and the second bonding structures include N bonding parts 41, where M and N are integers greater than 0, and M>N.
[0090] Specifically, in the process of manufacturing the display substrate, the plurality of bonding structures 40 are formed first, each bonding structure 40 having M bonding parts 41, and then the plurality of light emitting units 30 are formed, each light emitting unit 30 being bonded with a bonding part 41. After that, the light emitting units 30 are detected, and if a fault is detected in a light emitting unit 30, the light emitting unit 30 with the fault and the bonding part 41 bonded therewith are removed. After that, a new light emitting unit 30 is arranged at the position of the light emitting unit 30 with the fault, and the new light emitting unit 30 is bonded with the remaining bonding part 41. The light emitting units 30 without faults remain unchanged. In this case, the light emitting units 30 without faults are the first light emitting units 301, and the new light emitting unit 30 arranged at the position of the light emitting unit 30 with the fault is the second light emitting unit 302. Correspondingly, the bonding structures 40 without the removed bonding parts 41 are the first bonding structures, and the bonding structures 40 with the removed bonding parts 41 are the second bonding structures.
[0091] FIGS. 1 and 2 are schematic illustrations with N=1 and M=2 as examples; of course, in other examples, M and N can also be other values.
[0092] In one example, as shown in FIG. 1, the thickness of the second conductive pad 32 of the second light emitting unit 302 is equal to the thickness of the second conductive pad 32 of the first light emitting unit 301, so that the same process can be used to manufacture the first light emitting unit 301 and the second light emitting unit 302, thereby reducing the process difficulty. In another example, as shown in FIG. 2, the thickness of the second conductive pad 32 of the second light emitting unit 302 is greater than the thickness of the second conductive pad 32 of the first light emitting unit 301, thereby facilitating reduction of the height difference between the surface of the first light emitting unit 301 away from the substrate 10 and the surface of the second light emitting unit 302 away from the substrate 10, and thereby facilitating subsequent device processes. For example, the total thickness of the first light emitting unit 301 and the corresponding first bonding structure is equal to the total thickness of the second light emitting unit 302 and the corresponding second bonding structure, so that the surface of the first light emitting unit 301 away from the substrate 10 and the surface of the second light emitting unit 302 away from the substrate 10 are substantially on the same plane, thereby facilitating subsequent device processes.
[0093] In some embodiments, as shown in FIG. 1 and FIG. 2, the light-emitting chip 31 adopts a vertical structure, which includes, in sequence from the direction away from the substrate 10, a first electrode 311, a light-emitting body 313, and a second electrode 312. The light-emitting body 313 can include, in sequence from the direction away from the substrate 10, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The first electrode 311 and the second electrode 312 can be used as an anode and a cathode, respectively, to cause the transmission of holes and electrons in the first semiconductor layer, the light-emitting layer, and the second semiconductor layer between the first electrode 311 and the second electrode 312 after the first electrode 311 and the second electrode 312 are fed with current, so as to excite the light-emitting layer to emit light.
[0094] The first semiconductor layer is, for example, a P-type gallium nitride (GaN) layer; the light-emitting layer is, for example, a quantum well material (MQW) layer; and the second semiconductor layer is, for example, an N-type gallium nitride layer.
[0095] When the light-emitting chip 31 adopts the vertical structure, the light-emitting chip 31 corresponds to one bonding structure 40, and each first electrode 311 is bonded to one bonding structure 40. The second electrode 312 of the light-emitting chip 31 can be electrically connected to the third conductive pad 23 of the driving trace layer 20 through the connecting electrode 60.
[0096] In one example, as shown in FIG. 1 and FIG. 2, the orthographic projection of the light-emitting unit 30 on the substrate 10 in the direction toward the surface of the substrate 10 is a first orthographic projection, the orthographic projection of the bonding structure 40 on the substrate 10 in the direction away from the surface of the substrate 10 is a second orthographic projection, the first orthographic projection is located within the range of the second orthographic projection, and the cross section of the bonding structure 40 gradually increases in the direction close to the substrate 10. This design is conducive to improving the stability of the overall structure formed by the light-emitting unit 30 and the bonding structure 40. In another example, the orthographic projection of the light-emitting unit 30 on the substrate 10 in the direction toward the surface of the substrate 10 is a first orthographic projection, the orthographic projection of the bonding structure 40 on the substrate 10 in the direction away from the surface of the substrate 10 is a second orthographic projection, the second orthographic projection is located within the range of the first orthographic projection, and the cross section of the bonding structure 40 gradually decreases in the direction close to the substrate 10. This design is conducive to increasing the resolution of the display substrate.
[0097] It should be noted that the "cross section" in the embodiments of the present disclosure refers to a cross section perpendicular to the thickness direction of the display substrate.
[0098] In some embodiments, as shown in FIG. 1 and FIG. 2, when the light emitting chip 31 adopts a vertical structure, the driving trace layer 20 can further include a third conductive pad 23; the first conductive pad 21 and the third conductive pad 23 can be disposed in the same layer. The display substrate can further include a plurality of insulating portions 70 and a connecting electrode 60, each of the insulating portions 70 surrounds one light emitting unit 30 and the bonding structure 40 bonded with the light emitting unit 30, and a first via is formed in each of the insulating portions 70, the first via exposes the second electrode 312; there is a spacing region between two adjacent insulating portions 70, and a projection of the spacing region on the substrate 10 overlaps with a projection of the third conductive pad 23 on the substrate 10, for example, the projection of the spacing region on the substrate 10 covers the projection of the third conductive pad 23 on the substrate 10. The connecting electrode 60 is electrically connected to the second electrode 312 through the first via, and is electrically connected to the third conductive pad 23. By providing the connecting electrode 60, an electrical signal can be provided to the second electrode 312 of the light emitting chip 31.
[0099] In some embodiments, the connecting electrode 60 can include a first sub-electrode 61 and a second sub-electrode 62 disposed in layers, the first sub-electrode 61 can be made of a transparent conductive material, for example, the transparent conductive material can include indium tin oxide (ITO), so that the connecting electrode 60 can prevent the light emitting chip 31 from being blocked; the second sub-electrode 62 can be made of a metal material, so that the overall resistance of the connecting electrode 60 can be reduced. For example, the second sub-electrode 62 does not overlap with the light emitting chip 31 on the substrate 10, so as to prevent the second sub-electrode 62 from affecting the light emitting effect of the light emitting chip 31.
[0100] In some embodiments, the brightness of each light emitting chip 31 can be independently controlled. The first conductive pad 21 and the connecting electrode 60 are respectively used to provide a first signal and a second signal to the light emitting chip 31, for example, one of the first signal and the second signal is an anode signal (i.e., a high-level signal), and the other is a cathode signal (i.e., a low-level signal).
[0101] In some embodiments, as shown in FIG. 1 and FIG. 2, each connection electrode 60 can correspond to a second electrode 312 of one light emitting chip 31, the first end of the connection electrode 60 is electrically connected to the second electrode 312 of the light emitting chip 31 through the first via, and the second end of the connection electrode 60 is electrically connected to the third conductive pad 23. In other embodiments, each connection electrode 60 can correspond to multiple light emitting chips 31, for example, all light emitting chips 31 of the same light emitting color are connected to the same connection electrode 60; for another example, all light emitting chips 31 are connected to the same connection electrode 60. In this case, the connection electrode 60 can be electrically connected to one third conductive pad 23. When all light emitting chips 31 are connected to the same connection electrode 60, the third conductive pad 23 can correspond to the interval region between two adjacent insulating portions 70, or can be arranged at other positions, for example, arranged at the peripheral region of the display substrate.
[0102] In some embodiments, as shown in FIG. 1 and FIG. 2, the display substrate further includes a planarization layer PLN located away from the substrate 10 from the side of the light emitting unit 30. Specifically, the planarization layer PLN includes a first portion and a second portion, the first portion is arranged between adjacent bonding structures 40 and adjacent light emitting units 30, and the second portion is located away from the substrate 10 from the side of the light emitting unit 30. The first portion and the second portion are an integral structure. By arranging the planarization layer PLN, a large step difference can be prevented from occurring in the display substrate, so as to facilitate the subsequent manufacturing of structures. In some embodiments, the surface of the planarization layer PLN away from the substrate 10 can be a flat or substantially flat surface. The planarization layer PLN can be made of an organic material, so as to facilitate the planarization layer PLN to form a flat surface.
[0103] Further, as shown in FIG. 1 and FIG. 2, the display substrate further includes a light shielding layer 73 located away from the substrate 10 from the side of the planarization layer PLN, the light shielding layer 73 has an opening 73v corresponding to each light emitting unit 30, and the opening 73v overlaps the orthographic projection of the corresponding light emitting unit 30 on the substrate 10. For example, the orthographic projection of the opening 73v on the substrate 10 covers the orthographic projection of the light emitting chip 31 of the light emitting unit 30 on the substrate 10, so as to prevent the light shielding layer 73 from shielding the light of the light emitting chip 31. By arranging the light shielding layer 73, the light crosstalk between adjacent sub-pixel regions can be prevented.
[0104] In some embodiments, the light-emitting color of the plurality of light-emitting units 30 includes multiple colors, for example, the plurality of light-emitting chips 31 of the plurality of light-emitting units 30 includes a first light-emitting chip 31r, a second light-emitting chip 31g, and a third light-emitting chip 31b. The first light-emitting chip 31r is configured to emit red light, the second light-emitting chip 31g is configured to emit green light, and the third light-emitting chip 31b is configured to emit blue light. In this case, at the position of the opening 73v of the light-blocking layer 73, the optical functional unit can not be required to convert the color of the light, and full-color display can be achieved.
[0105] Further, when the light-emitting color of the plurality of light-emitting units 30 includes multiple colors, scattering particles can be arranged in the opening 73v, so that the outgoing light of the light-emitting unit 30 can be scattered, thereby increasing the viewing angle of the display substrate.
[0106] FIG. 3 is a schematic view of a display substrate provided in a third embodiment of the present disclosure. The display substrate shown in FIG. 3 is similar to the display substrate shown in FIGS. 1 and 2, and the difference is that, in the display substrate shown in FIG. 3, the insulating portion 70 includes a first sub-insulating portion 71 and a second sub-insulating portion 72. The first sub-insulating portion 71 has a receiving groove, the light-emitting unit 30 and the bonding structure 40 bonded to the light-emitting unit 30 are located in the receiving groove, and a first reflective layer 74 is arranged on the sidewall of the receiving groove. The first reflective layer 74 can be made of a high-reflectivity metal material, for example, silver. At least part of the second sub-insulating portion 72 is located in the receiving groove, and the first via penetrates the second sub-insulating portion 72.
[0107] Here, the cross section of the receiving groove gradually decreases in the direction close to the substrate 10, and the cross section of the receiving groove refers to the cross section of the receiving groove perpendicular to the thickness direction of the substrate 10. In FIG. 3, by arranging the first reflective layer 74, more light can be emitted from the opening 73v of the light-blocking layer 73, the light utilization rate is improved, and the crosstalk between the sub-pixel regions is further reduced.
[0108] It should be noted that, in FIG. 3, the thickness of the second conductive pad 32 of the first light-emitting unit 301 is less than the thickness of the second conductive pad 32 of the second light-emitting unit 302, which is used for illustrative purposes. The second conductive pad 32 of the first light-emitting unit 301 and the second conductive pad 32 of the second light-emitting unit 302 can also be arranged to have the same thickness.
[0109] FIG. 4 is a schematic view of a display substrate provided in a fourth embodiment of the present disclosure. The display substrate shown in FIG. 4 is similar to that shown in FIG. 3, and the difference is that, in FIG. 4, at least two light emitting units 30 are connected in series. Specifically, each connection electrode 60 is connected to the second electrode 312 of one light emitting chip 31; the plurality of light emitting units 30 are divided into groups, each group including at least two light emitting units 30 connected in series, and the light emitting units 30 in the same group correspond to a sub-pixel region having the same light emission color. The light emission color of the sub-pixel region refers to the overall light emission color of the sub-pixel region. For example, when the light emission side of the light emitting chip 31 is not provided with a structure for changing the color of light, the light emission color of the sub-pixel region is the light emission color of the light emitting chip 31; when the light emission side of the light emitting chip 31 is provided with a structure for changing the color of light (such as the optical functional unit 80 in the following embodiment), the light emission color of the sub-pixel region is the light emission color of the optical functional unit 80. For example, each group includes 1x4 or 2x2 light emitting units 30. The connection electrode 60 connected to the second electrode 312 of the light emitting chip 31 of one of the two light emitting units 30 connected in series is also electrically connected to the corresponding first conductive pad 21 of the other light emitting unit 30. For example, the connection electrode 60 connected to the second electrode 312 of the light emitting chip 31 is connected to the third conductive pad 23 and is electrically connected to the first conductive pad 21 through a signal line in the drive wiring layer 20.
[0110] The drive wiring layer 20 includes a plurality of drive circuits, and the light emitting units 30 in the same group can be electrically connected to the same drive circuit. Using the same drive circuit to drive a plurality of light emitting units 30 can reduce the driving power consumption.
[0111] FIG. 5 is a schematic view of a display substrate provided in a fifth embodiment of the present disclosure. The display substrate shown in FIG. 5 is similar to that shown in FIG. 3, and both include a plurality of light emitting units 30 and a bonding structure 40 bonded to the light emitting units 30. The plurality of light emitting units 30 can include a plurality of first light emitting units 30 and second light emitting units 30, the first light emitting units 30 are bonded to the first bonding structure 40, and the second light emitting units 30 are bonded to the second bonding structure 40. The number of bonding portions 41 in the second bonding structure 40 is less than the number of bonding portions 41 in the first bonding structure 40. Each light emitting unit 30 includes a light emitting chip 31 and a second conductive pad 32. The thickness of the second conductive pad 32 of the second light emitting unit 30 is greater than or equal to the thickness of the second conductive pad 32 of the first light emitting unit 30. Only the differences between FIG. 5 and FIG. 3 will be described below.
[0112] In FIG. 5, the light-emitting units 30 are of the same color, and are configured to emit light of a first color. To realize full-color display, the display substrate further comprises a plurality of optical functional units 80, each of which is disposed on a side of a light-emitting unit 30 away from the substrate 10. When the display substrate comprises the planarization layer PLN described above, the optical functional units 80 are disposed on a side of the planarization layer away from the substrate 10. The plurality of optical functional units 80 comprises a plurality of first optical functional units 80r, a plurality of second optical functional units 80g, and a plurality of third optical functional units 80b; the first optical functional units 80r are configured to convert the light of the first color emitted by the light-emitting units 30 into light of a second color; the second optical functional units 80g are configured to convert the light of the first color emitted by the light-emitting units 30 into light of a third color; and the third optical functional units 80b are configured to maintain the light of the first color.
[0113] In some embodiments, the light of the first color is blue light or ultraviolet light, the first optical functional units 80r are configured to convert the light of the first color into red light; the second optical functional units 80g are configured to convert the light of the first color into filtered light; and the third optical functional units 80b are configured to convert the light of the first color into blue light or maintain the blue light state.
[0114] For example, the first optical functional units 80r comprise red quantum dot material configured to convert the light of the first color into red light. Preferably, the first optical functional units 80r further comprise scattering particles configured to scatter light. When the light emitted by the corresponding light-emitting units 30 is incident on the first optical functional units 80r, the red quantum dot material is configured to convert the light of the first color into red light, and the scattering particles are configured to scatter the light of the first color and the red light emitted by the light-emitting units 30, so that more light can be converted into red light by the red quantum dots.
[0115] For example, the second optical functional units 80g comprise green quantum dot material configured to convert the light of the first color into green light. Preferably, the second optical functional units 80g further comprise scattering particles configured to scatter light. When the light emitted by the corresponding light-emitting units 30 is incident on the second optical functional units 80g, the green quantum dot material is configured to convert the light of the first color into green light, and the scattering particles are configured to scatter the light of the first color and the green light emitted by the light-emitting units 30, so that more light can be converted into green light by the green quantum dots.
[0116] For example, the third optical functional unit 80b is configured to convert the light into blue light or maintain the blue light. For example, when the first color light only includes blue light, the third optical functional unit 80b can be a transparent part, or include blue quantum dots, or be a scattering part. The transparent part is configured to directly transmit the light, the blue quantum dots are configured to convert the light into blue light having a different wavelength from the light, and the scattering part includes scattering particles configured to scatter the light. When the light emitted by the light emitting unit 30 includes ultraviolet light, the third optical functional unit 80b includes blue quantum dots configured to convert the ultraviolet light into blue light, or the third optical functional unit 80b includes both scattering particles configured to scatter the light and blue quantum dots configured to convert the ultraviolet light into blue light.
[0117] With reference to FIG. 5, the display substrate further includes a plurality of filter units 90 located on a side of the plurality of optical functional units 80 away from the substrate 10. The plurality of filter units 90 includes a plurality of first filter units 90r and a plurality of second filter units 90g. The first filter units 90r correspond to the first optical functional units 80r one-to-one, and the first filter units 90r overlap with the corresponding first optical functional units 80r in the orthographic projection on the substrate 10. The first filter units 90r are configured to transmit the second color light and filter out the rest of the light other than the second color light. The second filter units 90g correspond to the second optical functional units 80g one-to-one, and the second filter units 90g overlap with the corresponding second optical functional units 80g in the orthographic projection on the substrate 10. The second filter units 90g are configured to transmit the third color light and filter out the rest of the light other than the third color light. For example, the plurality of filter units 90 can further include third filter units (not shown) corresponding to the third optical functional units 80b one-to-one, and the third filter units are configured to at least transmit the first color light.
[0118] For example, the first filter units 90r can be red color resistors or red-green-blue filter films, and the second filter units 90g can be green color resistors or red-green-blue filter films.
[0119] For example, the red color resistor described above can transmit red light and absorb light of other colors. In this way, the light emitted by the first optical functional unit 80r can be emitted after passing through the first filter unit 90r, and the first filter unit 90r can filter out light of other colors except red light to ensure that the blue light component in the light is filtered out.
[0120] For example, the red-green anti-blue filter film can pass the red light and reflect the blue light in the light emitted from the first optical functional unit 80r, so that the red light in the light can be emitted through the first filter unit 90r, and the blue light can be reflected by the first filter unit 90r back to the first optical functional unit 80r, so that the red quantum dots in the first optical functional unit 80r can excite the blue light to red light again, thereby further improving the excitation efficiency of the red quantum dots.
[0121] For example, the green color resist can transmit the green light and absorb other colors of light. In this way, the light emitted from the second optical functional unit 80g can be emitted after passing through the second filter unit 90g, and the second filter unit 90g can filter out other colors of light except green light to ensure that the blue light component is filtered out.
[0122] For example, the red-green anti-blue filter film can pass the red-green light and reflect the blue light in the light emitted from the second optical functional unit 80g, so that the green light in the light can be emitted through the second filter unit 90g, and the blue light can be reflected by the second filter unit 90g back to the second optical functional unit 80g, so that the green quantum dots in the second optical functional unit 80g can excite the blue light to green light again, thereby further improving the excitation efficiency of the green quantum dots.
[0123] For example, the blue color resist can transmit the blue light and absorb other colors of light. In this way, the light emitted from the third optical functional unit 80b can be emitted after passing through the third filter unit, and the third filter unit can filter out other colors of light except blue light to transmit relatively pure blue light.
[0124] For example, since the third optical functional unit 80b can emit blue light, a transparent layer can also be used as a third filter unit to transmit blue light. Of course, the third filter unit can also not be provided.
[0125] With reference to FIG. 5, the display substrate can further include a light shielding layer 73 located on a side of the plurality of light emitting units 30 away from the substrate 10, and having an opening 73v corresponding to each of the optical functional units 80, and the optical functional unit 80 is arranged in the corresponding opening 73v; the filter unit 90 can also be arranged in the opening 73v. By providing the light shielding layer 73, cross-color between adjacent sub-pixel regions can be prevented.
[0126] FIG. 6 is a schematic view of a display substrate provided in a sixth embodiment of the present disclosure. The display substrate shown in FIG. 6 is similar to the display substrate shown in FIG. 5, and only the difference between the two will be introduced below. In FIG. 6, as shown in FIG. 6, the at least two light emitting chips 31 are connected in series. Specifically, the light emitting chips 31 of the plurality of light emitting units 30 are divided into a plurality of groups, and each group includes at least two light emitting units 30 connected in series. The light emitting units 30 in the same group correspond to sub-pixel regions of the same light emitting color, i.e., the light emitting units 30 in the same group correspond to filter units of the same light emitting color.
[0127] In the same group, the light emitting units 30 can be connected in series as shown in FIG. 4. Specifically, each connection electrode 60 is connected to the second electrode 312 of the light emitting chip 31 of one light emitting unit 30. The connection electrode 60 connected to the second electrode 312 of one light emitting chip 31 in the two light emitting units 30 connected in series is further electrically connected to the corresponding first conductive pad 21 of the other light emitting unit 30. For example, the connection electrode 60 connected to the second electrode 312 of one light emitting chip 31 is connected to the third conductive pad 23 and is electrically connected to the first conductive pad 21 through a signal line in the driving trace layer 20. The driving trace layer 20 includes a plurality of driving circuits, and the light emitting units 30 in the same group can be electrically connected to the same driving circuit to reduce the driving power consumption of the display substrate.
[0128] It should be noted that in FIG. 6, the insulating portion 70 includes the first sub-insulating portion 71 and the second sub-insulating portion 72, and the first reflective layer 74 is arranged on the side wall of the accommodating groove of the first sub-insulating portion 71. Alternatively, the first reflective layer 74 in FIG. 6 can be removed, and the first sub-insulating portion 71 and the second sub-insulating portion 72 can be designed as an integral structure.
[0129] It should be further noted that in FIG. 6, the thickness of the second conductive pad 32 of the first light emitting unit 301 is less than the thickness of the second conductive pad 32 of the second light emitting unit 302. Alternatively, the thickness of the second conductive pad 32 of the first light emitting unit 301 and the thickness of the second conductive pad 32 of the second light emitting unit 302 can be the same.
[0130] FIG. 7 is a schematic view of a display substrate provided in a seventh embodiment of the present disclosure. The display substrate shown in FIG. 7 is similar to the display substrate shown in FIG. 3, and only the difference between the two will be introduced below.
[0131] In FIG. 7, the light emitting unit 30 includes a light emitting chip 31 and second conductive pads 32 electrically connected with the light emitting chip 31. The light emitting chip 31 is a flip chip, which includes a light emitting body 313, and a first electrode 311 and a second electrode 312 located on a side of the light emitting body 313 facing the substrate 10. The first electrode 311 and the second electrode 312 are both electrically connected with respective second conductive pads 32, and the first electrode 311 and the second electrode 312 are connected with different second conductive pads 32, and each second conductive pad 32 is bonded with a bonding portion 41 of a bonding structure 40. In the same light emitting unit 30, the bonding structure 40 corresponding to the first electrode 311 and the second electrode 312 has the same number of bonding portions 41. That is, when the light emitting unit 30 that fails is removed, one bonding portion 41 connected with the first electrode 311 and one bonding portion 41 connected with the second electrode 312 of the light emitting unit 30 are both removed.
[0132] The light emitting body 313 includes a first semiconductor layer, a light emitting layer and a second semiconductor layer, which are described above and will not be repeated here.
[0133] When the light emitting chip 31 adopts a flip structure, the driving trace layer 20 provides driving signals for the light emitting chip 31 from the same side of the light emitting chip 31, and the connecting electrode 60 and the third conductive pad 23 in FIG. 3 are not needed, which is more convenient for the arrangement of the traces.
[0134] As in FIG. 3, in FIG. 7, the plurality of light emitting units 30 can emit light of multiple colors, so that the optical functional unit is not needed.
[0135] In addition, as in FIG. 3, in FIG. 7, a planarization layer PLN can be provided, which covers each light emitting unit 30, and the light shielding layer 73 is provided on a side of the planarization layer PLN away from the substrate 10; and different from FIG. 3, in FIG. 7, the insulating portion 70 is not provided, but a barrier wall 75 is provided between adjacent two light emitting units 30, for example, a barrier wall 75 can be provided between each adjacent two light emitting units 30. The barrier wall 75 overlaps the orthographic projection of the light shielding layer 73 on the substrate 10. The barrier wall 75 can be in contact with the light shielding layer 73, so as to divide the planarization layer PLN into multiple flat portions; or the barrier wall 75 is not in contact with the light shielding layer 73, so that the planarization layer PLN is still a continuous film layer.
[0136] The side wall of the barrier wall 75 towards the light emitting unit 30 can be provided with a second reflection layer 76 for reflecting the light emitted by the light emitting unit 30 and preventing light crosstalk between adjacent sub-pixel areas. The width of the barrier wall 75 gradually increases in the direction close to the substrate 10, so that more light can be emitted from the opening 73v of the light shielding layer 73, improving light utilization and display brightness. The width of the barrier wall 75 between two adjacent light emitting units 30 refers to the size of the barrier wall 75 in the arrangement direction of the two adjacent light emitting units 30.
[0137] The minimum distance of the barrier wall 75 to the substrate 10 can be smaller than the minimum distance of the light emitting chip 31 to the substrate 10, so as to improve the anti-crosstalk effect of the second reflection layer 76 and enable as much light as possible to be reflected to the position of the opening 73v of the light shielding layer 73. For example, the barrier wall 75 can be supported on the insulating layer 11.
[0138] FIG. 8 is a schematic view of a display substrate provided in an eighth embodiment of the present disclosure. The display substrate shown in FIG. 8 is similar to that shown in FIG. 7, and only the differences between the two will be introduced below. In FIG. 8, at least two light emitting chips 31 are connected in series. Specifically, the light emitting chips 31 of the plurality of light emitting units 30 are divided into a plurality of groups, each group including at least two light emitting units 30 connected in series, and the light emitting units 30 in the same group correspond to sub-pixel areas of the same light emitting color, i.e., the light emitting units 30 in the same group emit light of the same color.
[0139] The light emitting units 30 in the same group can be connected in series through a signal line in the driving trace layer 20. For example, in the two adjacent light emitting units 30 in the same group connected in series, the second electrode 312 of the light emitting chip 31 of the first light emitting unit 30 is connected to the first conductive pad 21 through a signal line, and the first electrode 311 of the light emitting chip 31 of the second light emitting unit 30 is connected to the first conductive pad 21.
[0140] It should be noted that in FIG. 8, the thickness of the second conductive pad 32 of the first light emitting unit 301 is less than the thickness of the second conductive pad 32 of the second light emitting unit 302, which is used for illustrative purposes. The thickness of the second conductive pad 32 of the first light emitting unit 301 and the second conductive pad 32 of the second light emitting unit 302 can also be set to the same thickness.
[0141] FIG. 9 is a schematic view of a display substrate provided in a ninth embodiment of the present disclosure. The display substrate shown in FIG. 9 is similar to that shown in FIG. 7, and only the differences between the two will be introduced below.
[0142] In FIG. 9, the light emitting colors of the plurality of light emitting units 30 are the same, and all are used to emit first color light. In order to realize full-color display, the display substrate further comprises a plurality of optical functional units 80, which are arranged one-to-one with the light emitting units 30. At least part of the optical functional units 80 are used for color conversion of the first color light. The specific structure, material and arrangement mode of the plurality of optical functional units 80 can be referred to the description of FIG. 5 above.
[0143] In FIG. 9, the display substrate further comprises a plurality of light filtering units 90, the corresponding relationship of the light filtering units 90 with the optical functional units 80, the specific position, structure and material of the light filtering units 90 are all referred to the description of FIG. 5 above.
[0144] FIG. 10 is a schematic view of a display substrate provided in a tenth embodiment of the present disclosure, which is similar to FIG. 9, and the light emitting colors of the light emitting units 30 are the same. Only the differences between FIG. 10 and FIG. 9 will be introduced below.
[0145] In FIG. 10, the at least two light emitting chips 31 are connected in series. Specifically, the light emitting chips 31 of the plurality of light emitting units 30 are divided into a plurality of groups, each group comprising at least two light emitting units 30 connected in series, and the light emitting units 30 in the same group correspond to the same light emitting color of the sub-pixel region, i.e., the light emitting units 30 in the same group correspond to the same light emitting color of the light filtering unit.
[0146] Among them, the light emitting units 30 in the same group can be connected in series through the signal lines in the driving wire layer 20, for example, in the adjacent two light emitting units 30 in the same group connected in series, the second electrode 312 of the light emitting chip 31 of the first light emitting unit 30 is connected to the first conductive pad 21, and the first conductive pad 21 connected to the first electrode 311 of the light emitting chip 31 of the second light emitting unit 30 is connected through the signal line.
[0147] It should be noted that in FIG. 9 and FIG. 10, the thickness of the second conductive pad 32 of the first light emitting unit 301 is less than the thickness of the second conductive pad 32 of the second light emitting unit 302, which is used for illustrative description; the second conductive pad 32 of the first light emitting unit 301 and the second conductive pad 32 of the second light emitting unit 302 can also be set to the same thickness.
[0148] The embodiments of the present disclosure also provide a manufacturing method of a display substrate, which is used for manufacturing the display substrate in the above embodiments. The manufacturing method comprises:
[0149] S1, forming a driving wire layer 20 on a substrate 10, the driving wire layer 20 comprising a plurality of first conductive pads 21.
[0150] S2, a plurality of bonding structures 40 are formed on the side of the driving wire layer 20 away from the substrate 10; the bonding structure 40 comprises a plurality of bonding portions 41 stacked in the direction away from the substrate 10; the bonding portion 41 comprises an intermetallic compound barrier layer 412 and a bonding layer 411 arranged in the direction away from the substrate 10 in sequence.
[0151] S3, each of the plurality of light emitting units 30 is bonded with the bonding layer 411 of the bonding structure 40. For example, the light emitting unit 30 comprises a light emitting chip 31 and a second conductive pad 32 electrically connected with the light emitting chip 31, and the light emitting unit 30 is bonded with the bonding layer 411 of the bonding structure 40, that is, the second conductive pad 32 of the light emitting unit 30 is bonded with the bonding layer 411. When the light emitting chip 31 adopts a vertical light emitting chip 31, each light emitting unit 30 is bonded with the bonding layer 411 of one bonding structure 40; when the light emitting chip 31 adopts an inverted chip, each light emitting unit 30 is bonded with the bonding layer 411 of two bonding structures 40. Wherein, the light emitting unit 30
[0152] In some embodiments, the manufacturing method further comprises:
[0153] S4, detecting whether the light emitting unit 30 has a bonding abnormality. Wherein, whether the light emitting unit 30 has a bonding abnormality can be detected by an optical detection device (AOI).
[0154] S5, if there is a light emitting unit 30 with a bonding abnormality, the light emitting unit 30 with a bonding abnormality and the bonding portion 41 directly bonded therewith are removed. It should be noted that removing the light emitting unit 30 with a bonding abnormality and the bonding portion 41 bonded therewith means removing the light emitting unit 30 with a bonding abnormality and the bonding portion 41 directly bonded therewith. For example, the light emitting chip 31 of the light emitting unit 30 adopts a vertical structure, and when the faulty light emitting unit 30 is removed, the bonding portion 41 bonded with the light emitting unit 30 is removed; for another example, the light emitting chip 31 of the light emitting unit 30 adopts an inverted structure, and when the faulty light emitting unit 30 is removed, the two bonding portions 41 bonded with the first electrode 311 and the second electrode 312 of the light emitting chip 31 in the light emitting unit 30 are removed.
[0155] S6, a new light emitting unit 30 is arranged at the position where the light emitting unit 30 is removed, and the new light emitting unit 30 is bonded with the remaining bonding portion 41.
[0156] FIGS. 11A to 11K are schematic diagrams of the manufacturing process of the display substrate provided in some embodiments of the present disclosure, and FIGS. 11A to 11K are schematic diagrams of the manufacturing process of the display substrate taking the display substrate shown in FIG. 3 as an example. The manufacturing method of the display substrate provided by the present disclosure will be introduced below in conjunction with the drawings.
[0157] S1, as shown in FIG. 11A, a driving wire layer 20 is formed on the substrate 10, the driving wire layer 20 includes a plurality of first conductive pads 21 and a plurality of third conductive pads 23.
[0158] S2, a plurality of bonding structures 40 are formed on the side of the driving wire layer 20 away from the substrate 10; the bonding structure 40 includes a plurality of bonding parts 41 stacked in the direction away from the substrate 10; the bonding part 41 includes: the bonding part 41 includes an intermetallic compound barrier layer 412 and a bonding layer 411 arranged in turn in the direction away from the substrate 10.
[0159] Specifically, taking an example that each bonding structure 40 includes two bonding parts 41, step S2 specifically includes:
[0160] S21, as shown in FIG. 11B, a first layer of intermetallic compound barrier layer 412 and a first layer of bonding layer 411 of each bonding structure 40 are formed on the side of the driving wire layer 20 away from the substrate 10. In some embodiments, the bonding layer 411 adopts a first material, the second conductive pad 32 adopts a second material, and the intermetallic compound barrier layer 412 adopts a third material, then the rate of the third material reacting with any one of the first material and the second material to generate an intermetallic compound is much smaller than the rate of the first material and the second material generating an intermetallic compound, so that the intermetallic compound barrier layer 412 can play a blocking role. Here, "much smaller" means less than 0.1 times the rate of the first material and the second material generating an intermetallic compound.
[0161] For example, the intermetallic compound barrier layer 412 includes metals such as Mo, Ti, etc., for example, the barrier layer 412 can be a Mo metal layer, a Ti metal layer or a stack structure thereof. The thickness of the barrier layer 412 is between 0.1-0.5 microns.
[0162] For example, the intermetallic compound barrier layer 412 has a first surface facing the substrate 10 and a second surface away from the substrate 10, the roughness of the first surface is smaller than the roughness of the second surface, so that the adhesion of the intermetallic compound barrier layer 412 to the film layer above it is greater, so as to facilitate the removal of the bonding abnormality of the light emitting unit 30 and the bonding part 41 directly bonded thereto when the light emitting unit 30 appears bonding abnormality, without affecting the lower bonding part 41.
[0163] S22, as shown in FIG. 11C, a second layer of intermetallic compound barrier layer 412 and a second layer of bonding layer 411 of each bonding structure 40 are formed.
[0164] In some embodiments, the intermetallic compound barrier layer 412 and the bonding layer 411 can be formed by a patterning process.
[0165] In some embodiments, each bonding layer 411 is a plurality of sub-bonding layers 411, and the plurality of sub-bonding layers 411 comprises: first sub-bonding layers 411 and second sub-bonding layers 411 arranged alternately in a direction away from the substrate 10, the melting point of the first sub-bonding layers 411 being greater than the melting point of the second sub-bonding layers 411. Among the same bonding layer 411, the sub-bonding layer 411 closest to the substrate 10 is the first sub-bonding layer 411, and the sub-bonding layer 411 farthest from the substrate 10 is the second sub-bonding layer 411.
[0166] By setting the second sub-bonding layer 411 with a low melting point, it is convenient for eutectic bonding to occur between the light emitting unit 30 and the bonding portion 41; by setting the first sub-bonding layer 411 with a high melting point, the adhesion between the bonding layer 411 and the underlying film layer can be increased, and the phenomenon of peeling of the bonding layer 411 can be reduced or prevented.
[0167] For example, the material of the first sub-bonding layer 411 includes at least one of Au and Cu, and the material of the second sub-bonding layer 411 includes at least one of Sn and In.
[0168] For example, the thickness of the first sub-bonding layer 411 and the second sub-bonding layer 411 is between 0.3 and 3 microns, so as to ensure the bonding effect of the light emitting unit 30 and the bonding portion 41, prevent the overall thickness of the bonding structure 40 from being too large, and thus be conducive to the thin design of the display substrate. For example, the thickness of the first sub-bonding layer 411 and the second sub-bonding layer 411 is between 0.3 and 0.5 microns, or between 0.5 and 1 micron, or between 1 and 1.5 microns, or between 1.5 and 2 microns, or between 2 and 2.5 microns, or between 2.5 and 3 microns.
[0169] For example, in each bonding layer 411, the number of first sub-bonding layers 411 and second sub-bonding layers 411 is not more than 3, so as to prevent the thickness of the bonding layer 411 from being too large, and thus affect the overall thickness of the product. For example, in each bonding layer 411, the first sub-bonding layer 411 and the second sub-bonding layer 411 are each one layer.
[0170] S3, as shown in FIG. 11D, bonding each of the plurality of light emitting units 30 with the bonding layer 411 of the bonding structure 40. FIG. 11D shows a case where bonding is abnormal.
[0171] The bonding process in step S3 is specifically eutectic bonding, which is carried out at a certain pressure and a certain temperature. For example, the pressure is greater than or equal to 0.1 Mpa, and the temperature is greater than or equal to 100 degrees Celsius.
[0172] Exemplarily, the light emitting unit 30 includes a light emitting chip 31 and a second conductive pad 32 located on the side of the light emitting chip 31 close to the substrate 10. The light emitting chip 31 includes a first electrode 311, a light emitting body 313 and a second electrode 312 arranged in sequence in the direction away from the substrate 10, and the first electrode 311 is electrically connected with the second conductive pad 32.
[0173] S4, detecting whether the light emitting unit 30 has a bonding abnormality. Wherein, whether the light emitting unit 30 has a bonding abnormality can be detected by an optical detection device (AOI).
[0174] S5, as shown in FIG. 11E, if there is a light emitting unit 30 with a bonding abnormality, the light emitting unit 30 with a bonding abnormality and the bonding part 41 directly bonded therewith are removed. Wherein, a pushing force can be applied to the light emitting unit 30 with a bonding abnormality by a pushing force device, so that the light emitting unit 30 and the bonding layer 411 directly bonded therewith are removed.
[0175] S6, as shown in FIG. 11F, a new light emitting unit 30 is arranged at the position where the light emitting unit 30 is removed, and the new light emitting unit 30 is bonded with the remaining bonding part 41.
[0176] S7, as shown in FIG. 11G and FIG. 11H, a plurality of insulating parts 70 are formed, each insulating part 70 corresponds to one light emitting unit 30, and adjacent insulating parts 70 have a spacing area, and the spacing area overlaps with the orthographic projection of the third conductive pad 23 on the substrate 10. The insulating part 70 is provided with a first via, and the first via exposes the second electrode 312 of the light emitting chip 31.
[0177] Specifically, step S7 includes: as shown in FIG. 11G, forming a first sub-insulating part 71 of each insulating part 70 of the plurality of insulating parts 70, the first sub-insulating part 71 has a receiving groove; then, as shown in FIG. 11H, a first reflective layer 74 is formed on the side wall of the receiving groove; then, as shown in FIG. 11H, a second sub-insulating layer 11 of each insulating part 70 is formed, at least part of the second sub-insulating layer 11 is located in the receiving groove, and a first via V1 is formed on the second sub-insulating layer 11.
[0178] S8, as shown in FIG. 11I, a connecting electrode 60 is formed, the connecting electrode 60 is electrically connected with the second electrode 312 of the light emitting chip 31 through the first via, and is electrically connected with the third conductive pad 23.
[0179] S9, as shown in FIG. 11J, a planarization layer PLN is formed.
[0180] S10, as shown in FIG. 11K, a light shielding layer 73 is formed on the side of the planarization layer PLN away from the substrate 10, and the light shielding layer 73 has a plurality of openings 73v, and the openings 73v correspond one-to-one to the light emitting units 30.
[0181] The embodiments of the present disclosure also provide a display device including the display substrate in any of the above embodiments. The display device can include any device or product having a display function. For example, the display device can be a smart phone, a mobile phone, an electronic book reader, a desktop PC, a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (e.g., a head-mounted device, electronic clothing, an electronic bracelet, an electronic necklace, an electronic accessory, an electronic tattoo, or a smart watch), a television, etc.
[0182] It can be understood that the above embodiments are only exemplary embodiments adopted for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Various modifications and improvements can be made by those of ordinary skill in the art without departing from the spirit and essential characteristics of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.
Claims
1. A display substrate, comprising: Substrate; A driving trace layer is disposed on the substrate, and the driving trace layer includes a plurality of first conductive pads; Multiple bonding structures are disposed on the side of the driving trace layer away from the substrate; each bonding structure is connected to the first conductive pad in a one-to-one correspondence; each bonding structure includes a bonding portion, and the bonding portion includes an intermetallic compound barrier layer and a bonding layer sequentially disposed in a direction away from the substrate; wherein, at least one of the multiple bonding structures includes multiple bonding portions stacked in a direction away from the substrate. Multiple light-emitting units are disposed on the side of the multiple bonding structures away from the substrate, and the light-emitting units are bonded to the bonding layer.
2. The display substrate according to claim 1, wherein, The intermetallic compound barrier layer includes a first surface facing the substrate and a second surface away from the substrate, the roughness of the second surface being greater than that of the first surface.
3. The display substrate according to claim 1, wherein, The thickness of the intermetallic compound barrier layer is between 0.1 and 0.5 micrometers.
4. The display substrate according to claim 1, wherein, The plurality of light-emitting units includes a plurality of first light-emitting units and at least one second light-emitting unit; The plurality of bonding structures include: a first bonding structure bonded to the first light-emitting unit and a second bonding structure bonded to the second light-emitting unit. The first bonding structure includes M bonding portions, and the second bonding structure includes N bonding portions. M and N are both integers greater than 0, and M > N.
5. The display substrate according to claim 4, wherein, The light-emitting unit includes: a light-emitting chip and a second conductive pad electrically connected to the light-emitting chip, the second conductive pad being located on the side of the light-emitting chip facing the substrate and bonded to the bonding layer; The thickness of the second conductive pad of the second light-emitting unit is greater than or equal to the thickness of the second conductive pad of the first light-emitting unit.
6. The display substrate according to claim 4, wherein, The distance from the surface of the first light-emitting unit away from the substrate to the substrate is equal to the distance from the surface of the second light-emitting unit away from the substrate to the substrate.
7. The display substrate according to any one of claims 1 to 6, wherein, The light-emitting unit includes a light-emitting chip and a second conductive pad electrically connected to the light-emitting chip; the light-emitting chip includes a first electrode, a light-emitting body and a second electrode arranged sequentially in a direction away from the substrate, the second conductive pad is electrically connected to the first electrode and bonded to the bonding layer.
8. The display substrate according to claim 7, wherein, The driving trace layer further includes a third conductive pad; the display substrate further includes: Multiple insulating portions, each insulating portion surrounding a light-emitting unit and a bonding structure bonded to the light-emitting unit, each insulating portion having a first via exposed to the second electrode; there is a gap between adjacent insulating portions, the orthographic projection of the gap between the portions onto the substrate covering the orthographic projection of the third conductive pad onto the substrate; A connecting electrode is electrically connected to the second electrode through the first via and to the third conductive pad.
9. The display substrate according to claim 8, wherein, The first conductive pad and the connecting electrode are used to provide a first signal and a second signal to the light-emitting chip, respectively; wherein, Each of the connecting electrodes is electrically connected to the second electrodes of the plurality of light-emitting chips; or... The first end of each of the connecting electrodes is electrically connected to a second electrode through the first via, and the second end of the connecting electrode is electrically connected to the drive trace layer.
10. The display substrate according to claim 8, wherein, The display area of the display substrate is divided into multiple sub-pixel areas, and each light-emitting unit is located in one of the sub-pixel areas; Each of the connecting electrodes is electrically connected to the second electrode of a light-emitting chip. The plurality of light-emitting units are divided into multiple groups, each group including at least two light-emitting units connected in series. The light-emitting units in the same group have the same emitted light color in their corresponding sub-pixel areas. For two adjacent light-emitting units connected in series, the connecting electrode connected to the second electrode in one of the light-emitting units is also electrically connected to the first conductive pad corresponding to the other light-emitting unit.
11. The display substrate according to claim 8, wherein, The insulating portion includes: A first sub-insulating part having a receiving groove, wherein the light-emitting unit and the bonding structure bonded to the light-emitting unit are located in the receiving groove, and a first reflective layer is provided on the side wall of the receiving groove; The second sub-insulating portion, at least a portion of which is located in the receiving groove, is a second sub-insulating portion through which the first through hole passes.
12. The display substrate according to claim 11, wherein, The cross-section of the receiving groove gradually decreases along the direction close to the substrate.
13. The display substrate according to any one of claims 1 to 6, wherein, The light-emitting unit includes a light-emitting chip and a second conductive pad electrically connected to the light-emitting chip; the light-emitting chip includes a light-emitting body and a first electrode and a second electrode located on the side of the light-emitting body facing the substrate; the first electrode and the second electrode are both electrically connected to their respective second conductive pads, and each second conductive pad is bonded to one of the bonding structures; In the same light-emitting unit, the bonding structures corresponding to the first electrode and the second electrode have the same number of bonding portions.
14. The display substrate according to claim 13, wherein, The display substrate also includes a barrier wall located between two adjacent light-emitting units, and a second reflective layer is provided on the side wall of the barrier wall facing the light-emitting unit.
15. The display substrate according to claim 14, wherein, The width of the barrier wall gradually increases along the direction closer to the substrate.
16. The display substrate according to any one of claims 1 to 15, wherein, The light-emitting units can emit a variety of colors.
17. The display substrate according to claim 16, wherein, The display substrate further includes: A planarization layer is located on the side of the light-emitting unit away from the substrate; A light-shielding layer is located on the side of the planarization layer away from the substrate. The light-shielding layer has an opening that corresponds to each of the light-emitting units, and the opening overlaps with the orthographic projection of the corresponding light-emitting unit on the substrate.
18. The display substrate according to any one of claims 1 to 15, wherein, The light-emitting unit is used to emit light of a first color; The display substrate also includes a plurality of optical functional units, each optical functional unit being disposed on the side of the light-emitting unit away from the substrate; The plurality of optical functional units include: a plurality of first optical functional units, a plurality of second optical functional units, and a plurality of third optical functional units; The first optical functional unit is used to convert the first color light emitted by the light-emitting unit into a second color light. The first color light; the second optical functional unit is used to convert the first color light emitted by the light-emitting unit into a third color light; the third optical functional unit is used to maintain the first color light.
19. The display substrate according to claim 18, wherein, The display substrate further includes a plurality of filter units, the plurality of filter units comprising: A plurality of first filter units, each of the first filter units being disposed on the side of a first optical functional unit away from the substrate, and used to transmit the second color light and filter out other light rays other than the second color light; A plurality of second filter units, each second filter unit being disposed on the side of a second optical functional unit away from the substrate, and used to transmit the third color light and filter out other light rays besides the third color light.
20. The display substrate according to claim 18, wherein, The display substrate further includes: A planarization layer is located on the side of the light-emitting unit away from the substrate; A light-shielding layer is located on the side of the filling layer away from the substrate. The light-shielding layer has openings that correspond one-to-one with the optical functional units, and the optical functional units are disposed in the corresponding openings.
21. A display device, wherein, The display substrate includes any one of claims 1 to 20.
22. A method for manufacturing a display substrate, comprising: A driving trace layer is formed on a substrate, the driving trace layer including a plurality of first conductive pads; Multiple bonding structures are formed on the side of the driving trace layer away from the substrate; each bonding structure includes multiple bonding portions stacked along a direction away from the substrate; each bonding portion includes an intermetallic compound barrier layer and a bonding layer sequentially disposed along a direction away from the substrate. Each of the plurality of light-emitting units is bonded to the bonding layer of the bonding structure.
23. The manufacturing method according to claim 22, wherein, The manufacturing method further includes: Detect whether the light-emitting unit has experienced a bonding abnormality; If there are light-emitting units with abnormal bonding, remove the light-emitting units with abnormal bonding and their directly bonded bonding portions. At the location where the light-emitting unit was removed, a new light-emitting unit is provided, and the new light-emitting unit is bonded to the remaining bonding portion.
24. The manufacturing method according to claim 22, wherein, The bonding layer includes a plurality of sub-bonding layers, the plurality of sub-bonding layers including: a first sub-bonding layer and a second sub-bonding layer alternately disposed in a direction away from the substrate, wherein the melting point of the first sub-bonding layer is greater than the melting point of the second sub-bonding layer; among the plurality of sub-bonding layers, the one closest to the substrate is the first sub-bonding layer, and the one furthest from the substrate is the second sub-bonding layer.
25. The manufacturing method according to claim 24, wherein, The thickness of both the first sub-bonding layer and the second sub-bonding layer is between 0.3 and 3 micrometers.