Impedance extraction device and method under saturation excitation of magnetic core

Abstract

The invention discloses an impedance extraction device and method under magnetic core saturation excitation, and relates to the technical field of electromagnetic compatibility. The device comprises an injection device and an extraction device. The injection device comprises a power amplification circuit, an AC-DC power supply, a signal generator, an MCU control circuit and a current detection circuit, and the extraction device comprises a high-frequency filter circuit, a feed-through capacitor, a first radio frequency current probe, a second radio frequency current probe, a magnetic core clamp, a first high-pass filter, a second radio frequency current probe and a vector network analyzer output end. According to the method, controllable current is applied to the magnetic core through the injection device to enable the magnetic core to be saturated, and meanwhile, the impedance of the magnetic core in a saturated state is extracted on line by utilizing a vector network analyzer and a double-probe method in the extraction device in combination with SOL calibration and a specific impedance calculation formula. According to the method, the impedance of the magnetic core under different saturation degrees can be obtained, the test process is simple, and the sensitivity and operability are high.

Description

Technical Field

[0001] This invention relates to the field of electromagnetic compatibility technology, and in particular to an impedance extraction device and method under magnetic core saturation excitation. Background Technology

[0002] Magnetic cores are widely used in modern complex electronic systems. Predicting core saturation in complex electronic systems is a time-consuming task that requires a deep understanding of the electronic system components and their behavior in a saturated state. However, this understanding is very difficult, as its complexity stems from the need to comprehend the circuit performance, device characteristics, and operating modes. Meanwhile, core saturation can also cause serious problems for electronic systems, introducing nonlinear effects, leading to higher losses, insulation damage, and potential short circuits, rendering the electronic system unable to function properly. Therefore, the measurement and evaluation of core saturation has become a hot research topic.

[0003] Currently, one method for testing magnetic core saturation is based on a three-winding configuration. This method applies a DC excitation to the first winding to saturate the core, while a high-frequency signal is introduced into another winding. Core saturation is detected by monitoring changes in this signal in the third winding. This method requires a programmable load, DC power supply, impedance analysis, etc., making it relatively cumbersome. Another method involves adding two identical windings to the core: one for injecting a high-frequency (HF) signal and the other for detection. A high-frequency generator applies a low-power HF signal to the injection winding. The selected frequency of this injected signal differs from the operating frequency, ensuring its harmonics are clearly observable. Due to the low power, it does not affect system operation. A spectrum analyzer is connected to the detection winding to observe changes in the HF detection signal during saturation. A Fast Fourier Transform (FFT) algorithm is applied during digital analysis. This method requires extensive processing of the HF signal and necessitates custom-designed HF injection instruments, making it complex to implement. Summary of the Invention

[0004] To address the aforementioned issues, this application proposes an impedance extraction device and method under magnetic core saturation excitation. By injecting a current of a certain frequency and magnitude into the magnetic core, the core is brought to saturation, and the impedance is extracted under saturation. This method better reflects actual working conditions, requires no complex setup, and is relatively simple to operate, providing a basis for evaluating the performance of the magnetic core.

[0005] This application discloses an impedance extraction device under magnetic core saturation excitation, including an injection device and an extraction device; The injection device is used to inject current into the magnetic core to saturate the magnetic core. It includes a power amplifier circuit. The input terminal of the power amplifier circuit is connected to the AC-DC power supply output terminal, the signal generator output terminal, and the MCU control circuit output terminal, respectively. The output terminal of the power amplifier circuit is connected to the current detection circuit input terminal and the extraction device, respectively. The current detection circuit output terminal is connected to the MCU control circuit input terminal. The extraction device is used to extract impedance under the saturated state of the magnetic core. It includes a high-frequency filter circuit. The input terminal of the high-frequency filter circuit is connected to the output terminal of the power amplifier circuit. The output terminal of the high-frequency filter circuit is sequentially connected to a feedthrough capacitor, a first radio frequency current probe, a second radio frequency current probe, and a magnetic core clamp. The input terminal of the first radio frequency current probe is connected to the output terminal of a first high-pass filter. The input terminal of the second radio frequency current probe is connected to the output terminal of a second high-pass filter. Both the input terminals of the first and second high-pass filters are connected to the output terminal of a vector network analyzer. The feedthrough capacitor and the magnetic core clamp are grounded.

[0006] Preferably, the power amplifier circuit includes a first operational amplifier and a second operational amplifier. The non-inverting input terminal of the first operational amplifier is connected to the non-inverting input terminal of the second operational amplifier and is also connected to the output terminal of the signal generator. The output terminals of the first and second operational amplifiers are both connected to the input terminal of the high-frequency filter circuit through a ninth resistor and a third capacitor. The inverting input terminal of the first operational amplifier is grounded through a first resistor, a second resistor is connected between the inverting input terminal and the output terminal of the first operational amplifier, the inverting input terminal of the second operational amplifier is grounded through a fifth resistor, and a sixth resistor is connected between the inverting input terminal and the output terminal of the second operational amplifier. A first capacitor is connected between the compensation terminal and the output terminal of the first operational amplifier, a second capacitor is connected between the compensation terminal and the output terminal of the second operational amplifier, a third resistor is connected between the positive power supply terminal and the current limiting setting terminal of the first operational amplifier, a fourth resistor is connected between the negative power supply terminal and the current limiting setting terminal of the first operational amplifier, a seventh resistor is connected between the positive power supply terminal and the current limiting setting terminal of the second operational amplifier, and an eighth resistor is connected between the negative power supply terminal and the current limiting setting terminal of the second operational amplifier.

[0007] Preferably, the MCU control circuit includes a microcontroller, an optocoupler, a relay, and an isolation driver; The microcontroller's control pins are connected to an optocoupler via light-emitting diodes, and the optocoupler is connected to a relay via a first transistor and a first diode. The microcontroller's transmit pin is connected to the input of the isolation driver via a second transistor, and a fan is connected to the output of the isolation driver.

[0008] Preferably, the current detection circuit includes a DC-DC converter, a low-dropout regulator, and a third operational amplifier. The DC-DC converter is connected to the low-dropout regulator to form a two-stage power supply, and the low-dropout regulator is connected to the third operational amplifier.

[0009] Preferably, the high-frequency filter circuit includes a fourth inductor, a fifth inductor, a sixth inductor, a seventh inductor, and an eighth inductor connected in series. The output terminal of the eighth inductor is connected to the positive terminals of the thirty-second capacitor, the thirty-third capacitor, and the thirty-fourth capacitor. The negative terminals of the thirty-second capacitor, the thirty-third capacitor, and the thirty-fourth capacitor are grounded.

[0010] This application also discloses a method for impedance extraction under magnetic core saturation excitation, implemented using the aforementioned impedance extraction device under magnetic core saturation excitation, comprising the following steps: Connect the injection device and the extraction device to the magnetic core under test; SOL calibration is performed at the magnetic core connection of the extraction device, and the data of the two ports is measured by the vector network analyzer. The resistor under test and the RF current probe are equivalent to an ABCD matrix. The S-parameter formula of the ABCD matrix is ​​used to obtain the impedance expression, and the impedance value is calculated using the data measured by the vector network analyzer.

[0011] Preferably, the impedance expression is as follows:

[0012] in, For impedance elements, and For the coefficients that need to be solved, This is the reflection coefficient obtained by the VNA at the reference surface of the measurement port.

[0013] The beneficial effects of this invention are: (1) The present invention can extract the impedance of the magnetic core when the current is injected, which is more in line with the actual working conditions. It can obtain the impedance change of the magnetic core under different current excitation, that is, it can obtain the impedance of the magnetic core under different saturation levels, and has high sensitivity.

[0014] (2) The measuring equipment required for the device and working method of the present invention is VNA. It does not require too many measuring equipment, has a low threshold, and the testing process is simple and highly operable. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the impedance extraction device under magnetic core saturation excitation according to Embodiment 1 of the present invention; Figure 2 This is a power amplifier circuit diagram according to Embodiment 1 of the present invention; Figure 3 This is a schematic diagram of the MCU control circuit according to Embodiment 1 of the present invention; Figure 4 This is a schematic diagram of the current detection circuit according to Embodiment 1 of the present invention; Figure 5 This is a schematic diagram of the high-frequency filter circuit according to Embodiment 1 of the present invention; Figure 6 This is a graph showing the impedance test results of the high-frequency filter circuit in Embodiment 1 of the present invention; Figure 7 This is a physical structural diagram of the injection device according to Embodiment 2 of the present invention; Figure 8 This is a structural diagram of the extraction device according to Embodiment 2 of the present invention; Figure 9 This is a schematic diagram of the equivalent circuit of the dual probes in Embodiment 3 of the present invention; Figure 10 This is a schematic diagram of the core heating under different injection currents in Embodiment 3 of the present invention; Figure 11 This is a schematic diagram of the magnetic core saturation impedance test in Embodiment 3 of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided with reference to the accompanying drawings and embodiments.

[0017] Example 1 This embodiment discloses an impedance extraction device under magnetic core saturation excitation, such as... Figure 1 As shown, it includes an injection device and an extraction device.

[0018] The injection device includes an AC-DC power supply, a signal generator, a power amplifier circuit, an MCU control circuit, and a current detection circuit. The extraction device includes a high-frequency filter circuit, a feedthrough capacitor, a first RF current probe, a second RF current probe, a magnetic core clamp, a first high-pass filter, a second high-pass filter, and a vector network analyzer (VNA).

[0019] The input terminals of the power amplifier circuit are connected to the output terminals of the AC-DC power supply, the signal generator, and the MCU control circuit, respectively. The output terminal of the power amplifier circuit is connected to the input terminals of the current detection circuit and the high-frequency filter circuit. The output terminal of the current detection circuit is connected to the input terminal of the MCU control circuit. In the extraction device, the output terminal of the high-frequency filter circuit is sequentially connected to the feedthrough capacitor, the first RF current probe, the second RF current probe, and the magnetic core clamp. The output terminals of the vector network analyzer are connected to the input terminals of the first and second high-pass filters, respectively. The output terminal of the first high-pass filter is connected to the input terminal of the first RF current probe, and the output terminal of the second high-pass filter is connected to the input terminal of the second RF current probe. The feedthrough capacitor and the magnetic core clamp are grounded.

[0020] The AC-DC power supply includes a PFC power module and an LLC power module. In this embodiment, the AC-DC power supply model is LM200-12B36, providing a 36V input voltage. The signal generator is model DG5252. The injection device provides 0~4A current through the signal generator to excite the magnetic core, causing it to approach saturation. Its input is a small sinusoidal signal with a frequency of 1K~150K and a maximum amplitude of 3V. The output is a sinusoidal power signal, and the output sinusoidal current value is changed by adjusting the amplitude of the input sinusoidal signal.

[0021] The main function of the power amplifier circuit is to amplify the input sine wave signal, thereby enabling it to have a certain driving capability. The principle in this embodiment is as follows: Figure 2As shown, it includes a first operational amplifier and a second operational amplifier, both model PA119. The non-inverting input of the first operational amplifier is connected to the non-inverting input of the second operational amplifier and then to the output of the signal generator. Both the outputs of the first and second operational amplifiers are connected to the input of the high-frequency filter circuit via resistor R9 (the ninth resistor) and the positive terminal of capacitor C3 (the third capacitor). The inverting input of the first operational amplifier is grounded via resistor R1, and a second resistor is connected between the inverting input and the output of the first operational amplifier. The inverting input of the second operational amplifier is grounded via resistor R5, and a sixth resistor R6 is connected between the inverting input and the output of the second operational amplifier. A first capacitor C1 is connected between the compensation terminal and the output of the first operational amplifier, and a second capacitor C2 is connected between the compensation terminal and the output of the second operational amplifier. A third resistor R3 is connected between the positive power supply terminal and the current limiting setting terminal of the first operational amplifier. A fourth resistor R4 is connected between the negative power supply terminal and the current limiting setting terminal of the first operational amplifier. A seventh resistor R7 is connected between the positive power supply terminal and the current limiting setting terminal of the second operational amplifier. An eighth resistor R8 is connected between the negative power supply terminal and the current limiting setting terminal of the second operational amplifier. The function of the third resistor R3, fourth resistor R4, seventh resistor R7, and eighth resistor R8 is to limit the maximum output current of the chip. In this embodiment, their resistance values ​​are all 200mΩ, and PA119 can output a maximum current of 4A. The function of the first resistor R1, second resistor R2, fifth resistor R5, and sixth resistor R6 is to adjust the gain. In this embodiment, the gain is selected as 20 times, that is, when the input sine wave signal is 1V, the output sine wave signal is 20V. The first capacitor C1 and the second capacitor C2 are compensation capacitors, and their capacitance values ​​are both 33pF in this embodiment.

[0022] The MCU control circuit in this embodiment is as follows: Figure 3As shown, the system includes a microcontroller, optocoupler U1, relay U2, and isolation driver. In this embodiment, the microcontroller is an STM32F105R8T6 microcontroller, whose main functions include fan control, current and temperature acquisition, and output switch control. The optocoupler U1 is a PC817C, the relay U2 is an HF3FF / 005-1HST, and the isolation driver is a UCC5350MCDR. The microcontroller's GPIO control pin is connected to the negative terminal (pin 2) of optocoupler U1 via an LED. The positive terminal (pin 1) of optocoupler U1 is connected to a 5V power supply via the tenth resistor R10, which provides the on-resistance and conduction current. The emitter (pin 3) of optocoupler U1 is connected to the base of the first transistor Q1 via the eleventh resistor R11, and the collector (pin 4) of optocoupler U1 is connected to a 5V power supply. The emitter-collector of the first transistor Q1 is grounded, and its collector is connected to the positive terminal (pin 1) of the relay U2 coil. The collector of the first transistor Q1 is connected to the common terminal (pin 4) of the relay U2 through the first diode D1. The common terminal of the relay U2 is connected to a 5V power supply. The output terminal (pin 2) of the relay U2 is connected to the input terminal (pin 3).

[0023] The microcontroller's PWM transmit pin is connected to the base of the second transistor Q2, the emitter of the second transistor Q2 is grounded, and the collector of the second transistor Q2 is connected to the non-inverting input (IN+) of the isolation driver U3. The collector of the second transistor Q2 and the non-inverting input of the isolation driver U3 are connected to a 5V power supply through the twelfth resistor R12. The inverting input (IN-) of the isolation driver U3 is grounded. The input power supply terminal (VCC1) of the isolation driver U3 is connected to a 3V power supply. A fourth capacitor C4 and a fifth capacitor C5 are connected in parallel between VCC1 and the power supply, and both capacitors C4 and C5 are grounded. The output power supply terminal (VCC2) of the isolation driver U3 is connected to a 12V power supply. A sixth capacitor C6 and a seventh capacitor C7 are connected in parallel between VCC2 and the power supply, and both capacitors C6 and C7 are grounded. The output (OUT) of the isolation driver U3 is connected to the fan through the 11th resistor R13. The diode D2 and the 12th resistor R12 are connected in parallel across the 13th resistor R13. The Miller clamp port (CLAMP) of the isolation driver U3 is connected to the fan, and the negative power supply terminal (VEE) is grounded.

[0024] The current detection circuit includes a DC-DC converter U4, a low-dropout regulator (LDO) U5, and a third operational amplifier U6. The DC-DC converter U4 and the LDO U5 are connected to form a two-stage power supply, and the LDO U5 is connected to the third operational amplifier U6. The current detection circuit can collect the output current and transmit the collected current signal to the MCU control circuit. If the output current exceeds the set value, the MCU control circuit will control the output switch to close, protecting the downstream circuitry.

[0025] Specifically, in this embodiment, the current detection circuit is as follows: Figure 4 As shown, the DC-DC converter U4 is model URA2405YMD-15WR3, the low-dropout regulator U5 is model TPS7A3901DSCT, and the third operational amplifier U6 is model OPA2990IDR. The remote control enable terminal Ctrl (pin 1) of the DC-DC converter U4 is left floating. The positive input voltage Vin (pin 3) is connected to the positive power supply +VS. An eighth capacitor C8 is connected in parallel between the positive input voltage Vin and the input ground GND. The positive output terminal +Vo (pin 4) is connected to the 5V power supply and the positive input terminal INP (pin 1) of the low-dropout regulator U5 through the first inductor L1. The unused pin (pin 5) of the DC-DC converter U4 is grounded through the second inductor L2. The negative output terminal -Vo (pin 6) is connected to the -5V power supply through the third inductor L3. A ninth capacitor C9 is connected in parallel between the input terminals of the first inductor L1 and the second inductor L2. A tenth capacitor C10 is connected in parallel between the input terminals of the second inductor L2 and the third inductor L3. An eleventh capacitor C11 is connected in parallel between the output terminals of the first inductor L1 and the second inductor L2. A twelfth capacitor C12 is connected in parallel between the output terminals of the second inductor L2 and the third inductor L3. A thirteenth capacitor C13 is connected in parallel across the eleventh capacitor C11. A fourteenth capacitor C14 is connected in parallel across the twelfth capacitor C12.

[0026] The positive input terminal INP (pin 1) of the low dropout regulator U5 is connected to ground via the fifteenth capacitor C15. The enable terminal EN (pin 2) is connected to the 5V power supply via the fourteenth resistor R14. The noise reduction / soft-start port NR / SS (pin 3) is connected to ground via the sixteenth capacitor C16. The ground terminal GND (pin 4) is grounded. The negative input terminal INN (pin 5) is connected to the -5V power supply. The negative output terminal OUTN (pin 6) is connected to the -5V power supply and the output of the third operational amplifier U6. The negative output feedback terminal FBN (pin 7) is connected to the -5V power supply via the eighteenth capacitor C18. The buffered reference output terminal BUF (pin 8) is connected to the -5V power supply via the fifteenth and sixteenth resistors R15 and R16. The positive output feedback terminal FBP (pin 9) is connected to the 5V power supply via the seventeenth capacitor C17 and the positive output terminal OUTP (pin 10), and then connected to the positive power supply of the third operational amplifier U6 via the twenty-ninth capacitor C29. The twenty-ninth capacitor C29 is grounded. A resistor R17 is connected in parallel across the seventeenth capacitor C17. An eighteenth resistor R18 is connected in parallel between the seventeenth capacitor C17 and the positive output feedback terminal FBP. The eighteenth resistor R18 is grounded. Five capacitor branches—the twenty-fourth capacitor C24, the twenty-fifth capacitor C25, the twenty-sixth capacitor C26, the twenty-seventh capacitor C27, and the twenty-eighth capacitor C28—are connected in parallel between the negative output terminal OUTN of the low-dropout regulator U5 and the output terminal of the third operational amplifier U6. All five parallel capacitor branches are grounded. Five capacitor branches—the nineteenth capacitor C19, the twentieth capacitor C20, the twenty-first capacitor C21, the twenty-second capacitor C22, and the twenty-third capacitor C23—are connected in parallel between the positive output terminal OUTP and the twenty-ninth capacitor C29. All five parallel capacitor branches are grounded.

[0027] The non-inverting input of the third operational amplifier U6 is connected to one end of the twentieth resistor R20 via the twenty-second resistor R22, and the inverting input is connected to the other end of the twentieth resistor R20 via the twenty-first resistor R21. The non-inverting input is connected to the output and grounded via the twenty-third resistor R23 and the thirtieth capacitor C30, and the inverting input is connected to the output via the nineteenth resistor R19. The negative power supply / ground terminal is connected to the output, and the output is also connected to the thirty-first capacitor C31.

[0028] The extraction device is used to extract impedance under the saturation state of the magnetic core, wherein the high-frequency filter circuit is as follows: Figure 5As shown, the circuit includes inductors L4, L5, L6, L7, and L8 connected in series. The output of inductor L8 is connected to the positive terminals of capacitors C32, C33, and C34. The negative terminals of C32, C33, and C34 are grounded. The main function of the high-frequency filter circuit is to isolate the influence of the power signal on the VNA signal. Specifically, it exhibits high impedance at low frequencies, preventing the VNA signal from passing through; and low impedance at high frequencies, allowing the VNA signal to propagate through the capacitors in the test loop, thus obtaining information from the loop. In other words, the power injection module does not affect the VNA signal. In this embodiment, the inductors are air-core inductors to avoid the influence of magnetic core nonlinearity on the test results. L4~L8 are 220nH, C31 is 4.7nF, C32 is 1nF, and C33 is 470pF. In this embodiment, the two radio frequency current probes are model EM5011, with a working frequency of 20Hz~100MHz. In this embodiment, the high-frequency filtering circuit is integrated with the current probe to form a measurement device.

[0029] The impedance test results of the high-frequency filter circuit in this embodiment are as follows: Figure 6 As shown. At low frequencies, the impedance reaches hundreds of ohms, but above 10MHz, the impedance is only tens of ohms and continues to decrease, thus isolating low frequencies while allowing high frequencies to pass.

[0030] Example 2 For example, this embodiment discloses a physical device diagram of the injection device and extraction device in Embodiment 1. The physical injection device is shown below. Figure 7 As shown, the device includes a fan 1, an injection device PCB 2, a power supply interface 3, an AC-DC power supply 4, an input signal interface 5, a spare interface 6, and an output interface 7. The injection device PCB 2 integrates a power amplifier circuit, an MCU control circuit, and a current detection circuit. The fan 1 is connected to the injection device PCB 2, the power supply interface 3 is connected to the AC-DC power supply 4, the input signal interface 5 is connected to the signal generator, and the input signal interface 5 and the output interface 7 are connected to the injection device PCB 2 via N-type cable connectors.

[0031] The actual extraction device, such as Figure 8As shown, the device includes a housing, an output port 8, a second RF current probe 9, a first RF current probe 10, a high-frequency filter circuit PCB 11, an input port 12, a first N-type interface 13, a second N-type interface 14, a first high-pass filter PCB 15, a second high-pass filter PCB 16, and a feedthrough capacitor 17. The high-frequency filter circuit PCB 11 integrates a high-frequency filter circuit, the first high-pass filter PCB 15 integrates a first high-pass filter, and the second high-pass filter PCB 16 integrates a second high-pass filter. The output port 8 and input port 12 are located at opposite ends of the housing. The input port 12 is connected to the output of the injection device and the high-frequency filter circuit PCB 11, while the output port 8 is connected to the magnetic core under test (core clamp) and the second RF current probe 9. The second RF current probe 9 and the first RF current probe 10 are connected; both are model EM5011. The first RF current probe 10 is connected to the first high-pass filter PCB 15 via an N-type connector, and the first high-pass filter PCB 15 is connected to the first N-type interface 13 via an N-type connector. The second RF current probe 9 is connected to the second high-pass filter PCB 16 via an N-type connector, and the second high-pass filter PCB 16 is connected to the second N-type interface 14 via an N-type connector. The first N-type interface 13 and the second N-type interface 14 are disposed through the housing for connection with the VNA.

[0032] The feedthrough capacitor 17 is used to filter out noise in the loop. It is model L65B. Its two ends are connected to the high-frequency filter circuit PCB11 and the first RF current probe 10, respectively. The feedthrough capacitor 10 is fixed on the lower connector and grounded through the connector.

[0033] Example 3 This embodiment discloses a method for impedance extraction using the apparatus of Embodiment 2. It mainly includes the following steps: Device Connection: Connect power supply interface 3 of the injection device to AC power. Connect input signal interface 5 to a signal generator. The input signal is a sine wave signal with a maximum amplitude of 3V and a frequency range of 1~150KHz. Connect output interface 7 of the injection device to input port 12 of the extraction device via a cable with an N-type connector. Connect output port 8 of the extraction device to the magnetic core under test (core clamp) via an N-type connector. Connect the first N-type interface 13 and the second N-type interface 14 of the extraction device to the two test ports of the VNA.

[0034] Device Calibration: After the injection and extraction devices are connected, calibration begins. The calibration end is located at output port 8 of the extraction device, i.e., the magnetic core to be tested. The calibration procedure is SOL calibration. The calibration components SHORT, OPEN, and LAOD are connected to output port 8 of the extraction device using an N-type connector, and the data from the two VNA ports in the extraction device are measured using a VNA.

[0035] Measurement and Extraction: Dual-Probe Extraction Equivalent Circuit as follows Figure 9 As shown in the figure For the parasitic capacitance of the current probe, This is the magnetizing inductance of the current probe. The resistor to be measured... The RF current probe can be represented as an equivalent ABCD matrix. Combining the following three equations, we can obtain the ABCD expression for the entire circuit:

[0036]

[0037]

[0038] in, The resistance value of the resistor to be measured. For impedance elements, This is the impedance matrix of the first RF current probe. This is the impedance matrix of the second RF current probe. , , , Elements in the impedance matrix of the first RF current probe , , , These are elements in the impedance matrix of the second RF current probe.

[0039] The ABCD expression for the entire circuit is as follows:

[0040] Expand the total transmission matrix Ttotal obtained by connecting the known two-port network in series with the impedance to be measured, and in the matrix... The elements of the matrix can be separated as follows:

[0041]

[0042]

[0043]

[0044] in, , , , These are the four elements of the ABCD matrix, used to inversely calculate the unknown impedance from the subsequently measured S-parameters.

[0045] By using the ABCD matrix transformation formula for S-parameters, the impedance can be extracted to obtain the mathematical expression for impedance. For the sake of simplicity, the constant term in the formula is incorporated into the coefficient. and Their expressions are as follows:

[0046]

[0047] The impedance measurement formula is as follows:

[0048] in, and For the coefficients that need to be solved, This is the reflection coefficient obtained by the VNA at the reference plane of the measurement port, i.e., the complex measurement corresponding to the reflected voltage.

[0049] Using the data measured by the VNA during SOL calibration, we obtained:

[0050]

[0051]

[0052] These quantities represent port quantities measured by the VNA on the same reference plane under three standard load conditions: SOL (Short / Open / Load). , , This represents the port reflection measurement under the corresponding conditions. , , , , , The reflection coefficient and forward transmission coefficient measured under short-circuit / open-circuit / matched load conditions are respectively used to solve the calibration coefficient by equations (12)–(14). , And further reverse the calculation to find the unknown impedance.

[0053] Based on VNA measurements, we obtain from equations (12)-(14) and Next, the core saturation impedance test can be performed. By injecting different currents and measuring with a VNA, different results can be obtained. Value, will , and Substituting into equation (11), the impedance of the magnetic core under this current injection can be obtained.

[0054] The above method was verified experimentally. Specifically, an N-type connector was used to connect the magnetic core to input port 1 of the extraction device, and the injection device controlled the magnitude of the injection current by adjusting the injection sine wave signal. Figure 10 As shown in (a), the magnetic core begins to heat up when a current of 0.5A is injected into it. Figure 10 As shown in (b), when a 2A current is injected into the magnetic core, the magnetic core heats up severely, and the magnetic core impedance changes significantly at this time.

[0055] Extracted core impedance as Figure 11 As shown, the core impedance changes significantly with different injected current magnitudes. This demonstrates that the device and method proposed in this application can extract the impedance change of the magnetic core under current injection, providing a basis for evaluating the performance of the magnetic core.

[0056] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. An impedance extraction device under magnetic core saturation excitation, characterized in that, Includes an injection device and an extraction device; The injection device is used to inject current into the magnetic core to saturate the magnetic core. It includes a power amplifier circuit. The input terminal of the power amplifier circuit is connected to the AC-DC power supply output terminal, the signal generator output terminal, and the MCU control circuit output terminal, respectively. The output terminal of the power amplifier circuit is connected to the current detection circuit input terminal and the extraction device, respectively. The current detection circuit output terminal is connected to the MCU control circuit input terminal. The extraction device is used to extract impedance under the saturated state of the magnetic core. It includes a high-frequency filter circuit. The input terminal of the high-frequency filter circuit is connected to the output terminal of the power amplifier circuit. The output terminal of the high-frequency filter circuit is sequentially connected to a feedthrough capacitor, a first radio frequency current probe, a second radio frequency current probe, and a magnetic core clamp. The input terminal of the first radio frequency current probe is connected to the output terminal of a first high-pass filter. The input terminal of the second radio frequency current probe is connected to the output terminal of a second high-pass filter. Both the input terminals of the first and second high-pass filters are connected to the output terminal of a vector network analyzer. The feedthrough capacitor and the magnetic core clamp are grounded.

2. The impedance extraction device under magnetic core saturation excitation according to claim 1, characterized in that, The power amplifier circuit includes a first operational amplifier and a second operational amplifier. The non-inverting input terminal of the first operational amplifier is connected to the non-inverting input terminal of the second operational amplifier and is also connected to the output terminal of the signal generator. The output terminals of the first and second operational amplifiers are both connected to the input terminal of the high-frequency filter circuit through a ninth resistor and a third capacitor. The inverting input terminal of the first operational amplifier is grounded through a first resistor, a second resistor is connected between the inverting input terminal and the output terminal of the first operational amplifier, the inverting input terminal of the second operational amplifier is grounded through a fifth resistor, and a sixth resistor is connected between the inverting input terminal and the output terminal of the second operational amplifier. A first capacitor is connected between the compensation terminal and the output terminal of the first operational amplifier, a second capacitor is connected between the compensation terminal and the output terminal of the second operational amplifier, a third resistor is connected between the positive power supply terminal and the current limiting setting terminal of the first operational amplifier, a fourth resistor is connected between the negative power supply terminal and the current limiting setting terminal of the first operational amplifier, a seventh resistor is connected between the positive power supply terminal and the current limiting setting terminal of the second operational amplifier, and an eighth resistor is connected between the negative power supply terminal and the current limiting setting terminal of the second operational amplifier.

3. The impedance extraction device under magnetic core saturation excitation according to claim 2, characterized in that, The MCU control circuit includes a microcontroller, an optocoupler, a relay, and an isolation driver; The microcontroller's control pins are connected to an optocoupler via light-emitting diodes, and the optocoupler is connected to a relay via a first transistor and a first diode. The microcontroller's transmit pin is connected to the input of the isolation driver via a second transistor, and a fan is connected to the output of the isolation driver.

4. The impedance extraction device under magnetic core saturation excitation according to claim 3, characterized in that, The current detection circuit includes a DC-DC converter, a low-dropout regulator, and a third operational amplifier. The DC-DC converter is connected to the low-dropout regulator to form a two-stage power supply, and the low-dropout regulator is connected to the third operational amplifier.

5. The impedance extraction device under magnetic core saturation excitation according to claim 4, characterized in that, The high-frequency filter circuit includes a fourth inductor, a fifth inductor, a sixth inductor, a seventh inductor, and an eighth inductor connected in series. The output terminal of the eighth inductor is connected to the positive terminals of the thirty-second, thirty-third, and thirty-fourth capacitors, while the negative terminals of the thirty-second, thirty-third, and thirty-fourth capacitors are grounded.

6. A method for impedance extraction under magnetic core saturation excitation, characterized in that, The impedance extraction device under magnetic core saturation excitation as described in any one of claims 1-5 is used to achieve this, including the following steps: Connect the injection device and the extraction device to the magnetic core under test; SOL calibration is performed at the magnetic core connection of the extraction device, and the data of the two ports is measured by the vector network analyzer. The resistor under test and the RF current probe are equivalent to an ABCD matrix. The S-parameter formula of the ABCD matrix is ​​used to obtain the impedance expression, and the impedance value is calculated using the data measured by the vector network analyzer.

7. The impedance extraction method under magnetic core saturation excitation according to claim 6, characterized in that, The impedance expression is as follows: Among them, among them, For impedance elements, and For the coefficients that need to be solved, This is the reflection coefficient obtained by the VNA at the reference surface of the measurement port.

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