Display panel and control method thereof

Abstract

The invention relates to a display panel and a control method thereof. The display panel comprises a control unit, a buffer capacitor, N first switch units and N data signal lines, wherein the buffer capacitor is connected with N data signal lines, the first switch units are arranged between the data signal lines and the buffer capacitor, and the first switch units and the data signal lines are arranged in a one-to-one correspondence mode; the first switch units are electrically connected with the control unit, and the control unit is used for outputting first control signals and controlling the on-off states of the first switch units through the first control signals. Before the M-th row of sub-pixels are charged, the first switch unit is turned on, the data signal lines and the buffer capacitors are connected, and charge sharing is performed on the last frame of residual charge in the pixel capacitors of the M-th row of sub-pixels connected with the N data signal lines through the buffer capacitors, so that self-charging is performed on the M-th row of sub-pixels. Therefore, the voltage amplitude for driving the liquid crystal is reduced, and the effect of reducing the energy consumption required by reverse driving of the liquid crystal display screen is achieved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and its control method. Background Technology

[0002] Liquid crystal displays (LCDs) are one of the mainstream display screens. Due to their advantages such as low power consumption, small size, and low radiation, they are widely used in consumer electronics (such as televisions, mobile phones, and computers), industrial control, medical instruments, and automotive displays.

[0003] However, existing LCD screens inevitably contain charged impurities in their liquid crystals. To avoid image retention, a reverse-drive method is required to drive each sub-pixel. This method doubles the voltage required for direct drive, increasing energy consumption. Therefore, reducing the energy consumption of existing LCD screens due to reverse-drive has become a pressing technical problem. Summary of the Invention

[0004] This application provides a display panel and its control method to solve the problem of increased energy consumption caused by the inversion drive of existing liquid crystal displays.

[0005] In a first aspect, embodiments of this application provide a display panel, the display panel comprising: a control unit, a buffer capacitor, N first switch units and N data signal lines, where N is an integer greater than 1; The buffer capacitor is connected to N data signal lines, and the first switching unit is disposed between the data signal lines and the buffer capacitor, and is configured to correspond one-to-one with the data signal lines. Each of the first switching units is electrically connected to the control unit. The control unit is used to output a first control signal and use the first control signal to control the switching state of the first switching units. Before the Mth row of sub-pixels is charged, the first switching unit is turned on, connecting the data signal line and the buffer capacitor. The buffer capacitor shares the residual charge from the previous frame in the pixel capacitor of the Mth row of sub-pixels connected to the N data signal lines, so as to self-charge the Mth row of sub-pixels, where M is an integer greater than 1.

[0006] Optionally, the first switching unit is a first thin-film transistor; The control terminal of the first thin-film transistor is connected to the control unit, the first terminal of the first thin-film transistor is connected to its corresponding data signal line, and the second terminal of the first thin-film transistor is connected to the buffer capacitor. The control unit is used to output the first control signal to the control terminal of the first thin-film transistor, and to use the first control signal to control the switching state of the first thin-film transistor.

[0007] Optionally, the display panel further includes a second switching unit and a common electrode; The second switching unit is disposed between the first end and the second end of the buffer capacitor, the first end of the buffer capacitor is connected to the common electrode, and the second end of the buffer capacitor is connected to the second end of the first thin-film transistor. The second switching unit is electrically connected to the control unit, which outputs a second control signal and uses the second control signal to control the switching state of the second switching unit. When the second switching unit is in the on state, the common electrode and the second end of the buffer capacitor are connected to initialize the voltage value of the second end of the buffer capacitor.

[0008] Optionally, the second switching unit is a second thin-film transistor; Wherein, the control terminal of the second thin-film transistor is connected to the control unit, the first terminal of the second thin-film transistor is connected to the common electrode, and the second terminal of the second thin-film transistor is connected to the second terminal of the buffer capacitor; The control unit is used to output the second control signal to the control terminal of the second thin-film transistor, and to use the second control signal to control the switching state of the second thin-film transistor.

[0009] Optionally, the display panel further includes a detection signal line; One end of the detection signal line is connected to the second end of the buffer capacitor, and the other end of the detection signal line is connected to the control unit. The control unit is used to compare the voltage value at the second end of the buffer capacitor detected by the detection signal line with the voltage value at the polarity midpoint, and to drive compensation for a portion of the data signal lines based on the comparison result.

[0010] Optionally, the capacitance value of the buffer capacitor is greater than the capacitance value of the pixel capacitor.

[0011] Secondly, embodiments of this application also provide a method for controlling a display panel, applied to the display panel described in the first aspect, the method comprising: Before charging the Mth row of sub-pixels, a first control signal is output by the control unit, and the first control signal is used to control the first switching unit to turn on, so as to connect the data signal line and the buffer capacitor. When the first switching unit is turned on, the first control signal is a first high-level signal. The residual charge from the previous frame in the pixel capacitor of the Mth row sub-pixel connected to the N data signal lines is shared by a buffer capacitor to self-charge the Mth row sub-pixel, where M is an integer greater than 1.

[0012] Optionally, the method includes: After the Mth row of sub-pixels is charged, the control unit outputs the first control signal and uses the first control signal to control the first switch unit to turn off, thereby disconnecting the data signal line from the buffer capacitor. When the first switch unit is turned off, the first control signal is a first low-level signal.

[0013] Optionally, the method further includes: The control unit outputs a second control signal and uses the second control signal to control the switching state of the second switching unit; When the second switching unit is in the ON state, the common electrode and the second terminal of the buffer capacitor are connected to initialize the voltage value of the second terminal of the buffer capacitor.

[0014] Optionally, the step of outputting a second control signal through the control unit and using the second control signal to control the switching state of the second switching unit includes: When the current frame is displayed, the control unit outputs a second high-level signal and uses the second high-level signal to control the second switch unit to turn on; If the current frame has not been fully displayed, the control unit outputs a second low-level signal and uses the second low-level signal to control the second switch unit to turn off.

[0015] Compared with the prior art, the technical solution provided in this application has the following advantages: The display panel provided in this application includes: a control unit, a buffer capacitor, N first switch units, and N data signal lines, where N is an integer greater than 1; wherein, the buffer capacitor is connected to the N data signal lines, and the first switch units are disposed between the data signal lines and the buffer capacitor, and are disposed one-to-one with the data signal lines; each of the first switch units is electrically connected to the control unit, and the control unit is used to output a first control signal and use the first control signal to control the switching state of the first switch units; before the Mth row of sub-pixels is charged, the first switch units are turned on, and the data signal lines and the buffer capacitor are connected. The buffer capacitor is used to share the residual charge of the previous frame in the pixel capacitor of the Mth row of sub-pixels connected to the N data signal lines, so as to self-charge the Mth row of sub-pixels, where M is an integer greater than 1. In this way, the display panel can control the switching state of the first switching unit through the first control signal output by the control unit. Before the Mth row of sub-pixels is charged, the first switching unit is turned on to conduct the data signal line and the buffer capacitor. The buffer capacitor then shares the residual charge from the previous frame in the pixel capacitor of the Mth row of sub-pixels, thus enabling the Mth row of sub-pixels to self-charge. In other words, the display panel can neutralize the residual charge from the previous frame of any row of sub-pixels before charging them. The data signal only needs to charge the sub-pixel voltage from the neutralized voltage value to the target grayscale voltage value, thereby reducing the voltage amplitude required to drive the liquid crystal and thus reducing the energy consumption required for the LCD screen due to inversion driving. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0019] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application; Figure 2 A layout diagram of a display panel provided in an embodiment of this application; Figure 3 for Figure 2 A magnified view of a portion of position A in the diagram; Figure 4 A layout diagram of yet another display panel provided in an embodiment of this application; Figure 5 A schematic diagram of an initial pixel voltage provided in an embodiment of this application; Figure 6 A schematic diagram of a pixel voltage after self-charging, provided as an embodiment of this application; Figure 7 A flowchart illustrating a control method for a display panel provided in an embodiment of this application; Figure 8 This is a timing relationship diagram between a first control signal and other signals provided in an embodiment of this application.

[0020] Explanation of reference numerals in the attached figures: 100, Display panel; 110, Buffer capacitor; 120, First switching unit; 130, Data signal line; 140, Second switching unit; 150, Common electrode; 160, Detection signal line. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0023] See Figures 1 to 3 , Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application. Figure 2 This is a layout diagram of a display panel provided in an embodiment of this application. Figure 3 for Figure 2 A magnified view of a portion of position A in the diagram. (See attached image.) Figures 1 to 3As shown, the display panel 100 includes: a control unit (not shown in the figure), a buffer capacitor 110, N first switch units 120 and N data signal lines 130, where N is an integer greater than 1; Among them, the buffer capacitor 110 is connected to N data signal lines 130, and the first switching unit 120 is disposed between the data signal lines 130 and the buffer capacitor 110, and is disposed in a one-to-one correspondence with the data signal lines 130. Each of the first switching units 120 is electrically connected to the control unit. The control unit is used to output a first control signal and use the first control signal to control the switching state of the first switching unit 120. Before the Mth row of sub-pixels is charged, the first switching unit 120 is turned on, and the data signal line 130 and the buffer capacitor 110 are connected. The residual charge of the previous frame in the pixel capacitor of the Mth row of sub-pixels connected to the N data signal lines 130 is shared through the buffer capacitor 110 to self-charge the Mth row of sub-pixels. M is an integer greater than 1.

[0024] Specifically, the aforementioned control unit can be a control unit integrated on the existing control chip of the display panel 100, or it can be a control unit on a newly added control chip; this application embodiment does not impose specific limitations. The aforementioned buffer capacitor 110 is used to share the residual charge from the previous frame in the pixel capacitor of a sub-pixel connected to N data signal lines 130 in a certain row. The buffer capacitor 110 has the characteristics of a large capacitance value and being initially in a polarity midpoint state. The aforementioned first switching unit 120 can be a thin-film transistor, field-effect transistor, or other switching unit. The number of the first switching units 120 is the same as the number of data signal lines 130 in the display panel 100. The data signal lines 130 here are mainly used to transmit data signals (i.e., data signals). The aforementioned first control signal can also be called a self-charging enable signal. This first control signal is controlled and output by the control unit. This first control signal can be a periodic square wave signal, with a period the same as the row scanning period of the display panel 100; that is, during each row Gate signal activation period, the first control signal outputs a square wave signal. This first control signal is used to control the switching state of each first switching unit 120. For example, when the first control signal is high, it controls each first switch unit 120 to turn on; when the first control signal is low, it controls each first switch unit 120 to turn off. As another example, when the first control signal is low, it controls each first switch unit 120 to turn on; when the first control signal is high, it controls each first switch unit 120 to turn off.

[0025] Since each first switch unit 120 is electrically connected to the control unit, the control unit can output a first control signal to each first switch unit 120 and use the first control signal to control the switching state of each first switch unit 120. When each first switch unit 120 is in the on state, the display panel 100 can use the buffer capacitor 110 to share the residual charge of the previous frame in the pixel capacitor of the Mth row of sub-pixels connected to each data signal line 130, so as to self-charge the Mth row of sub-pixels. It should be noted that the Mth row of sub-pixels here can be any row of sub-pixels to be charged, such as 1, 2, 3, etc. The value range of M can be determined according to the number of rows of sub-pixels on the display panel 100.

[0026] In related technologies, when the display panel 100 performs inversion driving, the sub-pixel charging process can be divided into two stages: (1) charging from the original polarity voltage to the voltage midpoint; (2) charging from the midpoint voltage to the target grayscale voltage of the opposite polarity, that is, the voltage amplitude of driving the liquid crystal needs to be doubled for direct driving. In this embodiment, the display panel 100 can neutralize the residual charge of the previous frame of any row of sub-pixels before charging. The data signal only needs to charge the sub-pixel voltage from the neutralized voltage value (close to the polarity midpoint voltage value of the buffer capacitor) to the target grayscale voltage value. Therefore, the display panel 100 in this embodiment reduces the voltage amplitude of driving the liquid crystal, thereby reducing the energy consumption required by the liquid crystal display screen for inversion driving.

[0027] In an optional embodiment, the first switching unit 120 is a first thin-film transistor; The control terminal of the first thin-film transistor is connected to the control unit, the first terminal of the first thin-film transistor is connected to its corresponding data signal line 130, and the second terminal of the first thin-film transistor is connected to the buffer capacitor 110. The control unit is used to output a first control signal to the control terminal of the first thin-film transistor, and use the first control signal to control the switching state of the first thin-film transistor.

[0028] Specifically, each first thin-film transistor (TFT) can be located at the end of each data signal line 130. The control terminal (gate) of each TFT can be connected to the control unit via a self-charging enable signal line (i.e., a signal line transmitting the first control signal), so that the first control signal output by the control unit controls the opening and closing of each TFT. The second terminal (drain) of each TFT is connected to one terminal of a buffer capacitor 110, and the other terminal of the buffer capacitor 110 is connected to a common electrode 150. The first terminal (source) of each TFT is connected to its corresponding data signal line 130. When the Gate scan signal is activated to a certain row, the sub-pixel of that row can be connected to the buffer capacitor 110 under the control of the first control signal. Figure 2 In the layout diagram, the common electrode 150 can be perpendicularly overlapped with the bulk metal to form a buffer capacitor 110.

[0029] Since the control terminals of each of the first thin-film transistors can be connected to the control unit, the first terminal of each of the first thin-film transistors can be connected to its corresponding data signal line 130, and the second terminal of each of the first thin-film transistors can be connected to the buffer capacitor 110, when the control unit outputs a high-level first control signal to the control terminal of each of the first thin-film transistors, each of the first thin-film transistors can be turned on. At this time, the data signal line 130 corresponding to each of the first thin-film transistors can be connected to the buffer capacitor 110, so as to use the buffer capacitor 110 to share the residual charge of the previous frame in the pixel capacitor of the Mth row sub-pixel connected to each data signal line 130, so as to self-charge the Mth row sub-pixel.

[0030] In an optional embodiment, the display panel 100 further includes a second switching unit 140 and a common electrode 150; The second switching unit 140 is disposed between the first end of the buffer capacitor 110 and the second end of the buffer capacitor 110. The first end of the buffer capacitor 110 is connected to the common electrode 150, and the second end of the buffer capacitor 110 is connected to the second end of the first thin film transistor. The second switching unit 140 is electrically connected to the control unit. The control unit is used to output a second control signal and use the second control signal to control the switching state of the second switching unit 140. When the second switching unit 140 is in the open state, the common electrode 150 and the second end of the buffer capacitor 110 are connected to initialize the voltage value of the second end of the buffer capacitor 110.

[0031] Specifically, the aforementioned common electrode 150 (i.e., the COM electrode) is mainly used to provide a stable potential reference to ensure accurate driving of liquid crystal molecules. The aforementioned second switching unit 140 can be a switching unit such as a thin-film transistor or a field-effect transistor. The second switching unit 140 can be disposed between the first end and the second end of the buffer capacitor 110. When the second switching unit 140 is in the on state, the common electrode 150 and the second end of the buffer capacitor 110 are connected. At this time, the voltage value of the second end of the buffer capacitor 110 can be initialized using the common electrode 150, that is, the voltage value of the buffer capacitor 110 after self-charging is initialized to the polarity midpoint voltage, thereby reducing power consumption and improving display uniformity. Furthermore, during the self-charging stage, the high-frequency noise generated by data signal changes can also be absorbed by the buffer capacitor 110, thereby reducing power load and voltage fluctuations and suppressing high-frequency harmonic radiation, meeting the requirements of more stringent electromagnetic compatibility (EMC) scenarios such as automotive applications.

[0032] In an optional embodiment, the second switching unit 140 is a second thin-film transistor; The control terminal of the second thin-film transistor is connected to the control unit, the first terminal of the second thin-film transistor is connected to the common electrode 150, and the second terminal of the second thin-film transistor is connected to the second terminal of the buffer capacitor 110. The control unit is used to output a second control signal to the control terminal of the second thin-film transistor, and to control the switching state of the second thin-film transistor using the second control signal.

[0033] Specifically, the control terminal (i.e., gate) of the second thin-film transistor can be connected to the control unit, the first terminal (i.e., source) of the second thin-film transistor can be connected to the common electrode 150, and the second terminal (i.e., drain) of the second thin-film transistor can be connected to the second terminal of the buffer capacitor 110. Therefore, when the control unit outputs a high-level second control signal to the control terminal of the second thin-film transistor, the second thin-film transistor can be in the on state. At this time, the second terminal of the buffer capacitor 110 can be connected to the common electrode 150 to initialize the voltage value of the second terminal of the buffer capacitor 110 using the common electrode 150, that is, to initialize the buffer capacitor 110 to the polarity midpoint state.

[0034] In an alternative embodiment, see Figure 4 The display panel 100 also includes a detection signal line 160; One end of the detection signal line 160 is connected to the second end of the buffer capacitor 110, and the other end of the detection signal line 160 is connected to the control unit. The control unit is used to compare the voltage value at the second end of the buffer capacitor detected by the detection signal line 160 with the voltage value at the polarity midpoint, and to drive compensation for part of the data signal line 130 according to the comparison result.

[0035] Specifically, the detection signal line 160 can be a metal connection line connecting the second end of the buffer capacitor 110 and the control unit. This allows the detection signal line 160 to detect the voltage value at the second end of the buffer capacitor 110 (i.e., the voltage value after charge sharing of the residual charge from the previous frame in the buffer capacitor 110), and transmit this voltage value to the control unit. The control unit can then compare the voltage value at the second end of the buffer capacitor 110 with the polarity midpoint voltage value, and perform drive compensation on some of the N data signal lines 130 based on the comparison result. Specifically, the control unit can determine whether the pixel voltage is in the positive or negative polarity range after the self-charging process based on the voltage value at the second end of the buffer capacitor 110. This allows for adjustment of the drive voltage waveform corresponding to the data signal lines 130 (i.e., data signal lines) of opposite polarity, addressing the load difference between the positive and negative polarity data signal lines, thereby improving the display uniformity of the display panel 100 and ultimately enhancing the display quality. For example, using polarity switching between -5V to 0V and 0V to 5V for driving, after the self-charging phase, under a specific screen display, both the pixel voltage and the voltage at the second terminal of the buffer capacitor 110 are in a weakly positive polarity (e.g., 0~1V). Therefore, during the next driving of the Data signal lines, the load on the negative Data signal lines is higher than that on the positive Data signal lines. Thus, driving compensation can be performed on all negative Data signal lines. If the polarity is negative after compensation, then driving compensation is performed on the positive Data signal lines, thereby improving the uniformity of driving the positive and negative Data signal lines. As another example, when the voltage at the second terminal of the buffer capacitor 110 is less than a certain value (e.g., 0.1V), the driving load on the positive and negative Data signal lines is relatively balanced. When the voltage at the second terminal of the buffer capacitor 110 exceeds the set voltage value, driving compensation is activated to balance the display differences caused by the load, thereby improving display uniformity and enhancing the robustness of the self-charging structure.

[0036] Of course, as another implementation, the display panel 100 also includes a potential comparison unit, that is, the comparison process between the voltage value at the second end of the buffer capacitor 110 and the voltage value at the polarity midpoint is not performed by the control unit, but by the potential comparison unit. Figure 4As shown, the detection signal line 160 connects the buffer capacitor 110 and the potential comparison unit, and is used to detect the voltage value at the second end of the buffer capacitor 110 and send the voltage value at the second end of the buffer capacitor 110 to the potential comparison unit. The potential comparison unit compares the voltage value at the second end of the buffer capacitor 110 with the voltage value at the polarity midpoint, and then sends the comparison result to the control unit. The control unit then performs drive compensation on some of the data signal lines 130 among the N data signal lines 130 according to the comparison result.

[0037] In an alternative embodiment, the capacitance value of the buffer capacitor 110 is greater than the capacitance value of the pixel capacitor.

[0038] Specifically, when each of the first switching units 120 is turned on, all sub-pixels in the Mth row are connected to the buffer capacitor 110 via each of the first switching units 120. Due to the existence of the polarity reversal drive, the sub-pixels in the Mth row exhibit pixel voltages with alternating positive and negative polarities. The buffer capacitor 110, located at the midpoint of polarity, performs charge homogenization with the pixel capacitors of positive and negative polarities. The homogenized voltage can be expressed by the following formula: ; in, This represents the display voltage of the i-th sub-pixel in a row in the previous frame (without considering changes in leakage voltage). This represents the pixel capacitance of each sub-pixel. This indicates the size of the buffer capacitor 110, n represents the number of sub-pixels in this row, and I ranges from 1 to n. If the resolution is Full High Definition (FHD), then the number of sub-pixels in this row n = 1920 * 3 = 5760.

[0039] According to the above formula, when the buffer capacitor Much larger than pixel capacitance At that time, the voltage after uniformity It will be further pulled towards the median voltage of polarity drive, which is beneficial for medianizing pixel voltage.

[0040] For ease of understanding, the following describes the mutual charging energy-saving display principle and the role of the buffer capacitor 110 in mutual charging using specific numerical values. It is assumed that the display panel 100 uses a positive voltage of 0~5V and a negative voltage of 0~-5V to control the liquid crystal deflection, then the polarity midpoint voltage is 0V. Of course, in practical applications, other voltages can be used as the positive and negative voltages; this is merely an example and does not constitute a limitation of this application.

[0041] During the display process on the display panel 100, the Mth row of any frame is selected. Assume the initial pixel voltages of each sub-pixel in this row are 4, -3, 1, -2, 5, and -2, respectively. Figure 5 As shown, according to the inversion drive principle, if the required grayscale voltages for the next charge are -2, 4, -5, 0, -4, and 5, and if the capacitance of each sub-pixel is denoted as C, and the buffer capacitance of 110 is much larger than the pixel capacitance, denoted as 20C, then before self-charging, each sub-pixel is independent. Taking the first data as an example, it was originally 4V, and the display voltage of the next frame is -2V. The process from 4 to -2 is entirely the load of the Data signal line, which requires 6*C of power. By calculating the pixel voltages of the 6 sub-pixels in the example and adding them together, a total of 37C of power is required. When the pixel voltage of the sub-pixels in the row undergoes self-charging without buffer capacitor 110, all sub-pixels in that row will first share their charge. Specifically, pixels 4, -3, 1, -2, 5, and -2 will have their charge averaged. After averaging, the pixel voltage of all sub-pixels will be 0.5V. Then, charging will be performed using the Data signal line. Taking the first data point charging to -2V as an example, the process from 0.5V to -2V requires 2.5C of charge. Adding the pixel voltages of the six sub-pixels in this example, a total of 21C of charge is required.

[0042] After self-charging and with a buffer capacitor of 110, all sub-pixels in that row will first undergo charge sharing, i.e., using the formula mentioned above. After self-charging, the pixel voltage is found to be 0.12V. Figure 6 As shown, with buffer capacitor 110, the average voltage is closer to the polarity midpoint voltage, the load on the Data signal line is smaller, and the difference between adjacent data signal lines 130 is also smaller, resulting in better uniformity. When using the Data signal line for charging, taking the first data charge to -2V as an example, the process from 0.12 to -2 requires 2.12C of power. Adding the pixel voltages of the 6 sub-pixels in the example using this method, a total of 17C of power is required.

[0043] Therefore, it can be seen that using the residual charge of the previous frame for self-charging can significantly reduce the energy consumption required for reverse drive, and to a certain extent reduce the load difference between positive and negative polarity data signal lines, which is beneficial to improving display uniformity.

[0044] See Figure 7 , Figure 7 This is a flowchart illustrating a control method for a display panel provided in an embodiment of this application. Figure 7 As shown, the control method for the display panel is applied to the display panel described in any of the foregoing embodiments, and the control method for the display panel may include the following steps: Step S701: Before charging the Mth row of sub-pixels, the control unit outputs a first control signal and uses the first control signal to control the first switch unit to turn on, so as to conduct the data signal line and the buffer capacitor. When the first switch unit is turned on, the first control signal is a first high-level signal.

[0045] Specifically, the aforementioned first control signal can also be called the self-charging enable signal. This first control signal is controlled and output by the control unit. This first control signal can be a periodic square wave signal, with a period identical to the row scan period of the display panel; that is, during each row gate signal activation period, this first control signal outputs a square wave signal. The timing relationship between this first control signal and other signals is shown in the diagram below. Figure 8 As shown. In Figure 8 In this diagram, Data1 and Data2 represent data signals on different data signal lines, SCS represents the first control signal, and CLK1 to CLK6 represent different clock signals. When a certain CLK signal is high, the Gate signal of the corresponding row is turned on, and the thin film transistors (TFTs) of all sub-pixels in that row are turned on. At this time, the SCS signal is turned on, and the Data signal is turned on after a delay. Step S702: The residual charge of the previous frame in the pixel capacitor of the Mth row sub-pixel connected to N data signal lines is shared by the buffer capacitor to self-charge the Mth row sub-pixel, where M is an integer greater than 1.

[0046] The display panel can self-charge the Mth row of sub-pixels by sharing the residual charge from the previous frame within the pixel capacitors of the Mth row of sub-pixels connected to each data signal line through a buffer capacitor. It should be noted that the Mth row of sub-pixels can be any row of sub-pixels to be charged, such as 1, 2, 3, etc. The value of M can be determined based on the number of rows of sub-pixels on the display panel. In other words, the first switching unit is activated by a first control signal. When the first switching unit is activated, the pixel electrodes of the Mth row of sub-pixels are all connected to one electrode of the buffer capacitor. Pixel voltages of different polarities share charge within the buffer capacitor. The buffer capacitor absorbs high-frequency noise during switching and makes the average voltage of the pixel capacitors closer to the midpoint of polarity.

[0047] In this embodiment, the display panel can neutralize the residual charge of the previous frame of any row of sub-pixels before charging. The data signal only needs to charge the sub-pixel voltage from the neutralized voltage value to the target grayscale voltage value. Therefore, the display panel in this embodiment reduces the voltage amplitude of driving the liquid crystal, thereby reducing the energy consumption required by the liquid crystal display screen due to inversion driving.

[0048] In an optional embodiment, the method further includes: After the Mth row of sub-pixels is charged, the control unit outputs a first control signal and uses the first control signal to control the first switch unit to turn off, thereby disconnecting the data signal line from the buffer capacitor. When the first switch unit is turned off, the first control signal is a first low-level signal.

[0049] Specifically, before charging the Mth row of sub-pixels, a first high-level signal can be output by the control unit, and the first high-level signal can be used to control each first switching unit to turn on. After charging the Mth row of sub-pixels, a first low-level signal can be output by the control unit, and the first low-level signal can be used to control each first switching unit to turn off. In this way, the switching state of each first switching unit can be accurately controlled by the level signal of the first control signal, thereby realizing the self-charging process of the Mth row of sub-pixels.

[0050] In an optional embodiment, the method further includes: The control unit outputs a second control signal, and uses the second control signal to control the switching state of the second switching unit; When the second switching unit is in the ON state, the common electrode and the second terminal of the buffer capacitor are turned on to initialize the voltage value of the second terminal of the buffer capacitor.

[0051] Specifically, the aforementioned second control signal, also known as the initialization signal (i.e., STV signal), is used to initialize the voltage value at the second terminal of the buffer capacitor after a frame of image display is completed. When the second control signal controls the second switching unit to be in the on state, the common electrode and the buffer capacitor are connected. At this time, the voltage value at the second terminal of the buffer capacitor can be initialized using the common electrode, that is, the voltage value of the buffer capacitor after self-charging is initialized to the polarity midpoint voltage, thereby reducing power consumption and improving display uniformity. Furthermore, during the self-charging phase, high-frequency noise generated by data signal changes can also be absorbed by the buffer capacitor, thereby reducing power load and voltage fluctuations and suppressing high-frequency harmonic radiation, meeting the more stringent electromagnetic compatibility (EMC) requirements of automotive and other scenarios.

[0052] In an optional embodiment, the above steps, including outputting a second control signal through the control unit and controlling the switching state of the second switching unit using the second control signal, include: When the current frame is displayed, the control unit outputs a second high-level signal and uses the second high-level signal to control the second switch unit to turn on; If the current frame is not fully displayed, the control unit outputs a second low-level signal and uses the second low-level signal to control the second switch unit to turn off.

[0053] Specifically, when the current frame is fully displayed, the control unit can output a second high-level signal to control the second switch unit to turn on; when the current frame is not fully displayed, the control unit can output a second low-level signal to control the second switch unit to turn off. In this way, the switching state of the second switch unit can be accurately controlled using the level of the second control signal, thereby initializing the voltage value of the buffer capacitor.

[0054] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0055] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0056] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0057] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A display panel, characterized in that, The display panel includes: a control unit, a buffer capacitor, N first switch units and N data signal lines, where N is an integer greater than 1; The buffer capacitor is connected to N data signal lines, and the first switching unit is disposed between the data signal lines and the buffer capacitor, and is configured to correspond one-to-one with the data signal lines. Each of the first switching units is electrically connected to the control unit. The control unit is used to output a first control signal and use the first control signal to control the switching state of the first switching units. Before the Mth row of sub-pixels is charged, the first switching unit is turned on, connecting the data signal line and the buffer capacitor. The buffer capacitor shares the residual charge from the previous frame in the pixel capacitor of the Mth row of sub-pixels connected to the N data signal lines, so as to self-charge the Mth row of sub-pixels, where M is an integer greater than 1.

2. The display panel according to claim 1, characterized in that, The first switching unit is a first thin-film transistor; The control terminal of the first thin-film transistor is connected to the control unit, the first terminal of the first thin-film transistor is connected to its corresponding data signal line, and the second terminal of the first thin-film transistor is connected to the buffer capacitor. The control unit is used to output the first control signal to the control terminal of the first thin-film transistor, and to use the first control signal to control the switching state of the first thin-film transistor.

3. The display panel according to claim 2, characterized in that, The display panel also includes a second switching unit and a common electrode; The second switching unit is disposed between the first end and the second end of the buffer capacitor, the first end of the buffer capacitor is connected to the common electrode, and the second end of the buffer capacitor is connected to the second end of the first thin-film transistor. The second switching unit is electrically connected to the control unit, which outputs a second control signal and uses the second control signal to control the switching state of the second switching unit. When the second switching unit is in the on state, the common electrode and the second end of the buffer capacitor are connected to initialize the voltage value of the second end of the buffer capacitor.

4. The display panel according to claim 3, characterized in that, The second switching unit is a second thin-film transistor; Wherein, the control terminal of the second thin-film transistor is connected to the control unit, the first terminal of the second thin-film transistor is connected to the common electrode, and the second terminal of the second thin-film transistor is connected to the second terminal of the buffer capacitor; The control unit is used to output the second control signal to the control terminal of the second thin-film transistor, and to use the second control signal to control the switching state of the second thin-film transistor.

5. The display panel according to claim 3, characterized in that, The display panel also includes detection signal lines; One end of the detection signal line is connected to the second end of the buffer capacitor, and the other end of the detection signal line is connected to the control unit. The control unit is used to compare the voltage value at the second end of the buffer capacitor detected by the detection signal line with the voltage value at the polarity midpoint, and to drive compensation for a portion of the data signal lines based on the comparison result.

6. The display panel according to claim 1, characterized in that, The capacitance value of the buffer capacitor is greater than the capacitance value of the pixel capacitor.

7. A method for controlling a display panel, characterized in that, Applied to the display panel of any one of claims 1-6, the method comprises: Before charging the Mth row of sub-pixels, a first control signal is output by the control unit, and the first control signal is used to control the first switching unit to turn on, so as to connect the data signal line and the buffer capacitor. When the first switching unit is turned on, the first control signal is a first high-level signal. The residual charge from the previous frame in the pixel capacitor of the Mth row sub-pixel connected to the N data signal lines is shared by a buffer capacitor to self-charge the Mth row sub-pixel, where M is an integer greater than 1.

8. The control method for the display panel according to claim 7, characterized in that, The method further includes: After the Mth row of sub-pixels is charged, the control unit outputs the first control signal and uses the first control signal to control the first switch unit to turn off, thereby disconnecting the data signal line from the buffer capacitor. When the first switch unit is turned off, the first control signal is a first low-level signal.

9. The control method for the display panel according to claim 7, characterized in that, The method further includes: The control unit outputs a second control signal and uses the second control signal to control the switching state of the second switching unit; When the second switching unit is in the ON state, the common electrode and the second terminal of the buffer capacitor are connected to initialize the voltage value of the second terminal of the buffer capacitor.

10. The control method for the display panel according to claim 7, characterized in that, The step of outputting a second control signal through the control unit and using the second control signal to control the switching state of the second switching unit includes: When the current frame is displayed, the control unit outputs a second high-level signal and uses the second high-level signal to control the second switch unit to turn on; If the current frame has not been fully displayed, the control unit outputs a second low-level signal and uses the second low-level signal to control the second switch unit to turn off.

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