Method for improving phase noise through double-loop mixing

Abstract

The invention discloses a method for improving phase noise through double-loop mixing, and relates to the technical field of phase noise improvement, and the method comprises the following steps: enabling a reference signal and the output of a controlled voltage-controlled oscillator (VCO) to form a first phase-locked loop, namely a main loop, through a first phase detector PD-A and a first loop filter LF-A, and carrying out the closed-loop locking of the VCO; the output branch of the VCO is sent to a frequency mixer, and the output of the VCO is mixed with a reference signal or a frequency multiplication signal and a frequency division signal of the reference signal to obtain a frequency mixing signal; and inputting the frequency mixing signal into a second phase detector PD-B and forming a second feedback path, namely an auxiliary ring, through a second loop filter LF-B, wherein the feedback quantity of the auxiliary ring is injected into or adjusts the control end of the VCO or is injected into a phase-locked frequency divider ILFD to realize tuning of the VCO. Through a mixing complementary double-ring structure, the balance of the noise suppression capability of a single ring in different offset ranges is broken through, reference noise and parasitic response introduced when the bandwidth of the single loop is expanded are avoided, and meanwhile, the problem that only harmonic injection or single injection path is difficult to cover the whole spectrum is solved.

Description

Technical Field

[0001] This invention relates to the field of phase noise improvement technology, specifically a method for improving phase noise using dual-ring mixing. Background Technology

[0002] Phase-locked loops (PLLs) and voltage-controlled oscillators (VCOs) are core units in frequency synthesis and wireless / microwave front-ends. Traditional single-loop PLLs face a clear trade-off between suppressing close-in phase noise near the reference source and suppressing VCO intrinsic white noise: increasing the loop bandwidth helps suppress noise at low offsets but amplifies the effects of reference and intra-loop spurious noise, while reducing the bandwidth retains the VCO's low-frequency noise. To improve noise performance across different offset ranges, existing methods employ injection locking, tiered locking, or harmonic injection. However, these methods are often only effective for specific offset regions and are susceptible to instability or limited effectiveness due to mixer nonlinearity, injection phase mismatch, and loop interactions. This design is based on the concept of "dual-loop mixing complementary noise suppression": while maintaining steady-state locking of the main loop, a secondary loop centered on mixing / harmonic injection is introduced to perform complementary frequency domain suppression across different frequency offset regions. Furthermore, spectrum-driven adaptive bandwidth, digital pre-compensation, and phase fine-tuning measures are introduced to systematically reduce phase noise over a wide offset range while ensuring loop stability and engineering feasibility.

[0003] Patent CN118399891B discloses a crystal oscillator circuit that improves phase noise. The patent enables more reliable and stable oscillations, while the oscillation circuit has a wider frequency adjustment range.

[0004] The aforementioned patent addresses the problem that existing parallel resonant circuits struggle to achieve lower phase noise levels, but these solutions are often only effective for a specific offset region and are susceptible to instability or limited effectiveness due to mixer nonlinearity, injection phase mismatch, and loop interactions.

[0005] To address this, this application proposes a dual-loop mixing method to improve phase noise by overcoming the trade-off between the noise suppression capabilities of a single loop at different offset ranges and avoiding the reference noise and parasitic response introduced when expanding the bandwidth of a single loop. Summary of the Invention

[0006] The purpose of this invention is to provide a method for improving phase noise through dual-loop mixing, in order to solve the technical problems mentioned in the background art, which are often only effective for a certain offset region and are easily affected by mixer nonlinearity, injection phase mismatch and loop interaction, resulting in instability or limited effect.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a method for improving phase noise using dual-ring mixing, the method comprising the following steps:

[0008] The reference signal and the output of the controlled voltage-controlled oscillator (VCO) are connected to form the first phase-locked loop (i.e., the main loop) through the first phase detector (PD-A) and the first loop filter (LF-A) to lock the VCO in a closed loop.

[0009] The VCO output branch is fed into the mixer, and the VCO output is mixed with the reference signal or the multiplier or divider of the reference signal to obtain the mixed signal.

[0010] The mixing signal is input to the second phase detector PD-B and passes through the second loop filter LF-B to form the second feedback path, i.e., the sub-loop. The feedback quantity of the sub-loop is injected into or adjusts the control terminal of the VCO or injected into the phase-locked frequency divider ILFD to achieve the tuning of the VCO.

[0011] The phase noise spectrum of the VCO is estimated in real time, and the loop bandwidths BW-A and BW-B of the first and second loops, as well as the injection phase and delay of the mixer or injection end, are dynamically adjusted according to the phase noise spectrum during operation, so that the two loops suppress each other's phase noise in the spectrum.

[0012] Adaptive digital pre-compensation is applied to the VCO control voltage or mixer injection phase. The pre-compensation is generated based on recursive least squares or least mean square (LMS) algorithms and is used to perform reverse cancellation on the predicted or estimated noise components.

[0013] Preferably, the first phase detector is an analog phase comparator or a charge pump phase comparator, and the second phase detector is a digital phase detector based on a time-to-digital converter (TDC) or a digital phase meter, so as to balance low latency response and high resolution detection, respectively.

[0014] Preferably, the dynamic adjustment step includes:

[0015] The acquired phase sequence is spectrally estimated using FFT or multi-window Welch methods, with an estimation window length of 10ms to 200ms. Based on the spectral estimation results, BW-A and BW-B are calculated and adjusted according to a preset strategy or optimizer. BW-A is adjustable in the range of 500Hz to 20kHz, and BW-B is adjustable in the range of 10kHz to 2MHz.

[0016] Preferably, the adaptive digital pre-compensation step includes:

[0017] The VCO control voltage is sampled at a sampling rate of ≥1MS / s, and the LMS algorithm is used for parameter update. The learning rate is set to 1×10-4-1×10-2, and the update window width is 10ms to 200ms.

[0018] The correction output from the pre-compensator is injected into the phase control terminal of the mixer or the control terminal of the VCO in real time or in frames to cancel the prediction noise.

[0019] Preferably, the sub-ring further includes an injection phase-locked frequency divider (ILFD) and a harmonic injection unit;

[0020] The mixing injection adopts the nth harmonic injection method, where n is an integer, 1 < n ≤ 10, and the noise suppression in the high-frequency offset region is enhanced by harmonic injection.

[0021] Preferably, a variable delay line or phase shift unit is set before the mixer output and injection path to adjust the resolution to be less than or equal to 1 ps, or less than 1 / 360 period on the phase resolution corresponding to fVCO. The variable delay is used to accurately match the injection phase to achieve phase cancellation and avoid loop interlocking.

[0022] Preferably, an adaptive notch bandstop filter is added to the sub-loop to filter out intermodulation products generated by the mixer. The center frequency and bandwidth (i.e., depth) of the notch bandstop filter are adjusted online by the adaptive controller according to the real-time spectrum estimation results. A mixer compensation lookup table is maintained according to the nonlinear characteristics of the mixer and called during runtime to correct the phase distortion introduced by the mixer.

[0023] Preferably, the method for improving phase noise through dual-loop mixing further includes a calibration and training phase, wherein the training phase involves the system generating a preset calibration signal and measuring the responses of the main loop and the secondary loop to establish:

[0024] a. Phase error mapping table for mixers;

[0025] b. LMS pre-compensation initial weight file;

[0026] c. Strategy table for loop bandwidth and injection phase;

[0027] The phase error mapping table, weight file, and strategy table are stored in non-volatile memory and can be called during the runtime phase.

[0028] Preferably, during the dynamic adjustment, the controller continuously calculates and ensures that the phase margin and gain margin of the closed-loop system are not lower than preset thresholds, i.e., phase margin ≥ 45° and gain margin ≥ 6dB. When an adjustment result that may cause instability is detected, the controller restores the BW and injection phase to the previous stable configuration according to the safe rollback strategy and records the fault event.

[0029] Preferably, the method for improving phase noise through dual-ring mixing is implemented in hardware by the following modules:

[0030] The module includes a digital phase measurement module, an FFT spectrum estimation module, an LMS pre-compensation module, a dynamic bandwidth and phase control module, a programmable mixer and variable delay unit, an ILFD harmonic injection unit, and a mixer compensation storage module. The modules are implemented using FPGA, ASIC, or a combination of both, and interact with the VCO and loop filter through a unified control bus.

[0031] Compared with the prior art, the beneficial effects of the present invention are:

[0032] 1. This invention utilizes a mixing-complementary dual-loop structure to construct a main loop and a mixing / harmonic-based secondary loop in parallel along the VCO output path. The secondary loop uses the difference frequency or sum frequency signal as a phase reference and injects it into the VCO or ILFD. This overcomes the trade-off between the noise suppression capabilities of a single loop in different offset ranges, avoids the reference noise and parasitic response introduced when expanding the bandwidth of a single loop, and solves the problem that it is difficult to cover the full spectrum with only harmonic injection or a single injection path. Through spectrum complementarity, it can achieve better noise suppression in both close-in and medium-to-high offsets. Typically, it can enable the target system to achieve significant dB-level improvement at multiple offset points, and the structure can expand its adaptability range through device selection and bandwidth configuration.

[0033] 2. This invention uses spectrum-driven adaptive bandwidth and injection phase control to estimate the phase noise spectrum in real time and dynamically adjust the two-loop bandwidth, mixing ratio and injection phase based on the spectral energy to achieve on-demand allocation of noise suppression resources. This solves the problem of the fixed bandwidth strategy's effectiveness decreasing under environmental or load changes, and avoids loop instability or reference noise amplification caused by blindly expanding the bandwidth. It enables the system to adaptively maintain the optimal noise suppression-stability-power consumption trade-off under different working environments, improves robustness to temperature drift, power supply disturbances and load changes, reduces manual re-calibration and is conducive to mass production consistency.

[0034] 3. This invention models the sampled VCO control voltage / phase error in the digital domain through digital LMS pre-compensation and mixer phase mapping correction, and uses LMS or recursive least squares algorithm to predict noise components, generating a reverse correction amount injected into the mixer phase or VCO control terminal; at the same time, a mixer nonlinear phase mapping table is established for online correction, suppressing predictable noise in the VCO control path and systematic phase error introduced by the mixer, making up for the shortcomings of pure analog adjustment in terms of accuracy and adaptability. Active compensation can significantly reduce residual phase noise caused by control voltage disturbance and injection path nonlinearity, improve the net improvement value of the entire system in the medium and high offset region, and can optimize the compensation algorithm in the field through software upgrades, which is convenient for long-term maintenance and performance improvement.

[0035] 4. This invention utilizes a combination of variable delay / phase shift and harmonic injection for local notch suppression, along with mixer nonlinearity compensation. It introduces high-resolution variable delay and programmable harmonic injection into the injection path, and employs adaptive notch filtering or mixer compensation lookup tables to eliminate intermodulation products. Precise phase alignment creates a local notch in the target offset band, addressing the white noise peaks or device-related harmonic noise of the VCO at specific offsets. This solves the problem that traditional single-loop circuits cannot create deep, controllable noise suppression recesses, and that mixer nonlinearity introduces intermodulation and phase distortion, affecting injection performance. It can create deep phase noise recesses in the desired frequency offset region, achieving significant local suppression (up to dB). Simultaneously, mixer compensation reduces incidental distortion introduced by the secondary loop, ultimately significantly improving the overall phase noise profile without sacrificing stability. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the dual-ring mixer system for improving phase noise according to the present invention;

[0037] Figure 2 This is a schematic diagram of the dual-ring mixing method for improving phase noise according to the present invention. Detailed Implementation

[0038] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0039] Please see Figure 1 and Figure 2 The present invention provides an embodiment of a method for improving phase noise through dual-loop mixing. This embodiment is based on an industrially feasible hybrid scheme: the main loop uses a charge pump PLL to lock the VCO's fundamental frequency, and the secondary loop uses an analog mixer and an injection phase-locked divider (ILFD) to form a difference frequency and harmonic injection path; and in the digital domain, a low-complexity LMS module is used to perform online pre-compensation for the VCO control voltage.

[0040] Structural Components: Reference Source REF: High-precision crystal oscillator, fREF=10MHz; Main Loop: PD-A (charge pump phase comparator) → LF-A (analog loop filter, adjustable bandwidth) → VCO control terminal; VCO: Target output fOUT=2.4GHz (can be replaced with other GHz-level frequencies); Branch Distributor: One branch of the VCO output is sent to the output terminal S-OUT, and another branch is sent to the sub-loop mixer; Sub-loop: Programmable frequency divider / multiplier (generates m·fREF from REF), mixer (analog multiplier), PD-B (analog phase comparator) Alternatively, a low-resolution TDC or LF-B (analog filter) can be injected into the ILFD or directly into the VCO control terminal; a variable delay unit: an analog adjustable delay line (resolution ≤ 1ps), located between the mixer output and the PD-B or injection terminal; a noise estimator and LMS pre-compensator: a simple digital module that samples the VCO control voltage (ADC), runs an LMS on the control voltage sequence, and injects the output compensation into the mixer phase or VCO control terminal; a controller: a microcontroller (MCU) or low-end FPGA to implement bandwidth and delay control, LMS parameter adjustment, and data recording;

[0041] Key parameters: BW-A (main ring): initial 5kHz, adjustable from 0.5kHz to 20kHz; BW-B (secondary ring): initial 200kHz, adjustable from 10kHz to 1MHz; ADC sampling rate (sampling Vctrl): 2MS / s, 12-bit; LMS: learning rate μ=1×10 -3 (Adjustable 1×10) -4 -1×10 -2 ); Window width 50ms; Filter length (weights) M=32; Delay resolution: 0.5-1ps; Maximum delay 2ns (for phase maximum adjustment); ILFD harmonic injection number n: n=3 (can be set to 2-6);

[0042] Implementation Details: Upon power-up of the main loop, PD-A locks the VCO to REF. Initially, BW-A is set to 5kHz. Secondary loop setup: The VCO output is mixed with m·fREF to obtain a difference frequency signal. PD-B measures the phase difference and injects it into the ILFD via LF-B. LF-B is initially set to a 200kHz bandwidth. The ADC samples the VCO control voltage Vctrl at 2MS / s. LMS uses Vctrl and the error signal derived from the phase difference signal from PD-B as input vectors to update weights and generate a correction value ΔV. ΔV is injected into the phase control of the mixer or directly superimposed on the VCO control terminal. The controller evaluates the phase noise spectrum every 50ms (using short-time FFT). Based on the distribution of spectral energy in different offset regions, BW-A, BW-B, and the delay unit are adjusted. During adjustment, the stability margin is checked (see the common stability constraints in the embodiments), and rollback is performed if necessary.

[0043] Calibration test steps: Initial calibration (factory): Measure the mixer phase response, generate a mixer phase error mapping table (phase input → output phase error), and write it to the MCU flash memory; Before operation, measure the phase noise curve (baseline) in a temperature chamber (25°C); Enable the sub-loop and LMS, gradually open BW-B and record dBc / Hz at each key offset (1k, 10k, 100k, 1MHz); Stability test: Change the power supply ±5%, change the temperature ±10°C, and record the phase margin and gain margin.

[0044] Replacing PD-B with high-resolution TDC improves the detection accuracy of high offsets in the subloop; LMS can be replaced with RLS (recursive least squares) for faster convergence (at the cost of increased computational complexity).

[0045] Please see Figure 1 and Figure 2 The present invention provides an embodiment of a method for improving phase noise through dual-loop mixing. This embodiment provides a fully digital implementation path, which is suitable for high-speed and highly repeatable products using FPGA and ASIC. The main loop adopts ADPLL (fully digital phase-locked loop), and the secondary loop adopts digital mixing (CORDIC or NCO) and high-precision TDC. All spectrum estimation and LMS are run in real time on the FPGA.

[0046] Structure and Modules: Reference Source REF: 10MHz or 25MHz; Main Loop: Digital Phase Detector (TDC) → Digital Loop Filter (IIR / FIR) → NCO (replacing the traditional VCO) or DAC driving the VCO, forming an ADPLL. BW-A is digitally programmable; Sub-Loop: Digital Mixer (generating a local oscillator through the NCO, and performing digital multiplication / multiplication with the frequency-divided REF) → Digital Phase Estimation (high-resolution TDC or phase tracking algorithm) → Digital Loop Filter LF-B → Injection Unit (injected to the VCO control terminal through the DAC or directly adjusting the NCO phase); Real-Time Spectrum Estimation Module: Multi-window Welch method, implementing a frame length of 50ms, 50% overlap, and Hanning window; LMS Module: FPGA implementation, vector length M=64, learning rate μ programmable (1e-4-1e-2), supporting parallel matrix operations to ensure real-time performance; Storage: 128kB flash memory for mixer compensation and calibration tables;

[0047] Specific parameters: ADPLL main ring bandwidth BW-A: configurable from 1kHz to 15kHz; secondary ring digital bandwidth BW-B: 10kHz to 2MHz; TDC resolution: ≤10ps (equivalent to ~0.0087° at 2.4GHz); FPGA resource estimation: LMS / FFT real-time implementation accounts for approximately 30-60% of the logic and DSP resources of mid-range FPGAs (such as Xilinx Spartan / Artix types);

[0048] process:

[0049] Signal digitization: The VCO output is divided / down-converted to the ADC for sampling, and then sent to the FPGA after digital-to-analog mixing;

[0050] Parallel operation: Real-time Welch spectrum estimation (50ms window, 1024-point FFT or higher), outputting energy for each frequency offset interval;

[0051] LMS targets the phase error signal, models the predicted control voltage noise and calculates the compensation vector, and outputs the Δphase to inject into the NCO or DAC.

[0052] The controller automatically adjusts BW-A / BW-B according to the spectral energy distribution strategy and verifies each adjustment according to the stability margin constraint.

[0053] If the target power consumption is limited, the FFT / spectral estimation can be run at a low frequency of 10 times per second to reduce power consumption, but the LMS should be kept running at a low bandwidth to maintain some compensation function.

[0054] Please see Figure 1 and Figure 2 This invention provides an embodiment of a method for improving phase noise using dual-ring mixing. Targeting high-offset (100kHz-1MHz) white noise and harmonic-related noise, this embodiment combines multi-order harmonic injection (n=2...6) with ILFD to improve suppression at high-frequency offsets and utilizes variable delay to achieve precise phase alignment, creating a controllable depth phase noise "depression."

[0055] A harmonic generator is added to the sub-loop: n·fREF is generated by the REF through a frequency multiplier, and then mixed / injected with the VCO; ILFD: as the injection carrier unit, it optimizes the injection coupling efficiency and improves the response to specific harmonics; Precision phase tuning: the delay unit resolution is ≤0.2ps, combined with a temperature compensation mechanism (TC temperature coefficient adjustment); Mixer compensation: real-time compensation tables are saved according to different harmonic levels;

[0056] Parameter examples: n=3 or 4 is preferred for GHz-level frequencies (e.g., when fOUT=2.4GHz, n=3 is used to inject a relationship such as 30MHz×3=90MHz to form the desired difference frequency); ILFQ value design: Q is high to form narrowband harmonic enhancement (e.g., Q≈50-200, depending on the process); Delay adjustment range: 0-2ns, in 0.2ps steps.

[0057] Implementation steps:

[0058] Choose the harmonic order n, and calculate the difference frequency / sum frequency of the mixing injection to cover the target offset region;

[0059] The injected power is adjusted by tuning the harmonic coupling coefficient using ILFD to avoid excessive lock-in.

[0060] In factory calibration, a harmonic injection phase mapping table is generated, and the phase point with the lowest phase noise at the target offset is found by continuous phase sweep test.

[0061] During operation, the digital controller periodically (every 1 second) fine-tunes the phase to combat drift.

[0062] Expected results: 10-20dB of deep suppression (forming local notch) can be achieved in the high offset region of the target (e.g., 100-500kHz), which significantly improves the overall phase noise curve of the system; special attention should be paid to avoid over-injection that could lead to loop lock-up or gain interaction that could cause instability.

[0063] The injection power and harmonic amplitude of the ILFD must be limited (e.g., injection power < -10dBm) to prevent injection-locked coverage of the main loop's stable control; a safe back-off strategy for injection power and phase (as described in the phase margin and gain margin thresholds) must be implemented in the controller.

[0064] Please see Figure 1 and Figure 2 This invention provides an embodiment of a method for improving phase noise through dual-ring mixing. This embodiment describes an intelligent control strategy: the system automatically switches between several operating modes (e.g., low-noise mode, broadband suppression mode, low-power mode, harmonic injection mode) through online noise environment detection to maintain the optimal noise suppression-stability-power consumption tradeoff under different operating conditions.

[0065] Pattern definition:

[0066] Mode A (Low Offset Optimization): Small BW-A (0.5-5kHz), weak sub-loop, prioritize reducing close-in 1 / f noise;

[0067] Mode B (Medium-High Offset Optimization): BW-B large (100kHz-1MHz), enables harmonic injection and ILFD, optimizes high offset;

[0068] Mode C (Adaptive Hybridization): Simultaneously enables LMS, dynamically allocates BW-A / BW-B, and dynamically sets the bandwidth according to the spectral energy ratio;

[0069] Mode D (Low Power): Reduces LMS update rate, reduces sampling rate, and shrinks BW-B.

[0070] Detection and switching logic:

[0071] The noise detector calculates the cumulative spectral energy ratio R=E every 100ms. -{1k-10k} / E -{10k-1M} ;

[0072] If R > T -high (For example, 10), if the close-in noise is dominant, switch to mode A; if R < T -low (For example, 0.1), if it is determined that high offset noise is dominant, switch to mode B; otherwise, keep mode C.

[0073] Switching accompaniment: Gradual band adjustment (linear variation of BW within 100ms-500ms), and checking stability margin; if safety is not met, roll back and record the event.

[0074] Parameter example: T -high =8-12; T -low =0.08-0.12;

[0075] Short-term phase noise monitoring (10ms window) is performed within 1 second after each switch to ensure oscillation-free start-up; the switching history and related parameters are recorded for statistical analysis and optimization after delivery.

[0076] Expected results: Under variable environments (near mobile communication base stations, drastic load changes within the equipment), the system can maintain near-optimal bandwidth allocation and injection strategies, with typical improvements of 6-15dB across 1-100kHz, while maintaining stability.

[0077] Please see Figure 1 and Figure 2 This invention provides an embodiment of a method for improving phase noise using dual-loop mixing. For battery-powered or cost-sensitive products, it offers a solution that reduces power consumption and implementation complexity: retaining the core concepts of dual-loop mixing, but limiting the sampling rate, reducing LMS complexity, and using an analog-first strategy, thereby achieving significant phase noise improvement while keeping power consumption controllable.

[0078] Structure and Strategy:

[0079] The main loop remains a CP-PLL, with a low BW-A setting (1-3kHz); the secondary loop uses an analog mixer and a narrower LF-B (e.g., 50-200kHz), and is equipped with a low sampling rate ADC (250-500kS / s) for sampling Vctrl; the LMS is simplified to a short length (M=8) and a learning rate μ=5×10 -3 It only enables online updates when significant noise degradation is detected (threshold triggering), and otherwise enters low-power standby; the controller uses a low-power MCU (such as Cortex-M0 class) and does not use a large FPGA.

[0080] Key parameters: ADC 12-bit, sampling 500kS / s; the delay unit adopts integrated delay (lower resolution ~5ps) to save costs; LMS update cycle is 100ms, and it is only turned off after 10 fast updates under trigger conditions.

[0081] Implementation Results and Trade-offs: Expected Overall Improvement: 4-8 dB on average in the 10-100 kHz range; weaker performance compared to high-performance implementations, but significantly reduced power consumption (e.g., overall system power consumption reduced from several W to <500 mW); suitable for IoT terminal applications and portable measurement devices.

[0082] Stability control: All dynamic adjustments (bandwidth, injection phase, injection power) must be constrained by closed-loop stability margins (phase margin ≥ 45°, gain margin ≥ 6dB). Before performing any parameter adjustments, the controller should first simulate or test in small steps and monitor the phase margin in real time.

[0083] Mixer nonlinearity compensation: A mixer compensation lookup table must be set at the factory, and online interpolation correction should be performed based on system temperature drift during operation to reduce the negative contribution of intermodulation to phase noise.

[0084] Safety rollback strategy: If loop instability or narrowband oscillation is detected, the controller should immediately roll back to the most recent stable configuration and log the event.

[0085] Working principle:

[0086] Phase noise has always been an important indicator of frequency sources. In phase-locked loop (PLL) design, phase noise depends on the following aspects:

[0087] Flicker noise @ frequency offset position f offset :

[0088] PN flick =FlickerFOM+20log(f vco )-10log(f offset Other noise @ VCO frequency f vco and phase detection frequency f pd PN floor =FloorFOM+10log(f pd )+20log(f vco / f pd );

[0089] Phase noise PN=10log(10 (PNflick / 10) )+10log(10 (PNfloor / 10) ).

[0090] FlickerFOM and FloorFOM are determined by the chip itself. To improve phase noise, given a fixed phase detection frequency, the simplest and most effective way is to reduce the frequency of VCO feedback to the phase-locked loop, thereby reducing the division ratio N (N = frequency of VCO feedback to the phase-locked loop / phase detection frequency).

[0091] This method improves the phase noise of the output signal. First, an external local oscillator with sufficiently low phase noise is introduced to downmix the higher output frequency to a lower intermediate frequency. Simultaneously, two downmixers are used, one through a phase detector and the other through a loop filter, to generate two voltages. These two voltages are then summed to control the voltage-controlled oscillator (VCO). This scheme not only reduces the frequency F fed back to the phase-locked loop (PLL) through mixing, but also... vco Furthermore, introducing two local oscillator signals can balance F vco / F pd Different values ​​of keep the phase noise of the output signal within a very small range of variation.

[0092] Examples are given below:

[0093] The frequency is set to F1 > F2 > F3, IF1 = F1 - F2, IF2 = F2 - F3. This optimization method will reduce f... vco / f pd The value of F2 / f has changed from the original pd Optimized to ((IF1+IF2) / 2) / f pd .

[0094] For example, if the reference phase detector frequency is 100MHz and you want to generate an output signal of 18-22GHz, the original division ratio N = Fvco / Fpd = 180~200. Now, we introduce a frequency F1, which is the local oscillator frequency of 22GHz. Through mixing, the frequency fed back to the phase-locked loop is reduced to 2-4GHz, and the division ratio N = 20~40. Although the division ratio is greatly reduced, since the division ratio range is 20~40, the output phase noise 20log(fvco / fpd) changes from 26dB to 32dB. That is, the difference between the best and worst output phase noise is 6dB. This difference will further increase as the difference in the division ratio increases. If we introduce F3, i.e., the local oscillator frequency 2 of 16GHz, the division ratio is no longer determined by one side, but rather by the average of the feedback frequencies from both sides. For example, if the output is 20GHz, the division ratio N1 = (22 - 20GHz) / 100MHz = 20, and the division ratio N2 = (20 - 16GHz) / 100MHz = 40. The actual division ratio N = (20 + 40) / 2. Introducing an additional frequency keeps the output phase noise at a stable level and significantly improves even the worst-case phase noise, especially in wideband frequency hopping systems with large division ratio ranges.

[0095] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A method of improving phase noise by double-loop mixing, characterized by: The double-loop mixing method for improving phase noise comprises the following steps: a reference signal and an output of a voltage-controlled oscillator (VCO) to be controlled are input into a first phase detector (PD-A) and a first loop filter (LF-A) to form a first phase-locked loop (PLL), i.e., a main loop, to implement closed-loop locking of the VCO; a branch of the VCO output is input into a mixer, and the VCO output is mixed with the reference signal or a multiplied or divided signal of the reference signal to obtain a mixed signal; the mixed signal is input into a second phase detector (PD-B) and a second loop filter (LF-B) to form a second feedback path, i.e., a sub-loop, and a feedback amount of the sub-loop is used to tune the VCO by injecting into or adjusting a control terminal of the VCO or a phase-locked frequency divider (ILFD); a phase noise spectrum of the VCO is estimated in real time, and loop bandwidths BW-A and BW-B of the first loop and the second loop and an injection phase and a delay of the mixer or the injection terminal are dynamically adjusted during operation according to the phase noise spectrum, so that the two loops mutually suppress phase noise in the frequency spectrum; and adaptive digital pre-compensation is implemented on a control voltage of the VCO or an injection phase of the mixer, and the pre-compensation is generated based on a recursive least square (RLS) or least mean square (LMS) algorithm to counteract a predicted or estimated noise component.

2. The method of claim 1, wherein the double loop mixing improves phase noise. The first phase detector is an analog phase comparator or a charge pump phase comparator, and the second phase detector is a digital phase detector based on a time-to-digital converter (TDC) or a digital phase measurer, to respectively achieve low-delay response and high-resolution detection.

3. The method of claim 1, wherein the double loop mixing improves phase noise. The dynamic adjustment step comprises: spectrum estimation is performed on collected phase sequences using an FFT or a multi-window Welch method, a window length is 10 ms to 200 ms, and BW-A and BW-B are calculated and adjusted according to a preset strategy or an optimizer based on a spectrum estimation result, wherein BW-A is adjustable in a range of 500 Hz to 20 kHz, and BW-B is adjustable in a range of 10 kHz to 2 MHz.

4. The method of claim 1, wherein the double loop mixing improves phase noise. The adaptive digital pre-compensation step comprises: a control voltage of the VCO is sampled at a sampling rate of ≥1 MS / s, an LMS algorithm is used for parameter updating, a learning rate is set to 1×10-4-1×10-2, and a window width for updating is 10 ms to 200 ms; a correction amount output by the pre-compensator is injected into a phase control terminal of the mixer or a control terminal of the VCO in real time or in a frame-by-frame manner to counteract predicted noise.

5. The method of claim 1, wherein the double loop mixing improves phase noise. The sub-loop further comprises an injection-locked frequency divider (ILFD) and a harmonic injection unit; harmonic injection is used in the mixing injection, wherein n is an integer, 1 6. The method of claim 1, wherein the double loop mixing improves phase noise. A variable delay line or a phase shift unit is arranged before an output of the mixer or an injection path, a resolution is less than or equal to 1 ps, or less than 1 / 360 cycles at a phase resolution corresponding to fVCO, and the variable delay is used to accurately match an injection phase to achieve phase cancellation and avoid loop interlocking.

7. The method of claim 1, wherein the double loop mixing improves phase noise. An adaptive notch filter is added in the sub-loop to filter the intermodulation products generated by the mixer, the center frequency and bandwidth of the notch filter are adjusted by the adaptive controller according to the real-time spectrum estimation results; and a mixer compensation lookup table is maintained according to the nonlinear characteristics of the mixer and is called in real time to correct the phase distortion introduced by the mixer.

8. The method of claim 1, wherein the double loop mixing improves phase noise. The double-loop mixing method for improving phase noise further comprises a calibration and training phase, in which the system generates preset calibration signals and measures the responses of the main loop and the sub-loop to establish: a. a phase error mapping table of the mixer; b. an initial weight file of LMS pre-compensation; c. a strategy table of loop bandwidth and injection phase; The phase error mapping table, the weight file and the strategy table are stored in a non-volatile memory and are called in the running phase.

9. The method of claim 3, wherein the double loop mixing improves phase noise. When the dynamic adjustment is performed, the controller continuously calculates and ensures that the phase margin and the gain margin of the closed-loop system are not lower than preset thresholds, i.e. the phase margin is greater than or equal to 45° and the gain margin is greater than or equal to 6 dB, and when an adjustment result that may lead to instability is detected, the controller restores the BW and the injection phase to the last stable configuration according to a safe rollback strategy and records a fault event.

10. The method of claim 1, wherein the double loop mixing improves phase noise. The double-loop mixing method for improving phase noise is implemented in hardware by the following modules: a digital phase measurement module, an FFT spectrum estimation module, an LMS pre-compensation module, a dynamic bandwidth and phase control module, a programmable mixing and variable delay unit, an ILFD harmonic injection unit and a mixer compensation storage module, the modules are implemented in FPGA, ASIC or a combination of both, and interactively control the VCO and the loop filter through a unified control bus.

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