Modular spaceborne edge intelligent computing platform

Abstract

The application discloses a kind of modularization on-orbit edge intelligent computing platform, belong to spacecraft electronic information technical field.The platform uses distributed architecture, including at least one network and management module NMM and at least one general edge AI module UAM, NMM as the data exchange and control center of platform, including system management unit SMU, redundant network exchange unit and controlled wireless communication unit;UAM as the core processing unit of platform, responsible for executing data and computationally intensive tasks, using the separation type design of core board plus bottom plate, each UAM is connected the redundant network exchange unit by independent Ethernet link.The platform is through the distributed architecture with network exchange as center, in combination with hierarchical module level fault self-healing mechanism, multi-level redundant communication architecture facing application optimization and the flexibility of elastic computing power scheduling mechanism based on microservice, while guaranteeing high performance and flexible scalability, greatly improve the on-orbit survivability and task execution efficiency of platform.

Description

Technical Field

[0001] This invention relates to the field of spacecraft electronic information technology, and in particular to a distributed, highly reliable, and scalable spaceborne computing platform for on-orbit real-time data processing and artificial intelligence computing. Background Technology

[0002] With the development of aerospace technology, the amount of data that needs to be processed on-orbit by satellites is increasing dramatically, and the requirements for real-time performance and intelligence are also becoming increasingly stringent. The traditional model of transmitting all data down to the ground for processing is no longer sufficient to meet these requirements. Therefore, spaceborne edge intelligent computing platforms with on-orbit processing capabilities have become a hot topic in current technological development.

[0003] Currently, the design of spaceborne computing platforms mainly faces the following challenges:

[0004] First, the harshness of the space environment: factors such as space radiation can easily cause data flipping or permanent damage to electronic components, especially storage units and memories in commercial off-the-shelf (COTS) chips, seriously threatening the reliability of the system.

[0005] Second, the contradiction between high computing power and high reliability: Current space applications require satellites to have high computing power to achieve real-time and intelligent data processing. This usually requires the use of advanced but space environment-sensitive COTS processors and memory. However, traditional aerospace high-reliability designs (such as full redundancy backup) will lead to a sharp increase in size, power consumption and cost.

[0006] Third, the diversity and scalability of mission requirements: Different satellite missions need to handle different types of data and computational loads, requiring computing platforms to have flexible modularity and scalability. In addition, when on-orbit missions change or hardware is added or removed, the existing system lacks a lightweight mechanism to achieve elastic scaling of computing resources and plug-and-play services.

[0007] Some existing related technical solutions, such as the "Dynamically Self-Organizing Spaceborne Parallel Computing Method" disclosed in CN115712588A, use switching chips to form a star network of homogeneous multiprocessors and improve reliability through master-slave arbitration and abnormal node recovery. The "Distributed High-Computing-Power Spaceborne Computing Platform Design Method" disclosed in CN117520258A adopts an architecture that separates control, routing, and computing units, and ensures reliability through a cross-cold backup and cross-storage topology.

[0008] However, the aforementioned existing technologies still have some shortcomings:

[0009] First, the fault recovery mechanism is not perfect: most existing solutions rely on module-level redundancy backup and fault switching. When the boot memory (such as eMMC) inside the computing module is damaged by radiation, the only option is to power down the entire module or switch to the backup module. It lacks the ability to self-repair the internal faults of individual modules, which will greatly waste valuable on-orbit hardware resources.

[0010] Second, flexibility and reliability are not closely integrated, and the communication structure is simplistic and limited: the system's flexibility design (such as scalability) and reliability design (such as fault tolerance mechanisms) are often separate. Existing solutions are typically rigid or rely on a single type of data interconnect (such as a rigid backplane or a single network), making it difficult to flexibly adapt to the plug-and-play functionality of heterogeneous functional modules (such as computing modules, storage modules, remote sensing modules, etc.) with different task requirements. More importantly, this simplistic communication architecture lacks multi-level redundancy design; once the main data link fails, inter-module collaboration will be paralyzed, resulting in insufficient overall system reliability.

[0011] Third, the rigidity of computing resources and the complexity of service deployment: Most existing spaceborne computing platforms adopt a static task allocation model, lacking the elastic scalability of terrestrial cloud-native environments. When new computing nodes are added or nodes fail and leave the network, the system often needs to be restarted or the software reconfigured, failing to achieve plug-and-play and seamless dynamic expansion of computing services. In addition, traditional spaceborne software architectures cannot shield the differences in underlying heterogeneous hardware, leading to difficulties in algorithm porting and collaborative computing development.

[0012] Fourth, limitations of the data link: The data links of existing systems are usually general-purpose, such as Ethernet and RS422, and have not been optimized for onboard AI applications and onboard collaborative inference architectures. This results in high overhead for data transfer and protocol processing, affecting the efficiency of AI applications and multi-payload collaborative inference. At the same time, it also fails to provide high-speed communication redundancy independent of the main network.

[0013] Therefore, there is an urgent need to develop a new type of spaceborne computing platform that can adopt high-performance COTS devices while possessing strong fault self-healing capabilities, flexible heterogeneous module expansion capabilities, elastic scaling capabilities of computing power, and a multi-level communication redundancy architecture to cope with complex space environments and diverse on-orbit missions. Summary of the Invention

[0014] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a modular spaceborne edge intelligent computing platform. This platform aims to address the problems of existing spaceborne computing platforms in harsh space environments, particularly when using COTS devices, including limited system fault self-healing capabilities, separation of flexibility and reliability design, and lack of consideration for AI application optimization and high-speed redundancy in data links.

[0015] The core innovation of this invention lies in the fact that, through a distributed architecture centered on network switching, combined with a layered module-level fault self-healing mechanism, an application-optimized multi-level redundant communication architecture, and a microservice-based elastic computing power scheduling mechanism, the platform's on-orbit survivability and task execution efficiency are greatly improved while ensuring high performance and flexible scalability.

[0016] To achieve the above objectives, the present invention adopts the following technical solution:

[0017] A modular spaceborne edge intelligent computing platform, employing a distributed architecture, includes at least one Network and Management Module (NMM) and at least one Universal Edge AI Module (UAM). Both the NMM and UAM are connected to an electromagnetically shielded cavity, wherein:

[0018] The Network and Management Module (NMM), serving as the platform's data exchange and control center, includes:

[0019] System Management Unit (SMU): The SMU is the master controller of the NMM, responsible for highly reliable communication with the satellite telemetry and control platform (e.g., CAN, RS422), and for monitoring, resetting, and managing other modules within the platform. The SMU also has network management capabilities, enabling it to manage the system's network topology and configure routing. The SMU can also store system images for recovery of other modules. Preferably, the SMU is implemented using a highly reliable MCU or FPGA.

[0020] Redundant network switching units: These include at least two mutually redundant onboard gigabit Ethernet switches. All modules within the platform are connected to these switches via redundant links, achieving highly reliable data interconnection.

[0021] Controlled wireless communication unit: The NMM integrates a WLAN wireless unit for wireless data transmission with the UAM via a specially designed, electromagnetically shielded cavity, serving as a backup link or for interconnecting specific payloads. This cavity design prevents electromagnetic signal leakage from interfering with other satellite payloads.

[0022] The Universal Edge AI Module (UAM), as the core processing unit of the platform, is responsible for performing data- and computationally intensive tasks. Each UAM is connected to at least two redundant Gigabit Ethernet switches of the NMM via at least two independent Ethernet links. The UAM adopts a separate core board and baseboard design to balance high performance, flexibility, and reliability. The core board of the UAM integrates a first boot memory, and the baseboard integrates a second boot memory. Both boot memories store multiple system image files. The UAM is configured to have fault self-healing capabilities, enabling it to repair faults in the first boot memory using the second boot memory, or to repair faults in the boot memory from the network and management module using an external SD interface. The baseboard of the Universal Edge AI Module integrates a controlled wireless communication unit, which is connected to the electromagnetically shielded cavity to realize wireless data transmission between Universal Edge AI Modules and between Universal Edge AI Modules and the network and management module.

[0023] Furthermore, the aforementioned modular spaceborne edge intelligent computing platform includes multiple NMMs, each with dedicated uplink and downlink high-speed cascading ports. These ports physically connect multiple networks and management modules, constructing a tree-like, ring-like, or mesh-like switching network backbone. The NMM possesses the following performance characteristics:

[0024] Network cascading expansion capability: NMMs support cascading with other NMMs via network interfaces, thereby supporting more UAM access and realizing the linear aggregation and unlimited expansion of the entire platform's computing resources. Cascading between NMMs preferably uses a dual-link or ring topology to ensure the robustness of the cascaded network.

[0025] Time-Sensitive Networking (TSN) Support: Preferably, the Ethernet switch supports the TSN protocol, enabling time slot negotiation to provide deterministic low-latency transmission guarantees for critical control commands and data packets. Specifically, the onboard gigabit Ethernet switch in the redundant network switching unit supports the TSN protocol, and the system management unit is configured as the TSN network controller, negotiating time slots with various general-purpose edge AI modules to allocate determined transmission time slots for control command data streams.

[0026] In the aforementioned modular spaceborne edge intelligent computing platform, preferably, the UAM core board is equipped with a high-performance COTS (commercial off-the-shelf) SoC (System-on-a-Chip). The SoC is not limited to a specific model; as a specific implementation, the Rockchip RK3588J industrial-grade chip can be used, which integrates a multi-core CPU, GPU, and NPU. The core board also integrates onboard memory (such as RAM) and a first boot memory (such as eMMC).

[0027] Preferably, the UAM baseboard provides the core board with abundant interfaces and reliability-enhancing designs, including:

[0028] Redundant network interfaces: at least two Gigabit Ethernet interfaces, each connected to at least two mutually redundant Gigabit Ethernet switches of the NMM.

[0029] High-reliability control interfaces, such as CAN and RS422 buses, are used for highly reliable telemetry and remote control command exchange with SMU or satellite telemetry and control platforms.

[0030] Hardware control and measurement ports (CP): include Powergood and Systemgood digital output signals for indicating power supply and system status; and BOOT (start-up selection) and RESET (reset) OC commands for hardware control.

[0031] Dedicated high-speed data link: Includes multiple bidirectional high-speed serial-to-deserializer (SerDes) interfaces, with at least two SerDes interfaces supporting bidirectional transmission and reception on each UAM. This interface has dual functions: First, as a low-latency data path for AI applications and multi-UAM collaborative inference, it allows data from camera payload modules or other payloads to be directly transmitted at high speed to the SoC's image processing unit (such as ISP) or neural network processing unit (such as NPU), achieving zero-copy data transmission and utilizing the computing power of the image processing unit or NPU for AI acceleration. This avoids the data transport and protocol processing overhead caused by general data links such as Ethernet, improving the efficiency of AI applications and multi-UAM collaborative inference. Second, as a redundant high-speed communication link independent of Ethernet. Through the SerDes interface, the UAMs in the entire system can be freely and flexibly configured into complex topologies such as dual-ring networks, star networks, or mesh networks without Ethernet switches, greatly improving the interconnection reliability of the system.

[0032] Furthermore, the specific implementation of the SerDes interface includes one or a combination of the following four methods: directly using the SerDes interface natively supported by the SoC; using SerDes in combination with the MIPI-A protocol; converting the SoC's MIPI-A / DSI interface into a SerDes signal through external circuitry (suitable for chips such as RK3588J that have abundant MIPI resources but limited SerDes); and using SerDes in combination with the PCIe protocol.

[0033] Furthermore, UAM utilizes the Serdes interface to construct a data link for AI applications. The Serdes interface is configured to directly transmit received data to the dedicated memory area of ​​the image processing unit (such as ISP) or neural network processing unit (such as NPU) inside the SoC. The data can be preprocessed and postprocessed by the image processing unit or neural network processing unit, while bypassing the SoC's CPU and general network protocol stack, realizing zero-copy data transmission. This constitutes a heterogeneous cascade acceleration of the ISP, the multi-core processor (CPU) in the SoC, the image coprocessor (GPU) in the SoC, the neural network processing unit (NPU), and the external AI inference acceleration module (accelerator stick).

[0034] Wireless communication unit: The UAM module baseboard integrates a WLAN wireless unit, whose signal is contained in the controlled electromagnetic shielded cavity described in NMM, serving as a third-layer redundant communication link independent of the wired link.

[0035] MIPI interface: Used to support image data transmission and control of MIPI cameras.

[0036] Expansion interfaces, such as M.2 SATA and M.2 PCIe, are used to connect SSDs or AI accelerator sticks (such as Hailo-8) to further expand storage and computing power.

[0037] The key reliability and self-healing mechanism of this invention are embodied in the multi-level boot recovery design of UAM, which mainly includes the following:

[0038] Second boot memory: A high-reliability memory chip (such as SD NAND or NorFlash) is mounted on the UAM baseboard as the second boot memory. This chip, along with the eMMC (first boot memory) on the core board, stores multiple system image files.

[0039] Boot source selection: Under normal circumstances, UAM boots from the first boot memory (eMMC). When the system image of the first boot memory (eMMC) fails to boot due to damage caused by factors such as space radiation, the SMU of the satellite platform or NMM controls UAM to switch boot sources through the BOOT signal of the CP telemetry and control port.

[0040] Fault Recovery and Self-Healing: After booting the backup system from the second boot memory (such as a high-reliability SD NAND), the UAM can reverse mount the first boot memory (eMMC) and perform on-orbit repair or rewriting of the faulty image on the first boot memory (eMMC), thereby achieving module self-repair. After the repair is complete, the UAM can resume booting from the eMMC, restoring the full functionality of the system.

[0041] Multi-level redundancy: The baseboard also features a MUX (multiplexer) chip, connecting the second boot memory (such as SD NAND) and the external SD interface. When both the first boot memory (eMMC) and the second boot memory (SD NAND) fail, the UAM can switch to the external SD interface through the MUX, allowing the NMM's SMU to provide a boot image to the UAM through this interface, enabling deeper fault recovery.

[0042] On-orbit monitoring: The baseboard also integrates a Watchdog chip to monitor the operating status of the UAM system and automatically perform a hardware reset in the event of a system deadlock or crash.

[0043] The entire modular spaceborne edge intelligent computing platform achieves centralized high-speed data exchange and highly reliable management through NMM. The platform can flexibly mount multiple UAM modules with different functions according to mission requirements, such as:

[0044] AI computing power module: namely the UAM of the above standard, or on the basis of UAM, an AI accelerator stick is attached through the M.2 interface to improve computing power and is responsible for performing AI inference.

[0045] Camera payload module: Based on UAM, it connects to the optical payload via MIPI or SerDes interface, is responsible for image data access, can preprocess image data or execute AI applications, and transmit data to other modules through the SerDes link.

[0046] Onboard storage module: Based on UAM, a large-capacity SSD is mounted via an M.2 interface to handle high-speed caching of massive amounts of data.

[0047] Spaceborne IoT module: Based on UAM, it integrates multiple sensor interfaces, communication modules or sensor modules.

[0048] The multi-level redundant communication architecture of this invention is integrated throughout the entire platform design, providing system-level link reliability independent of module-level fault self-healing mechanisms. It mainly includes the following:

[0049] Main data communication plane (Ethernet): The dual redundant Gigabit Ethernet provided by NMM serves as the backbone data network of the system, connecting all modules and providing highly reliable plug-and-play network services.

[0050] High-performance redundant communication plane (Serdes): High-speed Serdes links between UAMs can form flexible topologies independently of NMM, providing point-to-point high-speed redundant data paths for critical payloads, while also taking into account AI acceleration functions.

[0051] Backup Communication Plane (WLAN): A controlled cavity wireless communication link between NMM and UAM, serving as a flexible and electromagnetically compatible backup redundant communication link.

[0052] The three communication planes mentioned above constitute a three-dimensional communication redundancy architecture, which is configured to maintain control and data interaction between modules by utilizing the remaining communication planes when any one or two communication planes fail.

[0053] This platform incorporates a flexible edge deployment software architecture, enabling automatic discovery and elastic scaling of computing services. This mechanism ensures that when UAM modules are added or removed at the hardware level, the computing services at the software level can scale elastically and smoothly transition without downtime or reconstruction. It mainly includes the following:

[0054] Decentralized microservice architecture: The system abandons the cumbersome central control node and adopts a lightweight microservice architecture. The computing tasks on each UAM are encapsulated as inference microservices, and the business logic is encapsulated as application microservices.

[0055] Service Registration and Discovery Adapter: Each microservice has a built-in adapter module. When a new UAM connects to NMM and powers on, its adapter automatically broadcasts registration information (including device architecture, computing power metrics such as FPS, service type, etc.) to the entire network's service registry.

[0056] Plug-and-play computing power and load balancing: Application microservices use a service registry to monitor the number of currently online User-Agent Modules (UAMs) and computing resources in real time. When an UAM module is added, the computing resource pool automatically expands, and the load balancer dynamically distributes inference tasks based on the real-time computing power (QoS) of each node; when a UAM decreases, the service is automatically deregistered, and tasks are automatically transferred to the remaining nodes.

[0057] Based on the above hardware and software design, this platform can tolerate and recover from the following fault scenarios:

[0058] Single / Multiple UAM Failures: When one or more UAMs are damaged or crash due to space radiation, based on the above-mentioned elastic microservice mechanism, the system will automatically remove them from the service list, and the remaining UAMs will take over the computing tasks to ensure uninterrupted service.

[0059] Single / Multiple NMM Failure: If the system contains multiple cascaded NMMs, the network can still function as long as the Ethernet backbone composed of the remaining NMMs has not completely collapsed when some NMMs are damaged.

[0060] Single / two communication plane failure: The system includes three communication planes: Ethernet switching network, SerDes high-speed network and WLAN wireless network. If any one or two communication links fail, the system can still perform data interaction and control between modules through the remaining communication planes.

[0061] Compared with the prior art, the present invention has the following significant advantages:

[0062] 1. Addressing the shortcomings of existing technologies, such as "imperfect fault recovery mechanisms and lack of module-level self-repair capabilities," this invention achieves deep fault self-healing based on multi-level storage, significantly improving on-orbit resource utilization. Existing technologies often directly employ module-level switching strategies when single-event upsets or program corruption occur in the memory. This invention innovatively designs a three-level boot recovery mechanism within the computing module (UAM): "eMMC + SD NAND + external OTA interface." When the main system image is damaged, it can automatically switch to onboard high-reliability backup storage for booting and reverse-mount the main memory for on-orbit repair or rewriting. This mechanism enables the computing module to possess self-repair capabilities, preventing the entire hardware module from being scrapped due to software failures, thereby significantly extending the platform's on-orbit service life within limited satellite weight and power consumption resources.

[0063] 2. Addressing the shortcomings of existing technologies, such as the separation of flexibility and reliability design, and the lack of multi-level redundancy in communication architecture, this invention constructs a highly flexible heterogeneous network architecture and a three-dimensional redundant communication plane. This invention breaks away from the limitations of traditional rigid backplanes or single buses, adopting a network switching-centric architecture that supports seamless access and linear expansion of heterogeneous nodes such as computing modules, storage modules, and remote sensing modules. More importantly, this invention constructs a three-dimensional communication architecture consisting of an Ethernet main plane, a SerDes high-speed plane, and a WLAN wireless plane. Even if the main Ethernet link fails, the system can still communicate and control via SerDes links or wireless links. This design deeply integrates flexibility (heterogeneous expansion) and reliability (multi-level redundancy), solving the pain point of system paralysis caused by the failure of a single node or link.

[0064] 3. Addressing the shortcomings of existing technologies, such as rigid allocation of computing resources, complex service deployment, and inability to scale elastically, this invention achieves plug-and-play and seamless dynamic expansion of computing resources based on microservices. This invention abandons the static task allocation model and introduces a decentralized microservice architecture and an automatic service discovery mechanism. The system can detect the addition or removal of UAM nodes in real time: when a new node joins, the computing pool automatically expands, and task load is automatically balanced; when a node fails and leaves the network, business services automatically migrate to healthy nodes. This "cloud-native" characteristic shields the differences in underlying hardware, enabling software services to scale elastically with the increase or decrease of hardware resources without downtime and reconstruction, solving the problems of difficult maintenance and inability to dynamically adapt to task changes in traditional spaceborne systems.

[0065] 4. Addressing the shortcomings of existing technologies, such as low transmission efficiency of general-purpose data links and lack of optimization for AI applications, this invention designs a low-latency direct data link for AI computing power acceleration. Existing technologies require data transfer through the CPU and complex protocol stacks, resulting in significant overhead. This invention utilizes the dual functionality of the SerDes interface to establish a high-speed direct channel from sensors (such as cameras) to the image processing units (such as ISPs) and AI acceleration units (such as NPUs) within the computing unit (SoC). This design achieves "zero-copy" data transmission, completely bypassing the CPU and general-purpose network protocol stacks. This significantly reduces transmission latency and fully utilizes the acceleration capabilities of image processing units and AI acceleration units for AI application inference, significantly improving the efficiency of onboard real-time AI processing and multi-module collaborative inference.

[0066] 4. Highly deterministic system collaboration. By supporting TSN in Ethernet switches, this invention ensures the real-time and deterministic transmission of critical control commands and data in the distributed cluster, thereby improving the reliability of the entire system's collaborative operation.

[0067] 5. Excellent electromagnetic compatibility and backup links. This invention, through an innovative controlled cavity wireless communication scheme, effectively solves the electromagnetic interference (EMC) problem between on-board equipment while enabling flexible wireless interconnection between modules as a third-layer redundant communication. Attached Figure Description

[0068] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0069] Figure 1 This is a schematic diagram of the overall system architecture of the modular spaceborne edge intelligent computing platform of the present invention.

[0070] Figure 2 This is a block diagram of the internal structure of the Network and Management Module (NMM) described in Embodiment 2 of the present invention.

[0071] Figure 3 This is a block diagram of the internal structure of the Universal Edge AI Module (UAM) described in Embodiment 3 of the present invention.

[0072] Figure 4 This is a schematic diagram of the UAM multi-level startup recovery and self-healing process in Embodiment 4 of the present invention.

[0073] Figure 5 This is a schematic diagram of the Serdes link in Embodiment 5 of the present invention, which combines AI acceleration and redundant interconnection. Detailed Implementation

[0074] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0075] Example 1

[0076] Please see Figure 1 This invention provides a modular spaceborne edge intelligent computing platform 10. As a payload subsystem of a spacecraft, the platform's internal payloads are connected to a satellite telemetry and control platform 2 via a highly reliable CAN or RS422 bus 1 for telemetry and remote control command interaction.

[0077] The core physical architecture of the modular spaceborne edge intelligent computing platform 10 consists of at least one network and management module (NMM) 100 and at least one ( Figure 1 Four Universal Edge AI Modules (UAM) were showcased. Figure 1 It consists of 200a, 200b, 200c, and 200d.

[0078] To overcome the limitation of the number of switch ports on system scale, the NMM 100 in this embodiment is designed with cascading expansion capabilities. The NMM 100 integrates two redundant Gigabit Ethernet switches (see Embodiment 2). Each NMM has dedicated uplink and downlink high-speed cascading ports. Through these ports, multiple NMM100s can be physically connected to construct a tree, ring, or mesh switching network backbone. The System Management Unit (SMU) within the NMM 100 is responsible for negotiating and managing the cascading links, allowing the overall platform's computing power and port count to scale linearly with the number of NMMs, thus adapting to task requirements of different scales.

[0079] Each UAM is connected to two redundant Gigabit Ethernet switches of the NMM 100 via two independent Ethernet links 3a and 3b, respectively. This dual-redundant network topology ensures extremely high data link reliability: when any switch in the NMM fails or any Ethernet link is damaged, the UAM can still maintain communication with other modules in the system through the other link, achieving network-level fault tolerance.

[0080] The modular spaceborne edge intelligent computing platform 10 features high flexibility, scalability, and multi-level communication redundancy. For example... Figure 1As shown, UAM 200a and 200b can serve as the main AI computing modules, UAM 200c can serve as an onboard storage module (e.g., connected to a large-capacity SSD via an M.2 interface), and UAM 200d can serve as an onboard camera module (e.g., connected to an optical module via a MIPI / Serdes interface 6). The modular onboard edge intelligent computing platform 10 can also incorporate more UAMs, not limited to these. All these heterogeneous modules can be connected to the NMM 100 via a unified redundant Ethernet interface, achieving plug-and-play functionality. The NMM 100 can also communicate with other payloads on the satellite platform via Ethernet link 3c, allowing for the introduction of other data sources or the provision of AI APIs. Furthermore, the UAMs can be interconnected point-to-point at high speed via Serdes link 4, forming a redundant topology. Simultaneously, each module can also perform wireless backup communication within a controlled cavity via WLAN link 5.

[0081] Example 2

[0082] Please see Figure 2 The Network and Management Module (NMM) is the core of management and data exchange for the modular spaceborne edge intelligent computing platform. It mainly includes the System Management Unit (SMU), Gigabit Ethernet Switch A, Gigabit Ethernet Switch B, wireless communication unit, high-reliability memory (IMG SD), and OTA SD.

[0083] The SMU is preferably implemented using a highly reliable FPGA or MCU. It connects to the satellite platform via a CAN / RS422 interface and a CP telemetry and control port, ensuring reliable telemetry and control of the NMM itself.

[0084] The SMU is responsible for monitoring the status of the switches inside the NMM and the connection status of the cascaded ports. When multiple NMMs are cascaded, the SMUs of each NMM communicate through out-of-band management buses (such as CAN / RS422) or in-band management messages to automatically establish a topology view of the entire network and configure the routing tables of the switches.

[0085] The SMU also connects to each UAM via the analog monitoring signal input interface MON_AI, the digital monitoring signal input interface MON_DI, and OC instructions to monitor the operation of the UAM and use OC instructions to control hardware reset and boot selection to achieve hardware-level intervention on abnormal nodes.

[0086] The SMU stores the boot image and application software of the UAM through highly reliable storage IMG SD and OTA SD, and updates the boot image and application software of the general edge AI module as needed. In the event of a serious failure of the UAM (such as damage to both eMMC and SDNAND), boot code is injected into the UAM through the OTA_BUS interface, providing a final means of recovery.

[0087] Gigabit Ethernet Switch A and Gigabit Ethernet Switch B provide multiple Gigabit Ethernet ports for connecting multiple UAMs, other NMMs, and other possible on-board payloads. The wireless communication unit is used to implement a WLAN-based Layer 3 backup communication plane.

[0088] Example 3

[0089] Please see Figure 3 The Universal Edge AI Module (UAM) is the core processing unit of the platform. Through the collaborative reliability design of the core board and the baseboard, it balances high performance, flexibility and reliability.

[0090] The core board 210 is equipped with a high-performance COTS SoC. This embodiment preferably uses the Rockchip RK3588J industrial-grade chip, but the invention is not limited to this specific model. This SoC integrates computing units such as CPU, GPU, and NPU, as well as RAM and an eMMC (embedded memory).

[0091] The baseboard 220 provides the core board 210 with a rich set of interfaces and reliability-enhancing designs, including:

[0092] Second boot memory SD: A high-reliability NAND Flash or NOR Flash that stores the same system image as the first boot memory.

[0093] The boot source selection and recovery logic mainly consists of a multiplexer (MUX), an external SD interface (such as the SMU's OTA_BUS interface), and OC instructions including hardware reset (RESET) and boot selection (BOOT). Additionally, it includes a hardware watchdog for automatic reset in case of system crash.

[0094] At least one bidirectional SerDes interface: Based on the characteristics of the SoC, the specific implementation of the SerDes interface has the following four sub-solutions:

[0095] Sub-option 1: Native SerDes direct connection. If the SoC integrates a general-purpose SerDes controller, the differential signals can be directly output from the baseboard. This method has the lowest latency and requires no additional conversion.

[0096] Sub-option 2: SerDes + MIPI-A. If the SoC itself supports MIPI-A, it can be directly brought out. Otherwise, a protocol conversion chip is set on the baseboard to convert the SoC's MIPI CSI / DSI signals to the MIPI-A protocol and transmit them through the SerDes link. This method has strong anti-interference capabilities and a long transmission distance.

[0097] Sub-scheme 3: SerDes + MIPI CSI / DSI. For SoCs with rich video interfaces such as the RK3588J, the baseboard uses a serializer to convert the SoC's MIPI DSI output into a SerDes signal for transmission, and uses a deserializer to restore the received SerDes signal to the MIPI CSI input.

[0098] Sub-option 4: SerDes + PCIe. For SoCs with PCIe interfaces, a non-transparent bridge (NTB) or PCIe switch chip is used to convert PCIe signals into SerDes signals for inter-board interconnection. This method offers the highest bandwidth and is suitable for large-scale memory data sharing and collaborative computing between UAMs.

[0099] Other interfaces include dual Ethernet interfaces, a high-reliability interface (CAN / RS422), a wireless communication unit (WLAN), expansion interfaces (M.2 PCIe and M.2 SATA), and a MIPI interface. The MIPI interface is used to connect MIPI interface cameras, the M.2 SATA interface is used to connect high-capacity SSD storage devices, and the M.2 PCIe interface is used to connect AI inference acceleration modules or other PCIe modules.

[0100] Example 4

[0101] To address the issue of memory data flipping or corruption caused by space radiation, this invention designs a multi-level boot recovery mechanism for UAM. Please refer to [link / reference]. Figure 4 The specific fault self-healing process is as follows:

[0102] Step 401 (Normal Startup): UAM powers on and loads the system from eMMC by default.

[0103] Step 402 (Fault Detection): System startup failed (e.g., eMMC data was damaged due to space radiation). If the SMU or satellite platform does not detect the Systemgood signal through the CP telemetry port, the UAM startup is determined to have failed.

[0104] Step 403 (Switching the boot source): The SMU sends the OC commands RESET and BOOT through the CP monitoring and control port.

[0105] Step 404 (Backup System Startup): Based on the OC instructions, the UAM's internal hardware and software logic bypasses the eMMC and loads the backup operating system from the SD card on the backplane.

[0106] Step 405 (Self-Healing): After the standby system successfully boots up, it automatically executes the repair script, mounts the eMMC as a storage device, and uses the system image copy stored on the SD card to perform on-orbit rewriting and repair of the eMMC.

[0107] Step 406 (Recovery): After the repair is complete, UAM reports successful repair to SMU. SMU then sends the RESET and BOOT signals again, and UAM boots normally from the repaired eMMC, restoring all functions.

[0108] Step 407 (Final Recovery, Optional): If the SMU finds that the UAM also fails to boot from the SD (i.e., the SD is also damaged), the SMU can switch the boot source to the external SD interface by controlling the MUX, and deliver the boot image to the UAM's SoC through the interface to achieve the deepest fault recovery.

[0109] Example 5

[0110] Please see Figure 5 This invention optimizes the data flow for collaborative inference between on-orbit AI applications (such as remote sensing image target detection) and spaceborne computing platforms, and provides high-speed communication redundancy.

[0111] In traditional solutions ( Figure 5 As shown by the dashed line, the camera payload module sends raw image data to the NMM via Ethernet, and the NMM then forwards it to the UAM. After receiving the data packet, the UAM's CPU needs to perform operations such as unpacking and data reassembly before finally transferring the data to the image processing unit (ISP) or NPU for image processing and AI application inference. This process involves a long link, high latency, and high CPU resource consumption.

[0112] In a preferred embodiment of the present invention ( Figure 5 (As shown by the solid line in the middle) The camera payload module is connected to the AI ​​computing module UAM via a MIPI or SerDes link. Data is directly sent to the dedicated memory area of ​​the SoC's ISP or NPU through this link for rapid subsequent processing. At the same time, the computing power of the ISP / NPU can be used to accelerate inference.

[0113] Similarly, in the case of collaborative reasoning on spaceborne computing platforms, in traditional solutions ( Figure 5 (As shown by the dashed line) Part of the data obtained by the NPU inference of a single UAM needs to go through a lengthy process of CPU packaging, NMM forwarding, and CPU unpacking by the next node UAM before it can be received and processed by the NPU of the next node UAM. In the preferred embodiment of the present invention ( Figure 5(As shown by the solid line in the middle) UAMs can form flexible topologies, sending intermediate inference data directly to the dedicated memory area of ​​the ISP or NPU of the next UAM node, greatly reducing data transmission and processing latency, and also utilizing the computing power of the ISP / NPU to accelerate inference, thereby improving the efficiency of collaborative inference of the entire system.

[0114] This solution enables zero-copy or low-latency data pass-through from sensors to AI processors and between AI processors, completely bypassing the CPU and Ethernet protocol stack, significantly improving the efficiency of AI applications and collaborative inference. Simultaneously, the SerDes interface can also serve as a general-purpose high-speed data link for direct data exchange between UAMs, forming a second redundant communication plane independent of the NMM. This design balances the specialization of AI acceleration with the redundancy of system communication.

[0115] Example 6

[0116] To achieve plug-and-play and elastic scaling of computing resources, this invention introduces a lightweight microservice elastic deployment architecture. It mainly includes the following parts:

[0117] Microservice architecture design: The system software abandons the cumbersome centralized control node, decoupling business functions into application microservices and inference microservices. The application microservices are responsible for business logic, data acquisition, and process control. The inference microservices encapsulate specific AI algorithms (such as object detection), responsible for receiving data and returning inference results.

[0118] Service Adapters and Auto-Discovery: Each microservice runs on a service adapter. The adapter contains service registration, load balancing, and communication protocol modules. When a new UAM node connects to the network and powers on, its inference microservice adapter automatically broadcasts registration information over Ethernet, including service type, IP address, and the node's computing power metrics (such as FPS and memory size). Other application microservices across the network receive this broadcast, update their local "service registry," and add the new node to the available computing power pool.

[0119] Elastic scaling of computing power: Taking video stream processing tasks as an example. When the task load increases, the SMU starts up a backup UAM node. After the new node starts, it automatically registers the service. The load balancing module of the application microservice detects the increase in available computing power and distributes some video frames to the new node for processing through a weighted round-robin algorithm, achieving linear aggregation of computing power. When a UAM node is removed or fails (heartbeat loss), the service registry automatically removes it. The application microservice immediately stops distributing tasks to that node and transfers the tasks to other healthy nodes, achieving seamless fault avoidance.

[0120] Example 7

[0121] The modular spaceborne edge intelligent computing platform of this invention, through a combination of hardware and software, can tolerate and recover from the following fault scenarios:

[0122] Scenario 1: One or more UAMs are damaged: If a UAM cannot be recovered due to permanent hardware damage, the microservice architecture will automatically isolate it, and the system will only lose some computing power, while the core business will not be interrupted.

[0123] Scenario 2, Partial NMM Failure: If multiple cascaded NMMs exist in the system, the failure of some NMMs will not cause a complete network outage. The backbone network formed by the remaining NMMs continues to operate, and the affected UAMs can maintain communication with healthy nodes through SerDes links or WLAN wireless links.

[0124] Scenario 3: Failure of one or two communication planes: If any one or two of the Ethernet switching network, SerDes high-speed network and WLAN wireless network fail, the system will automatically switch to the remaining communication planes to ensure that the system can still perform data interaction and control between modules.

[0125] Example 8

[0126] To ensure the real-time performance of multiple modules working together in a distributed system, NMM switches preferably support the TSN (Time-Sensitive Networking) standard.

[0127] When the system needs to perform high-precision collaborative tasks (such as multi-UAM collaborative processing or UAM control of precision instruments), the SMU can act as the central network controller (CNC) of the TSN. The SMU negotiates time slots with each UAM through the TSN protocol to allocate fixed transmission time slots for specific critical data streams (such as control commands between UAMs).

[0128] This ensures that the transmission of the instruction stream has high determinism, low latency, and zero jitter, and will not be congested or interfered with by other high-volume data in the system (such as storage data streams), thereby guaranteeing the stability and real-time performance of the entire collaborative system.

[0129] Example 9

[0130] To provide a third-layer backup communication plane independent of wired links, both the NMM and each UAM possess wireless communication units, whose signals are contained within a shared, specially designed electromagnetically shielded cavity (e.g., utilizing the internal space of the platform chassis). This design has the following characteristics:

[0131] Leakage prevention: The cavity has excellent electromagnetic shielding properties, ensuring that the internal WLAN signal will not leak out, thereby avoiding electromagnetic interference (EMC) to other sensitive payloads on the satellite (such as communication or remote sensing equipment).

[0132] Collision avoidance: This is a shared channel for a multi-to-multi (NN) network. To avoid inefficiencies caused by collisions, the SMU of the NMM or a UAM can act as a wireless coordinator, allocating communication time slots to each node by implementing coordination methods such as TDMA (Time Division Multiple Access), thereby achieving efficient, collision-free internal wireless communication.

[0133] This solution provides an innovative approach to flexible data interaction between modules that does not occupy wired ports and offers excellent electromagnetic compatibility.

[0134] In summary, this invention constructs a highly reliable, easily scalable, and self-healing spaceborne edge intelligent computing platform through a unique distributed network architecture, a layered fault self-healing mechanism, interconnection technology for AI applications and collaborative reasoning, and a microservice-based elastic software system.

[0135] Those skilled in the art should understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A modular spaceborne edge intelligent computing platform, employing a distributed architecture, characterized in that, It includes at least one network and management module and at least one general-purpose edge AI module, both of which are connected to an electromagnetically shielded cavity, wherein: The network and management module, serving as the data exchange and control center of the modular spaceborne edge intelligent computing platform, includes a system management unit, a redundant network switching unit, and a controlled wireless communication unit. The system management unit is responsible for highly reliable communication with the satellite telemetry and control platform, monitoring, resetting, and managing other modules within the modular spaceborne edge intelligent computing platform, as well as managing and configuring the system's network topology and routing. The redundant network switching unit includes at least two mutually redundant spaceborne gigabit Ethernet switches. All modules within the modular spaceborne edge intelligent computing platform are connected to these gigabit Ethernet switches via redundant links, achieving highly reliable data interconnection. The controlled wireless communication unit is a WLAN wireless unit used to connect to an electromagnetically shielded cavity for wireless data transmission with the general-purpose edge AI module. The general-purpose edge AI module, as the core processing unit of the modular spaceborne edge intelligent computing platform, is responsible for performing data- and computationally intensive tasks. Each general-purpose edge AI module is connected to at least two redundant gigabit Ethernet switches of the network and management module via at least two independent Ethernet links. The general-purpose edge AI module adopts a separate design of a core board and a baseboard. The core board integrates a first boot memory, and the baseboard integrates a second boot memory. Both boot memories store multiple system image files. The general-purpose edge AI module is configured to have fault self-healing capabilities, enabling it to repair faults in the first boot memory using the second boot memory, or to repair faults in the boot memory from the network and management module using an external SD interface. The baseboard of the general-purpose edge AI module integrates a controlled wireless communication unit, which is connected to the electromagnetically shielded cavity to realize wireless data transmission between general-purpose edge AI modules and between general-purpose edge AI modules and the network and management module.

2. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, Each of the aforementioned network and management modules has dedicated uplink and downlink high-speed cascading ports. Multiple network and management modules are physically connected through these ports to construct a tree-like, ring-like, or mesh-like switching network backbone.

3. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, The system management unit is implemented by a highly reliable MCU or FPGA and connects to the satellite platform via a CAN or RS422 interface and a CP telemetry and control port. It connects to each general-purpose edge AI module through analog monitoring signal input interface, digital monitoring signal input interface, and OC commands to monitor the operation of the general-purpose edge AI modules and use OC commands to control hardware reset and startup selection to achieve hardware-level intervention for abnormal nodes. The network and management module also includes highly reliable memory IMG SD and OTA SD. The system management unit stores the startup image and application software of the general-purpose edge AI module through the highly reliable memory IMG SD and OTA SD, and updates the startup image and application software of the general-purpose edge AI module as needed.

4. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, The onboard gigabit Ethernet switch in the redundant network switching unit supports time-sensitive networking protocols. The system management unit is configured as a network controller for time-sensitive networking, and negotiates time slots with each general edge AI module to allocate determined transmission time slots for control command data streams.

5. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, The core board of the general-purpose edge AI module is equipped with a high-performance COTS SoC and integrates onboard memory and a first boot memory; the baseboard integrates a second boot memory and is equipped with redundant network interfaces, high-reliability control interfaces, hardware measurement and control ports, and at least one bidirectional high-speed SerDes interface; the general-purpose edge AI modules are interconnected point-to-point at high speed through SerDes links to form a redundant topology; the SerDes interface is implemented in one or a combination of the following four ways: directly using the SerDes interface natively supported by the SoC; using SerDes in combination with the MIPI-A protocol; converting the SoC's MIPI CSI / DSI interface into a SerDes signal through external circuitry; using SerDes in combination with the PCIe protocol.

6. The modular spaceborne edge intelligent computing platform as described in claim 5, characterized in that, The general-purpose edge AI module utilizes the SerDes interface to construct a data link for AI applications. The SerDes interface is configured to directly transmit received data to the dedicated memory area of ​​the image processing unit or neural network processing unit inside the SoC. The data can be preprocessed and post-processed by the image processing unit or neural network processing unit, while bypassing the SoC's CPU and general network protocol stack, achieving zero-copy data transmission. This constitutes a heterogeneous cascade acceleration of the image processing unit, the multi-core processor in the SoC, the image coprocessor in the SoC, the neural network processing unit, and the external AI inference acceleration module.

7. The modular spaceborne edge intelligent computing platform as described in claim 5, characterized in that, The modular spaceborne edge intelligent computing platform is configured to construct a three-dimensional communication redundancy architecture, including: The first-level data communication plane: redundant gigabit Ethernet provided by the network and management module; The second-level high-performance communication plane: high-speed SerDes links between general edge AI modules; The third-level backup communication plane: The network and management module and the general edge AI module are each integrated with a controlled wireless communication unit, and the signal of the controlled wireless communication unit is confined inside a cavity controlled by electromagnetic shielding; The three-dimensional communication redundancy architecture is configured to maintain control and data interaction between modules by utilizing the remaining communication planes when any one or two communication planes fail.

8. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, The modular spaceborne edge intelligent computing platform includes a variety of general-purpose edge AI modules with different functions, including: an AI computing power module responsible for performing AI inference, a camera payload module for preprocessing image data or performing AI applications, a spaceborne storage module responsible for high-speed caching of massive amounts of data, and a spaceborne IoT module that integrates communication modules or sensor modules.

9. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, The baseboard of the general-purpose edge AI module integrates a WLAN wireless unit, a MUX chip, and a Watchdog chip. The WLAN wireless unit's signal is contained within an electromagnetically shielded cavity, serving as a third-layer redundant communication link independent of the wired link. The MUX chip connects to a second boot memory and an external SD interface. The Watchdog chip monitors the operating status of the general-purpose edge AI module system and automatically performs a hardware reset in case of system deadlock or crash. Under normal circumstances, the general-purpose edge AI module boots from the first boot memory. When the system image in the first boot memory is corrupted, causing boot failure, the satellite platform or the system management unit of the network and management module controls the general-purpose edge AI module to switch boot sources, booting a backup system from the second boot memory and performing on-orbit repair or rewriting of the erroneous image on the first boot memory. When both the first and second boot memories fail, the general-purpose edge AI module switches to the external SD interface via the MUX chip, allowing the system management unit of the network and management module to provide a boot image to the general-purpose edge AI module through this interface for fault recovery. When the general-purpose edge AI module system deadlocks or crashes, the Watchdog chip automatically performs a hardware reset.

10. The modular spaceborne edge intelligent computing platform as described in claim 1, characterized in that, The modular spaceborne edge intelligent computing platform has a built-in elastic edge deployment software architecture that abandons the heavy central control node and adopts a lightweight microservice architecture. It encapsulates the computing tasks on each general edge AI module as inference microservices and the business logic as application microservices. Each microservice has a built-in adapter module. When a new general-purpose edge AI module is connected to the network and management module and powered on, its adapter automatically broadcasts registration information to the service registry of the entire network. The application microservice uses the service registry to perceive the number of currently online general-purpose edge AI modules and computing resources in real time. When the number of general-purpose edge AI modules increases, the computing resource pool automatically expands, and the load balancer dynamically distributes inference tasks according to the real-time computing power of each node. When the number of general-purpose edge AI modules decreases, the service is automatically deregistered, and the tasks are automatically transferred to the remaining nodes.

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