Transistor short-circuit detection circuit and short-circuit protection method based on drain-source voltage and change rate thereof

Abstract

The invention provides a transistor short-circuit detection circuit based on drain-source voltage and change rate thereof. The transistor short-circuit detection circuit comprises a sensing circuit, a logic judgment circuit, an isolation latch circuit, a digital signal processor and a gate driver, according to the short-circuit protection circuit, the characteristic that high Vds and positive dv / dt appear at the same time in the fault period is utilized, the method that high Vds and positive dv / dt appear at the same time serve as the judgment characteristic of the short-circuit fault is provided, the short-circuit protection circuit is designed based on the method, and the short-circuit protection circuit is simple in structure, high in reliability and capable of achieving quick response to the short-circuit fault.

Description

Technical Field

[0001] This invention relates to a short-circuit detection circuit for transistors based on drain-source voltage and its rate of change, and more particularly to a short-circuit detection circuit for SiC MOSFETs (silicon carbide semiconductor field-effect transistors), belonging to the field of power electronics technology. Background Technology

[0002] Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) are widely used in power converters due to their outstanding advantages in efficiency and power density. However, compared with silicon (Si)-based devices, the smaller chip size and thinner gate oxide layer of SiC MOSFETs significantly increase the short-circuit current density, resulting in a significant decrease in their short-circuit withstand capability (SCWT). Under short-circuit fault conditions, the device may be damaged within microseconds due to thermal runaway or gate oxide breakdown. Therefore, achieving fast and reliable short-circuit protection is crucial for ensuring the safe operation of SiC MOSFETs.

[0003] Existing short-circuit detection methods generally include desaturation detection (Desat), drain current-based detection, and combined detection.

[0004] Desaturation detection is a classic method based on... v ds The short-circuit detection method is simple in structure and low in cost, and is therefore widely used. However, this method has inherent limitations: in the initial stage of normal conduction of the SiC MOSFET, the drain-source voltage remains high for a period of time, which is called the "blank time". The existence of the blank time limits the response speed of the protection.

[0005] Drain current detection methods can be divided into direct detection and indirect detection. Direct detection uses various current sensors to detect the drain current, and triggers short-circuit protection when the detected current exceeds a preset threshold. This method is fast and requires no blanking time, but the size and cost of the sensors limit its use in practical circuits. Indirect detection indirectly determines the magnitude of the drain current through the parasitic inductance between the source and Kelvin source pins of the SiC MOSFET. Although indirect detection has a simple structure, it is only suitable for packages with Kelvin source pins. If applied to other packages, an additional auxiliary inductor needs to be introduced.

[0006] Combined detection measures two or more electrical parameters for short-circuit protection, such as gate voltage and drain current, or gate voltage and drain-source voltage. While combined detection helps improve the reliability of the detection, the trade-off is that the complexity of the circuit system increases with the number of parameters being detected. Summary of the Invention

[0007] In order to solve the problems existing in the prior art, the present invention provides a transistor short-circuit detection circuit based on drain-source voltage and its rate of change to achieve fast and reliable short-circuit protection.

[0008] To achieve the above objectives, the technical solution proposed in this invention is: a transistor short-circuit detection circuit based on drain-source voltage and its rate of change, comprising a sensing circuit, a logic judgment circuit, an isolation latch circuit, a digital signal processor, and a gate driver. The sensing circuit includes diodes connected in series. D 1. Resistance R 1 and resistance R ses ,diode D 1 is connected to the drain of the transistor, resistor R ses With voltage source V s connect; The logic judgment circuit includes a differential amplifier circuit and a high-speed comparator. The differential amplifier circuit is connected to a resistor. R ses Both ends are used for sampling v Rses The two input terminals of the high-speed comparator are connected to the output terminal of the differential amplifier circuit and the threshold voltage, respectively. V pro(th) connect; The isolation latch circuit includes a data isolator and a D flip-flop circuit. The input terminal of the data isolator is connected to the output terminal of the high-speed comparator, and the output terminal is connected to the CLK pin of the D flip-flop. The PWM signal pin of the digital signal processor is connected to the gate driver and the D pin of the D flip-flop, the RESET signal pin is connected to the CLR pin of the D flip-flop, and the Q pin of the D flip-flop is connected to the gate driver and the digital signal processor.

[0009] The sensing circuit also includes resistors connected in parallel. R ses Diodes at both ends D 2 and diode D 3.

[0010] The differential amplifier circuit includes resistors. R 2. Resistance R 3. Resistance R 4. Resistance R 5 and amplifier U 1. Resistance R 2 and resistance R 3. One end is connected to the resistor respectively R ses Two ends connected, resistor R 2 and resistance R3. The other end is connected to the amplifier respectively. U Connect the positive and negative input terminals of 1, and the resistor. R 4. Connect the 2.5V voltage and the amplifier to the two ends respectively. U The positive input terminal of 1, resistor R 5. Connect the amplifier to each end. U The negative input and output terminals of 1.

[0011] The high-speed comparator includes resistors. R 6 and amplifier U 2. The resistor R 6 are connected to the amplifier at both ends. U 1's output and amplifier U 2 is the positive input terminal of the amplifier. U The negative input terminal of 2 is connected to the threshold voltage. V pro(th) .

[0012] The threshold voltage V pro(th) Generated by a resistor divider network. The diode... D 1 is a high-voltage fast recovery diode; the diode D 2 and diode D 3 is a high-frequency Schottky diode.

[0013] A short-circuit protection method for a transistor short-circuit detection circuit based on the drain-source voltage and its rate of change, characterized in that: firstly, the short circuit is detected... v ds Does it exceed a preset threshold? Then check d. v / d t The polarity, with v ds Exceeding the preset threshold and d v / d t Positive polarity is used as the criterion for short-circuit fault detection. When diode D1 is cut off, the following is determined: v ds Exceeding the preset threshold. When v Rses voltage greater than the threshold voltage V pro(th) When, determine d v / d t It is positive polarity and v ds Exceeding the preset threshold.

[0014] The beneficial effects of this invention are as follows: The method of this invention utilizes high V during faults. ds The characteristic of simultaneous occurrence with positive dv / dt is proposed to use high v ds with positive dv / d t Simultaneously, a method for identifying short-circuit faults was developed, and a short-circuit protection circuit was designed based on this method. This short-circuit protection circuit has a simple structure, high reliability, and can achieve a fast response to short-circuit faults. This short-circuit protection circuit can effectively trigger both hard switching faults (HSF) and under-load faults (HSF), and its effectiveness is not limited by the device packaging form. Attached Figure Description

[0015] Figure 1 This is a circuit diagram of the short-circuit detection circuit of the present invention; Figure 2 for Figure 1 A schematic diagram of the circuit topology; Figure 3 The waveform diagrams show the electrical parameters under short-circuit and normal switching conditions, where (a) represents the HSF condition, (b) represents the FUL condition, and (c) represents the normal switching condition. Figure 4 The experimental waveforms are shown under HSF conditions. Figure 5 The waveforms are from experiments under FUL conditions. Figure 6 This is a normal switching waveform; Figure 7 The waveforms are experimental waveforms of the existing short-circuit protection circuit, where (a) is the HSF condition and (b) is the FUL condition. Detailed Implementation

[0016] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. Example 1

[0017] The short-circuit detection circuit based on the drain-source voltage and its rate of change of the silicon carbide semiconductor field-effect transistor proposed in this embodiment is as follows: Figure 1 As shown, the circuit includes a sensing circuit, a logic judgment circuit, an isolation latch circuit, a digital signal processor, and a gate driver.

[0018] The sensing circuit includes high-voltage fast recovery diodes connected in series. D 1. Resistance R 1 and resistance R ses High-voltage fast recovery diode D 1. Parasitic capacitance is provided. C j,D1 High-voltage fast recovery diode D 1. Connected to the drain of a silicon carbide semiconductor field-effect transistor, with a resistor. R ses With voltage source V sConnection; the sensing circuit also includes resistors connected in parallel. R ses Schottky diodes at both ends D 2 and Schottky diodes D 3.

[0019] Therefore, the resulting detection threshold V ds(th) for: ; In the formula, V F diode D 1 represents the forward voltage drop, and n is the number of diodes connected in series. Combined with... Figure 2 As shown, when v ds Less than V ds(th) At that time, the diode is forward-biased. D 1. R 1. R ses A resistor divider network is formed, and the current in the detection circuit loop flows counterclockwise, such as... Figure 2 As shown in (a), V Rses If it is negative, it can be represented as: ; Utilizing the unidirectional conductivity of a diode, when the tested SiC MOSFET... v ds Exceed V ds(th) At that time, diode D 1. Reverse cutoff, thereby achieving high v ds Detection of diodes. D 1. During the reverse cutoff period, its junction capacitance C j,D1 and R 1. R ses Construct an RC detection circuit to detect d v / d t The polarity and through R ses Indirect sampling d v / d t ,like Figure 2 As shown in (b). v Rses The expression is: ; It should be pointed out that, v Rses The amplitude is affected by the Schottky diode. D 2. D3. Clamping: This design is primarily used to protect subsequent logic circuitry. Since D2 and D3 are typically high-frequency Schottky diodes with extremely low parasitic capacitance, [the following is unclear and likely incomplete: "for..."] v Rses The polarity of the signal has a negligible effect and therefore can be disregarded in subsequent analysis.

[0020] The logic decision circuit includes a differential amplifier circuit and a high-speed comparator. The differential amplifier circuit is connected to a resistor. R ses Both ends are used for sampling v Rses The two input terminals of the high-speed comparator are connected to the output terminal of the differential amplifier circuit and the threshold voltage, respectively. V pro(th) Connections; differential amplifier circuit includes resistors R 2. Resistance R 3. Resistance R 4. Resistance R 5 and amplifier U 1. Resistance R 2 and resistance R 3. One end is connected to the resistor respectively R ses Two ends connected, resistor R 2 and resistance R 3. The other end is connected to the amplifier respectively. U Connect the positive and negative input terminals of 1, and the resistor. R 4. Connect the 2.5V voltage and the amplifier to the two ends respectively. U The positive input terminal of 1, resistor R 5. Connect the amplifier to each end. U The negative input and output terminals of 1.

[0021] High-speed comparators include resistors R 6 and amplifier U 2. The resistor R 6 are connected to the amplifier at both ends. U 1's output and amplifier U 2 is the positive input terminal of the amplifier. U The negative input terminal of 2 is connected to the threshold voltage. V pro(th) .

[0022] The differential amplifier circuit in the logic judgment circuit is responsible for... v Rses This structure effectively suppresses common-mode interference and improves sampling accuracy during sampling. A high-speed comparator is used to... v Rses With threshold voltage V pro(th) Comparison, V pro(th) It is generated by a resistor voltage divider network.

[0023] The isolation latch circuit includes a data isolator and a D flip-flop circuit. The input of the data isolator is connected to the output of the high-speed comparator, and the output is connected to the CLK pin of the D flip-flop. The PWM signal pin of the digital signal processor is connected to the gate driver and the D pin of the D flip-flop, the RESET signal pin is connected to the CLR pin of the D flip-flop, and the Q pin of the D flip-flop is connected to the gate driver and the digital signal processor. The gate driver is connected to the gate and source of the silicon carbide semiconductor field-effect transistor.

[0024] Figure 3 The electrical parameter waveforms of the above short-circuit detection circuit are shown under short-circuit and normal switching conditions. (a) is the HSF condition, (b) is the FUL condition, and (c) is the normal switching condition. The working principle of the short-circuit detection circuit under different conditions is as follows: S 1( t 0- t 1): Under HSF operating conditions, v ds Maintain stability. During this period, D 1. Reverse cutoff: No current flows in the detection circuit. v Rses Approximately zero. The operating mode under normal switching conditions is similar to that under HSF conditions.

[0025] Under FUL operating conditions, after the fault occurs, i d Rising sharply v ds from V ds(on) Gradually rise to V ds(th) During this process, D 1. Maintain positive guidance. v Rses The voltage gradually rises from the negative steady state to zero.

[0026] S 2( t 1- t 2): Under HSF operating conditions, after a fault occurs, i d Rising sharply v ds The voltage decreases due to the induced voltage generated by the parasitic inductance of the power circuit, and decreases as d i / d t Gradually decrease, v ds After reaching its minimum value, it begins to rise again, but its value remains higher than [the minimum value]. Vds(th) During this period, C j,D1 Continue discharging until its voltage equals v ds and V s difference, v Rses After a negative voltage spike appears, the voltage returns to zero.

[0027] Under FUL operating conditions, v ds from V ds(th) Continue to rise to V dc During this period, v ds Exceed V ds(th) Forces the diode to reverse cut off. C j,D1 Being charged, v Rses A positive voltage appears and exceeds V pro(th) This triggers the FUL short-circuit protection.

[0028] Under normal switching conditions, VDS drops rapidly and is accompanied by ringing. During this period, due to the delay of the RC circuit, C j,D1 Continuously discharge until D 1. Forward guidance, v Rses After a negative voltage spike occurs, the voltage returns to a negative steady-state voltage, and short-circuit protection will not be falsely triggered due to ringing.

[0029] S 3( t 2- t 3): Under HSF operating conditions, v ds Restore to V dc It then remained stable. During this period, C j,D1 Charged until its voltage equals V dc and V s difference, v Rses A positive voltage appears and exceeds V pro(th) This triggers the HSF short-circuit protection. Under FUL conditions, v ds Maintain stability. No current flows through the detection circuit during this process.v Rses Approximately zero.

[0030] Under normal switching conditions v ds for V ds(on) D1 maintains positive guidance. Although v ds It may fluctuate due to disturbances during this period, but as long as its amplitude is below... V ds(th) This will prevent false triggering.

[0031] S 4( t 3- t 4): Under HSF and FUL operating conditions i d A sharp decline, v ds Voltage spikes occur due to the induced voltage generated by the parasitic inductance of the power circuit. During this period, v Rses A positive voltage reappears and exceeds V pro(th) Theoretically, this signal could disrupt the latching state of the D flip-flop. However, the waveform shown in the figure corresponds to the protection function being disabled. If the protection function is enabled, the PWM remains high during fault shutdown, and the latching state of the D flip-flop is unaffected.

[0032] During normal shutdown process v ds from V ds(on) Rise to V dc , v Rses A positive voltage will also appear and exceed [the specified value]. V pro(th) Although the D flip-flop will respond to this voltage signal and transmit the PWM state, its output remains low because the PWM is already at a low level at this time. This prevents the gate-driven pull-down protection circuit from being activated, thus effectively preventing false triggering. Example 2

[0033] This embodiment provides a short-circuit protection method based on the above-described short-circuit detection circuit. This method first detects... v ds Does it exceed a preset threshold? Then check d. v / d t The polarity, with v ds Exceeding the preset threshold and d v / dt Positive polarity is used as the criterion for short-circuit fault detection. In this embodiment, when diode D1 is cut off, the following is determined: v ds When the preset threshold is exceeded, v Rses voltage greater than the threshold voltage V pro(th) When, determine d v / d t It is positive polarity and v ds Exceeding the preset threshold.

[0034] Comparison Examples This example uses the above-described short-circuit protection circuit for testing, and the test results are as follows: Figure 4 , Figure 5 and Figure 6 The experimental waveforms shown are for different operating conditions. It can be seen from the experimental waveforms that the short-circuit protection response time of the SiC MOSFET in the method of the present invention is 120ns under HSF condition and 134ns under FUL condition.

[0035] For comparison, this example tests the performance of a traditional DESAT protection circuit, using the TI UCC21750 gate driver chip with integrated functionality, and designs its peripheral circuitry. The waveforms of HSF and FUL occurring in the SiC MOSFET are shown below. Figure 7 As shown in the experimental results, the traditional DESAT protection circuit requires 1 to 2 μs to detect the short circuit fault and turn off the SiC MOSFET when different types of short circuits occur. Its blanking time greatly limits the protection response speed.

[0036] The above comparison results show that the SCP response time of existing short-circuit protection schemes is significantly higher than that of the method proposed in this invention, thus verifying the effectiveness and advancement of the method of this invention in fast short-circuit protection.

[0037] The technical solutions of the present invention are not limited to the above embodiments. All technical solutions obtained by equivalent substitution fall within the scope of protection claimed by the present invention.

Claims

1. A transistor short-circuit detection circuit based on drain-source voltage and its rate of change, characterized in that: This includes sensing circuits, logic judgment circuits, isolation latch circuits, digital signal processors, and gate drivers; The sensing circuit includes diodes connected in series. D 1. Resistance R 1 and resistance R ses ,diode D 1 is connected to the drain of the transistor, resistor R ses With voltage source V s connect; The logic judgment circuit includes a differential amplifier circuit and a high-speed comparator. The differential amplifier circuit is connected to a resistor. R ses Both ends are used for sampling v Rses The two input terminals of the high-speed comparator are connected to the output terminal of the differential amplifier circuit and the threshold voltage, respectively. V pro(th) connect; The isolation latch circuit includes a data isolator and a D flip-flop circuit. The input terminal of the data isolator is connected to the output terminal of the high-speed comparator, and the output terminal is connected to the CLK pin of the D flip-flop. The PWM signal pin of the digital signal processor is connected to the gate driver and the D pin of the D flip-flop, the RESET signal pin is connected to the CLR pin of the D flip-flop, and the Q pin of the D flip-flop is connected to the gate driver and the digital signal processor.

2. The short-circuit detection circuit based on drain-source voltage and its rate of change according to claim 1, characterized in that: The sensing circuit also includes resistors connected in parallel. R ses Diodes at both ends D 2 and diode D 3.

3. The transistor short-circuit detection circuit based on drain-source voltage and its rate of change according to claim 2, characterized in that: The differential amplifier circuit includes resistors. R 2. Resistance R 3. Resistance R 4. Resistance R 5 and amplifier U 1. Resistance R 2 and resistance R 3. One end is connected to the resistor respectively R ses Two ends connected, resistor R 2 and resistance R 3. The other end is connected to the amplifier respectively. U Connect the positive and negative input terminals of 1, and the resistor. R 4. Connect the 2.5V voltage and the amplifier to the two ends respectively. U The positive input terminal of 1, resistor R 5. Connect the amplifier to each end. U The negative input and output terminals of 1.

4. The transistor short-circuit detection circuit based on drain-source voltage and its rate of change according to claim 3, characterized in that: The high-speed comparator includes resistors. R 6 and amplifier U 2. The resistor R 6 are connected to the amplifier at both ends. U 1's output and amplifier U 2 is the positive input terminal of the amplifier. U The negative input terminal of 2 is connected to the threshold voltage. V pro(th) .

5. The transistor short-circuit detection circuit based on drain-source voltage and its rate of change according to claim 4, characterized in that: The threshold voltage V pro(th) It is generated by a resistor divider network.

6. The transistor short-circuit detection circuit based on drain-source voltage and its rate of change according to any one of claims 1 to 5, characterized in that: The diode D 1 is a high-voltage fast recovery diode.

7. The transistor short-circuit detection circuit based on drain-source voltage and its rate of change according to claim 6, characterized in that: The diode D 2 and diode D 3 is a high-frequency Schottky diode.

8. A short-circuit protection method for a transistor short-circuit detection circuit based on drain-source voltage and its rate of change as described in claim 7, characterized in that: First test v ds Does it exceed a preset threshold? Then check d. v / d t The polarity, with v ds Exceeding the preset threshold and d v / d t Positive polarity is used as the criterion for short-circuit faults.

9. The short-circuit protection method based on the transistor short-circuit detection circuit according to claim 8, characterized in that: When diode D1 is cut off, determine v ds Exceeding the preset threshold.

10. The short-circuit protection method based on the transistor short-circuit detection circuit according to claim 9, characterized in that: when v Rses voltage greater than the threshold voltage V pro(th) When, determine d v / d t It is positive polarity and v ds Exceeding the preset threshold.

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