Junction temperature estimation algorithm verification method, storage medium and junction temperature algorithm verification system

Abstract

The invention discloses a junction temperature estimation algorithm verification method, a storage medium and a junction temperature algorithm verification system.The junction temperature estimation algorithm verification method comprises the steps that the temperature distribution condition of a power device with a first uncovered area under the power-on condition is obtained, and the position of the highest temperature point is determined; acquiring temperature data in an uncovering groove of the power device which is subjected to second-area uncovering at the highest temperature point; wherein the first area is larger than the second area; and verifying a given power device junction temperature estimation algorithm through the temperature data of the power device under a preset test condition. According to the method, the position of the highest temperature point is firstly positioned, then the cover is accurately opened to obtain the junction temperature data of a normal device close to the unopened cover, and finally the temperature data is used, so that a given power device junction temperature estimation algorithm is verified in a low-cost and high-reliability manner.

Description

Technical Field

[0001] This invention relates to the field of power device junction temperature algorithm verification technology, and in particular to a junction temperature estimation algorithm verification method, a storage medium, and a junction temperature algorithm verification system. Background Technology

[0002] Power semiconductor devices, such as IGBTs, MOSFETs, and next-generation SiC (silicon carbide) and GaN (gallium nitride) devices, are the core of modern power electronic systems. During operation, due to conduction and switching losses, a large amount of heat is generated in the junction region of the device chip, causing the junction temperature (Tj) to rise. Excessive junction temperature is one of the main causes of power device failure, and accurate estimation of the junction temperature is crucial for achieving system reliability and over-temperature protection.

[0003] Estimating the junction temperature of power devices can help detect potential overheating risks in advance and prevent system crashes due to thermal failure. However, verifying the accuracy of the junction temperature estimation algorithm is also a very important issue.

[0004] Current methods for junction temperature estimation and verification can be mainly divided into three categories: indirect methods, direct methods, and simulation model verification. Indirect methods typically include two types: formula derivation and thermistor parameter methods. However, both formula derivation and thermistor parameter methods (indirect methods) heavily rely on the accuracy of parameter measurements, are cumbersome, and require stringent testing conditions, making them unsuitable as accurate references for junction temperature estimation results. Customizing power devices with pre-embedded thermocouples or semi-transparent packages from manufacturers offers high reliability but is also costly (direct methods). Simulation model verification requires sophisticated software modeling, and the complex real-world application scenarios make it difficult to simulate the actual working environment; therefore, it is only suitable for preliminary verification.

[0005] Indirect measurement methods suffer from low accuracy and poor reliability; direct measurement methods are costly and impractical; and simulation models are often out of touch with real-world applications. Therefore, there is an urgent need in this field for a testing method that can verify power device junction temperature estimation algorithms under actual operating conditions with low cost and high reliability. Summary of the Invention

[0006] The main objective of this invention is to provide a method for verifying junction temperature estimation algorithms, aiming to provide a test method for verifying junction temperature estimation algorithms for power devices with low cost and high reliability.

[0007] To achieve the above objectives, the present invention proposes a method for verifying the junction temperature estimation algorithm, including: Obtain the temperature distribution of the power devices in the first area after the cover is opened under power-on conditions, and determine the location of the highest temperature point; Acquire temperature data within the opening groove of the power device at the highest temperature point where the second area is opened; wherein the first area is larger than the second area; The given power device junction temperature estimation algorithm is verified using the temperature data of the power device under preset test conditions.

[0008] Optionally, the verification of the given power device junction temperature estimation algorithm includes: Based on the power device junction temperature estimation algorithm, temperature estimation data under the preset test conditions are obtained; The given power device junction temperature estimation algorithm is verified by comparing the temperature data and the estimated temperature data.

[0009] Optionally, the preset test conditions include: switching frequency; The verification method for the junction temperature estimation algorithm also includes: The given power device junction temperature estimation algorithm is verified by using the temperature data of the power device under a preset switching frequency condition.

[0010] Optionally, the preset test conditions include: current value; The verification method for the junction temperature estimation algorithm also includes: The given power device junction temperature estimation algorithm is verified by using the temperature data of the power device under preset current conditions.

[0011] Optionally, the verification of the given power device junction temperature estimation algorithm then includes: The power device junction temperature estimation algorithm is adjusted so that the temperature estimation data corresponding to the adjusted power device junction temperature estimation algorithm is consistent with the actual temperature data.

[0012] The present invention also proposes a storage medium storing a verification power device junction temperature estimation algorithm program, which, when executed by a processor, implements the steps of the junction temperature estimation algorithm verification method.

[0013] This invention also proposes a junction temperature algorithm verification system, including... Temperature sensor, thermal imager, control module, and power supply test module; The power supply test module is used to electrically connect power devices and provide the current corresponding to preset test conditions; The thermal imager is used to acquire thermal images of the power devices; The temperature sensor is used to acquire temperature data within the opening groove of the power device; The control module is connected to the temperature sensor and the thermal imager respectively, and acquires the thermal image and the temperature data; The control module is also connected to the controlled terminal of the power device and is used to control the switching frequency of the power device. The control module also verifies the given power device junction temperature estimation algorithm by using the temperature data of the power device under preset test conditions.

[0014] Optionally, the temperature sensor includes a thermocouple probe; the thermocouple probe is wrapped in insulating material and isolated from the pins of the power device.

[0015] Optionally, the insulating material includes ceramics.

[0016] Optionally, the control module sends a test command to the power supply test module and controls the power supply test module to output a current corresponding to the test command.

[0017] This invention discloses a method for verifying a junction temperature estimation algorithm, comprising: acquiring the temperature distribution of a power device with a first open area under power-on conditions, and determining the location of the highest temperature point; acquiring temperature data within the opening groove of a power device with a second open area at the highest temperature point; wherein the first area is larger than the second area; and verifying a given power device junction temperature estimation algorithm using the temperature data of the power device under preset test conditions. This invention achieves low-cost and high-reliability verification of a given power device junction temperature estimation algorithm by first locating the highest temperature point, then accurately opening the device to obtain junction temperature data close to that of a normal device without the opening, and finally using the temperature data. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram illustrating the steps of an example of the junction temperature estimation algorithm verification method of the present invention; Figure 2 is a schematic diagram of the power device with the cover open; Figure 3 This is a photograph of the power device with its casing open. Figure 4 This is a schematic diagram of infrared thermometry. Figure 5 This is a schematic diagram of thermocouple temperature measurement. Figure 6 This is a schematic diagram illustrating the steps of another example of the junction temperature estimation algorithm verification method of the present invention; Figure 7 This is a schematic diagram illustrating the steps of an example of the junction temperature algorithm verification system of the present invention.

[0020] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0023] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0024] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0025] Formula derivation method: The junction temperature is calculated by measuring the case temperature (Tc) of the power device and combining it with the known power loss (Ploss) and junction-to-case thermal resistance (Rj-c). This method heavily relies on the accuracy of the parameters Ploss and Rj-c. In practical applications, Ploss is difficult to calculate accurately due to factors such as driving conditions and temperature, while Rj-c itself is a nonlinear parameter related to multiple factors. This results in low accuracy of the final calculated junction temperature, making it unreliable as a verification benchmark.

[0026] Thermistor parameter method: This method utilizes electrical parameters that exhibit a strong linear relationship with junction temperature (such as the saturation voltage drop Vce(sat) of an IGBT and the forward voltage drop Vf of a diode) as temperature-sensitive parameters (TSPs). First, the device needs to be calibrated offline in a constant temperature chamber to establish a correlation curve between TSP and junction temperature. Then, the TSP is monitored during actual operation, and the junction temperature is inferred from the calibration curve. This method involves a cumbersome calibration process and requires that the actual measurement conditions (such as the test current) strictly adhere to the calibration conditions; otherwise, significant errors will be introduced. Due to its indirect nature and stringent testing conditions, the reliability of the verification results obtained using this method is limited.

[0027] Pre-embedded thermocouple method: During the device packaging manufacturing stage, miniature thermocouples are pre-embedded near the chip junction. Although this method can directly and reliably measure the junction temperature, it requires special customization from the chip manufacturer, resulting in extremely high costs and long delivery cycles. Furthermore, the customized devices may differ in thermal characteristics from standard commercial devices, lacking versatility and economic efficiency.

[0028] Simulation model verification methods utilize software such as finite element analysis (FEA) to establish detailed thermal models of power devices and calculate junction temperatures through simulation. The accuracy of simulation results is highly dependent on material parameters (such as thermal conductivity and specific heat capacity), boundary conditions (such as heat sink performance and ambient temperature), and the precision of the model mesh. Due to the complexity and variability of actual working environments, simulation models cannot accurately simulate all real-world scenarios and are typically only suitable for theoretical verification in the early stages of product development. They cannot serve as an effective criterion for judging the accuracy of the final algorithm in actual circuits.

[0029] This invention proposes a method for verifying a junction temperature estimation algorithm, such as... Figure 1 As shown, it includes: Obtain the temperature distribution of the power devices in the first area after the cover is opened under power-on conditions, and determine the location of the highest temperature point; Acquire temperature data within the opening groove of the power device at the highest temperature point where the second area is opened; wherein the first area is larger than the second area; The given power device junction temperature estimation algorithm is verified using the temperature data of the power device under preset test conditions.

[0030] It should be noted that the present invention uses the method of opening the power device to detect the actual junction temperature of the power device, which avoids the high cost of customizing special packaging from the factory, while the direct measurement with infrared thermometer and thermocouple can provide accurate and reliable junction temperature detection results.

[0031] It is easy to understand that, in this invention, to detect the junction temperature of a power device, the device is first largely opened, and then powered on (for example, the opened power device is soldered into the drive circuit), placing the power device under operating conditions. The power device begins to heat up, and the temperature distribution of the power device under powered conditions with the large area open (the first area, the specific value of which can be determined by the experimenter) is obtained to determine the location of the highest temperature point. This invention does not limit the specific means of obtaining the temperature distribution of the power device, but it is easy to understand that non-contact temperature measurement methods such as thermal imagers or infrared thermometers can be used to quickly obtain the temperature distribution of various parts of the entire power device.

[0032] It should be noted that this invention measures temperature data for power devices that have already been decapsulated. The decapsulation process is not described in detail. For example, a laser decapsulation machine or chemical etching is used to decapsulate a first area (i.e., a large area) of the power device's package surface, exposing the internal chip (wafer) and some bonding lines. This first decapsulated area should be large enough to ensure that all areas on the chip that may generate high temperatures are exposed. This large-area decapsulation provides an unobstructed field of view for subsequent comprehensive infrared thermal imaging scanning, ensuring that the true, global temperature distribution on the chip surface can be captured, thereby accurately locating the true temperature peak, which is the basis for subsequent precise measurements.

[0033] Step S10: Obtain the temperature distribution of the power device in the first area after the cover is opened under power-on conditions, and determine the location of the highest temperature point. Existing technologies that directly open a small area or embed thermocouples cannot guarantee that the measurement point is the hottest part of the chip. This step, through "large-area opening + global temperature measurement," can globally and non-contactly scan the entire chip surface to accurately locate the hotspot. This ensures that subsequent verification work uses the most stringent and dangerous junction temperature as a reference benchmark, making the verification results of the junction temperature estimation algorithm more practically protective. This step is fundamental to all subsequent precise operations; without this accurate location, small-area opening will lose its direction, and the measured temperature may not be the true junction temperature, causing the verification reference to become invalid.

[0034] Step S20: Obtain the temperature data of the opening groove of the power device at the highest temperature point where the second area is opened; wherein, the first area is larger than the second area; After determining the highest temperature point of the power device during operation, a similar power device can be selected, and a second area can be opened at the highest temperature point to form an opening groove. The highest temperature point of the power device during operation is exposed within the opening groove. The temperature value of the chip junction region can be obtained by placing a thermal sensor close to the wafer within the opening groove. Compared to large-area opening, the "second area opening" is a minimally invasive process. It only opens a small groove at the already located highest point, just large enough for a thermocouple probe to enter, greatly preserving the original packaging structure and heat diffusion path of the device. Therefore, the measured temperature data is closer to the junction temperature of a normal device without the opening, significantly improving the authenticity and reliability of the verification reference value. The second area is determined by the experimenter. In addition, it can be understood that by inserting the thermocouple probe deep into the small groove and as close to the wafer as possible, this method obtains the direct temperature of the chip junction region. Compared to indirect calculation or simulation, the temperature data obtained by this method is more accurate and has stronger anti-interference ability, providing a near "gold standard" reference benchmark for algorithm verification.

[0035] Step S30: Under preset test conditions, verify the given power device junction temperature estimation algorithm using the temperature data of the power device.

[0036] Reliable temperature data is used as an objective benchmark to measure the output of the junction temperature estimation algorithm. By comparing the results under actual preset test conditions (such as different currents and frequencies), the accuracy of the algorithm under various operating conditions, including transient and steady-state conditions, can be comprehensively evaluated, thereby completing the effective verification and calibration of the algorithm.

[0037] The temperature of a power device under preset test conditions can be estimated using a given power device junction temperature estimation algorithm. This value is then compared with the temperature data within the open-cover groove to verify the accuracy of the given power device junction temperature estimation algorithm. Furthermore, the given power device junction temperature estimation algorithm can be adjusted based on the temperature data to ensure accurate prediction of the power device's junction temperature.

[0038] It is important to emphasize that the core value of this method lies not in the measurement itself, but in using the measurement results to guide and ensure the reliability of the junction temperature estimation algorithm in actual products.

[0039] Furthermore, this invention first locates the point of highest temperature before precisely opening the cover; this avoids the high cost of custom-made pre-embedded thermocouples, using standard commercial components instead. The minimally invasive operation ensures measurement accuracy, overcoming the shortcomings of ordinary cover-opening methods. It achieves the effect of "achieving near-custom-made measurement accuracy at the cost of standard components." While large-area cover opening can obtain more temperature information, it significantly damages the thermal characteristics of the device, distorting the measured data; small-area cover opening, while less invasive, cannot guarantee that the measurement point is a hot spot. This invention combines both approaches, forming the optimal strategy of "global scanning guiding local precision measurement." First, the key point is found through a "global overview," then measurement is performed through "precise puncture," thus ensuring the representativeness and accuracy of the measurement data while minimizing damage.

[0040] In one example, the actual junction temperature of the power device is detected by opening the cover, which avoids the high cost of customizing special packages from the factory, while direct measurement with an infrared thermometer and thermocouples can provide accurate and reliable junction temperature detection results. Figure 2 shows a schematic diagram of the power device with the cover opened, where Figure (a) is a schematic diagram of a large-area cover opening and Figure (b) is a schematic diagram of a partial cover opening. Figure 3 The images shown are actual photos of the power device with its casing partially open. The left image shows a large-area casing open, while the right image shows a partial casing open. A large-area casing open ensures that the infrared thermometer illuminates the entire wafer, capturing the area with the most severe heat generation. This is crucial for the accuracy of subsequent localized thermocouple temperature measurements. Locating only the highest temperature point before performing partial casing avoids significantly impacting the structural characteristics of the power device while ensuring that the thermocouple measures a relatively accurate junction temperature.

[0041] In one example, an infrared thermometer or thermal imager is used to obtain the temperature distribution of the power device. For example... Figure 4 The diagram shown is a schematic of infrared temperature measurement. Figure 5 The diagram illustrates thermocouple temperature measurement. After extensively opening the power device, solder it into the drive circuit, ensuring it still functions correctly. Then, align the infrared thermometer lens with the opened area of ​​the power device, adjusting the lens focus to clearly illuminate the area within the lens's range. With the drive circuit functioning normally, observe the infrared thermometer display and mark the highest temperature point. At the highest temperature point captured by the infrared thermometer, partially open the device and solder the partially opened power device into the drive circuit, replacing the original extensively opened one. Insert the thermocouple probe into the groove of the opened device, wrapping it with a ceramic tube or other insulating material to prevent direct contact with the wafer and pins. Ensure the insulating material does not affect the probe's thermal conductivity. The drive circuit operates normally, heating the power device. Compare the thermocouple test value with the algorithm's estimated value, continuously adjusting the algorithm parameters to ensure a close match between the estimated and test values.

[0042] This invention discloses a method for verifying a junction temperature estimation algorithm, comprising: acquiring the temperature distribution of a power device with a first open area under power-on conditions, and determining the location of the highest temperature point; acquiring temperature data within the opening groove of a power device with a second open area at the highest temperature point; wherein the first area is larger than the second area; and verifying a given power device junction temperature estimation algorithm using the temperature data of the power device under preset test conditions. This invention achieves low-cost and high-reliability verification of a given power device junction temperature estimation algorithm by first locating the highest temperature point, then accurately opening the device to obtain junction temperature data close to that of a normal device without the opening, and finally using the temperature data.

[0043] In one example, the verification of a given power device junction temperature estimation algorithm, such as Figure 6 As shown, including Step S31: Based on the power device junction temperature estimation algorithm, obtain the temperature estimation data under the preset test conditions; Step S32: Compare the temperature data and the estimated temperature data to verify the given power device junction temperature estimation algorithm.

[0044] The step of "obtaining temperature estimation data under the preset test conditions based on the power device junction temperature estimation algorithm" specifically refers to running the junction temperature estimation algorithm to be verified under the preset test conditions (e.g., specific switching frequency and current value). The algorithm can be a software model based on a thermal network model, thermistor parameters, or any other principle. The algorithm takes the test conditions as input and calculates and outputs a 'temperature estimation data curve' corresponding to the entire test process in real time. This output is typically a time-series curve, not just an isolated steady-state value. This curve fully reflects the changes in the junction temperature predicted by the algorithm throughout the transient (heating up, cooling down) and steady-state processes.

[0045] The preset test conditions are determined by the experimenters and may include electrical conditions such as switching frequency, duty cycle, conduction current, and bus voltage, or environmental and heat dissipation conditions such as ambient temperature and heat sink performance. By ensuring that the test conditions corresponding to the power device junction temperature estimation algorithm are the same as the actual test conditions of the power device, the algorithm estimation and the actual test are compared under completely consistent operating conditions. This eliminates comparison errors caused by different input conditions and ensures the fairness, accuracy, and repeatability of the verification results.

[0046] The step of 'comparing the temperature data and the estimated temperature data to verify the given power device junction temperature estimation algorithm' specifically includes a systematic analysis and decision-making process.

[0047] First, conduct multi-dimensional comparative analysis, such as: 1. Qualitative graphical comparison, superimposing two curves to comprehensively evaluate the overall consistency between the transient response process and the steady-state stage; 2. Quantitative error calculation, including but not limited to calculating key indicators such as steady-state error and root mean square error, to provide objective data support for judgment.

[0048] Subsequently, a verification decision is made based on the comparison results: if the qualitative analysis shows that the curve fits well and the error values ​​of the quantitative analysis are all within the preset tolerance range, then the junction temperature estimation algorithm is deemed to have passed verification and is confirmed to be accurate and reliable. Otherwise, the verification is deemed to have failed, and this conclusion also indicates that the model or parameters of the algorithm need to be calibrated and optimized.

[0049] This example constructs a complete closed loop from 'data comparison' to 'authoritative verification'. By transforming subjective engineering judgments into objective data analysis, it provides a reliable and accurate algorithm performance adjudication mechanism for this invention. This not only filters out inaccurate algorithms but also points the way for algorithm optimization, ultimately ensuring that the verified junction temperature estimation algorithm can provide timely and reliable over-temperature protection in practical applications. The specific preset test conditions shall be determined by the experimenters, and the present invention does not impose any restrictions.

[0050] In one example, the preset test conditions include: switching frequency; The verification method for the junction temperature estimation algorithm also includes: The given power device junction temperature estimation algorithm is verified by using the temperature data of the power device under a preset switching frequency condition.

[0051] This example uses the switching frequency as a key and independent test variable to verify the accuracy of the junction temperature estimation algorithm under different switching loss conditions.

[0052] Specifically, keeping other test conditions (such as current value, bus voltage, and heat dissipation environment) unchanged, a first preset switching frequency is set (e.g., f1 = 10kHz). Under this condition, the power device is operated, and the first actual temperature data within the open-cover groove is collected simultaneously. The junction temperature estimation algorithm is then run to obtain the first estimated temperature data, verifying the accuracy of the algorithm at this frequency. After completing the first frequency test, the switching frequency in the test conditions is changed to a second preset switching frequency (e.g., f2 = 20kHz). This frequency should be significantly different from the first frequency to produce a distinguishable change in switching losses. Similarly, at this new frequency, keeping other conditions unchanged, the power device is operated, and the second actual temperature data is collected simultaneously. The algorithm is then run to obtain the second estimated temperature data, and the comparison is performed again for verification.

[0053] If the algorithm's estimated data and measured data match well across multiple switching frequencies, the algorithm is considered insensitive to changes in switching frequency (i.e., changes in switching losses), exhibiting high robustness and passing the verification. If the algorithm performs well at one switching frequency but shows significant deviations at another, the algorithm fails to accurately model the thermal dynamics related to switching losses, and the verification fails. This indicates that the algorithm's model (such as thermal resistance / capacity parameters) or loss calculation module needs optimization to account for the impact of switching frequency.

[0054] Switching frequency directly determines the switching losses of power devices, and switching losses are one of the main causes of junction temperature rise. This invention uses the switching frequency as an independent preset test condition to specifically verify the accuracy of the junction temperature estimation algorithm's modeling of switching losses and their resulting thermal effects. This solves the problem in existing technologies of difficulty in evaluating the algorithm's performance under varying switching frequencies.

[0055] In another example, the preset test conditions include: current value; The verification method for the junction temperature estimation algorithm also includes: The given power device junction temperature estimation algorithm is verified by using the temperature data of the power device under preset current conditions.

[0056] This example uses the current value as an independent and critical control variable to evaluate the adaptability and accuracy of the junction temperature estimation algorithm under different conduction losses and operating points.

[0057] The specific steps are as follows: Keep other test conditions (such as switching frequency, bus voltage, and heat dissipation environment) constant, and set a first preset current value (e.g., I1 = 20A). Under these conditions, run the test system, synchronously collect the first actual temperature data of the thermocouple, and run the junction temperature estimation algorithm to obtain the first estimated temperature data. Then verify the accuracy of the algorithm at this current point. After completing the first current test, change the current value in the test conditions to a second preset current value (e.g., I2 = 40A). This current value should have a sufficient difference from the first current value to significantly change the conduction loss and junction temperature level of the device. Under the premise that other conditions remain unchanged, run the test again, synchronously collect the second actual temperature data, run the algorithm to obtain the second estimated temperature data, and compare and verify the results.

[0058] If the algorithm's estimated data and measured data remain highly consistent under multiple differentiated current conditions (i.e., all data pass verification), it proves that the algorithm maintains accurate estimation over a wide range of load currents (i.e., a wide range of conduction losses), demonstrating excellent robustness, and the verification is successful. If the algorithm exhibits a significant increase in estimation deviation at one or more current points, it is determined that the algorithm fails to accurately characterize the nonlinear thermal behavior caused by current changes, and the verification fails. This indicates that the algorithm's model (such as the temperature dependence of thermal resistance parameters and the accuracy of conduction loss calculation) has defects and requires targeted calibration.

[0059] Load current is the core factor determining the conduction loss of power devices, and conduction loss is the main heat source for steady-state junction temperature. This invention, by systematically changing the current value, can accurately verify the accuracy of the junction temperature estimation algorithm in calculating conduction loss, as well as its modeling ability for potential thermal resistance nonlinearities (such as the reverse effect of junction temperature on thermal resistance). This solves the problem of existing technologies struggling to evaluate the accuracy of algorithms across the entire operating current range.

[0060] The verification of the given power device junction temperature estimation algorithm then includes: The power device junction temperature estimation algorithm is adjusted so that the temperature estimation data corresponding to the adjusted power device junction temperature estimation algorithm is consistent with the actual temperature data.

[0061] It is readily understood that this invention provides junction temperature data for a power device that is close to its unopened state by acquiring temperature data within the opening groove of the power device with a second area opening at the highest temperature point. Besides using the temperature data to verify whether a given power device junction temperature estimation algorithm meets the requirements, the parameters within the power device junction temperature estimation algorithm can also be adjusted using the temperature data to ensure that the temperature estimation data corresponding to the adjusted power device junction temperature estimation algorithm is consistent with the actual temperature data.

[0062] First, conduct deviation analysis and parameter positioning. If the deviation is mainly manifested as an overall shift in steady-state values, the problem may lie in inaccurate calculations of the algorithm's thermal resistance parameters (such as Rth-JC) or steady-state losses. In this case, adjustments should focus on these steady-state parameters. If the deviation is mainly manifested as inconsistent transient response rates (e.g., heating rates much faster or slower than measured curves), the problem may lie in inaccurate calculations of the algorithm's heat capacity parameters (Cth-JC). In this case, adjustments should focus on these dynamic parameters. If the deviation exhibits different characteristics under different test conditions (e.g., different currents and frequencies), then a comprehensive adjustment of the algorithm's loss model and thermal model parameters is necessary.

[0063] Based on the deviation analysis, the internal model parameters of the power device junction temperature estimation algorithm are adjusted. For example, if the steady-state estimate is too low, the junction-to-shell thermal resistance (Rth-JC) value in the algorithm model is appropriately increased; if the transient response is too slow, the heat capacity (Cth-JC) value is appropriately decreased. Using the same set of measured temperature data (or new data collected under the same preset test conditions in a new round), the adjusted power device junction temperature estimation algorithm is run again to obtain new temperature estimation data. The new estimation data is compared with the measured data again, and the verification process is repeated, forming a closed-loop iterative process of "verification-analysis-adjustment-re-verification".

[0064] The iteration process ends when the temperature estimation data output by the adjusted algorithm fully matches the measured temperature data in both transient and steady-state conditions, meaning that the curve matching degree and error index of the two meet the preset qualification standards. At this point, the goal of "the temperature estimation data corresponding to the adjusted power device junction temperature estimation algorithm is consistent with the actual temperature data" has been achieved.

[0065] This invention deeply integrates highly reliable direct temperature measurement with the algorithm development process, providing a calibration environment based on measured data as the gold standard. This transforms algorithm parameter adjustments from "blind tuning" based on guesswork or simulation into data-driven, goal-oriented precision calibration, significantly improving the efficiency and accuracy of algorithm development. This method not only validates mature algorithms but also powerfully assists in the development and refinement of immature algorithms. Even an algorithm with poor initial accuracy can be gradually calibrated into a high-precision, reliable algorithm using the key deviation information provided by this method. This significantly expands the application scenarios and practical value of this invention.

[0066] The present invention also proposes a storage medium storing a verification power device junction temperature estimation algorithm program, which, when executed by a processor, implements the steps of the junction temperature estimation algorithm verification method.

[0067] The storage medium can be any known or future-developed non-transitory (non-volatile) computer-readable medium capable of storing program instructions. Specific forms include, but are not limited to: read-only memory (ROM), random access memory (RAM), flash memory, solid-state drive (SSD), hard disk drive (HDD), or optical disc (such as CD-ROM, DVD-ROM), etc.

[0068] This invention also proposes a junction temperature algorithm verification system, including... Temperature sensor, thermal imager, control module, and power supply test module; The power supply test module is used to electrically connect power devices and provide the current corresponding to preset test conditions; The thermal imager is used to acquire thermal images of the power devices; The temperature sensor is used to acquire temperature data within the opening groove of the power device; The control module is connected to the temperature sensor and the thermal imager respectively, and acquires the thermal image and the temperature data; The control module is also connected to the controlled terminal of the power device and is used to control the switching frequency of the power device. The control module also verifies the given power device junction temperature estimation algorithm by using the temperature data of the power device under preset test conditions.

[0069] It is easy to understand that the power supply test module is electrically connected to the power device to be verified. Its core function is to receive instructions from the control module, provide the current corresponding to the precise and controllable preset test conditions, drive the power device to work, and simulate its real operating state. It can provide repeatable and precise electrical stress conditions required for the verification process to stimulate the thermal behavior of the power device.

[0070] In the first step of the verification process, the thermal imager acquires a thermal image of the power device after the first area of ​​the cover is opened. This thermal image is transmitted to the control module for visualization and analysis of the temperature distribution across the entire chip surface, thereby determining the location of the highest temperature point. This enables non-contact, full-field, and rapid localization of hot spots on the chip, providing a prerequisite for subsequent precise positioning measurements.

[0071] In the second step of the verification process, a temperature sensor is used to acquire temperature data within the opening recess of the power device where the second area is opened at the highest temperature point. This sensor directly measures the temperature near the chip junction region, providing highly reliable, real-world temperature data. It provides a direct junction temperature measurement as a verification benchmark, ensuring the accuracy of the verification reference source.

[0072] The control module is connected to both the temperature sensor and the thermal imager to acquire the thermal image and temperature data. On one hand, the control module is also connected to the controlled terminal (such as the gate drive circuit) of the power device to directly or indirectly control the switching frequency of the power device. On the other hand, it sends test commands to the power supply test module to control its output of a specific current. The control module, with a built-in or external processing unit, runs a dedicated program to verify a given power device junction temperature estimation algorithm using the temperature data of the power device under preset test conditions. Specifically, it executes the algorithm to obtain estimated data, compares and analyzes it with the measured data from the temperature sensor, and finally outputs the verification result.

[0073] This invention transforms the abstract verification method into a concrete, functionally defined hardware system. Through the collaborative work of its modules, the system can automatically and completely reproduce the entire process of the aforementioned method.

[0074] The present invention does not limit the type of temperature sensor. Preferably, the temperature sensor may include a thermocouple probe; the thermocouple probe is wrapped with insulating material and isolated from the pins of the power device.

[0075] The temperature sensor is preferably a thermocouple probe. Thermocouples operate based on the Seebeck effect and offer advantages such as a wide temperature range, fast response, low cost, and the ability to be manufactured in extremely small sizes, making them ideal for point temperature measurement within narrow, open-top recesses. The metal portion of the thermocouple probe (such as the nickel-chromium-nickel-silicon wire of a K-type thermocouple) is completely encased in insulating material. This is a crucial safety and measurement measure. Its purpose is to prevent direct contact between the thermocouple's metal probe and the chip surface, internal bonding wires, or pins of the power device, avoiding electrical short circuits that could burn out the device or cause measurement accidents. It also provides mechanical support and protection for the delicate thermocouple wire, preventing it from breaking during installation or vibration.

[0076] The insulating material includes ceramics, specifically, it can be in the form of a ceramic tube or a ceramic coating.

[0077] Ceramic is an excellent electrical insulator, effectively withstanding potential high voltage differences between power device pins and the chip, ensuring electrical safety. Furthermore, ceramic can withstand high temperatures exceeding 150°C or even 200°C at the junction temperature of power devices without melting or decomposing, guaranteeing long-term reliability under high-temperature testing. Ceramic also has relatively good thermal conductivity. This means it does not create an excessive thermal barrier between the thermocouple probe and the chip, allowing for rapid heat transfer from the chip to the probe, thus ensuring accurate temperature measurement and fast response.

[0078] The control module sends a test command to the power supply test module, and controls the power supply test module to output the current corresponding to the test command.

[0079] It is readily understood that the control module, acting as the system's command center, actively sends test commands to the power supply test module via a communication bus (such as CAN, USB, or Ethernet) or analog / digital I / O ports. This command is a digital or analog signal encoding the desired output current value (e.g., the command "I_set=30A"). The power supply test module receives and parses this test command, and through its internal sophisticated current control circuitry (such as a power source employing closed-loop feedback), outputs a precise and stable current corresponding to the test command, such as a 30A DC or pulsed current, to the power devices.

[0080] In another feasible example of the invention, such as Figure 7 As shown, firstly, a large area of ​​the power device is opened, and then the opened power device is soldered into the drive circuit. An infrared thermometer (or thermal imager) is used to irradiate the opened area, and a large current is used to drive the circuit to continuously increase the normal operating temperature of the power device. The infrared temperature measurement interface is observed to determine the highest temperature point of the power device. Then, based on the found highest temperature point, a small area of ​​the device is opened again to reduce the impact of opening the device on the thermal resistance characteristics of the power device. The newly opened power device is used to replace the original large-area opened power device and is soldered into the drive circuit. A thermocouple is inserted into the groove of the opened device (a ceramic tube can be used for insulation) to keep the probe as close to the wafer as possible and fix it with high-temperature tape. At the same time, thermal imaging is used to assist in temperature measurement to ensure that the temperature measurement results of the two are not too far apart. The test data is saved and a curve is plotted and compared with the estimated data curve. The algorithm parameters are adjusted so that the junction temperature estimation curve and the measured curve are closely matched in both transient and steady state. After the algorithm's estimated value and the test value are basically consistent, the switching frequency is kept constant while the current is changed to continue testing. The switching frequency is changed while the current is kept constant to ensure that the estimated value and the actual test value are basically consistent under the same set of algorithm parameters. Only in this way can the junction temperature estimation algorithm be fully verified and ensure that the verified junction temperature estimation algorithm can provide timely and reliable over-temperature protection.

[0081] The above description is merely an optional embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A method for verifying a junction temperature estimation algorithm, characterized in that, include Obtain the temperature distribution of the power devices in the first area after the cover is opened under power-on conditions, and determine the location of the highest temperature point; Acquire temperature data within the opening groove of the power device at the highest temperature point where the second area is opened; wherein the first area is larger than the second area; The given power device junction temperature estimation algorithm is verified using the temperature data of the power device under preset test conditions.

2. The method for verifying the junction temperature estimation algorithm as described in claim 1, characterized in that, The verification of the given power device junction temperature estimation algorithm includes: Based on the power device junction temperature estimation algorithm, temperature estimation data under the preset test conditions are obtained; The given power device junction temperature estimation algorithm is verified by comparing the temperature data and the estimated temperature data.

3. The method for verifying the junction temperature estimation algorithm as described in claim 2, characterized in that, The preset test conditions include: switching frequency; The verification method for the junction temperature estimation algorithm also includes: The given power device junction temperature estimation algorithm is verified by using the temperature data of the power device under a preset switching frequency condition.

4. The method for verifying the junction temperature estimation algorithm as described in claim 3, characterized in that, The preset test conditions include: current value; The verification method for the junction temperature estimation algorithm also includes: The given power device junction temperature estimation algorithm is verified by using the temperature data of the power device under preset current conditions.

5. The method for verifying the junction temperature estimation algorithm as described in claim 2, characterized in that, The verification of the given power device junction temperature estimation algorithm then includes: The power device junction temperature estimation algorithm is adjusted so that the temperature estimation data corresponding to the adjusted power device junction temperature estimation algorithm is consistent with the actual temperature data.

6. A storage medium, characterized in that, The storage medium stores a verification power device junction temperature estimation algorithm program, which, when executed by a processor, implements the steps of the junction temperature estimation algorithm verification method as described in any one of claims 1 to 5.

7. A junction temperature algorithm verification system, characterized in that, include Temperature sensor, thermal imager, control module, and power supply test module; The power supply test module is used to electrically connect power devices and provide the current corresponding to preset test conditions; The thermal imager is used to acquire thermal images of the power devices; The temperature sensor is used to acquire temperature data within the opening groove of the power device; The control module is connected to the temperature sensor and the thermal imager respectively, and acquires the thermal image and the temperature data; The control module is also connected to the controlled terminal of the power device and is used to control the switching frequency of the power device. The control module also verifies the given power device junction temperature estimation algorithm by using the temperature data of the power device under preset test conditions.

8. The junction temperature algorithm verification system as described in claim 7, characterized in that, The temperature sensor includes a thermocouple probe; the thermocouple probe is wrapped in insulating material and isolated from the pins of the power device.

9. The junction temperature algorithm verification system as described in claim 8, characterized in that, The insulating material includes ceramics.

10. The junction temperature algorithm verification system as described in claim 7, characterized in that, The control module sends a test command to the power supply test module, and controls the power supply test module to output the current corresponding to the test command.

Images