Sorting anomaly detection method and equipment of test system, medium and product

Abstract

The invention discloses a sorting anomaly detection method and equipment of a test system, a medium and a product, and the method comprises the following steps: testing known normal devices by adopting a test station of a test machine, and sorting the known normal devices by adopting a sorting machine according to a test result; obtaining sorting associated data of each physical station in the testing process and the sorting process, and determining an operation characteristic fingerprint of each physical station according to the sorting associated data; the abnormal detection model is adopted to process the operation characteristic fingerprint of each physical station so as to identify the abnormal condition of each physical station, hidden faults can be identified based on a normal reference, the method can be adapted to a multi-station high-parallelism test scene, extra customized hardware is not needed, the detection efficiency is improved, and the detection cost is reduced. And the multi-dimensional data integrated by the operation characteristic fingerprints can provide an accurate basis for abnormal traceability and correction, so that the troubleshooting cost is reduced, and accurate matching of a logic station and a physical station and authenticity and traceability of test data are guaranteed.

Description

Technical Field

[0001] This invention relates to the fields of automatic test equipment (ATE) configuration verification and micro-electro-mechanical systems (MEMS) device testing technology, and particularly to a method, equipment, medium, and product for detecting sorting anomalies in a test system. Background Technology

[0002] In the final testing stage of semiconductor MEMS devices, the devices must first be tested at the logic station of the testing machine, and then the physical station of the sorting machine sorts the devices into different corresponding boxes (such as qualified device boxes or discard boxes) based on the test results. Precise matching between the logic station of the testing machine and the physical station of the sorting machine is a prerequisite for accurate sorting of qualified chips, correct calculation of product yield, and traceability of test data.

[0003] Currently, the verification methods for workstation matching and related status mainly include: manual verification using continuity testers or workstation probing methods; signal injection hardware solutions using customized hardware such as return boards and dedicated verification fixtures; and methods that only use connectivity verification tools to confirm the connection status of pins and channels. During the New Product Introduction (NPI) phase, comprehensive manual verification is also completed by cross-checking test data.

[0004] However, manual verification methods are only suitable for low-workstation scenarios (scenarios with a small number of workstations), which cannot adapt to the needs of large-scale testing. They are also prone to errors introduced by human operation, which may lead to mapping errors going undetected and reduce the accuracy of anomaly detection. Signal injection hardware solutions require expensive customized hardware, which increases the cost of troubleshooting and introduces new potential fault points. Moreover, they can only verify electrical connectivity, which reduces the reliability of anomaly detection. Connectivity verification tools alone cannot confirm the correct correspondence between logical workstations and physical workstations, nor can they verify the integrity of signal paths after maintenance operations. Furthermore, they cannot verify the configuration accuracy of the underlying test program or pin mapping table, which reduces the reliability of anomaly detection. Summary of the Invention

[0005] This invention provides a sorting anomaly detection method, equipment, medium, and product for a testing system, to solve the problems of sorting anomaly detection being unable to adapt to large-scale testing needs, high fault diagnosis costs, low accuracy, and low reliability of anomaly detection.

[0006] According to one aspect of the present invention, a method for detecting sorting anomalies in a testing system is provided. The testing system includes a testing machine and a sorting machine. The testing machine includes multiple logical stations, and the sorting machine includes multiple physical stations. The logical stations and physical stations are connected in a one-to-one correspondence. The method includes:

[0007] The test station of the test machine is used to test known normal devices, and the sorting machine is used to sort the known normal devices according to the test results; the sorting correlation data of each physical station during the testing process and the sorting process is obtained, and the operation characteristic fingerprint of each physical station is determined according to the sorting correlation data; the anomaly detection model is used to process the operation characteristic fingerprint of each physical station in order to identify the abnormal situation of each physical station.

[0008] According to another aspect of the present invention, a sorting anomaly detection device for a testing system is provided. The testing system includes a testing machine and a sorting machine. The testing machine includes multiple logical stations, and the sorting machine includes multiple physical stations. The logical stations and physical stations are connected in a one-to-one correspondence. The device includes:

[0009] The test and sorting module is used to test known normal devices using the test station of the test machine, and to sort the known normal devices using the sorting machine based on the test results; the feature fingerprint module is used to acquire the sorting correlation data of each physical station during the test and sorting process, and to determine the operating feature fingerprint of each physical station based on the sorting correlation data; the anomaly identification module is used to process the operating feature fingerprint of each physical station using an anomaly detection model to identify the anomalies of each physical station.

[0010] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0011] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the sorting anomaly detection method of the test system according to any embodiment of the present invention.

[0012] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions, the computer instructions being configured to cause a processor to execute and implement the sorting anomaly detection method of the test system according to any embodiment of the present invention.

[0013] According to another aspect of the present invention, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps of the method as described in any embodiment of the present invention.

[0014] The technical solution of this invention employs a testing station on a testing machine to test known normal devices, followed by sorting by a sorting machine. It acquires sorting correlation data from each physical station during testing and sorting to construct a unique operational feature fingerprint. This fingerprint is then processed by an anomaly detection model to identify anomalies. This not only improves the accuracy and reliability of anomaly detection and reduces the risk of device misjudgment by identifying hidden faults such as signal path misalignment, inconsistent sorting results, and incomplete testing procedures based on normal benchmarks, but also overcomes the limitations of traditional manual inspection on the number of stations. It can adapt to multi-station, high-parallelism testing scenarios, meeting the needs of large-scale production. Furthermore, it eliminates the need for additional customized hardware, improving testing efficiency and reducing production line downtime losses. The multi-dimensional data integrated by the operational feature fingerprint provides accurate evidence for anomaly tracing and correction, reducing fault diagnosis costs and ensuring accurate matching between logical and physical stations, as well as the authenticity and traceability of test data. This lays the foundation for product yield calculation and process optimization.

[0015] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart of a sorting anomaly detection method for a testing system according to Embodiment 1 of the present invention;

[0018] Figure 2 This is a flowchart of another sorting anomaly detection method for a testing system provided according to Embodiment 2 of the present invention;

[0019] Figure 3 This is a flowchart of a sorting anomaly detection method for a testing system according to Embodiment 3 of the present invention;

[0020] Figure 4 This is a visual schematic diagram of a processor tray grid with abnormal sites and pop-up dialog boxes applicable to an embodiment of the present invention;

[0021] Figure 5 This is a schematic diagram of the structure of a sorting anomaly detection device for a testing system according to Embodiment 4 of the present invention;

[0022] Figure 6This is a schematic diagram of the structure of an electronic device that implements the sorting anomaly detection method of the test system in this embodiment of the invention. Detailed Implementation

[0023] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0024] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0025] Example 1

[0026] Figure 1 This is a flowchart of a sorting anomaly detection method for a testing system according to Embodiment 1 of the present invention. This embodiment is applicable to detecting whether a sorting anomaly exists in a testing system. The method can be executed by a sorting anomaly detection device of the testing system, which can be implemented in hardware and / or software and is generally configured in an electronic device. The testing system includes a testing machine and a sorting machine. The testing machine includes multiple logical stations, and the sorting machine includes multiple physical stations, with each logical station and physical station connected in a one-to-one correspondence.

[0027] In this embodiment of the invention, the testing system can be specifically understood as an integrated automated testing and sorting system for the final testing stage of semiconductor MEMS devices, consisting of a testing machine and a sorting machine, with functions of device testing, result judgment, and classification screening. The testing machine can be specifically understood as a device used to test the electrical performance and functional parameters of semiconductor MEMS devices, achieving test signal transmission and data acquisition through logic stations. The sorting machine can be specifically understood as a device that, based on the test results output by the testing machine, sorts the devices to corresponding boxes (such as qualified boxes, boxes of different grades, or discard boxes), completing the mechanical sorting operation of the devices through physical stations.

[0028] A logical workstation can be understood as a virtual functional unit within the testing machine, used to carry specific test programs, send test commands, and collect test data. It is the logical implementation carrier of the test functions and has independent test parameter configuration and data processing capabilities. A physical workstation can be understood as a physical operating unit on the sorting machine, possessing the physical structure of mechanically clamping and conveying devices. It can sort corresponding devices to the target position according to received commands and is the physical execution carrier of the sorting action.

[0029] The association established between each logical workstation and a physical workstation can include a dedicated correspondence for signal transmission, data communication, and instruction execution, ensuring that the test results of a certain logical workstation only drive the corresponding physical workstation to perform sorting operations.

[0030] Specifically, the testing system consists of a testing machine and a sorting machine. The testing machine is equipped with multiple independent logical stations, each of which is used to perform a specific device testing task. The sorting machine is equipped with physical stations that match the number of logical stations, and each physical station performs a sorting operation. The system establishes a unique association between logical stations and physical stations, so that after each logical station completes the device test, it transmits the test results to the corresponding physical station. The physical station only responds to the instructions issued by the matched logical station, thereby realizing the correspondence between testing and sorting actions.

[0031] Correspondingly, such as Figure 1 As shown, the method includes:

[0032] S110. The known normal devices are tested using the test station of the test machine, and the known normal devices are sorted using the sorting machine according to the test results.

[0033] In this embodiment of the invention, the test station can be specifically understood as: the logical station of the test machine, which is a virtual unit that carries the test function, and has the ability to send test signals, execute test programs, and collect test data, and is used to complete the performance and parameter detection of the device. A known normal device can be specifically understood as: a semiconductor MEMS device that has been pre-verified and confirmed to meet all standard requirements for performance indicators and functional parameters, and has no faults or abnormalities; its test results can be used as a normal benchmark.

[0034] Specifically, a known, qualified device is selected as the test object. The logic station (test station) of the test machine executes a preset test procedure on it, sends test signals and collects test data through a preset communication interface, and compares and analyzes the test data with preset standard parameter thresholds to obtain the test result (such as qualified, unqualified or specific sorting level).

[0035] After testing, the testing machine transmits the test results to the sorting machine. Based on the test results, the sorting machine initiates the sorting process, using the corresponding physical stations to sort the known normal components to their matching target locations, thus completing the linked operation of testing and sorting. For example, the testing machine transmits the pass / fail test results and the corresponding sorting code to the sorting machine. Based on these test results, the sorting machine uses the physical stations corresponding to the logical stations to sort the known normal components to the boxes corresponding to the pass / fail components.

[0036] S120. Obtain sorting association data of each physical station during the testing and sorting process, and determine the operation feature fingerprint of each physical station based on the sorting association data.

[0037] In this embodiment of the invention, sorting-related data can be specifically understood as: multi-source heterogeneous data generated throughout the entire testing and sorting process that is directly related to the operation of the physical workstation, and is the original data characterizing the operating status of the workstation. Operating feature fingerprint can be specifically understood as: a set of multi-dimensional features extracted based on the sorting-related data that can identify the normal operating mode of the physical workstation. Specifically, multi-source heterogeneous data can be understood as: data from different devices (testing machines or sorting machines), different interfaces, or different formats, which may include instruction-type, event-type, communication-type, status-type, and result-type data.

[0038] Specifically, during the linkage process of the tester testing known normal devices through the logic station and the sorter performing sorting through the physical station, the sorting-related data (such as instruction logs, test parameters, communication messages and sorting results, etc., multi-source heterogeneous data) corresponding to each physical station are collected synchronously through the preset communication interface.

[0039] The collected raw data is organized, filtered, and standardized. For example, multi-source heterogeneous data is associated and mapped according to the matching relationship between logical workstations and physical workstations. Multi-source heterogeneous data from different preset communication interfaces of the testing machine and sorting machine are classified and collected according to the physical workstation number. Invalid and redundant data in the dataset (such as repeatedly transmitted messages, incomplete data caused by abnormal interruption, or extreme data exceeding reasonable thresholds) are removed. Data with different formats and dimensions are uniformly converted and normalized.

[0040] Understandably, feature extraction methods can be flexibly adopted according to the processing requirements of the subsequent anomaly detection model: for the independent operating status representation of a single physical workstation, extract the workstation's unique features (such as its own workstation identifier, parameter test data, and sorting matching flag bits) from the processed data to construct the operating feature fingerprint of a single workstation; for scenarios that require joint consideration of multiple workstations (such as detecting signal interference between workstations or overall mapping logic anomalies), on the basis of extracting the unique features of each individual workstation, further integrate the associated data of multiple related physical workstations (such as communication interaction data and mapping relationship data between workstations) to supplement and construct joint features that are incorporated into the operating feature fingerprint of each workstation or form an overall feature set.

[0041] Optionally, based on the above embodiments, the sorting-related data may include at least one of the following: sorting machine instructions, testing machine events, communication data between the sorting machine and the testing machine, user interface status of the sorting machine, user interface status of the testing machine, parameter test results of the logical workstation, standard test data format records of test metadata, and sorting result data.

[0042] In this embodiment of the invention, the standard test data format record can be specifically understood as an STDF (Standard TestData Format) file, a common test data storage format in the semiconductor testing field, which can specifically include test metadata (such as test items, thresholds, and units) and test results. The sorting result data can be specifically understood as standardized fields (such as sorting level or target box identifier) ​​generated by the sorting machine after performing sorting based on the test results and can be parsed from the log. The test metadata can be specifically understood as structured data describing the test process and test result attributes, which can include contextual information used to define, interpret, and manage the test data.

[0043] Specifically, the sorting-related data refers to the multi-source heterogeneous raw data generated during the coordinated operation of the testing machine (corresponding to the logical station) and the sorting machine (corresponding to the physical station). This data may include at least one of the following: instruction information from the sorting machine (i.e., sorting machine instructions, such as controlling physical station 143 to sort qualified devices to qualified bin number 2); the test machine's recorded operation event log (i.e., test machine events, such as at 10:23:45, logical station 89 completes device testing, and the testing process status is successful); interactive communication data transmitted between the sorting machine and the testing machine through a preset communication interface (i.e., communication data between the sorting machine and the testing machine, such as sending the test result (qualified) and target bin (number 2) instruction from logical station 89 to the corresponding physical station 143 through the preset communication interface); real-time status data of the sorting machine's user interface (i.e., the sorting machine's user interface status, such as the sorting machine's user interface showing that physical station 143 is performing a sorting action, the current sorting target is bin number 2, and 125 devices have been sorted); and data from the testing machine's... The system includes real-time status data of the user interface (i.e., the user interface status of the tester, such as the tester user interface showing that logic station 89 is in automatic test mode, the current test item is voltage detection, and the cumulative test yield is 98.5%), parameter test results output by the logic station after testing the device (i.e., the parameter test results of the logic station, such as the test parameter results of logic station 89 for device number 2025001, voltage 3.2 volts, current 0.8 amperes, both within the qualified threshold range, the result is qualified), test metadata records stored in standard test data format (i.e., standard test data format records of test metadata, such as test program version, logic station number executing the test, test item name, parameter unit, threshold range and test timestamp, etc.), and sorting result data containing the corresponding fields and values ​​of the test results that can be parsed from the log (e.g., the record that the sorting result of physical station 143 for device 2025001 is qualified, sorted to bin number 2, and the corresponding sorting timestamp).

[0044] It should be noted that these data are not the final running feature fingerprints. Subsequent processing will extract features based on these data, and this part of the original data can be reduced according to the feature extraction requirements.

[0045] By encompassing various types of information, including sorting machine instructions, testing machine events, inter-device communication data, human-machine interface status, logical workstation parameter test results, standard format test metadata, and sorting result data, the system ensures comprehensive and multi-dimensional data collection, fully covering key aspects of the entire testing and sorting process and providing multi-dimensional support for constructing operational feature fingerprints. Furthermore, it characterizes the physical workstation's operational status from different perspectives, such as instruction linkage, program execution, and real-time status. Features extracted from this data can cover various anomaly types, including signal path errors, workstation mapping deviations, and inconsistent sorting results, improving the accuracy and coverage of anomaly detection. Simultaneously, standardized data containing standard test data format records forms a complete data link from testing to sorting, facilitating reverse tracing to pinpoint specific stages and causes when anomalies occur, improving tracing efficiency. Moreover, this data is native equipment operation data, requiring no additional customized hardware, and is compatible with different brands and models of testing and sorting equipment, enhancing the versatility and compatibility of the technical solution in different mass production scenarios and reducing system deployment and adaptation costs.

[0046] Optionally, based on the above embodiments, the operational feature fingerprint may include at least one of the following: physical station identifier, logical station identifier, sorting machine instruction identifier, parameter test data, deviation statistics of parameter test data, running time data, sorting result data, sorting matching flag bit, signal path matching flag bit, and total parameter deviation flag bit.

[0047] In this embodiment of the invention, the deviation statistics can be specifically understood as: derived data obtained after statistical analysis of the original parameter test data, such as the mean, standard deviation, or extreme value deviation of the test results, used to quantify the degree to which the data deviates from the baseline state. The sorting matching flag can be specifically understood as: a feature field used to identify whether the test result of the logical workstation is consistent with the sorting action of the corresponding physical workstation, which can be in the form of "0 or 1" or "match or not match", etc.

[0048] The signal path matching flag can be understood as a feature identifier used to characterize whether the signal transmission path between the logical workstation of the test machine and the physical workstation of the sorting machine is normally connected and whether the data interaction is accurate. The total parameter deviation flag can be understood as a comprehensive identifier generated based on the deviation statistics of multiple parameter test data, used to determine whether the overall operating parameters of the workstation exceed the normal threshold range.

[0049] Specifically, the operational feature fingerprint is a multi-dimensional feature set that characterizes the operational status of physical workstations, formed by feature extraction and integration based on sorting-related data that has been sorted, filtered, and standardized. It can include at least one feature: physical workstation identifier and logical workstation identifier for locating the workstation; sorting machine instruction identifier for tracing the source of instructions and reflecting the execution status of equipment instructions; original parameter test data for directly reflecting the device test performance; derived data calculated based on the original parameter test data (such as deviation statistics data for quantifying the degree of data deviation, such as the mean, standard deviation, and extreme value deviation of test results, as well as various status identifiers such as sorting matching flag bits, signal path matching flag bits, and total parameter deviation flag bits for judging the matching status and parameter compliance); running time data for recording the continuous running time of the workstation; and sorting result data for reflecting the sorting execution results.

[0050] These features encompass both directly collected raw data and processed derived data, providing a comprehensive characterization of the physical workstation's operating mode from multiple dimensions, including workstation identity, instruction execution, parameter performance, and matching status.

[0051] By employing a multi-dimensional operational feature fingerprint encompassing physical workstation identifiers, logical workstation identifiers, sorting machine instruction identifiers, parameter test data, deviation statistics of parameter test data, running time data, sorting result data, sorting matching flags, signal path matching flags, and total parameter deviation flags, this system achieves precise positioning and differentiation of each workstation through identity-based features, giving the feature fingerprint unique identifiability and avoiding feature confusion between different workstations, thus providing a comparison benchmark for anomaly detection. Furthermore, through features such as parameter test data, deviation statistics, and various matching flags, it covers multiple detection dimensions including test performance deviation, workstation linkage matching status, and continuous operational stability. This allows for the identification of both explicit single-parameter exceedance anomalies and implicit issues such as matching misalignment and performance drift, improving the comprehensiveness and accuracy of anomaly detection. Simultaneously, the various features correspond to key stages of the testing and sorting process, facilitating the location of problematic stages by analyzing specific anomaly feature types when anomalies occur, shortening tracing time and reducing troubleshooting costs. It is adaptable to different testing scenarios, equipment models, and testing requirements, enhancing the versatility and adaptability of the technical solution in different mass production testing environments.

[0052] Optionally, based on the above embodiments, determining the operational feature fingerprint of each physical workstation according to the sorting association data may include:

[0053] The physical workstation identifier in the sorting machine instruction in the sorting association data is determined by matching it with the logical workstation identifier in the test machine event, the user interface status of the test machine, or the test result.

[0054] In this embodiment of the invention, the physical workstation identifier can be specifically understood as: the physical workstation number attached to the operation instruction issued by the sorting machine to specify the entity workstation to perform the sorting action, such as Physical_Station_143, which represents physical workstation 143 and is the identity identifier of the physical workstation.

[0055] The logical workstation identifier can be specifically understood as: the virtual workstation number (such as Logic_Station_89, representing logical workstation 89) attached to the test machine event log, user interface status, and test results, which is used to identify the execution of the test task. It is the identity identifier of the logical workstation.

[0056] Specifically, the physical station identifier to be matched is extracted from the sorting machine instructions of the sorting association data as an index for data aggregation. The corresponding logical station identifier is extracted from the test machine side data sources such as test machine events, test machine user interface status, or test results. According to the preset correspondence between physical and logical stations, the two types of identifiers are matched and associated to ensure that the test machine side data corresponding to each physical station is accurately attributed. Then, the operational feature fingerprint is extracted based on the complete data after association.

[0057] By matching the physical station identifier in the sorting machine's instructions with the logical station identifier in the testing machine's events, user interface status, or test results, the operational characteristic fingerprint of the physical station is determined. According to the correspondence between logical and physical stations, data from the testing machine can be bound to the corresponding physical station, avoiding data cross-contamination between different stations and ensuring the completeness and correct attribution of sorting-related data for each physical station. The test sorting data association link established based on this matching method can integrate heterogeneous data belonging to the testing machine and the sorting machine into a complete station operation dataset, enabling the generated operational characteristic fingerprint to... The fingerprint includes both the sorting execution information of the physical workstation and the test operation information of the corresponding logical workstation, strengthening the correlation and completeness of the feature fingerprint. The feature fingerprint based on workstation identification matching can directly reflect the linkage consistency between logical and physical workstations. When data correlation anomalies occur, the fault link can be quickly located, improving the pertinence and efficiency of anomaly detection and tracing. Moreover, this matching method only relies on the original identification data of the equipment, without the need for additional hardware configuration or protocol modification. It can be adapted to test machines and sorting machines of different brands and models, enhancing the versatility and compatibility of the technical solution in different mass production testing scenarios.

[0058] S130. An anomaly detection model is used to process the operational feature fingerprints of each physical workstation in order to identify abnormal situations at each physical workstation.

[0059] In this embodiment of the invention, the anomaly detection model can be specifically understood as: an algorithm model that identifies physical workstation operation anomalies by comparing the differences between baseline features and real-time features based on the operational feature fingerprint constructed from sorting and correlation data, and can be adapted to single-workstation independent detection and multi-workstation joint analysis scenarios.

[0060] Specifically, the benchmark feature can be understood as the operational characteristic fingerprint extracted after testing and sorting at a physical workstation under known normal operating conditions. Its data sources include testing of qualified devices and sorting-related data collected during normal linkage with the sorting machine. This data can include physical or logical workstation identifiers, normal parameter test data, unbiased sorting matching flags, and signal path matching flags, among other full-dimensional features. The benchmark feature serves as the standard for determining whether a workstation is abnormal and can be pre-stored in the model's feature library as a reference benchmark for subsequent comparisons.

[0061] Real-time features can be understood as the operational feature fingerprints collected and extracted from physical workstations in real time during actual mass production testing and sorting processes or after configuration parameters change. The data source is the sorting-related data generated in the current testing and sorting stage, which may include real-time identification information of the physical workstation at that moment, parameter test results, sorting matching status, and signal path status, among other features. Real-time features need to be input into an anomaly detection model and compared dimension-by-dimensionally with baseline features to determine whether the current workstation's operational status is normal.

[0062] Specifically, during the actual mass production test and sorting process or after the configuration parameters change, the operational feature fingerprints of each physical station during the test and sorting process are input into the anomaly detection model. Based on preset verification rules, the anomaly detection model performs targeted comparison and analysis between the real-time operational feature fingerprints and the baseline operational feature fingerprints to identify the anomalies of each physical station.

[0063] For example, when the model compares the real-time running feature fingerprint with the baseline running feature fingerprint, the status of the signal path matching flag bit in the feature fingerprint is extracted and analyzed. If the flag bit shows a mismatch, it is determined that there is an electrical connection fault in the signal transmission link between the corresponding physical station and the logical station, such as poor pin contact or cable breakage. At the same time, the physical station identifier in the sorting machine instruction is extracted and matched with the logical station identifier in the test machine side data to verify whether the two conform to the preset correspondence. If there is an identifier misalignment, many-to-one or one-to-many matching anomaly, it can be confirmed that there is an error in the correspondence between the logical station and the physical station, thereby realizing the rapid determination of electrical connectivity and station correspondence correctness.

[0064] After performing maintenance operations such as cable replacement, interface debugging, or path repair on physical or logical workstations, the real-time operational feature fingerprint of the workstation is collected. The signal path matching flag, parameter test data deviation, and communication interaction response status are verified. If the deviation between the real-time features and the baseline features is within a preset threshold range and the path features are consistent, the maintained signal path is deemed to be complete and capable of stable data transmission and command interaction. If the deviation exceeds the threshold or there are differences in the path features, it indicates that there are still hidden faults in the signal path, and further investigation and maintenance are required.

[0065] The parameter test data is extracted from the real-time running feature fingerprint and matched with the preset test items, parameter thresholds, data units, and pin correspondences in the test metadata. For example, it verifies whether the actual test parameters are consistent with those in the test metadata, whether the units of the test data conform to the metadata definition, and whether the extreme values ​​of the parameters are within the preset threshold range of the metadata. At the same time, it combines the configuration information of the pin mapping table to confirm whether the pin channels corresponding to the test parameters are accurate. If the matching degree between the parameter test data and the test metadata reaches the preset standard, it is determined that the underlying test program and the pin mapping table are configured accurately. If the matching degree is insufficient, such as missing test items, inconsistent parameter thresholds, or misaligned pin channels, it can be determined that the anomaly is caused by an error in the test program version or a misconfiguration of the pin mapping table.

[0066] Optionally, based on the above embodiments, an anomaly detection model is used to process the operational feature fingerprints of each physical workstation, which may include:

[0067] An anomaly detection model is used to match the operational feature fingerprints of each physical workstation with the preset standard feature fingerprints, and the anomaly status and confidence level of each physical workstation are determined based on the similarity matching results.

[0068] In this embodiment of the invention, the standard feature fingerprint can be specifically understood as: the benchmark feature mentioned above is the operational feature fingerprint extracted after collecting and sorting associated data from physical workstations under known normal operating conditions, serving as a benchmark reference for anomaly detection. The confidence level can be specifically understood as: the reliability of the model's determination that a certain physical workstation has an anomaly; the value range can be 0 to 1 or in percentage form. The higher the confidence level, the stronger the accuracy and reliability of the anomaly determination result.

[0069] Specifically, the real-time operational feature fingerprints of each physical workstation are input into the anomaly detection model. The model then performs a dimension-by-dimensional similarity matching between the real-time feature fingerprints and the pre-defined standard feature fingerprints. Based on the feature overlap and deviation calculated during the matching process, the anomaly type and corresponding confidence score of each physical workstation are determined, thereby completing the anomaly detection of the physical workstation's operational status.

[0070] In a specific example, a random forest model that integrates machine learning and rule validation can be used as an anomaly detection model. This model can be trained to run feature fingerprints that are compatible with heterogeneous input feature types such as classification codes, numerical values, and binary tags.

[0071] The real-time collected physical workstation operation feature fingerprints are input into the model. The model extracts the corresponding features (such as physical workstation identifiers, parameter test data, and signal path matching flags) from the real-time feature fingerprints and the standard feature fingerprints. According to the feature weights obtained during training, the deviation degree of each set of corresponding features is calculated (such as calculating the absolute or relative deviation of numerical features, judging whether the classification coding features are consistent, and judging whether the binary flag bits match). Based on the deviation degree and feature weights of each dimension of features, the judgment results of each decision tree are integrated, and the overall similarity between the real-time feature fingerprints and the standard feature fingerprints is automatically output. The higher the similarity, the closer the current workstation operation status is to the normal working condition.

[0072] During the similarity matching process, the model can call the built-in rule verification logic to perform statistical verification on parameter-type features. The real-time parameter test results are compared with the baseline parameter values ​​of the standard feature fingerprint (such as the baseline mean and baseline standard deviation). If the deviation exceeds the preset threshold (such as the baseline standard deviation of the preset multiple), it is judged as a significant deviation and the parameter is marked as abnormal.

[0073] Meanwhile, the model can also traverse the abnormal feature identifiers in the real-time feature fingerprint (such as inconsistent sorting matching flag, misaligned signal path matching flag, significant deviation in total parameter deviation flag, etc.). If multiple abnormal features such as inconsistent sorting results, misaligned signal paths, or parameter test deviations are detected simultaneously, the model calls the preset weighting rules to improve the confidence score corresponding to the detected abnormality. For example, the basic confidence weight of the corresponding abnormality type is superimposed according to a preset ratio (such as increasing the confidence by 50% when two abnormal features are detected and by 80% when three abnormal features are detected). This is to specifically improve the confidence score of composite abnormalities and ensure that the composite abnormality judgment results are more reliable.

[0074] The model combines similarity matching results and anomaly detection results from rule validation to calculate a confidence score. For example, the model converts similarity matching results into a base confidence score (e.g., a base confidence score of 0.05 for 95% similarity, representing normal confidence; and a base confidence score of 0.4 for 60% similarity, representing anomaly confidence). The model extracts the judgment results from the rule validation stage (e.g., single parameter anomaly or multiple overlapping anomaly features) and converts them into a modified confidence score according to preset rules (e.g., a modified confidence score of 0.2 for a single parameter anomaly and 0.5 for multiple overlapping anomaly features). Using a preset fusion algorithm, the base confidence score and the modified confidence score are combined (e.g., weighted summation) to generate the final anomaly confidence score. A higher score indicates a higher reliability of the workstation anomaly.

[0075] An anomaly detection model matches the operational feature fingerprints of each physical workstation with pre-defined standard feature fingerprints based on similarity. The model then determines anomalies and confidence levels based on the matching results. This approach not only identifies anomalies based on the overlap and deviation of features across all dimensions, reducing misjudgments caused by random fluctuations and accurately locating physical workstations that deviate from standard operating conditions, thus improving the accuracy of anomaly detection, but also quantifies the anomaly determination results through confidence levels. This distinguishes between high-confidence definitive anomalies and low-confidence suspected anomalies, enhancing the credibility of the anomaly determination results. Furthermore, the pre-defined standard feature fingerprints provide a unified benchmark for normal operating conditions. Combined with the model's automated matching and determination, this replaces the tedious process of manual comparison, enabling standardized and automated anomaly detection across multiple physical workstations in large-scale mass production scenarios, thus improving detection efficiency. In addition, the feature differences presented during the similarity matching process, combined with confidence scores, can quickly determine the source of anomaly features, providing guidance for subsequent root cause diagnosis using deterministic validators, feature value analysis, and other methods, shortening the fault diagnosis cycle.

[0076] Optionally, based on the above embodiments, an anomaly detection model is used to perform similarity matching between the operational feature fingerprints of each physical workstation and preset standard feature fingerprints. This may include:

[0077] An anomaly detection model is used to perform similarity matching between the operational feature fingerprints of each physical workstation and the preset standard feature fingerprints in order to obtain the similarity of the corresponding attribute bit data in the feature fingerprints.

[0078] Accordingly, the sorting anomaly detection method of the test system may further include: analyzing each physical workstation based on the similarity matching results of each attribute bit data to determine the cause of the anomaly and / or adjustment plan.

[0079] In this embodiment of the invention, the attribute bit data can be specifically understood as: the smallest independent feature unit constituting the operational feature fingerprint, each attribute bit corresponding to a specific workstation operation parameter or status identifier, such as physical workstation identifier code, logical workstation identifier code, parameter test data value, signal path matching flag bit status, and sorting matching flag bit status, etc.

[0080] Specifically, the real-time collected physical workstation operation feature fingerprints are input into the anomaly detection model. The model deconstructs the real-time feature fingerprints and the preset standard feature fingerprints, extracting all corresponding attribute bit data from the two sets of fingerprints (such as physical and logical workstation identification codes, parameter test data values, signal path matching flag bits, and sorting matching flag bit status, etc.). For different types of attribute bit data, preset rule-based calculation logic is called (such as calculating the deviation rate between the real-time value and the benchmark parameter value for numerical attribute bits, judging whether the real-time state is consistent with the standard state for binary flag bits, and judging whether the code matches for classification coding attribute bits, etc.), and calculating the similarity of each set of corresponding attribute bit data.

[0081] Correspondingly, the similarity values ​​of each attribute are compared with the preset normal similarity threshold, and abnormal attribute positions with similarity values ​​below the threshold are filtered out.

[0082] The types of these abnormal attribute bits (such as physical or logical workstation identifiers, signal path matching flags, parameter test data, and sorting result consistency markers) and their relationships are integrated and analyzed. Combined with preset fault mapping rules, the specific abnormal cause of the physical workstation is located. For example, if the similarity of the attribute bits of the signal path matching flags is 0 and there is a significant deviation in the parameter test data, it is determined to be an electrical connectivity fault. If the attribute bits of the physical and logical workstation identifiers do not match, it is determined to be an incorrect correspondence between the logical workstation and the physical workstation.

[0083] It is important to emphasize that the correlation can be understood as the logical, causal, or concurrent relationships between multiple abnormal attribute bits. Different types of abnormal attribute bits do not appear in isolation, but rather have a corresponding relationship of mutual influence and verification based on the operating mechanism of the workstation. That is, when analyzing and filtering abnormal attribute bits based on rule verification, we need to focus on paired or grouped attributes that appear synchronously and their inherent connections. For example, there is a causal relationship between abnormal signal path matching flag bits and significant deviations in parameter test data; a broken or poorly connected signal path will directly lead to the inability to collect parameter test data normally, resulting in deviations. There is a logical relationship between mismatch between physical and logical workstation identifiers and inconsistent sorting results; incorrect workstation identifiers will cause a mismatch between sorting instructions and actual workstations, ultimately leading to abnormal sorting results. There is also a concurrent relationship between abnormal hopper matching flag bits and errors in sorting results. These anomalies are caused by the same type of underlying configuration problem and appear synchronously. By identifying the correlations between these abnormal attribute bits, we can more accurately locate the root cause of the anomaly, rather than just remaining at the surface phenomenon of a single attribute bit anomaly.

[0084] At the same time, based on the characteristic deviation direction of the abnormal attribute bits, targeted adjustment schemes are formulated. For example, for deviations where the workstation identifiers do not match, the logical and physical workstations are remapped for correction. For deviations where the parameter test data exceeds the benchmark threshold, the underlying test program parameter configuration is adjusted or the pin mapping table is calibrated. For deviations where the signal path flag bits are abnormal, signal path maintenance operations are performed and the path integrity is re-verified.

[0085] An anomaly detection model matches the operational feature fingerprints of each physical workstation with preset standard feature fingerprints to obtain the similarity of corresponding attribute data. Based on this result, the cause of the anomaly or adjustment plan is determined. This approach not only identifies the specific feature dimensions that deviate from the standard operating conditions by comparing the similarity of each attribute data point one by one, avoiding missed detections caused by overall features masking local key anomalies, but also improves the accuracy of anomaly cause diagnosis. Furthermore, it allows for the direct development of targeted adjustment measures based on the anomaly attribute points and their degree of deviation, avoiding indiscriminate investigation and blind debugging, shortening the fault resolution cycle, and improving the operating efficiency of the testing system. At the same time, the similarity data of each attribute point can intuitively present the source of the anomaly and the feature deviation pattern, making it easier to trace the formation mechanism of the anomaly compared to a black-box overall judgment. In addition, differentiated similarity calculation logic is designed for different types of attribute points, which can cover the full-dimensional detection scenarios of physical workstation operational features, improving the versatility and adaptability of the solution.

[0086] Optionally, based on the above embodiments, analyzing each physical workstation according to the similarity matching results of each attribute bit data to determine the cause of the anomaly may include at least one of the following:

[0087] Based on the value of the signal path matching flag, or based on the matching degree between the physical station identifier and the logical station identifier, determine whether the physical station has a signal path misalignment fault; based on the value of the sorting matching flag, or based on the matching degree between the sorting code in the sorting result and the sorting code in the test result, determine whether the physical station has a sorting result inconsistency fault; based on the deviation statistics of the parameter test data and the normal test benchmark data, determine whether the physical station has a test program configuration error; wherein, the test program configuration error includes at least one of the following: station-specific patch program error, parameter threshold allocation error, pin mapping table configuration error affecting the signal routing or load of the physical station.

[0088] In this embodiment of the invention, the sorting code can be specifically understood as: an encoding used to identify the category of device test sorting results, and the sorting codes of the sorting results and test results must correspond. Test program configuration errors can be specifically understood as: program-level problems that cause abnormal parameter testing, which may include errors in the workstation-specific patch program, incorrect parameter threshold allocation, or incorrect pin mapping table configuration affecting the signal routing or load of the physical workstation.

[0089] Specifically, based on the similarity matching results of attribute bit data, the value of the signal path matching flag is analyzed and compared with the standard value of the flag in the standard feature fingerprint, or the matching degree between the physical workstation identifier and the logical workstation identifier is calculated. If the value of the signal path matching flag does not match the standard value, or the matching degree between the physical workstation identifier and the logical workstation identifier is lower than the preset threshold, it is determined that the physical workstation has a signal path misalignment fault.

[0090] Extract the sorting matching flag value, the sorting code in the sorting result, and the sorting code in the test result from the physical workstation's operational feature fingerprint. By verifying the consistency between the real-time value of the sorting matching flag and the standard value in the standard feature fingerprint, or by comparing the sorting code in the sorting result with the sorting code in the test result bit by bit, calculate the matching degree between the two. If the real-time value of the sorting matching flag is inconsistent with the standard value, or if the matching degree between the sorting result and the sorting code in the test result does not meet the preset qualified standard, then the physical workstation is determined to have a sorting result inconsistency fault.

[0091] Obtain deviation statistics of real-time parameter test data of physical workstations. By analyzing the comparison results of deviation statistics of parameter test data with normal test benchmark data, if the deviation statistics of parameter test data exceeds the preset threshold, it is determined that there is a test program configuration error in the physical workstation. This error can be further associated with one or more of the following types: workstation-specific patch program error, parameter threshold allocation error, pin mapping table configuration error affecting signal routing or load of physical workstation.

[0092] For example, since a dedicated patch only applies to a single or specified physical workstation, the impact of the fault is highly targeted. Therefore, it is necessary to determine whether the deviation parameter exceeding the threshold is a test item specific to that physical workstation (not a globally applicable test item). If it is a dedicated test item and the same test item parameters for other physical workstations are normal, then it can be associated with a patch error specific to that physical workstation.

[0093] Since parameter thresholds are global configuration items, incorrect configuration can cause similar parameters in a batch of workstations to deviate from the baseline range. Therefore, if the deviation parameter exceeding the threshold is a globally common test item, and multiple physical workstations show similar parameter deviations (with the same deviation direction and similar deviation magnitude), it can be attributed to an incorrect parameter threshold allocation.

[0094] Since the pin mapping table directly determines the signal transmission path and load distribution, configuration errors can simultaneously cause signal path abnormalities and parameter test deviations. Therefore, if parameter deviations are accompanied by abnormal signal path matching flags or low matching between physical and logical workstation identifiers, it can be attributed to pin mapping table configuration errors affecting physical workstation signal routing or load.

[0095] If the parameter deviation simultaneously meets two or three of the above characteristics (such as the deviation of the exclusive test item parameter accompanied by abnormal signal path), it is determined that multiple test program configuration error types exist at the same time.

[0096] Understandably, by analyzing the anomaly detection model using multi-source fusion fingerprints, it is possible to distinguish between path misalignment faults, inconsistent sorting results, and test program configuration errors. The corresponding detection results can also be displayed on a graphical interface, solving the problem that such faults are difficult to detect or only manifest as production losses in traditional scenarios. In addition, for test program configuration errors, it can clearly point to the specific test number, deviation magnitude and direction, and the range of stations involved in the deviation, directly guiding operators to check the configuration, patch files, or pin assignments of the corresponding tests.

[0097] Signal path misalignment faults are identified by matching signal path flag values ​​and workstation identifier matching degrees; sorting result inconsistencies are identified by matching sorting flag values ​​and sorting code matching degrees; and test program configuration errors, including workstation-specific patch program errors, parameter threshold allocation errors, and pin mapping table configuration errors, are identified by comparing parameter deviation statistics with baseline data. This system not only categorizes physical workstation anomalies into signal path misalignment, sorting result inconsistencies, and test program configuration errors, but also further subdivides test program configuration errors into specific types, avoiding confusion between different fault causes and improving the accuracy and specificity of anomaly diagnosis. It provides judgment criteria for each type of fault, helping staff quickly identify the cause of the fault, reducing the workload of indiscriminate troubleshooting, and shortening the fault resolution cycle. At the same time, through comprehensive testing of key links such as signal paths, sorting results, and program configurations, it can promptly discover potential fault hazards, avoid large-scale test errors caused by the spread of local anomalies, and ensure the smooth operation of MEMS device testing in safety-critical manufacturing environments. In addition, the judgment criteria for each type of fault are based on clear quantitative indicators or feature matching rules, rather than relying on human experience, so that the testing process has a unified execution standard, which is convenient for rapid implementation and promotion in different testing scenarios.

[0098] Optionally, based on the above embodiments, analyzing each physical workstation according to the similarity matching results of each attribute bit data to determine the adjustment scheme may include:

[0099] If a signal path error fault is determined based on the similarity matching results of the attribute bit data, then the minimum number of workstation swaps required to correct the signal path error fault is calculated based on the error mapping relationship between each physical workstation and each logical workstation.

[0100] In this embodiment of the invention, a signal path error fault can be specifically understood as a signal transmission anomaly caused by an incorrect mapping relationship between physical and logical workstations, manifested as an abnormal signal path matching flag or a workstation identifier matching degree below a threshold. An incorrect mapping relationship can be specifically understood as a state where the actual correspondence between physical and logical workstations is inconsistent with the preset standard correspondence. The minimum workstation swapping scheme can be specifically understood as the optimal solution that restores all workstation mapping relationships to normal by adjusting the physical and logical workstation correspondences with the fewest possible adjustments when correcting incorrect mapping relationships.

[0101] Specifically, the adjustment plan is determined based on the similarity matching results of each attribute bit data. When a signal path error is determined to exist in a physical workstation, all physical workstations with signal path errors are located based on the attribute bit similarity matching results, as well as the corresponding faulty logic workstations.

[0102] Based on the preset standard mapping relationship, a list of incorrect correspondences between physical workstations and logical workstations is determined (such as the correspondence between physical workstations, incorrect logical workstations, and standard logical workstations). With the goal of minimizing the number of swaps, the system performs comprehensive calculations on the workstation mapping relationships in the incorrect correspondence list. For example, when the incorrect mapping list shows that physical workstation 1 corresponds to logical workstation 2, physical workstation 2 corresponds to logical workstation 1, and the mappings of other workstations are normal, the system can directly determine through comprehensive calculation that only one swap of the logical correspondence between physical workstation 1 and physical workstation 2 is needed to complete the entire correction; when the incorrect mapping list shows that physical workstation 3 corresponds to logical workstation 4, physical workstation 4 corresponds to logical workstation 5, and physical workstation 5 corresponds to logical workstation 3... When performing cyclic error mapping, the system avoids swapping each pair individually. Instead, it uses a cyclic adjustment method determined through comprehensive calculation. Only two swaps are needed (e.g., swapping physical workstations 3 and 5 first, then swapping them with 4) to restore the entire mapping relationship, significantly reducing the number of operations compared to the three operations required for individual swaps. When the error mapping list contains multiple independent misaligned mappings (e.g., physical workstation 6 corresponds to logical workstation 7, physical workstation 7 corresponds to logical workstation 6, physical workstation 8 corresponds to logical workstation 9, and physical workstation 9 corresponds to logical workstation 8), the system uses comprehensive group calculation to determine that one swap is needed for each independent misaligned mapping, requiring only two operations to complete all corrections, avoiding redundant adjustments or operations. Ultimately, the minimum workstation swapping scheme that can efficiently correct all signal path errors is determined.

[0103] By identifying the erroneous mapping relationship between physical and logical workstations and calculating the minimum workstation swapping scheme required to correct signal path errors, ineffective repetitive adjustments or redundant operations can be avoided. The optimal workstation correspondence adjustment path can be determined, reducing the operational and time costs of fault correction, shortening the signal path fault repair cycle, and improving the operational efficiency of the test system. Simultaneously, this optimal swapping scheme provides clear and executable operational guidelines for on-site maintenance personnel, eliminating the need for repeated manual deductions and adjustments, thus reducing reliance on operators' professional skills. Furthermore, for complex mapping errors such as multiple sets of workstations cyclically misaligned or multiple sets of independent misaligned workstations, the minimum swapping scheme can achieve efficient correction through algorithmic coordination, possessing good scalability and applicability, and meeting the large-scale application needs of MEMS device test systems.

[0104] Optionally, based on the above embodiments, according to the identified error mapping relationship between each physical workstation and each logical workstation, calculating and determining the minimum workstation swapping scheme required to correct the signal path error fault may include:

[0105] Based on the node layout diagrams of the identified physical workstations and logical workstations, a bipartite graph model is constructed. In this model, the set of left vertices represents physical workstations, the set of right vertices represents logical workstations, and the edges between the left and right vertices represent the mapping relationship between physical and logical workstations. The weight of this mapping relationship is inversely proportional to the confidence level of any abnormal situation at a physical workstation. The bipartite graph model is solved with the goal of minimizing the weight to determine the minimum set of pairwise swaps required to correct the signal path error, which serves as the minimum workstation swapping scheme.

[0106] In this embodiment of the invention, the node layout diagram can be specifically understood as: a topological graph used to represent the actual distribution and connection relationships of physical workstations and logical workstations, respectively, which is the spatial and logical foundation for constructing the bipartite graph model. The bipartite graph model can be specifically understood as: a graph structure consisting of two disjoint sets of vertices (a left vertex set and a right vertex set) and edges connecting the vertices of the two sets. In this scheme, the left vertex represents the physical workstation, the right vertex represents the logical workstation, and the edges represent the mapping relationship between the two. The weight of the mapping relationship can be specifically understood as: a quantitative indicator used to measure the rationality of the mapping between physical and logical workstations. Its value is inversely proportional to the confidence level of abnormal situations of physical workstations under this mapping relationship; that is, the higher the confidence level of the abnormality, the smaller the weight value, and vice versa.

[0107] Minimum weight can be understood as the core optimization direction when solving a bipartite graph model. The goal is to find a set of mapping relationships that minimizes the sum of the weights of all edges and the sum of the anomaly confidence of the corresponding physical workstations. Minimum pairwise swap set can be understood as the minimum number of workstation pairwise swaps required to achieve the optimal mapping scheme. It is the set of operations for resolving errors in complex cyclic mappings of multiple workstations.

[0108] Specifically, based on the node layout diagrams of the physical and logical workstations, a corresponding bipartite graph model is constructed. The physical workstations are designated as the left vertex set, and the logical workstations as the right vertex set. Edges connecting the vertices of the two sets represent their mapping relationship, and each edge is weighted according to the rule that the mapping relationship weight is inversely proportional to the anomaly confidence level of the physical workstation. Using the minimum weight as the solution objective, the constructed bipartite graph model is calculated and solved, ultimately yielding the minimum pairwise swap set capable of correcting signal path errors. This minimum set of swaps is then used as the minimum workstation swapping scheme.

[0109] Understandably, there are inherent mapping rules between physical and logical workstations. Each physical workstation can only correspond to one logical workstation, and vice versa. Pair swapping can directly return two sets of misaligned workstations to the correct mapping state simultaneously, avoiding breaking the configuration balance and causing new errors. At the same time, the hardware interfaces and signal routing of physical workstations have inherent bidirectional binding attributes with the test programs and parameter thresholds of logical workstations. Pair swapping is essentially a synchronous exchange of the binding relationship between the two sets of hardware and programs, which can minimize changes to the existing system configuration. In addition, the bipartite graph matching algorithm used in the solution to calculate the minimum number of swaps also uses paired vertex matching as the basic unit for solving the problem. This fits the one-to-one inherent configuration and is the key to ensuring the effectiveness of the algorithm and the feasibility of the results. Therefore, pair swapping is an inevitable choice to adapt to the inherent configuration of physical and logical workstations and ensure accurate correction of the mapping relationship.

[0110] It should be emphasized that this method is not only applicable to simple pairwise misalignment scenarios, but also a solution for complex cyclic mapping errors in multi-station applications. The specific steps are as follows:

[0111] First, based on the node layout diagram of physical and logical workstations, a bipartite graph model is constructed, with physical workstations set as the left vertex set and logical workstations set as the right vertex set. Edges represent the mapping relationship between the two, and the edges are weighted based on the anomaly confidence output by the anomaly detection model. Then, with the minimum weight as the objective, a bipartite graph matching algorithm (such as the Hungarian algorithm) is used to solve the model. For example, when facing a cyclic misalignment scenario of physical workstation 1 and logical workstation 2, physical workstation 2 and logical workstation 4, physical workstation 4 and logical workstation 3, and physical workstation 3 and logical workstation 1, the algorithm can calculate the minimum pairwise exchange set that requires only 2 operations: "swap 1 and 3, swap 2 and 4", instead of the redundant operation of swapping one pair at a time. Finally, this minimum pairwise exchange set is used as the minimum workstation swapping scheme. Its value lies in transforming the single-workstation mapping prediction of machine learning into a globally optimal corrective action scheme, ensuring the consistency and efficiency of multi-workstation system adjustment.

[0112] Understandably, after completing the diagnosis and correction measures for the root cause of physical workstation anomalies, the adjustment plan can be further determined by combining the aforementioned anomaly detection process: by analyzing the anomaly feature dimension with the highest contribution in the feature vector of the input anomaly detection model (i.e., the key feature that has the greatest impact on the similarity score of attribute bit data), the core cause of signal path misalignment, inconsistent sorting results, or test program configuration errors can be accurately located; then, combined with the aforementioned bipartite graph modeling and other graph algorithms, topology analysis and correction planning can be carried out on the pin mapping relationship between physical and logical workstations and signal transmission links. For example, by using the minimum weight matching solution capability of graph algorithms, the misaligned signal path connection relationship can be reconstructed and the incorrect pin mapping table configuration can be corrected, ultimately forming a targeted correction plan that is highly adapted to the specific anomaly type.

[0113] Understandably, after completing the entire process of diagnosis of the root cause of the anomaly, location of the core trigger, and targeted correction plan, the following can also be done: Key information regarding this anomaly handling, such as the anomaly workstation number, anomaly type, and confidence score, as well as specific correction operations including the correction plan and execution time, should be uniformly recorded in an encrypted and signed immutable audit log. Simultaneously, the log should also contain the operator's digital signature and the encrypted hash value of the standard feature fingerprint. Encryption and signature technologies ensure that the log content cannot be tampered with, and enable full traceability of the anomaly event from detection and diagnosis to correction and acceptance, providing complete and reliable data support for subsequent system optimization, fault review, and compliance audits.

[0114] In a specific example, the structured fields and content included in the log may be: timestamp, used to record the log generation time; operator number, used to record the operator's identification; configuration hash, used to present the hash value of the baseline behavior model as an encrypted string, ensuring that the configuration cannot be tampered with; trigger event, used to record the event that triggered the log, such as "CABLE_MAINTENANCE (Handler Interface Panel)", indicating cable maintenance of the processor interface panel; mismatch details, used to record the mapping mismatch between physical workstations and logical workstations and its confidence level; the flag field may include: "BinMismatch?" indicating whether the sorting position is mismatched, and "Signal Path Error?" indicating whether there is a signal path error between the processor workstation and the test workstation; the action occurrence field, used to record the handling operation, such as "CHECK CABLES" indicating that the cable swapping problem of the workstation was checked and corrected; and digital signature, used to record the operator's signature as an encrypted string, ensuring that the log is authentic and cannot be tampered with.

[0115] By constructing a bipartite graph model and determining the minimum workstation swapping scheme based on the minimum weight objective, discrete workstation mapping data can be transformed into structured topological relationships. For complex error mapping relationships such as cyclic misalignments and multiple independent misalignments formed between physical and logical workstations, the optimal adjustment path is determined, avoiding the limitations and blind spots of manual deduction and achieving global optimal solution calculation in complex scenarios. The algorithm leverages the inverse proportionality between mapping relationship weights and the anomaly confidence of physical workstations, prioritizing workstation combinations with high anomaly confidence for adjustment. Simultaneously, by aiming for the minimum pairwise swapping set, the number of workstation adjustments is minimized, reducing the operational and time costs of fault correction. Furthermore, this scheme is not dependent on a specific number or layout of workstations and can flexibly adapt to large-scale testing systems ranging from dozens to hundreds of workstations, possessing good scalability and applicability to meet the fault correction needs of MEMS device testing scenarios of different scales.

[0116] Furthermore, based on the above embodiments, after determining the adjustment scheme, it may also include:

[0117] Generate a graphical dot matrix diagram corresponding to the layout of the sorting machine trays; in the graphical dot matrix diagram, distinguish and display abnormal physical workstations and the adjustment scheme; provide a user interface control element for operators to confirm the adjustment scheme or start the test program configuration review process through the control element.

[0118] In this embodiment of the invention, the sorting machine layout tray can be specifically understood as: a carrier used to hold and transport the devices under test in the MEMS device testing and sorting equipment. Its surface has a fixed number and fixed positions of physical workstations, serving as the execution carrier for testing operations. The graphical dot matrix diagram can be specifically understood as: a graphical interface that visually recreates the physical workstation layout of the sorting machine tray in a dot matrix format. Each dot matrix corresponds to one physical workstation, intuitively presenting the distribution and status information of the workstations.

[0119] User interface control elements can be specifically understood as interactive controls (such as confirmation buttons, review buttons, and drop-down menus) integrated into the graphical interface, used to support command interaction between operators and the system. The test program configuration review process can be specifically understood as a process of secondary verification of various configuration parameters of the test program (such as threshold settings, pin mappings, and patch programs), used to troubleshoot workstation anomalies caused by program configuration errors.

[0120] Specifically, after determining the corresponding adjustment plan for physical workstation anomalies, the system can further assist operators in confirming the plan and subsequent operations through visual interaction. Based on the actual workstation distribution of the sorting machine's material trays, a graphical dot matrix diagram corresponding to each material tray is generated, with each dot matrix corresponding to a physical workstation on the material tray. Subsequently, in this graphical dot matrix diagram, differentiated visual identifiers (such as red marking of abnormal workstations, adjustment plans marked with arrows or text, etc.) are used to distinguish and display the location and type of abnormal physical workstations, as well as the adjustment plans formulated for these abnormal workstations (such as the specific objects and operation steps for workstation swapping). Corresponding user interface control elements are configured on the graphical interface. Operators can directly confirm the adjustment plan and issue execution instructions through these controls. When there are doubts about the plan, they can also start the test program through the controls to configure the review process, and conduct a secondary check on the parameter configuration, pin mapping, and other contents of the relevant program to ensure the accuracy and feasibility of the adjustment plan.

[0121] Figure 4 This is a visual schematic diagram of a processor tray grid with abnormal sites and pop-up dialog boxes applicable to an embodiment of the present invention, as shown below. Figure 4As shown, the left-hand dot matrix area recreates the station distribution of the sorting machine's material tray in a grid format. Black squares mark abnormal stations, while white squares represent normal stations, visually locating the specific position of the abnormal physical station. The right-hand pop-up area (Abnormal Details - Physical Station 143) displays the core information of the abnormal station, including the physical station number (143), the predicted corresponding logical station (89, confidence level 98%), the sorting station consistency status (match), and clearly indicates the current signal path error (the error mapping of "sorting machine station 143 → test machine station 89" has been detected).

[0122] The bottom control area of ​​the pop-up window provides four user interface control elements: "Confirm Swap" (for executing the workstation adjustment plan), "Check Cable" (for verifying the signal path hardware connection), "Overwrite" (for manually overwriting the current mapping configuration), and "Retest" (for re-executing the test process for this workstation), allowing operators to select the corresponding operation according to their needs.

[0123] By generating graphical dot matrix diagrams corresponding to the sorting machine's layout trays, distinguishing abnormal physical workstations and adjustment plans, and providing user interface control elements, abstract workstation anomaly information and adjustment strategies can be transformed into visual dot matrix graphics. These differentiated identifiers clearly present the location, type, and adjustment path of the abnormal workstations, reducing the information interpretation costs for operators. Simultaneously, the integrated user interface control elements provide a convenient interactive entry point, supporting one-click confirmation and execution of adjustment plans, as well as on-demand activation of test programs to configure verification processes. This reduces the tedious steps of manually navigating the system and manually entering commands, improving the flexibility and efficiency of human-machine interaction. The dual verification formed by visual display and interactive confirmation allows operators to intuitively check the matching between anomalies and solutions, ensuring the accuracy and reliability of fault correction. Furthermore, this design reduces reliance on the professional skills of maintenance personnel, improves the usability and operational efficiency of the testing system, and helps the system quickly return to normal operation.

[0124] The technical solution of this invention employs a testing station on a testing machine to test known normal devices, followed by sorting by a sorting machine. It acquires sorting correlation data from each physical station during testing and sorting to construct a unique operational feature fingerprint. This fingerprint is then processed by an anomaly detection model to identify anomalies. This not only improves the accuracy and reliability of anomaly detection and reduces the risk of device misjudgment by identifying hidden faults such as signal path misalignment, inconsistent sorting results, and incomplete testing procedures based on normal benchmarks, but also overcomes the limitations of traditional manual inspection on the number of stations. It can adapt to multi-station, high-parallelism testing scenarios, meeting the needs of large-scale production. Furthermore, it eliminates the need for additional customized hardware, improving testing efficiency and reducing production line downtime losses. The multi-dimensional data integrated by the operational feature fingerprint provides accurate evidence for anomaly tracing and correction, reducing fault diagnosis costs and ensuring accurate matching between logical and physical stations, as well as the authenticity and traceability of test data. This lays the foundation for product yield calculation and process optimization.

[0125] Example 2

[0126] Figure 2 This is a flowchart of a sorting anomaly detection method for another testing system provided in Embodiment 2 of the present invention. This embodiment is a refinement of the "acquiring sorting correlation data of each physical station during the testing process and sorting process" in the above embodiment. Figure 2 As shown, the method includes:

[0127] S210. The known normal devices are tested using the test station of the test machine, and the known normal devices are sorted using the sorting machine according to the test results.

[0128] S220. Obtain sorting association data of each physical station during the testing and sorting processes through the standard communication interfaces with the testing machine and the sorting machine, and determine the operating feature fingerprint of each physical station based on the sorting association data.

[0129] In this embodiment of the invention, the standard communication interface can be specifically understood as: a preset general interface used for instruction and data interaction between devices.

[0130] Specifically, when acquiring physical workstation data and generating operational feature fingerprints, a fully standardized interface scheme is adopted without relying on any customized hardware, such as standard communication interfaces like SECS / GEM (SEmi Conductor Equipment Communications / Generic Equipment Model), TCP / IP (Transmission Control Protocol / Internet Protocol), and STDF file system interface.

[0131] The system enables command issuance and real-time data acquisition between devices through the SECS / GEM protocol interface, completes cross-device network data transmission through the TCP / IP protocol interface, and reads standardized test data files stored through the STDF file system interface. At the same time, the system does not use or require customized hardware interfaces, signal injectors or feedback devices throughout the entire operation, which reduces hardware deployment costs and compatibility barriers.

[0132] Through the three types of standard communication interfaces mentioned above, sorting correlation data of each physical station during the testing process of the testing machine and the sorting process of the sorting machine are collected respectively. The collected sorting correlation data are feature extracted and integrated to form an operational feature fingerprint that can characterize the operating status of each physical station, providing a data foundation for subsequent anomaly detection and mapping relationship verification.

[0133] S230. An anomaly detection model is used to process the operational feature fingerprints of each physical workstation in order to identify abnormal situations at each physical workstation.

[0134] Furthermore, based on the above embodiments, the sorting anomaly detection method of the testing system may further include:

[0135] Based on the identification results of the abnormal situation, control the testing machine or sorting machine to stop working.

[0136] Specifically, when the system identifies a sorting anomaly at a physical workstation through feature fingerprint comparison, for equipment already undergoing mass production testing, the system can send instructions to control the testing machine or sorting machine to stop its current operation, preventing the abnormal workstation from continuously producing defective products. At the same time, the production access control component in the system can send digital control signals through the SECS / GEM protocol interface (a standard communication protocol adapted to semiconductor equipment) or GPIO (General-Purpose Input Output) interface to physically prevent the testing and sorting machine from starting a new mass production test sequence, thus preventing the abnormal workstation from participating in subsequent production and avoiding larger-scale losses caused by accidental restart of mass production.

[0137] By controlling the testing or sorting machine to stop working based on the anomaly identification results, the system can immediately trigger a shutdown command after identifying anomalies such as incorrect physical workstation mapping or signal path failure. This stops the continuous production of defective products at the source, reduces product yield losses caused by equipment malfunctions, and minimizes waste of materials and production costs. Simultaneously, timely shutdown prevents secondary problems such as hardware wear and program crashes caused by continuous abnormal operation, avoids the risk of escalating equipment failures, extends the service life of testing and sorting machines, and reduces equipment operation and maintenance costs. This mechanism, together with the physical interception function of the production access control component, forms a dual protection system of in-process shutdown and pre-emptive interception. It not only provides emergency damage control for ongoing abnormal production processes but also physically prevents abnormal equipment from starting a new mass production sequence, constructing a comprehensive, seamless quality control closed loop and improving the quality control level of mass production testing. The system can automatically complete the entire process of anomaly identification and shutdown intervention, reducing the timeliness requirements of manual intervention and improving the automation and intelligence level of the testing system.

[0138] The technical solution of this invention employs a testing station on a testing machine to test known, normal devices, followed by sorting by a sorting machine. By using standard communication interfaces with both the testing machine and the sorting machine, sorting correlation data from each physical station during the testing and sorting process is acquired to construct a unique operational fingerprint. Acquiring this sorting correlation data through the standard communication interfaces of the testing machine and the sorting machine eliminates the need for additional customized hardware interfaces, signal injectors, or feedback devices, thus avoiding the procurement, installation, and debugging costs associated with customized hardware. Furthermore, it reduces potential failure points introduced by additional hardware. This reduces the difficulty of system maintenance; and the standard communication interface, as a universal interface in the field of semiconductor testing equipment, is compatible with most mainstream equipment models, enabling rapid deployment in testing systems of different brands and specifications without the need to modify the interface for specific equipment, thus enhancing the universality of the technical solution; at the same time, this method is a non-intrusive data acquisition method, which does not require modification of the original hardware structure of the equipment or the testing and sorting process, and will not interfere with the normal operation of the equipment and testing efficiency, ensuring the continuity and stability of the mass production process, and can directly and efficiently capture raw data, ensuring both the real-time nature of data acquisition and complete coverage of various sorting-related data sources. After processing and identifying anomalies by the anomaly detection model, it can not only identify hidden faults such as signal path misalignment, inconsistent sorting results, and incomplete test procedures based on normal benchmarks, thus improving the accuracy and reliability of anomaly detection and reducing the risk of device misjudgment, but also breaks through the limitations of traditional manual inspection on the number of workstations. It can adapt to multi-workstation high-parallelism testing scenarios and meet the needs of large-scale production. At the same time, no additional customized hardware is required, improving detection efficiency, reducing production line downtime losses, and the multi-dimensional data integrated by the operation feature fingerprint can provide accurate basis for anomaly tracing and correction, reduce fault diagnosis costs, ensure accurate matching between logical workstations and physical workstations, and ensure the authenticity and traceability of test data, laying the foundation for product yield calculation and process optimization.

[0139] Example 3

[0140] Figure 3 This is a flowchart of a sorting anomaly detection method for a testing system provided in Embodiment 3 of the present invention. This embodiment is a refinement of the above embodiment's step of "obtaining sorting correlation data of each physical station during the testing and sorting process, and determining the operational feature fingerprint of each physical station based on the sorting correlation data." Figure 3 As shown, the method includes:

[0141] S310. The known normal devices are tested using the test station of the test machine, and the known normal devices are sorted using the sorting machine according to the test results.

[0142] S320: Data stream for acquiring sorting-related data from each physical workstation during the testing and sorting processes.

[0143] S330. Synchronize the data stream in time.

[0144] S340. Extract and determine the operational feature fingerprints of each physical workstation from the sorting and association data after time synchronization.

[0145] Specifically, sorting-related data from each physical workstation during the testing and sorting processes are collected and integrated into corresponding data streams. The two data streams are then synchronized according to a preset time synchronization precision (e.g., the maximum allowable deviation for data time calibration is within the range of -10 milliseconds to 10 milliseconds) to ensure that the test data and sorting data at the same physical workstation are aligned at the same time point. Feature information characterizing the workstation's operational status is extracted from the time-synchronized sorting-related data to determine the operational feature fingerprint of each physical workstation.

[0146] S350. An anomaly detection model is used to process the operational feature fingerprints of each physical workstation in order to identify abnormal situations at each physical workstation.

[0147] In a specific example, a sorting anomaly detection system for a testing system may include:

[0148] The system comprises a multi-source telemetry data acquisition engine, a feature vector fusion engine, a machine learning comparison engine, a sorting result consistency verifier, a signal path integrity verifier, a test program and pin mapping table anomaly detector, a visualization and error correction module, an audit and compliance module, and a production execution controller. Specifically, telemetry can be understood as the process by which the system remotely and automatically acquires and transmits various types of data generated during the operation of the testing and sorting machines through standardized interfaces.

[0149] The multi-source telemetry data acquisition engine, through multiple functional modules such as the sorting machine instruction log parser and the SECS / GEM protocol message sniffer, collects data streams from at least five types of heterogeneous data sources and completes time synchronization with a preset millisecond precision. The feature vector fusion engine converts various telemetry data streams into standardized features, concatenates them for each physical workstation to generate a unified feature vector containing parameter statistical deviation encoding features, and then constructs a multi-source fusion operational feature fingerprint. The machine learning comparison engine uses the feature vectors from the NPI stage as the training set and outputs the logical workstation matching results and confidence scores for the mass production stage through a random forest classifier. Sorting The result consistency verifier and signal path integrity verifier respectively realize cross-device consistency comparison of sorting results and path matching verification between instructions and actual monitoring station numbers; the test program and pin mapping table anomaly detector identifies program or pin mapping configuration errors through statistical comparison of real-time parameters and NPI benchmark values; the visualization and error correction module generates a color-coded grid map and outputs the minimum station swapping scheme based on the bipartite graph model; the audit and compliance module writes the entire process events into an encrypted and signed distributed ledger; and the production execution controller sends control signals through a standard interface to physically block the mass production process under abnormal conditions.

[0150] This system adopts a highly automated design and has diversified verification triggering mechanisms to ensure the continuity and reliability of the testing process. It can automatically trigger verification through sorting machine events (material tray loading or unloading; calibration completion) and testing machine events (test program loading or unloading; equipment restart). It also supports timed or quantitative automatic triggering (such as once every 24 hours or once after testing 1,000 products). At the same time, a manual triggering method is reserved. Operators can start the verification process by clicking the "Verify Now" button on the graphical user interface.

[0151] This system integrates based on industry-standard read-only application interfaces, requiring no hardware modification or reliance on customized fixtures or auxiliary verification equipment. It can be universally deployed on any automated testing equipment platform, significantly reducing deployment costs and compatibility barriers. By constructing multi-source fusion operational feature fingerprints and combining them with machine learning benchmark comparison mechanisms, it achieves simultaneous detection of multiple technical pain points, such as workstation mapping, sorting result consistency, signal path faults, and test program and pin mapping table configuration errors, overcoming the limitations of traditional detection methods that are singular and have high false negative rates. High-precision time synchronization of 10 milliseconds and standardized feature vector fusion ensure the uniqueness and accuracy of feature fingerprints, providing a reliable data foundation for anomaly detection. The visualization and error correction module reduces the skill requirements of operators and improves troubleshooting efficiency through intuitive graphical displays and intelligent interchangeable solutions. The audit and compliance module generates tamper-proof encrypted logs that meet the compliance and traceability requirements of quality standards. The physical-level blocking mechanism of the production execution controller can stop losses in time when anomalies occur, preventing the continuous production of non-conforming products and the escalation of equipment failures, thus improving the yield of mass production testing and the safety of equipment operation and maintenance.

[0152] In a specific example, consider a cable misconnection scenario: the sorting machine loads three qualified devices and sends a "start verification" command. While the testing machine runs the verification program, the system simultaneously collects various telemetry data. At this point, the sorting machine issues a "test station 1" command, but the testing machine log shows an anomaly: "station 2 starts testing." The feature vector of physical station 1 subsequently contains mismatched information such as "test station 1," "S2F41 station = 1," "station 2 starts testing," and "signal path normal = 0." Although simple rules can detect the mismatch between the command and the log in this simplified case of a single cable misconnection, the core value of machine learning models lies in solving the practical problem of large-scale site re-identification and mapping correction, based on multivariate... Behavioral fingerprint training can analyze the full telemetry patterns of physical workstation 1 (including parameter results, timing, and user interface status, etc.), match the closest logical workstation in the learned fingerprint database, and predict the actual logical workstation matched by the physical workstation with high confidence. This drives the graphical interface to provide actionable suggestions for cable inspection. At the same time, the model can handle complex multi-site replacements in highly parallel environments (such as hundreds of sites). By comparing the real-time fingerprint of each site with the learned fingerprint, a new global mapping relationship is collectively derived. It can also make robust predictions based on multi-feature probabilistic inference in telemetry streams with noise, delay, or missing entries, effectively avoiding false alarms that may be caused by simple rules. Ultimately, it achieves a breakthrough from detecting errors to providing corrective solutions.

[0153] In a specific example, considering a test program error scenario: the sorting machine loads three qualified devices and sends a "start verification" command. While the tester runs the verification program, the system simultaneously collects various telemetry data. At this point, the 45th test result for physical station 1 is 0.98 volts, significantly deviating from the logical station 1's baseline value of 1.23 volts ± 0.02 volts determined during the NPI phase. Its feature vector contains key data such as "45th test result = 0.98" and "45th test deviation = -12.5 times the standard deviation." Although isolated extreme parameter deviations can be marked using statistical process control rules such as 3 times the standard deviation, the core role of the machine learning model in this scenario is to achieve accurate root cause attribution and system-level integrity assessment. It incorporates the parameter deviation marker as input features into a larger feature vector, combining station mapping prediction results, sorting result consistency, and other evidence such as signal path status. Through comprehensive analysis, when the workstation mapping prediction is correct and has high confidence, and other indicators are normal, anomalies can be attributed to test procedures or pin mapping issues rather than hardware mapping errors. This guides the graphical interface to provide suggestions for "reviewing procedures," preventing operators from taking erroneous corrective actions due to simple deviation alarms. Simultaneously, the model learns the joint statistical distribution and correlation of parameters at each station during the NPI stage, enabling it to identify small but consistent shifts or correlation changes among multiple parameters. These subtle deviations, when present individually, are within the threshold range, but overall they deviate from the normal feature fingerprint, a detection capability that simple threshold settings cannot achieve. Furthermore, the model outputs a unified workstation confidence score, which is lowered by significant parameter deviations, providing clear triggering conditions for production gating mechanisms. Ultimately, as a unified inference engine, it integrates hard rule outputs and soft-mode evidence to achieve robust, context-aware, and operable assessments of workstation status.

[0154] It is important to emphasize that the machine learning anomaly detection model constructed by the technical solution of this invention is not simply a weighted sum of the results of rule recognition such as sorting result consistency, signal path integrity, and test parameter deviation to output anomalies and confidence levels. Instead, it possesses the following value: it solves the site mapping problem. In scenarios where cable anomalies after maintenance lead to changes in the correspondence between physical and logical workstations, simple rules can only mark errors but cannot determine the new mapping relationship. The model, however, can identify telemetry data patterns of physical workstations and match them with corresponding logical workstations based on the multivariate correlation patterns of standard fingerprints, outputting accurate correction mapping predictions and providing direct evidence for fault correction. To detect subtle, multi-factor anomalies that cannot be captured by a single rule, when the individual changes in slight parameter shifts and minor temporal variations in event logs do not reach the rule threshold, but the overall change of the combination of these two or more factors differs significantly from the standard fingerprint, the model can identify and label anomalies through multivariate pattern recognition, thus compensating for the blind spots of traditional rule-based detection. It can output a unified integrity confidence score, comprehensively integrating multi-dimensional evidence such as site deployment map prediction results, rule consistency verification, and statistical credibility of parameter data, providing key threshold decision-making basis for anomaly judgment. At the same time, the verification rules can be used as feature inputs to the model and cross-checked to further improve the accuracy of model analysis.

[0155] Furthermore, the model is tested with a small number (e.g., 1 to 5) of pre-verified, functional standard reference devices to obtain standard feature fingerprints. If a reference device malfunctions and causes false anomalies, this can be resolved through retesting, manual troubleshooting, and replacement with a qualified device. The feature vector input to the model is a multi-dimensional heterogeneous data set that has been numerically encoded, covering a rich array of dimensions including physical workstation indexes, preset message type codes, logical workstation indexes, test result values, Z-scores, timing function data, various matching flags, and confidence labels. The feature vectors for abnormal scenarios such as cable swapping, test program limit errors, and box / meter configuration errors will show feature value changes according to the corresponding abnormal dimension, comprehensively characterizing site identity, health status, and configuration consistency. This is not only the key foundation for the model to achieve accurate analysis but also highlights the model's scalability and accuracy advantages in site mapping and configuration integrity detection solutions, far exceeding those of purely deterministic rules.

[0156] In existing technologies, when a test system experiences anomalies such as mismatched workstation mapping, signal path failure, or incorrect test program configuration, due to the lack of precise location methods, technicians must manually check each item one by one, verifying cable connections, checking program codes, reviewing test parameters, and verifying sorting rules. The entire process relies on the experience of the operators and involves the collaborative verification of multiple devices, including test machines and sorting machines. It often takes several hours to locate the root cause of the fault, during which the production line must be suspended, resulting in significant capacity loss and wasted labor costs.

[0157] The technical solution of this invention, through machine learning analysis and automated detection processes using multi-source fusion fingerprinting, allows the system to automatically complete fault detection and high-level attribution after an anomaly occurs. This is achieved through time-synchronized data acquisition with preset millisecond precision (e.g., 10 milliseconds) and pattern recognition of multi-dimensional feature vectors. The system presents the fault category (e.g., signal path error or test program anomaly) and locates the fault position (e.g., specific physical workstation or specific test number) on a graphical interface, providing targeted troubleshooting guidance (e.g., checking cables or rechecking parameter patches for specific test numbers (e.g., TEST 45)). The entire detection and attribution process can be completed within minutes, compressing the traditional manual troubleshooting process of several hours to minutes. This significantly shortens downtime, reduces production interruption due to anomalies, and improves equipment utilization and capacity output. It also reduces reliance on operator expertise, lowering labor and training costs. Furthermore, by using multi-source fusion fingerprinting for automated identification of sorting anomalies, it eliminates the need for hardware modifications in the testing system, enabling rapid fault response and production recovery, thus improving the stability and economy of the testing and sorting process.

[0158] The technical solution of this invention employs a testing station of a testing machine to test known normal devices, followed by sorting by a sorting machine. This process acquires the sorting-related data streams of each physical station during testing and sorting. After time synchronization processing, the operational feature fingerprints of each physical station are extracted and determined. This eliminates time deviations from data from different sources, ensuring that the feature fingerprints accurately reflect the operational status of the station within the same time dimension. It also ensures that the association logic of each attribute information aligns with the actual testing and sorting process, providing a precise benchmark for anomaly detection. Furthermore, it comprehensively covers multi-dimensional information affecting station operation, avoiding feature omissions caused by data loss or time asynchrony, fully characterizing the overall operation of each physical station, and reducing the probability of missing latent faults. Moreover, it provides a unified time benchmark reference for feature fingerprints under different periods and operating conditions, improving the stability and reliability of anomaly detection. Based on the complete and time-synchronized original data stream, it allows for reverse tracing of the corresponding time node's operational scenario when an anomaly is detected, helping technicians quickly locate the abnormal link and its cause, reducing troubleshooting costs. After processing and identifying anomalies by the anomaly detection model, it can not only identify hidden faults such as signal path misalignment, inconsistent sorting results, and incomplete test procedures based on normal benchmarks, thus improving the accuracy and reliability of anomaly detection and reducing the risk of device misjudgment, but also breaks through the limitations of traditional manual inspection on the number of workstations. It can adapt to multi-workstation high-parallelism testing scenarios and meet the needs of large-scale production. At the same time, no additional customized hardware is required, improving detection efficiency, reducing production line downtime losses, and the multi-dimensional data integrated by the operation feature fingerprint can provide accurate basis for anomaly tracing and correction, reduce fault diagnosis costs, ensure accurate matching between logical workstations and physical workstations, and ensure the authenticity and traceability of test data, laying the foundation for product yield calculation and process optimization.

[0159] Example 4

[0160] Figure 5 This is a schematic diagram of the structure of a sorting anomaly detection device for a testing system provided in Embodiment 4 of the present invention. Figure 5 As shown, the device includes: a test sorting module 510, a feature fingerprint module 520, and an anomaly identification module 530, wherein:

[0161] The test sorting module 510 is used to test known normal devices using the test station of the test machine, and to sort the known normal devices using the sorting machine according to the test results;

[0162] The feature fingerprint module 520 is used to acquire sorting association data of each physical station during the testing and sorting process, and to determine the operation feature fingerprint of each physical station based on the sorting association data.

[0163] The anomaly identification module 530 is used to process the operational feature fingerprints of each physical workstation using an anomaly detection model in order to identify anomalies in each physical workstation.

[0164] The technical solution of this invention employs a testing station on a testing machine to test known normal devices, followed by sorting by a sorting machine. It acquires sorting correlation data from each physical station during testing and sorting to construct a unique operational feature fingerprint. This fingerprint is then processed by an anomaly detection model to identify anomalies. This not only improves the accuracy and reliability of anomaly detection and reduces the risk of device misjudgment by identifying hidden faults such as signal path misalignment, inconsistent sorting results, and incomplete testing procedures based on normal benchmarks, but also overcomes the limitations of traditional manual inspection on the number of stations. It can adapt to multi-station, high-parallelism testing scenarios, meeting the needs of large-scale production. Furthermore, it eliminates the need for additional customized hardware, improving testing efficiency and reducing production line downtime losses. The multi-dimensional data integrated by the operational feature fingerprint provides accurate evidence for anomaly tracing and correction, reducing fault diagnosis costs and ensuring accurate matching between logical and physical stations, as well as the authenticity and traceability of test data. This lays the foundation for product yield calculation and process optimization.

[0165] Based on the above embodiments, the sorting-related data may include at least one of the following: sorting machine instructions, testing machine events, communication data between the sorting machine and the testing machine, user interface status of the sorting machine, user interface status of the testing machine, parameter test results of the logical workstation, standard test data format records of test metadata, and sorting result data.

[0166] Based on the above embodiments, the operational feature fingerprint may include at least one of the following: physical station identifier, logical station identifier, sorting machine instruction identifier, parameter test data, deviation statistics of parameter test data, running time data, sorting result data, sorting matching flag bit, signal path matching flag bit, and total parameter deviation flag bit.

[0167] Based on the above embodiments, the feature fingerprint module 520 is specifically used for:

[0168] The physical workstation identifier in the sorting machine instruction in the sorting association data is determined by matching it with the logical workstation identifier in the test machine event, the user interface status of the test machine, or the test result.

[0169] Based on the above embodiments, the anomaly identification module 530 is specifically used for:

[0170] An anomaly detection model is used to match the operational feature fingerprints of each physical workstation with the preset standard feature fingerprints, and the anomaly status and confidence level of each physical workstation are determined based on the similarity matching results.

[0171] Based on the above embodiments, the anomaly identification module 530 is further configured to:

[0172] An anomaly detection model is used to perform similarity matching between the operational feature fingerprints of each physical workstation and the preset standard feature fingerprints in order to obtain the similarity of the corresponding attribute bit data in the feature fingerprints.

[0173] Accordingly, based on the above embodiments, the sorting anomaly detection device of the test system may further include: a cause-and-effect module, wherein:

[0174] The cause and solution module is used to analyze each physical workstation based on the similarity matching results of the data of each attribute bit, in order to determine the cause of the anomaly and / or the adjustment plan.

[0175] Based on the above embodiments, the cause-and-effect module is specifically used for at least one of the following:

[0176] Based on the value of the signal path matching flag, or based on the matching degree between the physical station identifier and the logical station identifier, determine whether the physical station has a signal path misalignment fault; based on the value of the sorting matching flag, or based on the matching degree between the sorting code in the sorting result and the sorting code in the test result, determine whether the physical station has a sorting result inconsistency fault; based on the deviation statistics of the parameter test data and the normal test benchmark data, determine whether the physical station has a test program configuration error; wherein, the test program configuration error includes at least one of the following: station-specific patch program error, parameter threshold allocation error, pin mapping table configuration error affecting the signal routing or load of the physical station.

[0177] Based on the above embodiments, the cause-and-effect module is further configured to:

[0178] If a signal path error fault is determined based on the similarity matching results of the attribute bit data, then the minimum number of workstation swaps required to correct the signal path error fault is calculated based on the error mapping relationship between each physical workstation and each logical workstation.

[0179] Based on the above embodiments, the cause-and-effect module is further configured to:

[0180] Based on the node layout diagrams of the identified physical workstations and logical workstations, a bipartite graph model is constructed. In this model, the set of left vertices represents physical workstations, the set of right vertices represents logical workstations, and the edges between the left and right vertices represent the mapping relationship between physical and logical workstations. The weight of this mapping relationship is inversely proportional to the confidence level of any abnormal situation at a physical workstation. The bipartite graph model is solved with the goal of minimizing the weight to determine the minimum set of pairwise swaps required to correct the signal path error, which serves as the minimum workstation swapping scheme.

[0181] Furthermore, based on the above embodiments, the sorting anomaly detection device of the testing system may further include: a dot matrix module, a differentiation display module, and an interface control module, wherein:

[0182] The dot matrix module is used to generate a graphical dot matrix corresponding to the layout tray of the sorting machine after the adjustment scheme is determined; the differentiation display module is used to differentiate and display abnormal physical workstations and the adjustment scheme in the graphical dot matrix; the interface control module is used to provide user interface control elements for operators to confirm the adjustment scheme or start the test program configuration review process through the control elements.

[0183] Based on the above embodiments, the feature fingerprint module 520 is further used for:

[0184] The sorting correlation data of each physical station during the testing and sorting processes are obtained through the standard communication interfaces with the testing machine and the sorting machine, respectively.

[0185] Furthermore, based on the above embodiments, the sorting anomaly detection device of the testing system may further include: a stop-work module, wherein:

[0186] The stop-work module is used to control the testing machine or sorting machine to stop working based on the identification result of the abnormal situation.

[0187] Based on the above embodiments, the feature fingerprint module 520 is further used for:

[0188] Acquire the data stream of sorting-related data from each physical workstation during the testing and sorting process; synchronize the data stream in time; extract the operational feature fingerprint of each physical workstation from the time-synchronized sorting-related data.

[0189] The sorting anomaly detection device of the test system provided in the embodiments of the present invention can execute the sorting anomaly detection method of the test system provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the method execution.

[0190] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0191] Example 5

[0192] Figure 6 A schematic diagram of an electronic device 10, which can be used to implement embodiments of the present invention, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0193] like Figure 6As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0194] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0195] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the sorting anomaly detection method for a test system, i.e.:

[0196] The test station of the test machine is used to test known normal devices, and the sorting machine is used to sort the known normal devices according to the test results; the sorting correlation data of each physical station during the testing process and the sorting process is obtained, and the operation feature fingerprint of each physical station is determined according to the sorting correlation data; the operation feature fingerprint of each physical station is processed using an anomaly detection model to identify the abnormal situation of each physical station.

[0197] In some embodiments, the sorting anomaly detection method of the test system can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the sorting anomaly detection method of the test system described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to execute the sorting anomaly detection method of the test system by any other suitable means (e.g., by means of firmware).

[0198] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0199] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0200] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0201] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0202] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0203] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0204] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0205] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for detecting sorting anomalies in a testing system, characterized in that, The testing system includes a testing machine and a sorting machine. The testing machine includes multiple logical stations, and the sorting machine includes multiple physical stations. The logical stations and physical stations are connected in a one-to-one correspondence. The method includes: The known normal devices are tested using the test station of the test machine, and the known normal devices are sorted using the sorting machine based on the test results; Acquire sorting association data of each physical station during the testing and sorting process, and determine the operational feature fingerprint of each physical station based on the sorting association data; An anomaly detection model is used to process the operational feature fingerprints of each physical workstation in order to identify abnormal situations at each physical workstation.

2. The method according to claim 1, characterized in that, The sorting-related data includes at least one of the following: sorting machine instructions, testing machine events, communication data between the sorting machine and the testing machine, user interface status of the sorting machine, user interface status of the testing machine, parameter test results of the logical workstation, standard test data format records of test metadata, and sorting result data.

3. The method according to claim 2, characterized in that, The operational feature fingerprint includes at least one of the following: physical workstation identifier, logical workstation identifier, sorting machine instruction identifier, parameter test data, deviation statistics of parameter test data, running time data, sorting result data, sorting matching flag bit, signal path matching flag bit, and total parameter deviation flag bit.

4. The method according to claim 3, characterized in that, Based on the sorting and correlation data, the operational feature fingerprints of each physical workstation are determined, including: The physical workstation identifier in the sorting machine instruction in the sorting association data is determined by matching it with the logical workstation identifier in the test machine event, the user interface status of the test machine, or the test result.

5. The method according to claim 3, characterized in that, An anomaly detection model is used to process the operational feature fingerprints of each physical workstation, including: An anomaly detection model is used to match the operational feature fingerprints of each physical workstation with the preset standard feature fingerprints, and the anomaly status and confidence level of each physical workstation are determined based on the similarity matching results.

6. The method according to claim 5, characterized in that, An anomaly detection model is used to perform similarity matching between the operational feature fingerprints of each physical workstation and preset standard feature fingerprints, including: An anomaly detection model is used to perform similarity matching between the operational feature fingerprints of each physical workstation and the preset standard feature fingerprints in order to obtain the similarity of the corresponding attribute bit data in the feature fingerprints. Correspondingly, the sorting anomaly detection method of the test system further includes: Based on the similarity matching results of each attribute bit data, each physical workstation is analyzed to determine the cause of the anomaly and / or adjustment plan.

7. The method according to claim 6, characterized in that, Based on the similarity matching results of each attribute bit data, each physical workstation is analyzed to determine the cause of the anomaly, including at least one of the following: Based on the value of the signal path matching flag, or based on the matching degree between the physical workstation identifier and the logical workstation identifier, determine whether the physical workstation has a signal path misalignment fault. Based on the value of the sorting matching flag, or based on the matching degree between the sorting code in the sorting result and the sorting code in the test result, determine whether the physical workstation has a fault of inconsistent sorting results; Based on the deviation statistics of the parameter test data and the normal test benchmark data, determine whether the physical workstation has a test program configuration error; wherein, the test program configuration error includes at least one of the following: workstation-specific patch program error, parameter threshold allocation error, pin mapping table configuration error affecting the signal routing or load of the physical workstation.

8. The method according to claim 6, characterized in that, Based on the similarity matching results of each attribute data point, the analysis of each physical workstation is conducted to determine the adjustment plan, including: If a signal path error fault is determined based on the similarity matching results of the attribute bit data, then the minimum number of workstation swaps required to correct the signal path error fault is calculated based on the error mapping relationship between each physical workstation and each logical workstation.

9. The method according to claim 8, characterized in that, Based on the identified error mapping relationships between each physical workstation and each logical workstation, the minimum workstation swapping scheme required to correct the signal path error is calculated and determined, including: Based on the node layout diagrams of the identified physical workstations and logical workstations, a bipartite graph model is constructed. In the bipartite graph model, the set of left vertices represents physical workstations, the set of right vertices represents logical workstations, and the edges between the left and right vertices represent the mapping relationship between physical and logical workstations. The weight of the mapping relationship is inversely proportional to the confidence level of the abnormal situation of the physical workstation. Based on the objective of minimizing weights, the bipartite graph model is solved to determine the minimum set of pairwise swaps required to correct the signal path error, which serves as the minimum workstation swapping scheme.

10. The method according to claim 6, characterized in that, After determining the adjustment plan, the following is also included: Generate a graphical dot matrix diagram corresponding to the layout of the sorting machine trays; In the graphical dot matrix diagram, the abnormal physical workstations and the adjustment scheme are displayed separately; A user interface control element is provided for operators to confirm the adjustment scheme or initiate the test program configuration review process through the control element.

11. The method according to claim 1, characterized in that, Acquire sorting correlation data for each physical station during the testing and sorting processes, including: The sorting correlation data of each physical station during the testing and sorting processes are obtained through the standard communication interfaces with the testing machine and the sorting machine, respectively.

12. The method according to claim 1, characterized in that, Also includes: Based on the identification results of the abnormal situation, control the testing machine or sorting machine to stop working.

13. The method according to claim 1, characterized in that, Acquire sorting correlation data for each physical station during the testing and sorting process, and determine the operational feature fingerprint of each physical station based on the sorting correlation data, including: Acquire the data stream of sorting-related data from each physical station during the testing and sorting processes; Synchronize the data stream in time; Extract the operational feature fingerprints of each physical workstation from the sorting and correlation data after time synchronization.

14. A sorting anomaly detection device for a testing system, characterized in that, The testing system includes a testing machine and a sorting machine. The testing machine includes multiple logical stations, and the sorting machine includes multiple physical stations. The logical stations and physical stations are connected in a one-to-one correspondence. The device includes: The test sorting module is used to test known normal devices using the test station of the test machine, and to sort the known normal devices using the sorting machine based on the test results; The feature fingerprint module is used to acquire sorting association data of each physical station during the testing and sorting process, and to determine the operational feature fingerprint of each physical station based on the sorting association data. The anomaly identification module is used to process the operational feature fingerprints of each physical workstation using an anomaly detection model in order to identify anomalies in each physical workstation.

15. An electronic device, characterized in that, The electronic device includes: At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the sorting anomaly detection method of the test system according to any one of claims 1-13.

16. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the sorting anomaly detection method of any one of claims 1-13.

17. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the sorting anomaly detection method of the test system according to any one of claims 1-13.

Images