Frequency converter encryption burning method and system

Abstract

The invention discloses a frequency converter encryption burning method and system, the method is applied to a user bootstrap program installed in a chip of a frequency converter, and the method comprises the following steps: receiving a preset key sent by an upper computer and encrypted by a preset subprogram in the upper computer, and a chip password encrypted by the upper computer by using the preset key; decrypting the encrypted preset key by using a preset subprogram which is the same as the upper computer in the chip, and decrypting the encrypted chip password by using the decrypted preset key; using the decrypted chip password to unlock a first memory area of the chip, if unlocking succeeds, requesting an upper computer to read a first program file encrypted by the upper computer by using a preset key, and decrypting the read first program file based on the preset key; and burning the frequency converter based on the decrypted first program file and the unlocked first memory area. By unlocking the memory area of the chip and the first program file, safe burning of the frequency converter is realized.

Description

Technical Field

[0001] This application relates to digital signal processors (DSPs) in the field of industrial automation, and in particular to a method and system for encrypting and programming frequency converters. Background Technology

[0002] Inverters typically use digital signal processors (DSPs) as chips, and their programming mostly relies on user bootloaders pre-stored in Flash memory.

[0003] Specifically, in the existing technology, the program file from the host computer is received through a user boot program, and the file is directly burned into the Flash memory of the chip, thereby completing the inverter programming.

[0004] However, during implementation, most existing technologies are easily acquired by third parties and reverse engineered or illegally copied for production, failing to meet the basic security requirements of industrial applications. Summary of the Invention

[0005] In view of the above-mentioned defects or deficiencies in the existing technology, it is desirable to provide a method and system for encrypted programming of frequency converters. Without pre-storing the user boot program, it can receive the encrypted preset key and chip password, perform decryption operation, unlock the memory area and program the decrypted program file, thus realizing a secure frequency converter programming process and effectively reducing the risk of leakage and unauthorized access to the program file during transmission and programming.

[0006] In a first aspect, this application provides a method for encrypting and programming a frequency converter, applied to the user boot program installed on the chip of the frequency converter, the method comprising: Receive the preset key, which is encrypted by the preset subroutine in the host computer, and the chip password, which is encrypted by the host computer using the preset key; The chip uses the same preset subroutine as the host computer to decrypt the encrypted preset key, and then uses the decrypted preset key to decrypt the encrypted chip password. The chip's first memory area is unlocked using the decrypted chip password. If unlocking is successful, the system requests the host computer to read the first program file encrypted by the host computer using a preset key, and then decrypts the read first program file based on the preset key. The inverter is programmed based on the decrypted first program file and the unlocked first memory area.

[0007] In conjunction with the first aspect, in one possible implementation, before receiving the preset key encrypted by a preset subroutine within the host computer and the chip password encrypted by the host computer using the preset key, the method further includes: Request the host computer to read the chip's hardware version information; Verify the read hardware version information; If successful, the chip serial number and the encrypted serial number stored in the second memory area of ​​the chip are compared and verified. The encrypted serial number is obtained by encrypting the chip serial number using a preset subroutine on the chip that is the same as that in the host computer. If successful, request the host computer to read the chip password.

[0008] In conjunction with the first aspect, in one possible implementation, the inverter is programmed based on the decrypted first program file and the unlocked first memory region, specifically as follows: Erase the first memory region after unlocking; Write the decrypted first program file into the first memory area after erasure; The first memory area of ​​the first program file after decryption is read back, and the information obtained from the readback is sent to the host computer for verification. If the verification passes, the burning process is complete. If the verification fails, the first memory area of ​​the first program file written to the decrypted program file is erased, and after erasure, the computer is requested again to read the encrypted program file. This process is repeated until the inverter is successfully programmed.

[0009] In conjunction with the first aspect, in one possible implementation, the inverter is programmed based on the decrypted first program file and the unlocked first memory region, specifically as follows: Erase the first memory region after unlocking; Remove the entry pointer information from the decrypted first program file to obtain the second program file. Cache the entry pointer information and write the second program file into the erased first memory area. The first memory region written to the second program file is read back, and the information obtained from the readback is sent to the host computer for verification. If the verification passes, the entry pointer information is written to the first memory area containing the second program file, and the programming is completed. If the verification fails, the first memory area containing the second program file is erased, and after erasure, the encrypted first program file is re-requested from the host computer. This process continues until the programming of the frequency converter is completed.

[0010] In conjunction with the first aspect, in one possible implementation, the user boot program is sent from the host computer to the chip.

[0011] Secondly, this application also discloses an inverter encryption programming system, including: a host computer and an inverter chip, wherein the host computer is provided with a preset subroutine, and the inverter chip is provided with a user boot program and a preset subroutine, and the preset subroutine on the host computer is the same as the preset subroutine on the inverter chip. The host computer is configured to encrypt the first program file and the preset chip password using a preset key, and to encrypt the preset key using an internal preset subroutine. The user boot program is configured to receive an encrypted preset key and an encrypted chip password sent by the host computer. The user boot program is also configured to use the same preset subroutine in the chip as the host computer to decrypt the encrypted preset key, and use the decrypted preset key to decrypt the encrypted chip password. The user boot program is also configured to unlock the first memory area of ​​the chip using the decrypted chip password. If the unlocking is successful, it requests the host computer to read the first program file encrypted by the host computer using a preset key, and decrypts the first program file based on the preset key. The user bootloader is also configured to program the inverter based on the decrypted first program file and the unlocked first memory region.

[0012] In conjunction with the second aspect, in one possible implementation, the inverter chip also includes a manufacturer's boot program, while the user boot program is sent to the chip by the host computer. Correspondingly, the host computer is also configured to verify the preset file key entered by the user, and after successful verification, send a user boot program transmission request to the manufacturer's boot program. The manufacturer's bootloader is configured to receive the user bootloader in response to a user bootloader transmission request; The user bootloader is also configured to be automatically cleared from the inverter chip after the programming is completed and the power is turned off.

[0013] In conjunction with the second aspect, in one possible implementation, the preset subroutine on the inverter chip is also configured to encrypt the chip serial number to obtain the serial number ciphertext, and store the serial number ciphertext in the chip's second memory area. The user bootloader is also configured to request the host computer to read the chip's hardware version information; The user bootloader is also configured to verify the read hardware version information; The user bootloader is also configured to compare and verify the chip serial number and the encrypted serial number stored in the chip's second memory area if the verification passes. The user bootloader is also configured to request the chip password from the host computer if the comparison verification passes.

[0014] In conjunction with the second aspect, in one possible implementation, the host computer is further configured to randomly generate first disguised data and merge the first disguised data, the encrypted preset key, the encrypted first program file, the encrypted chip password, and the hardware version information to obtain a merged file, and open the merged file during programming.

[0015] In conjunction with the second aspect, in one possible implementation, the preset subroutine on the inverter chip is also configured to randomly generate second spoofed data and store it in a second memory area.

[0016] Thirdly, this application also provides a computer-readable storage medium having a computer program stored thereon that, when executed by a processor, implements the method of any one of the first aspects above.

[0017] Fourthly, this application also provides a computer program product containing instructions that, when executed, perform any of the methods described in the first aspect above.

[0018] Fifthly, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the method of any one of the first aspects above.

[0019] This application enables a secure inverter programming process by receiving an encrypted preset key and chip password, performing decryption, unlocking the memory area, and burning the decrypted first program file without pre-storing the user boot program. This reduces the risk of leakage and unauthorized access to the first program file during transmission and programming. Attached Figure Description

[0020] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a flowchart of the inverter encryption programming method of this application; Figure 2 A schematic diagram of a chip structure that reserves a user boot program in the existing technology; Figure 3 This is a schematic diagram of a chip structure that does not have a reserved user boot program in the existing technology; Figure 4 This is a block diagram of the inverter chip structure in one embodiment; Figure 5 This is a block diagram of the host computer structure in one embodiment; Figure 6 This is a schematic diagram of the connection between the adapter board and the inverter control board in one embodiment; Figure 7 This is a block diagram of the inverter encryption programming system in one embodiment; Figure 8 This is a block diagram of the inverter chip structure in one embodiment; Figure 9 The flowchart below shows a method for encrypting and programming a frequency converter, as described in another embodiment. Detailed Implementation

[0021] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0022] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present application will now be described in detail with reference to the accompanying drawings and embodiments. Furthermore, the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The terms "first" and "second," etc., in the specification and claims of the embodiments of this application are used to distinguish different objects, not to describe a specific order of objects.

[0023] For ease of understanding, the following explains some key terms in this embodiment: A frequency converter (Digital Signal Processor, DSP) is a power electronic device used to control AC motors. It typically contains chips to execute control logic and programs.

[0024] Programming: The process of writing compiled program code or data into the non-volatile memory (such as Flash or EEPROM) of an embedded device using a special tool.

[0025] An NMOS transistor (N-type metal-oxide-semiconductor field-effect transistor) is a commonly used semiconductor electronic switch. Its core structure includes a gate, a source, and a drain: by applying a suitable voltage (high level) to the gate, a conductive channel can be formed between the source and the drain, allowing current to flow, which is equivalent to the switch being "on"; when the gate voltage is low level, the channel disappears, the current is blocked, which is equivalent to the switch being "off".

[0026] Chip: The core processing unit inside the frequency converter, such as a digital signal processor (DSP) or microcontroller (MCU), which integrates memory and processing units to perform various functions of the frequency converter.

[0027] User bootloader: A piece of program code inside the chip whose main function is to receive program files transmitted from outside and burn them into the chip's designated storage area.

[0028] EEPROM (Electrically Erasable Programmable Read-Only Memory): A type of non-volatile memory. In frequency converters, EEPROM is often used to store small amounts of data that need to be frequently modified or configured individually, such as user parameters, device serial numbers, encryption keys, or calibration data. It works in conjunction with Flash memory that stores the main program and RAM that stores temporary running data.

[0029] Host computer: An external computer system, such as a PC or dedicated programming device, that communicates with the inverter chip and sends burning instructions and program files.

[0030] Encryption subroutine: An identical encryption / decryption algorithm program that is pre-set and stored in both the host computer and the chip, used to encrypt and decrypt data.

[0031] A preset key is a string of secret information that is pre-agreed or dynamically generated between the host computer and the chip for encrypting and decrypting data. Its security directly affects the security of the programming process.

[0032] Chip password: A password used to protect access to specific memory areas inside a chip. Only with the correct chip password can these protected memory areas be unlocked and accessed.

[0033] Flash memory: a type of non-volatile memory that can retain data for a long time even after power is off. Its characteristic is that it needs to be erased in "blocks" before writing (resetting the storage cell to all 1s). It is suitable for storing large-capacity data such as program code that is not frequently changed. It is often used as the storage medium for the main program in embedded devices such as frequency inverters.

[0034] In the existing programming schemes for inverter DSP main controllers, there are generally three types: The first type is to have the manufacturer's boot program built in: such as Figure 2As shown, during production, a fixed area is reserved in the inverter's Flash memory to burn a user-written BootLoader program. This program runs first after the device is powered on, responsible for receiving new program files through interfaces such as serial ports and completing the burning and updating. This method requires pre-allocating Flash space, and the BootLoader usually only provides basic functions but lacks security measures such as encryption.

[0035] The second approach is to utilize the manufacturer's built-in bootloader of the chip: for inverters that do not have a pre-installed user bootloader, such as... Figure 3 As shown, this method relies on the original manufacturer's bootloader embedded in the ROM by the DSP chip manufacturer. By configuring the Boot pin to enter this mode, the inverter can receive program data via serial port and burn it into Flash. This method does not consume additional Flash resources, but the bootloader functionality is limited, generally does not support encryption or verification, and the program file is transmitted in plaintext, posing a higher security risk.

[0036] The third approach is JATG interface programming: by connecting a JATG emulator to the inverter's reserved JATG interface, the DSP's Flash memory can be directly read and written to achieve program programming. This method is mainly used for production or development debugging, requires dedicated hardware, and the interface is usually inconvenient for on-site access. JATG programming also lacks security mechanisms; program files are easily obtained and copied, which is detrimental to protection in industrial environments.

[0037] Based on this, the present application provides a method and system for encrypted programming of frequency converters. It can achieve a secure frequency converter programming process by receiving an encrypted preset key and chip password, performing decryption operations, unlocking the memory area, and programming the decrypted program file without pre-storing the user boot program. This reduces the risk of leakage and unauthorized access to the program file during transmission and programming.

[0038] The method provided in this application embodiment can be applied to, for example... Figure 4 The chips installed on the control board of the inverter shown are, for example... Figure 5 The host computer 71 shown, and the connection between the control board and the host computer 71, are as follows: Figure 6 The adapter plate shown.

[0039] like Figure 4 As shown, the inverter chip 72 is equipped with a first encryption subroutine 722 that is the same as that inside the host computer. The first encryption subroutine 722 is used to read the chip serial number and encrypt the chip serial number to obtain the serial number ciphertext, and store the serial number ciphertext in the second memory area of ​​the chip. Specifically, the second memory area is EEPROM.

[0040] like Figure 5As shown, the host computer 71 includes a first encryption subroutine and a second encryption subroutine; the second encryption subroutine is used to encrypt the first program file and the preset chip password using a preset key B, and the first encryption subroutine is used to encrypt the key B. At the same time, the host computer 71 also obtains the hardware version of the chip and merges the hardware version, the encrypted key B, the chip password and the first program file into a burning file named xx.bin.

[0041] like Figure 6 The diagram shows an adapter board connecting the inverter control board and the host computer 71. The adapter board consists of a power supply circuit, a USB to serial port circuit, a boot pin level selection circuit, and an automatic power-on circuit. The power supply circuit consists of VCC and GND pins, which directly provide power to the inverter control board; The USB-to-serial circuit includes a USB-to-serial chip and TX, RX, and RTS pins respectively located on the chip. TX and RX are connected to the corresponding RX and TX pins of the inverter control board for data communication. The RTS pin is used for the boot pin level selection circuit. By controlling the high and low levels of this pin, the BOOT pin state of the inverter chip is set, thus adapting to the startup mode requirements of different chips. The automatic power-on circuit uses the DTR pin of the USB-to-serial chip to connect to an NMOS transistor. The host computer 71 controls the DTR level to turn the NMOS transistor on or off, thereby automatically controlling the power-on and power-off of the inverter chip, realizing a power-on and retransmission function without manual intervention in case of boot failure.

[0042] like Figure 1 As shown, this application provides a method for encrypting and programming a frequency converter, applied to the user boot program 721 installed on the frequency converter chip 72. The method includes: S1. Receive the preset key encrypted by the first encryption subroutine in the host computer 71 and the chip password encrypted by the host computer 71 using the preset key and the second encryption subroutine. User bootloader 721 can be configured to receive data streams from host computer 71 via its communication interface (e.g., serial port, USB interface, or Ethernet interface). Host computer 71 encrypts the preset key and chip password respectively, and then packages them into data frames or data packets and sends them to the chip.

[0043] S2. Use the first encryption subroutine 722 inside the chip, which is the same as the host computer 71, to decrypt the encrypted preset key, and use the decrypted preset key to decrypt the encrypted chip password. Specifically, the user boot program 721 first calls the first encryption subroutine 722, which is the same as the host computer 71 and is pre-installed inside the chip, to decrypt the received encryption preset key, thereby obtaining the original preset key. Subsequently, the decrypted preset key is used as a decryption parameter to perform a second decryption on the received encrypted chip password, ultimately obtaining the original chip password.

[0044] S3. Use the decrypted chip password to unlock the first memory area of ​​the chip. If the unlocking is successful, request the host computer 71 to read the first program file encrypted by the host computer 71 using a preset key, and decrypt the read first program file based on the preset key. S4. The inverter is programmed based on the decrypted first program file and the unlocked first memory area.

[0045] The user bootloader 721 writes the decrypted first program file byte by byte or block by block into the unlocked first memory area according to a predetermined address mapping relationship. Specifically, the first memory area is flash memory; after the write operation is completed, the first program file is stored in the chip's first memory area.

[0046] In one possible implementation, S4 is specifically: S41. Erase the first memory region after unlocking; The erasure process aims to remove any old data or residual information that may exist in the first memory region, providing a clean and undisturbed storage environment for the subsequent writing of a new first program file. Specifically, the user bootloader 721 can send a specific erase command to the chip's memory controller to uniformly set all memory cells in the target memory region to a preset state (e.g., all set to 1 or 0).

[0047] S42. Write the decrypted first program file to the first memory area after erasure. Specifically, the user boot program 721 can write the data stream of the decrypted first program file byte by byte or word by word to the corresponding address of the first memory area through the memory bus interface inside the chip.

[0048] S43. Read back the first memory area of ​​the first program file after it has been written to the decryption process, and send the read-back information to the host computer 71 for verification. If the verification passes, the burning process is complete. This verification step is crucial for ensuring the correctness of the write operation. It aims to verify that the data written to the memory area is completely identical to the original decrypted first program file, thus guaranteeing data integrity and accuracy. One implementation involves the user bootloader 721 reading data of the same length from the first memory area after writing and performing a precise byte-by-byte or word-by-word comparison with the original decrypted first program file. Another implementation involves calculating the checksum of the decrypted first program file (e.g., cyclic redundancy check (CRC) or a simple cumulative sum) before writing, then reading the data from the first memory area and calculating its checksum after writing, and finally comparing the two checksums for consistency.

[0049] In one possible implementation, the user boot program 721 also encrypts the readback information and uploads the encrypted readback information to the host computer 71 for verification.

[0050] S44. If the verification fails, the first memory area of ​​the first program file written to the decrypted program file is erased, and after erasure, the encrypted program file is re-requested from the host computer 71. This process is repeated until the inverter is successfully programmed.

[0051] When verification fails, the user bootloader 721 immediately performs the same erasure operation as described above to clear any potentially corrupted data. Subsequently, it sends a command to the host computer 71 via the communication interface to re-request reading the encrypted first program file. Upon receiving the request, the host computer 71 resends the encrypted first program file, and the user bootloader 721 then executes the entire loop of decryption, writing, and verification again.

[0052] Through the above technical solution, this application ensures the purity of the writing environment and avoids interference from old data during the inverter programming process based on the decrypted first program file and the unlocked first memory area by pre-erasing the first memory area. Subsequently, by reading back and verifying the written first program file, errors that may occur during the programming process can be detected and located in a timely manner, thereby ensuring the integrity and accuracy of the first program file. Furthermore, when verification fails, this application can automatically trigger the erasure operation of the written area and request the encrypted first program file from the host computer 71 for reprogramming until successful. This closed-loop mechanism of "erasure-write-verification-failure retry" effectively solves the problems of difficulty in timely detection of programming failures or write errors and the lack of automatic recovery mechanisms in the prior art, reduces the reliance on manual intervention, and improves the automation level and production efficiency of the programming process.

[0053] In another possible implementation, S4 is specifically: S41. Erase the first memory region after unlocking; S42. Remove the entry pointer information from the decrypted first program file to obtain the second program file, cache the entry pointer information, and write the second program file into the erased first memory area. The entry pointer information includes the address to jump to the main function (without this address, the program will not continue execution). This application separates the entry pointer information, ensuring that the main program is completely written first. After verification, the most critical entry pointer information is then written to its reserved location. If the pointer and the main program are written together, and the programming process fails midway, the pointer may have already taken effect, but the program may be incomplete. Upon power-up, the device will "run away" because it points to incomplete code. Therefore, this application, through the design of "removing the pointer and delaying the writing," ensures that even if the programming is interrupted, the inverter chip 72 cannot start a faulty program.

[0054] S43. Read back the first memory area written to the second program file, and send the information obtained from the readback to the host computer 71 for verification. S44. If the verification passes, the entry pointer information is written to the first memory area storing the second program file, and the burning is completed. If the verification fails, the first memory area containing the second program file is erased, and after erasure, the encrypted first program file is re-requested from the host computer 71. This process continues until the burning of the frequency converter is completed.

[0055] This application ensures the security of the inverter's first program file during transmission and programming by introducing a multi-layered encryption and decryption mechanism. By encrypting the transmission with a preset key and chip password, and decrypting it using a preset subroutine within the chip, the application effectively prevents the first program file from being illegally intercepted and tampered with during transmission. Furthermore, the encrypted first program file is only requested and decrypted after the chip password is successfully decrypted and the first memory area is unlocked, ensuring the confidentiality of the first program file. This effectively solves the problem in traditional programming schemes where the first program file is easily obtained by third parties for reverse engineering or illegal copying and production. Multiple protection mechanisms are also employed to prevent uncontrollable consequences caused by user-mandated updates.

[0056] One possible implementation is that after writing the entry pointer information into the first memory area storing the second program file, this application also reads back the area where the entry pointer was written and sends the read-back information to the host computer 71 for verification. If it passes, the burning is complete; if it fails, a request to read the first program file is sent to the host computer 71 again, and so on, until the burning is complete.

[0057] In some of the solutions described above in this application, a method for receiving encrypted data for programming is proposed to protect the first program file from unauthorized copying. However, in its implementation, directly receiving encrypted data without verifying the chip's hardware identity and serial number may lead to unauthorized or tampered devices participating in the programming process, thereby reducing the overall security of the system. Therefore, in one possible implementation, before S1, the method further includes: Request the host computer 71 to read the chip's hardware version information; Verify the read hardware version information; If successful, the chip serial number and the encrypted serial number stored in the second memory area of ​​the chip are compared and verified. The encrypted serial number is obtained by encrypting the chip serial number using the same preset subroutine on the chip as the host computer. This step aims to further verify the chip's identity and prevent device tampering or illegal copying. The chip serial number serves as the device's unique identifier, and the encrypted serial number is its encrypted form; comparing the two effectively verifies the chip's authenticity. Specifically, the user bootloader 721 can read the chip serial number and its encrypted form from the chip's second memory area. Subsequently, the first encryption subroutine 722 uses the same encryption algorithm (or its inverse operation) as the host computer to encrypt the read chip serial number, obtaining a calculated encrypted serial number, and compares it with the encrypted serial number read from the second memory area. If they match, the verification passes.

[0058] If successful, request the host computer 71 to read the chip password.

[0059] In this embodiment, the chip password is requested only after all pre-verifications have been successful, providing a secure foundation for subsequent decryption and programming operations. Specifically, after completing hardware version verification and serial number comparison verification, the user boot program 721 can send a specific request instruction to the host computer 71, indicating that it is ready to receive the chip password. Upon receiving this request, the host computer 71 sends the preset, encrypted chip password to the user boot program 721. Alternatively, after receiving a verification pass signal from the user boot program 721, the host computer 71 can also proactively send the encrypted chip password to the user boot program 721, which then receives it and prepares to perform subsequent decryption operations.

[0060] This application introduces a verification mechanism for the chip hardware version information and serial number before receiving the encryption key and chip password, effectively improving the security of the inverter programming process. Specifically, firstly, by requesting and verifying the chip's hardware version information from the host computer 71, it ensures that the programming operation is only performed on a legitimate hardware platform that meets preset requirements, avoiding the intervention of incompatible or counterfeit hardware. Secondly, after the hardware version verification is passed, the chip serial number stored in the chip's second memory area is further compared and verified with the ciphertext of the serial number encrypted by the first encryption subroutine 722. This mechanism can effectively identify and prevent tampered or illegally copied chips from participating in the programming process, because any tampering with the chip serial number will result in a mismatch of the ciphertext, thus exposing illegal behavior. Only after both the hardware version and the chip serial number have passed strict verification is the request to the host computer 71 to read the chip password made, ensuring that subsequent decryption and programming operations are only performed on authorized and tamper-free legitimate chips.

[0061] In some of the embodiments described above in this application, a user boot program 721 is proposed as the core component for performing encryption burning. However, in its implementation, if the user boot program 721 is pre-installed on the chip, memory needs to be reserved, which will occupy a certain amount of storage space, resulting in a corresponding reduction in Flash capacity, limiting the complexity of program functions or increasing hardware costs.

[0062] In this regard, this application further proposes that the user boot program 721 is sent from the host computer 71 to the inverter chip.

[0063] For example, Figure 9 This is another flowchart illustrating the inverter encryption programming method provided in this application embodiment, as shown below. Figure 9 As shown, the method includes the following steps: S901. Insert the adapter board between the host computer 71 and the inverter's control board and power it on. S902, host computer 71 opens the merged file; S903: The user inputs the preset file key of the merged file into the host computer 71. After successful verification, the host computer 71 sends the user boot program 721 to the chip through the manufacturer's boot program 723 on the chip. If the sending is successful, S904 is executed. The preset file key of the merged file is the same as the preset key of the program file. Both are delivered by the host computer manufacturer to the host computer and the inverter user.

[0064] S904. The user boot program 721 located on the chip requests the host computer 71 to read the hardware version information in the merged file, and verifies the read hardware version information with the hardware version information stored inside the chip. If the verification is successful, S905 is executed. S905, User boot program 721 obtains the chip serial number and serial number ciphertext on the second memory area of ​​the chip, and compares and verifies the chip serial number and serial number ciphertext. If they pass, then execute S906. S906, the user boot program 721 requests the host computer 71 to read the chip password, and receives the encrypted chip password and the preset key used to encrypt the chip password sent by the host computer 71. The preset key is encrypted by the first encryption subroutine in the host computer 71. S907, the user boot program 721 decrypts the preset key through the first encryption subroutine 722 on the chip, and uses the decrypted preset key to decrypt the read chip password. If the decryption is successful, S908 is executed. S908. Unlock the first memory area using the decrypted chip password, and erase the first memory area after successful unlocking; S909, the user boot program 721 requests the host computer 71 to read the first program file, decrypts the received first program file using a preset key, and writes the decrypted first program file into the erased first memory area. S910, the user boot program 721 reads back the first memory area after writing the first program file and sends it to the host computer 71 for verification. If it passes, the burning is completed; if it fails, S911 is executed. S911, the user boot program 721 requests the first program file from the host computer 71 again, and so on, until the readback verification is passed and the burning is completed; S912. After the programming is completed and the power is turned off, the user boot program 721 is automatically cleared from the inverter chip.

[0065] It should be noted that if any of the following occurs: step S903 fails to send, step S905 fails to verify, or step S907 fails to decrypt, the burning process will be considered a failure and the burning process will be terminated.

[0066] Secondly, such as Figure 7 As shown, this application also discloses a frequency converter encryption programming system 70, including: a host computer 71 and a frequency converter chip 72. The host computer 71 is provided with a preset subroutine, and the frequency converter chip 72 is provided with a user boot program 721 and a preset subroutine. The preset subroutine on the host computer is the same as the preset subroutine on the frequency converter chip, and both are the first encryption subroutine. The host computer 71 is configured to encrypt the first program file and the preset chip password using a preset key, and to encrypt the preset key using an internal first encryption subroutine. In one possible implementation, the chip cryptography is 128 bits.

[0067] The user boot program 721 is configured to receive the encrypted preset key and the encrypted chip password sent by the host computer 71; The user boot program 721 is also configured to decrypt the encrypted preset key using the first encryption subroutine 722, which is the same as that of the host computer 71, and to decrypt the encrypted chip password using the decrypted preset key. The user boot program 721 is also configured to unlock the first memory area of ​​the chip using the decrypted chip password. If the unlock is successful, it requests the host computer 71 to read the first program file encrypted by the host computer 71 using a preset key, and decrypts the read first program file based on the preset key. It is worth mentioning that if the unlock fails or the chip itself does not have a password, it is considered not to be a standard product of the company and updates will stop.

[0068] User boot program 721 is also configured to program the inverter based on the decrypted first program file and the unlocked first memory area.

[0069] This application adopts a complete solution that integrates an encrypted host computer 71 and an automatic programming adapter board. The host computer 71 encrypts and encapsulates the first program file to generate a secure transmission file. Manufacturers do not need to directly hand over the source file to customers, send personnel to the site to update the software, or make a dedicated offline downloader. Users can also easily update the inverter program, which greatly saves time and costs and reduces the risk of leakage.

[0070] In one possible implementation, such as Figure 8 As shown, the inverter chip 72 also has a manufacturer's boot program 723, and a user boot program 721 sent from the host computer 71 to the chip. Correspondingly, the host computer 71 is also configured to verify the preset file key entered by the user, and after successful verification, send a user boot program 721 transmission request to the manufacturer boot program 723. The manufacturer bootloader 723 is configured to receive the user bootloader 721 in response to a transmission request from the user bootloader 721; The user boot program 721 is configured to be automatically cleared from the inverter chip after the programming is completed and the power is turned off.

[0071] In this application, the manufacturer's boot program 723 serves as a secure channel for receiving the user boot program 721 sent by the host computer 71. For example, the manufacturer's boot program 723 can be a program embedded in a read-only memory (ROM) or a protected flash memory area at the time of chip manufacturing, possessing high privileges and security, and used to process the user boot program 721 transmission request sent by the host computer 71. Furthermore, the user boot program 721 is not pre-embedded in the inverter chip 72, but is dynamically transmitted to the chip by the host computer 71 when a programming operation is required. This dynamic loading mechanism eliminates the need to reserve a dedicated BootLoader area at the factory, saving storage space that can accommodate more program code and shortening the development cycle.

[0072] Through the above technical solution, this application provides the infrastructure for the dynamic transmission and deletion of the user boot program 721 via the manufacturer boot program 723 on the inverter chip 72, avoiding the user boot program 721 from residing on the chip for an extended period. The user boot program 721 is sent to the chip by the host computer 71, rather than being pre-stored, reducing memory usage. The host computer 71 sends a transmission request for the user boot program 721 to the manufacturer boot program 723 to prevent unauthorized access. The first encryption subroutine 722 is responsible for encrypting the chip serial number and deleting the user boot program 721. These steps in this application, composed of the host computer 71, the user boot program 721, and the manufacturer boot program 723, enhance the complexity of the downloaded program and increase the difficulty of cracking it.

[0073] In conjunction with the second aspect, in one possible implementation, the preset subroutine on the inverter chip is also configured to encrypt the chip serial number to obtain the serial number ciphertext, and store the serial number ciphertext in the chip's second memory area. The preset subroutine on the inverter chip is the code for normal operation of the inverter, which is burned by the manufacturer. When powered on for the first time, the first encryption subroutine 722 on the inverter chip will read the chip serial number, encrypt it and store it in a specific area of ​​the EEPROM of the inverter control board. This area is filled with random data before and after to disguise it. This method prevents the method of copying the EEPROM from being verified by the host computer 71.

[0074] The user boot program 721 is also configured to request the host computer 71 to read the chip's hardware version information; User bootloader 721 is also configured to verify the read hardware version information; User bootloader 721 is also configured to compare and verify the chip serial number and serial number ciphertext stored in the second memory area of ​​the chip if the verification passes. The user boot program 721 is also configured to request the chip password from the host computer 71 if the comparison verification passes.

[0075] In conjunction with the second aspect, in one possible implementation, the host computer 71 is further configured to randomly generate first disguised data and merge the first disguised data, the encrypted preset key, the encrypted first program file, the encrypted chip password and the hardware version information to obtain and open the merged file during programming. In conjunction with the second aspect, in one possible implementation, the preset subroutine on the inverter chip is also configured to randomly generate second spoofed data and store it in a second memory area.

[0076] The randomly generated second disguised data refers to random data generated by a preset subroutine on the inverter chip. This data has no actual function but is used to obfuscate or hide the real data. Its generation aims to increase the complexity and unpredictability of the stored data, thereby effectively preventing unauthorized reverse engineering or data analysis. Specifically, the preset subroutine on the inverter chip can call the hardware random number generator (TRNG) integrated within the inverter chip 72 to generate truly random data with high entropy, ensuring the unpredictability of the disguised data. Alternatively, the preset subroutine on the inverter chip can utilize the chip's internal pseudo-random number generator (PRNG), combining dynamically changing physical quantities such as the system clock, internal temperature sensor readings, or specific register states as seeds, to generate pseudo-random data using cryptographically secure algorithms. The randomly generated second disguised data is stored in a second memory region to mix with existing critical data (such as serial number ciphertext) in that region, further increasing the degree of data obfuscation. Specifically, a pre-defined subroutine on the inverter chip can directly write the generated second masquerading data into a preset address range in the second memory region, interleaving it with data such as the serial number ciphertext in physical storage, or overwriting some non-critical filler data in that region. Alternatively, the pre-defined subroutine on the inverter chip can logically combine the second masquerading data with the existing serial number ciphertext in the second memory region, for example, through XOR operations, concatenation, or insertion, to form a new composite data structure, and then store this composite data back in the second memory region.

[0077] The first and second disguised data further address the security shortcomings of existing technologies. Specifically, the random generation of the first / second disguised data introduces unpredictability, preventing attackers from inferring real information by analyzing stored data using fixed patterns. Storing the second disguised data in a second memory area effectively obfuscates critical data such as the original serial number ciphertext, increasing data diversity and significantly improving data storage security. This mechanism makes it difficult for attackers to distinguish between real and disguised data when attempting reverse engineering or illegal copying, greatly increasing the difficulty of cracking and effectively preventing illegal copying and tampering of the inverter chip 72, thus enhancing overall security protection capabilities.

[0078] It should be noted that although the operations of the method of the present invention are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all of the operations shown must be performed to achieve the desired result. On the contrary, the steps depicted in the flowchart may be performed in a different order. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0079] On another front, this application also provides a computer-readable storage medium, which may be included in a frequency converter or exist independently, not assembled into the frequency converter. The aforementioned computer-readable storage medium stores one or more programs that, when used by one or more processors, execute the methods described in this application. For example, it may execute... Figure 1 The steps of the method shown.

[0080] This application provides a computer program product including instructions that, when executed, cause the method described in this application to be performed. For example, it can execute... Figure 1 The steps of the method shown.

[0081] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0082] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the inventive concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. A method for encrypting and programming a frequency converter, characterized in that, The method includes: installing a user boot program on a chip used in a frequency converter. Receive a preset key encrypted by a preset subroutine within the host computer, and a chip password encrypted by the host computer using the preset key; The encrypted preset key is decrypted using the same preset subroutine inside the chip as the host computer, and the decrypted preset key is then used to decrypt the encrypted chip password. The first memory area of ​​the chip is unlocked using the decrypted chip password. If the unlocking is successful, a request is made to the host computer to read the first program file encrypted by the host computer using a preset key, and the first program file read is decrypted based on the preset key. The inverter is programmed based on the decrypted first program file and the unlocked first memory area.

2. The method according to claim 1, characterized in that, Before receiving the preset key encrypted by a preset subroutine within the host computer and the chip password encrypted by the host computer using the preset key, the method further includes: Request the host computer to read the chip's hardware version information; Verify the read hardware version information; If successful, the chip serial number and the encrypted serial number stored in the second memory area of ​​the chip are compared and verified. The encrypted serial number is obtained by encrypting the chip serial number using a preset subroutine that is the same as that of the host computer on the chip. If successful, a request is sent to the host computer to read the chip password.

3. The method according to claim 1 or 2, characterized in that, The inverter is programmed based on the decrypted first program file and the unlocked first memory area, specifically as follows: Erase the first memory region after unlocking; Write the decrypted first program file into the first memory area after the erasure process; The first memory area of ​​the first program file after decryption is read back, and the information obtained from the readback is sent to the host computer for verification. If the verification passes, the burning process is complete. If the verification fails, the first memory area of ​​the first program file written to the decrypted program file is erased, and after erasure, the computer is requested again to read the encrypted program file. This process is repeated until the inverter is successfully programmed.

4. The method according to claim 1 or 2, characterized in that, The inverter is programmed based on the decrypted first program file and the unlocked first memory area, specifically as follows: Erase the first memory region after unlocking; The entry pointer information in the decrypted first program file is removed to obtain the second program file. The entry pointer information is cached, and the second program file is written into the erased first memory area. The first memory region written to the second program file is read back, and the information obtained from the readback is sent to the host computer for verification. If the verification passes, the entry pointer information is written to the first memory area containing the second program file, and the programming is completed. If the verification fails, the first memory area containing the second program file is erased, and after erasure, the encrypted first program file is re-requested from the host computer. This process continues until the programming of the frequency converter is completed.

5. The method according to claim 4, characterized in that, The user boot program is sent from the host computer to the chip.

6. A frequency converter encryption programming system, characterized in that, include: The host computer and the inverter chip are provided. The host computer is provided with a preset subroutine, and the inverter chip is provided with a user boot program and a preset subroutine. The preset subroutine on the host computer is the same as the preset subroutine on the inverter chip. The host computer is configured to encrypt the first program file and the preset chip password using a preset key, and to encrypt the preset key using an internal preset subroutine. The user boot program is configured to receive an encrypted preset key and an encrypted chip password sent by the host computer. The user boot program is also configured to use a preset subroutine within the inverter chip that is identical to that in the host computer to decrypt the encrypted preset key, and then use the decrypted preset key to decrypt the encrypted chip password. The user boot program is also configured to unlock the first memory area of ​​the inverter chip using the decrypted chip password. If the unlocking is successful, it requests the host computer to read the first program file encrypted by the host computer using a preset key, and decrypts the read first program file based on the preset key. The user bootloader is also configured to program the inverter based on the decrypted first program file and the unlocked first memory region.

7. The system according to claim 6, characterized in that, The inverter chip also has a manufacturer's boot program, which is sent from the host computer to the inverter chip. Correspondingly, the host computer is also configured to verify the preset file key entered by the user, and after successful verification, send a user boot program transmission request to the manufacturer's boot program. The manufacturer's bootloader is configured to receive the user bootloader in response to the user bootloader transmission request; The user boot program is also configured to be automatically cleared from the inverter chip after the programming is completed and the power is turned off.

8. The system according to claim 7, characterized in that, The preset subroutine on the inverter chip is also configured to encrypt the chip serial number, obtain the serial number ciphertext, and store the serial number ciphertext in the chip's second memory area. The user boot program is also configured to request the host computer to read the chip's hardware version information; The user bootloader is also configured to verify the read hardware version information; The user boot program is also configured to compare and verify the chip serial number and serial number ciphertext stored in the second memory area of ​​the chip if the verification is successful. The user boot program is also configured to request the chip password from the host computer if the comparison verification passes.

9. The system according to claim 8, characterized in that, The host computer is also configured to randomly generate first disguised data and merge the first disguised data, the encrypted preset key, the encrypted first program file, the encrypted chip password and the hardware version information to obtain a merged file and open the merged file during the burning process.

10. The system according to claim 8, characterized in that, The preset subroutine on the inverter chip is also configured to randomly generate second spoofed data and store it in the second memory area.

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