Electronic device

Abstract

The invention provides an electronic device. The electronic device comprises an electronic component and an antenna component. An antenna assembly is disposed over the electronic assembly and defines a cavity configured to receive the assembly to adjust impedance matching between the electronic assembly and the antenna assembly.

Description

Technical Field

[0001] This disclosure relates to an electronic device. Background Technology

[0002] Electronic devices that use antennas to transmit signals (e.g., radio frequency (RF) signals) may include an antenna layer and a circuit layer electrically connected to the antenna layer. Typically, coupling components may be coupled to a feed point and / or ground point of the antenna layer. However, the mounting space required for such coupling components can be a bottleneck for package minimization and manufacturing efficiency. Furthermore, signal transmission through coupling components may be unstable, potentially affecting antenna performance. Summary of the Invention

[0003] In some configurations, an electronic device includes an electronic component and an antenna component. The antenna component is positioned above the electronic component and defines a cavity configured to accommodate a component to adjust an impedance match between the electronic component and the antenna component.

[0004] In some configurations, an electronic device includes a carrier, an impedance matching assembly, and an antenna assembly. The impedance matching assembly is disposed above the carrier. The antenna assembly is disposed above the carrier. The antenna assembly defines a cavity. The antenna assembly includes a feed structure extending into the cavity and electrically connected to the impedance matching assembly.

[0005] In some configurations, an electronic device includes a carrier and an antenna assembly. The antenna assembly is disposed above the carrier and has a sidewall defining a cavity extending toward the carrier. The antenna assembly includes an antenna pattern and a feed structure disposed within the cavity and connected to the antenna pattern. A portion of the sidewall is exposed by the feed structure. Attached Figure Description

[0006] Various aspects of some embodiments of this disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various structures may not be drawn to scale, and the dimensions of the various structures may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1A A perspective view of an electronic device configured according to some of the present disclosure is shown.

[0008] Figure 1B Illustrations of some configurations according to this disclosure, such as Figure 1A The cross-sectional view of the electronic device shown in the image.

[0009] Figure 2A The simulation results of the S-parameters of the electronic device versus frequency are plotted.

[0010] Figure 2B The simulation results of the S-parameters of the electronic device disclosed herein versus frequency are illustrated.

[0011] Figure 3 Cross-sectional views of electronic devices configured according to some of the present disclosure are shown.

[0012] Figure 4 Cross-sectional views of electronic devices configured according to some of the present disclosure are shown.

[0013] Figure 5 A perspective view of an electronic device configured according to some of the present disclosure is shown.

[0014] Figure 6 A top view of an electronic device configured according to some of the present disclosure is shown.

[0015] Figure 7A The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0016] Figure 7B The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0017] Figure 7C The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0018] Figure 7D The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0019] Figure 7E The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0020] Figure 7F The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0021] Figure 7G The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0022] Figure 8A The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0023] Figure 8B The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0024] Figure 8C The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0025] Figure 8D The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0026] Figure 9A The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0027] Figure 9B The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0028] Figure 9C The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0029] Figure 9D The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0030] Figure 9E The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0031] Figure 9F The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0032] Figure 9G The illustration depicts one or more stages of an example of a method for manufacturing an electronic device according to some embodiments of the present disclosure. Detailed Implementation

[0033] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar components. The arrangement of this disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

[0034] The following disclosure provides numerous different arrangements or examples of implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of this disclosure. Of course, these components and arrangements are merely examples and are not intended to be limiting. For example, in the following description, an arrangement may be formed on or above a second feature, including direct contact between the first and second features, and may also include arrangements where additional features may be formed or arranged between the first and second features such that the first and second features do not directly contact each other. Furthermore, reference numerals and / or letters may be repeated in various instances of this disclosure. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various arrangements and / or configurations discussed.

[0035] Figure 1A and Figure 1B An electronic device 1a according to some configurations of this disclosure is illustrated. It should be noted that, for the sake of brevity, Figure 1A and Figure 1B Some features are omitted. In some configurations, electronic device 1a may be suitable for, for example, wireless devices such as user equipment (UE), mobile terminals, mobile devices, devices communicating with the Internet of Things (IoT), etc. In some configurations, electronic device 1a may be or include portable devices. In some configurations, electronic device 1a may support fifth-generation (5G) communication, such as sub-6 GHz bands and / or millimeter (mm) wave bands. For example, electronic device 1a may have both sub-6 GHz devices and mm wave devices. In some configurations, electronic device 1a may support beyond 5G or 6G communication, such as megahertz (THz) frequencies. Electronic device 1a may be configured to radiate and / or receive electromagnetic (EM) signals, such as radio frequency (RF) signals. For example, electronic device 1a can be configured to operate at frequencies between about 1 GHz and about 10 THz, such as 1 GHz, 5 GHz, 10 GHz, 20 GHz, 30 GHz, 40 GHz, 50 GHz, 100 GHz, 300 GHz, 1 THz, 5 THz or 10 THz.

[0036] See Figure 1A The electronic device 1a may include a carrier 10 and an antenna assembly 20. The antenna assembly 20 may define a cavity 50 extending toward the carrier 10. In some configurations, the electronic device 1a may further include impedance matching components 60a and 60b disposed within the cavity 50. In some configurations, the impedance matching components 60a and 60b may be configured to adjust, modify, or control the feeding signal transmitted from the carrier 10 to the antenna assembly 20.

[0037] See Figure 1B The carrier 10 may include a system board, motherboard, printed circuit board (PCB), or other suitable carrier. The carrier 10 may include circuit structures or interconnect structures, such as redistribution layers (RDLs), circuit layers, conductive traces, conductive pads, vias, etc. The carrier 10 may include a surface 10s1 (or a lower surface), a surface 10s2 (or an upper surface) opposite to surface 10s1, and a surface 10s3 (or a lateral surface) extending between surface 10s1 and surface 10s2. The carrier 10 may include pads 12 exposed by surface 10s2. Pads 12 may be configured to, for example, provide a feed signal to antenna assembly 20.

[0038] Antenna assembly 20 may be mounted on or above surface 10s2 of carrier 10. Antenna assembly 20 may be configured to radiate and / or receive electromagnetic signals, such as RF (radio frequency) signals. In some configurations, antenna assembly 20 may include an antenna in package (AiP) device. Antenna assembly 20 may be of any suitable type, such as patch antenna, slot-coupled antenna, stacked patch, dipole, monopole, etc., and may have different orientations and / or polarizations. Antenna assembly 20 may include an ultra-wideband antenna. In simulation results of the reflection coefficient of antenna assembly 20 against frequency, the frequency range / band less than 10% (i.e., 10 dB) of the feed signal is approximately between 5.8 GHz and 8.5 GHz, such as 5.8 GHz, 6.2 GHz, 6.6 GHz, 7 GHz, 7.5 GHz, 8 GHz, or 8.5 GHz. In some configurations, the antenna assembly 20 can be preformed using a laser direct structuring (LDS) process (or technology).

[0039] In some configurations, antenna assembly 20 may include a dielectric structure 22, an antenna pattern 24, and a feed structure 25 (or a conductive structure or feed assembly). The dielectric structure 22 may be configured to support the antenna pattern 24 and / or the feed structure 25. The dielectric structure 22 may be disposed on and / or attached to the surface 10s2 of the carrier 10. In some configurations, the dielectric structure 22 may include a compound such as a liquid crystal compound. For example, the dielectric structure 22 may include a compound having a liquid crystal substrate, such as a liquid crystal polymer (LCP). The dielectric structure 22 may withstand temperatures up to 260 degrees Celsius or higher. The dielectric structure 22 may have a dielectric constant (Dk) between about 2 and 6. The dielectric structure 22 may have a dissipation factor (Df) between about 0 and 0.009. In some configurations, the dielectric structure 22 may include epoxy resin, thermoplastic polyurethane (TPU), soda-lime silicate glass, alkali aluminosilicate glass, liquid silicone rubber (LSR), polycarbonate (PC), nylon, polybutylene terephthalate (PBT), etc. The dielectric structure 22 may have a surface 22s1 (or upper surface) and a surface 22s2 (or lateral surface) substantially perpendicular to surface 22s1.

[0040] In some configurations, the dielectric structure 22 may have an upper portion 22t, a lower portion 22b (or a base portion or substrate portion), and an extension 22p (or intermediate portion) located between the upper portion 22t and the lower portion 22b. The upper portion 22t may be a plate spaced apart from the carrier 10. In some configurations, the upper portion 22t may support and expose the exposed surface pattern 24.

[0041] The extension 22p may extend between the upper portion 22t and the lower portion 22b. In some configurations, the extension 22p may support the upper portion 22t. In some configurations, the extension 22p may be configured to support the power supply structure 25. In some configurations, the extension 22p may have a sidewall 22ps1 (or an outer sidewall) and a sidewall 22ps2 (or an inner sidewall). In some configurations, the sidewall 22ps2 may define a cavity 50 (or recess, opening, or via) extending between the lower portion 22b of the dielectric structure 22 and the surface 22s1. In some configurations, the slope defined by the normal direction of the sidewall 22ps1 relative to the surface 20s2 may be different from the slope defined by the normal direction of the sidewall 22ps2 relative to the surface 20s2. In some configurations, the sidewall 22ps1 may be steeper than the sidewall 22ps2. In some configurations, the extension 22p may taper along a direction far away from the carrier 10.

[0042] In some configurations, the lower portion 22b may serve as the bottom of the cavity 50. In some configurations, the lower portion 22b may have surfaces 22bs1 and 22bs2. In some configurations, surface 22bs1 may be spaced apart from the carrier 10. Surface 22bs1 may serve as the bottom layer of the dielectric structure 22. Surface 22bs2 may serve as the bottom of the cavity 50. Surface 22bs2 may be configured to support the feed structure 25. In some configurations, the lower portion 22b may include surfaces 22bs3 and 22bs4. Surface 22bs3 may extend between surfaces 22bs2 and 22bs4. Surfaces 22bs3 and 22bs4 may define a recess 52. In some configurations, the recess 52 may communicate with the cavity 50. In some configurations, the recess 52 may have a pore smaller than the pore size of the cavity 50.

[0043] In some configurations, the antenna pattern 24 may be positioned adjacent to the surface 22s1 of the dielectric structure 22. In some configurations, the antenna pattern 24 may be exposed by the surface 22s1 of the dielectric structure 22. Although Figure 1BThe antenna pattern 24 is shown embedded within the dielectric structure 22; however, it should be noted that in other configurations, the antenna pattern 24 may protrude from the surface 22s1. The antenna pattern 24 can be configured to receive and / or transmit RF signals from and / or toward the environment. Additionally, as... Figure 1A The outline of the antenna pattern 24 shown is merely illustrative; the antenna pattern 24 may include other shapes, such as circles, ellipses, triangles, quadrilaterals, polygons, or combinations thereof. (See also: [link to previous section]) Figure 1A The edges of the antenna pattern 24 may be substantially parallel to the surface 22s2 of the dielectric structure 22. For example, the dielectric structure 22 may include surfaces 22s2-1, 22s2-2, 22s2-3, and 22s2-4. The edges of the antenna pattern 24 may be substantially parallel to the surfaces 22s2-1, 22s2-2, 22s2-3, and 22s2-4.

[0044] In some configurations, the feed structure 25 may extend between the antenna pattern 24 and the lower portion 22b. The feed structure 25 may be configured to receive and / or transmit feed signals. In some configurations, the feed structure 25 may extend from the surface 22s1 of the dielectric structure 22 toward the carrier 10. In some configurations, the feed structure 25 may be electrically connected to the antenna pattern 24. In some configurations, the feed structure 25 may be electrically connected to the pad 12 of the carrier 10. In some configurations, the feed structure 25 may include a conductive layer 26 and a conductive layer 28.

[0045] In some configurations, conductive layer 26 may be connected to one of the terminals (e.g., the first terminal) of impedance matching components 60a and / or 60b. In some configurations, conductive layer 26 may be disposed within cavity 50. In some configurations, conductive layer 26 may be disposed on or above extension 22p. In some configurations, conductive layer 26 may be disposed on or above sidewall 22ps2. In some configurations, conductive layer 26 may be disposed on or above extension 22p. In some configurations, a portion of conductive layer 26 may be disposed on or above surface 22bs2 of lower portion 22b. In some configurations, a portion of conductive layer 26 (e.g., upper portion of conductive layer 26) may not laterally overlap with conductive layer 28.

[0046] In some configurations, conductive layer 28 may be spaced apart from conductive layer 26. In some configurations, conductive layer 28 may be connected to another of the terminals of impedance matching components 60a and / or 60b (e.g., a second terminal). In some configurations, conductive layer 28 may be disposed within cavity 50. In some configurations, conductive layer 28 may be disposed on or above extension 22p. In some configurations, conductive layer 28 may be disposed on or above sidewall 22ps2 of extension 22p. In some configurations, a portion of conductive layer 28 may be disposed on or above surface 22bs2 of lower portion 22b. In some configurations, conductive layer 28 may be disposed on or above sidewall 22bs3. In some configurations, conductive layer 28 may be disposed on or above surface 22bs4. In some configurations, conductive layer 28 may penetrate lower portion 22b. In some configurations, a portion of conductive layer 28 may be exposed by surface 22bs1 of lower portion 22b. In some configurations, a portion of the conductive layer 28 (e.g., the lower portion of the conductive layer 28) may not laterally overlap with the conductive layer 26. In some configurations, a portion of the sidewall 22ps2 may be exposed by the feeding structure 25.

[0047] In some configurations, the electronic component 30 may be mounted on or above the surface 10s2 of the carrier 10. In some configurations, the electronic component 30 may be configured to control the antenna assembly. For example, the electronic component 30 may be configured to control feed start and end times, feed duration, number of feed points, location of feed points, RF impedance matching, transmission start and end times, reception start and end times, ground start and end times, ground duration, number of ground points, location of ground points, frequency (or operating frequency), bandwidth (or operating bandwidth), wavelength of the EM wave, etc.

[0048] Electronic component 30 may be a chip or die, including a semiconductor substrate, one or more integrated circuit devices, and one or more of their overlying interconnect structures. The integrated circuit devices may include active devices such as transistors and / or passive devices such as resistors, capacitors, inductors, or combinations thereof. In some configurations, electronic component 30 may include a transmitter, receiver, or transceiver. In some configurations, electronic component 30 may include a processing unit and / or a controller. In some configurations, electronic component 30 may include a radio frequency IC (RFIC), an analog-to-digital (A / D) converter, a digital-to-analog (D / A) converter, a filter, a low-noise amplifier (LNA), a power amplifier, a multiplexer, a demultiplexer, a modulator, and / or a demodulator, etc. Although... Figure 1BThe illustrated electronic device 1a includes an electronic component 30; however, it should be noted that the electronic device 1a may include more electronic components as needed. Additionally, the electronic component 30 may be electrically connected to the carrier 10 via an electrical connector 32. In some configurations, the electrical connector 32 may include a reflowable material or solder material, such as tin (Sn), gallium (Ga), indium (In), bismuth (Bi), or other suitable materials. In other configurations, the electronic component 30 may be electrically connected to the carrier 10 via conductive wires (or wiring) or other suitable components.

[0049] In some configurations, the encapsulation 40 may be disposed on or above the surface 10s2 of the carrier 10. In some configurations, the encapsulation 40 may be disposed between the carrier 10 and the dielectric structure 22. The encapsulation 40 may encapsulate the electronic component 30. In some configurations, the encapsulation 40 may encapsulate and / or surround an extension 22p of the dielectric structure 22. In some configurations, the encapsulation 40 may contact the sidewall 22ps1. In some configurations, the power supply structure 25 may be spaced apart from the encapsulation 40. In some configurations, the encapsulation 40 may be made of a molding material, which may include, for example, phenolic varnish resins, epoxy resins, silicone resins, or another suitable encapsulation. Suitable fillers, such as powdered SiO2, may also be included. In some configurations, the encapsulation 40 may include an encapsulation material formed by molding techniques such as compression molding, injection molding, or transfer molding. The encapsulation 40 may have a surface 40s1 (or a lateral surface) exposed by the carrier 10 and the dielectric structure 22. In some configurations, the surface 40s1 of the encapsulation 40 may be substantially aligned with the surface 10s3 of the carrier 10. In some configurations, the surface 40s1 of the encapsulation 40 may be substantially aligned with or coplanar with the surface 22s2 of the dielectric structure 22. In some configurations, the encapsulation 40 may contact the surface 22bs1 of the dielectric structure 22. In some configurations, the encapsulation 40 may be disposed between the carrier 10 and the antenna assembly 20. In some configurations, a portion of the encapsulation 40 may be disposed between the carrier 10 and the lower portion 22b of the dielectric structure 22.

[0050] In some configurations, cavity 50 may extend from surface 22s1 toward carrier 10. In some configurations, cavity 50 may be configured to accommodate feed structure 25. Cavity 50 may penetrate a portion of dielectric structure 22 of antenna assembly 20. In some configurations, cavity 50 may be configured to accommodate conductive layer 26. In some configurations, cavity 50 may be configured to accommodate conductive layer 28. In some configurations, cavity 50 may be configured to accommodate impedance matching components 60a and / or 60b. In some configurations, the aperture of cavity 50 may taper (or narrow) toward carrier 10. In some configurations, cavity 50 may have a circular profile, such as... Figure 1A As shown in the image.

[0051] In some configurations, impedance matching components 60a and 60b (or components) may be housed within cavity 50. In some configurations, impedance matching components 60a and 60b may be stacked. In some configurations, impedance matching components 60a and / or 60b may be exposed by antenna assembly 20. In some configurations, impedance matching components 60a and / or 60b may be exposed by cavity 50. In some configurations, impedance matching components 60a and 60b may be exposed to air. In some configurations, impedance matching component 60a may be located on or above the lower portion 22b of the dielectric structure. In some configurations, impedance matching component 60a may be located on or above surface 22bs2. In some configurations, impedance matching components 60a and 60b may be removable. In some configurations, impedance matching components 60a and / or 60b may have a first terminal connected to conductive layer 26 and a second terminal connected to conductive layer 28. In some configurations, impedance matching components 60a and / or 60b may be electrically connected to electronic component 30.

[0052] In some configurations, impedance matching components 60a and 60b can adjust the impedance matching between electronic component 30 and antenna component 20. In some configurations, impedance matching components 60a and 60b can be configured to modulate, adjust, control, and / or modify the feed signal, thereby improving the performance of antenna component 20. In some configurations, each of impedance matching components 60a and 60b may include passive components, such as inductors, capacitors, or other suitable components. It should be noted that, although Figure 1A and Figure 1B The illustrated electronic device 1a includes two impedance matching components, but electronic device 1a may include one or any number of impedance matching components. In some configurations, impedance matching components 60a and 60b may be considered as part of a power supply structure 25. In some configurations, impedance matching component 60a may be electrically coupled to impedance matching component 60b via a resolderable material such as solder material.

[0053] In some configurations, electronic device 1a may include an electrical connector 72 (or conductive component). In some configurations, the electrical connector 72 may be disposed on or above the surface 10s2 of the carrier 10. In some configurations, the electrical connector 72 may be connected to the surface 22bs1 of the dielectric structure 22. The electrical connector 72 may be electrically connected to the carrier 10 through the pad 12. The electrical connector 72 may be configured to transmit and receive RF signals between the carrier 10 and the feed structure 25. In some configurations, the electrical connector 72 may be electrically connected to the feed structure 25. In some configurations, feed signals may be transmitted from the carrier 10 to the feed structure 25 through the electrical connector 72. In some configurations, the electrical connector 72 may be encapsulated by a capsule 40. The electrical connector 72 may include a metallic material different from the metallic material of the feed structure 25. In some configurations, the electrical connector 72 may include a resolderable material or solder material, such as tin (Sn), gallium (Ga), indium (In), bismuth (Bi), or other suitable materials. The resolderable temperature of the electrical connector 72 is approximately 260 degrees Celsius or higher.

[0054] In this configuration, electrical characteristics (e.g., bandwidth, antenna gain, or the like) can be adjusted, modified, and / or controlled by impedance matching components 60a and 60b. As a result, the electrical characteristics can be fine-tuned and are reversible, thereby improving and customizing the electrical characteristics (e.g., bandwidth, antenna gain, or the like) of the electronic device 1a. In this configuration, the outline and position of the antenna pattern 24 and the feed structure 25 are predetermined and integrated within a dielectric structure 22. When an antenna integration structure comprising multiple antenna components is attached to the carrier 10, each feed structure 25 can be slightly offset to align with its corresponding electrical connector 72. In a comparative example, individual antenna elements can be attached to the carrier using solder material, followed by reflow soldering to solidify the solder. In this scenario, the antenna elements may experience significant displacement and rotational offset due to process (or manufacturing) issues.

[0055] Figure 2A Plot the simulation results of the S-parameters (or reflection coefficients) of the electronic device against the frequency, and Figure 2B The simulation results of the S-parameters of the electronic device of this disclosure against frequency are illustrated. More specifically, the structural difference between the comparative example and the electronic device of this disclosure is that the electronic device of this disclosure further includes one or more impedance matching components.

[0056] The X-axis value indicates frequency. The unit of the X-axis is 10. 9 Hz (GHz). The unit for the Y-axis is decibels (dB). For example... Figure 2A and Figure 2BAs shown, the curve has a first peak at a frequency of 6.5 GHz and a second peak at a frequency of approximately 8 GHz. After using impedance matching components, the S-parameter of the first peak is improved from approximately -11 dB to approximately -38 dB, and the S-parameter of the second peak is improved from -13 dB to approximately -19 dB. As a result, the antenna gain of the first peak is improved by up to 3.21 dBi, and the antenna gain of the second peak is improved by up to 5.05 dBi.

[0057] Figure 3 A cross-sectional view of an electronic device 1b according to some configurations of the present disclosure is shown. Figure 3 Electronic device 1b is similar to electronic device 1a, but the differences are as follows.

[0058] In some configurations, electronic device 1b may include an encapsulation 42 (or protective layer). In some configurations, encapsulation 42 may be disposed within cavity 50. In some configurations, encapsulation 42 may cover the lower portion 22b of dielectric structure 22. In some configurations, encapsulation 42 may cover impedance matching components 60a and 60b. In some configurations, encapsulation 42 may cover conductive layer 26. In some configurations, encapsulation 42 may cover conductive layer 28. In some configurations, antenna pattern 24 may be exposed by encapsulation 42. In some configurations, encapsulation 42 may be made of molding material, which may include, for example, phenolic varnish resins, epoxy resins, silicone resins, or another suitable encapsulation. Suitable fillers, such as powdered SiO2, may also be included. In some configurations, encapsulation 42 may include encapsulation material formed by molding techniques such as compression molding, injection molding, or transfer molding. In some configurations, the encapsulation 42 may taper toward the carrier 10. In some configurations, the encapsulation 42 may contact a portion of the sidewall 22ps2. The encapsulation 42 may have a surface 42s1 (or an upper surface). In some configurations, surface 42s1 may be substantially aligned with surface 22s1 of the dielectric structure 22. The encapsulation 42 may be configured to protect the feed structure 25, impedance matching components 60a and / or 60b from environmental damage or moisture.

[0059] Figure 4 A cross-sectional view of an electronic device 1c according to some configurations of the present disclosure is shown. Figure 4 The electronic device 1c is similar to the electronic device 1a, but the differences are as follows.

[0060] In some configurations, the encapsulation 42 may cover surface 22s1 of the dielectric structure 22. In some configurations, the encapsulation 42 may cover the dielectric structure 22. In some configurations, the encapsulation 42 may cover the antenna pattern 24. The encapsulation 42 may have a surface 42s2 (or a lateral surface) connected to surface 42s1. In some configurations, surface 42s2 may be substantially aligned with surface 22s2 of the dielectric structure 22.

[0061] Figure 5 A perspective view of an electronic device 1d according to some configurations of this disclosure is shown. Figure 5 Electronic device 1d is similar to electronic device 1a, but the differences are as follows.

[0062] In some configurations, cavity 50 may have a rectangular profile. Dielectric structure 22 may have four lateral surfaces (or inner walls) defining cavity 50. In other configurations, cavity 50 may have other suitable profiles, such as elliptical, triangular, quadrilateral, or polygonal.

[0063] Figure 6 A top view of an electronic device 1e configured according to some of the present disclosure is shown. Figure 6 The electronic device 1e is similar to the electronic device 1a, but the differences are as follows.

[0064] Comparing electronic device 1a and electronic device 1e, electronic device 1a shows an antenna pattern 24 without significant offset (e.g., displacement and / or rotational offset), while the antenna pattern 24 of electronic device 1e has rotational offset and / or displacement offset.

[0065] The dielectric structure 22 may have surfaces 22s2-1, 22s2-2, 22s2-3, and 22s2-4. In some configurations, the outline of the antenna pattern 24 of the electronic device 1a defines the ideal distance between the edge of the antenna pattern 24 and surfaces 22s2-1, 22s2-2, 22s2-3, and 22s2-4. For example... Figure 1A As shown, the edges of the antenna pattern 24 of the electronic device 1a may be substantially parallel to surfaces 22s2-1, 22s2-2, 22s2-3 and / or 22s2-4. For example... Figure 6 As shown, the edge of the antenna pattern 24 of electronic device 1e may not be parallel to surfaces 22s2-1, 22s2-2, 22s2-3 and / or 22s2-4. This rotational offset and / or displacement offset may cause a frequency shift in the signals (e.g., RF signals) of electronic devices 1a and 1e.

[0066] Figures 7A to 7G The illustration depicts various stages of examples of methods for manufacturing electronic devices according to some configurations of this disclosure.

[0067] See Figure 7A A carrier 10 may be provided. The carrier 10 may have a pad 12 exposed by a surface 10s2. In some configurations, an electrical connector 72 may be formed on or above the pad 12. The electrical connector 72 may be formed by, for example, printing, coating or other suitable techniques. In some configurations, the carrier 10 may include a plurality of repeating units. These repeating units may be separated after a single-cutting technique is performed.

[0068] See Figure 7B The electronic component 30 can be attached to the surface 10s2 of the carrier 10. In some configurations, the electronic component 30 can be attached to the carrier 10 by surface mount technology or other suitable technology.

[0069] See Figure 7C , Figure 7C Perspective and cross-sectional views are shown. An antenna integration structure 29 may be provided. In some configurations, the antenna integration structure 29 may include a plurality of antenna components 20 (or antenna elements) that can be defined as an N×N array. Each of the antenna components 20 may include an antenna pattern 24 and a feed structure 25. These antenna patterns 24 and feed structures 25 are integrated within a dielectric structure 22 that defines a single unit structure. As a result, displacement and rotational offset can be reduced after the antenna integration structure 29 is mounted on the carrier 10. During this stage, alignment techniques can be performed to align the antenna integration structure 29 with the carrier 10. Note that for simplicity, some components (e.g., electronic components 30) are omitted from the perspective view.

[0070] See Figure 7D The antenna integration structure 29 can be attached to the surface 10s2 of the carrier 10 via the electrical connector 72. Each of the antenna components 20 can be aligned with a corresponding unit of the carrier 10 and then attached to that corresponding unit.

[0071] See Figure 7E Encapsulation 40 may be formed between carrier 10 and dielectric structure 22. Electronic component 30, extension 22p and lower portion 22b of dielectric structure 22 may be encapsulated.

[0072] See Figure 7F It can perform single-cutting technology. The carrier 10, dielectric structure 22, and encapsulation 40 can be cut. Therefore, the lateral surfaces of the carrier 10, dielectric structure 22, and encapsulation 40 can be substantially aligned with each other. The carrier 10 and the repeating elements of the plurality of antenna patterns 24 can be separated.

[0073] See Figure 7G Impedance matching components 60a and 60b can be housed within cavity 50. As a result, electronic devices (e.g., Figures 1A to 1B The electronic device 1a shown in the figure. In some configurations, it is possible to measure, such as Figure 7F The electrical characteristics of the structure shown (e.g., bandwidth, antenna gain, or the like). In some cases, if Figure 7FIf the electrical characteristics of the structure shown are not as ideal as the simulation results, impedance matching components 60a and 60b can be used to adjust, modify, and / or control the electrical characteristics. In some configurations, impedance matching components 60a and 60b may be detachable. In some configurations, one or more impedance matching components 60a and 60b can be used for fine-tuning the impedance. In some configurations, impedance matching components 60a and 60b may have different inductance, capacitance, or other electrical characteristics. In some configurations, impedance matching components 60a and 60b may have different dimensions (volume, height, width, length, or the like). For example, an impedance matching component may include a first inductor with a larger inductance value and a second inductor with a smaller inductance value. As a result, the electrical characteristics can be fine-tuned and are reversible, thereby improving and customizing the electrical characteristics of electronic device 1a (e.g., bandwidth, antenna gain, or the like). In this configuration, the outline and position of antenna pattern 24 and feed structure 25 are predetermined and integrated within a dielectric structure 22. When the antenna integration structure 29 is attached to the carrier 10, each feed structure 25 can be slightly offset to align with its corresponding electrical connector 72. In a comparative example, individual antenna elements can be attached to the carrier using solder material, followed by reflow soldering to solidify the solder. In this scenario, the antenna elements may experience significant displacement and rotational offset due to process (or manufacturing) issues.

[0074] Figures 8A to 8D The illustration depicts various stages of examples of methods for manufacturing electronic devices according to some configurations of this disclosure. Figure 7D The stage shown in the text can be followed by Figure 8A The stages shown in the text.

[0075] See Figure 8A In some configurations, the antenna assembly 20 may be attached to a support (not shown) prior to the formation of the encapsulation 40. In some configurations, the molded carrier 10 may be covered, and the encapsulation 46 may be formed to cover the surface 10s1 of the carrier 10.

[0076] See Figure 8B An electrical connector 74 may be formed on or below the surface 10s1 of the carrier 10. In some configurations, a portion of the encapsulation 46 may be removed, for example, by laser ablation or other suitable techniques. The electrical connector 74 may then be formed within an opening defined by the encapsulation 46. In some configurations, the electrical connector 74 may be formed, and the encapsulation 46 may be formed to encapsulate the electrical connector 74. In some configurations, the encapsulation 46 may be exposed using an exposed molding die. In some configurations, the molded encapsulation 46 may be overmolded and then removed by grinding or laser ablation to expose the electrical connector 74.

[0077] See Figure 8CIt can perform single-cut technology. It can cut the carrier 10, dielectric structure 22, encapsulation body 40 and encapsulation body 46. The carrier 10 and the repeating elements of multiple antenna patterns 24 can be separated.

[0078] See Figure 8D Impedance matching components 60a and 60b can be housed within cavity 50. As a result, electronic device 1f can be manufactured.

[0079] Figures 9A to 9G The illustration depicts various stages of examples of methods for manufacturing electronic devices according to some configurations of this disclosure.

[0080] See Figure 9A An antenna integration structure 29 may be provided, which also serves as a support. A carrier 10 may be provided. An electrical connector 74 may be formed on the surface 10s1 of the carrier 10.

[0081] See Figure 9B The antenna integration structure 29 can be attached to the carrier 10.

[0082] See Figure 9C Encapsulation bodies 40 and 46 can be formed. In some configurations, encapsulation bodies 40 and 46 can be formed in a single step.

[0083] See Figure 9D Grinding or polishing techniques can be performed on the capsule 46. As a result, the top of the capsule 46 can be substantially aligned with the top of the electrical connector 74.

[0084] See Figure 9E A portion of the capsule 46 can be removed, for example, by laser ablation or other suitable techniques. As a result, the top of the capsule 46 can be disconnected from the top of the electrical connector 74.

[0085] See Figure 9F Reflow soldering can be performed. During this stage, reflow soldering material can be used to reshape the electrical connector 74. Next, a single-cut technique can be performed. The carrier 10, dielectric structure 22, encapsulation 40, and encapsulation 46 can be cut. The carrier 10 and the repeating elements of the multiple antenna patterns 24 can be separated.

[0086] See Figure 9G Impedance matching components 60a and 60b can be placed within cavity 50. As a result, an electronic device 1g can be generated.

[0087] Unless otherwise specified, spatial descriptions such as “above,” “below,” “upper,” “left,” “right,” “lower,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “higher,” “lower,” “upper,” “above,” and “below” are relative to the orientation indicated in the figures. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual embodiments of the structures described herein can be arranged in space in any orientation or manner, provided that the advantages of the arrangement of this disclosure are not deviated from by such arrangement.

[0088] As used herein, the terms “approximately,” “generally,” “substantially,” and “about” are used to describe and account for minor variations. When used in conjunction with an event or situation, the terms can refer to a situation in which the event or situation has clearly occurred or is very close to occurring. For example, when used in conjunction with numerical values, the terms can refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For instance, if the difference between two numerical values ​​is less than or equal to ±10% of the average of the values, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the two numerical values ​​can be considered “generally” the same or equal.

[0089] If the displacement between two surfaces is no greater than 5 μm, no greater than 2 μm, no greater than 1 μm, or no greater than 0.5 μm, then the two surfaces can be considered to be coplanar or substantially coplanar.

[0090] As used herein, unless the context clearly indicates otherwise, the singular terms “a / an” and “the” may include multiple references.

[0091] As used herein, the terms "conductive" and "electrically conductive" refer to the ability to conduct electric current. Conductive materials typically indicate those that exhibit very little or no resistance to the flow of electric current. One measure of conductivity is Siemens per meter (S / m). Generally, conductive materials have a conductivity greater than approximately 10. 4 S / m (e.g., at least 10) 5 S / m or at least 10 6 A material is defined as having an electrical conductivity of S / m. The electrical conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the electrical conductivity of a material is measured at room temperature.

[0092] Additionally, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It should be understood that such range format is for convenience and brevity and should be interpreted flexibly to include not only numerical values ​​explicitly specified as range limits, but also all individual numerical values ​​or subranges covered within the range, as if each numerical value and subrange were explicitly specified.

[0093] Although this disclosure has been described and illustrated with reference to specific arrangements, such descriptions and illustrations are not limiting. Those skilled in the art will understand that various changes and alternatives may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. The illustrations may not be drawn to scale. Differences may exist between artistic representations in this disclosure and actual equipment due to manufacturing processes and tolerances. Other arrangements of this disclosure may exist that are not specifically described. This specification and drawings should be considered illustrative rather than limiting. Modifications may be made to adapt particular circumstances, materials, compositions, methods, or processes (or techniques) to the objectives, spirit, and scope of this disclosure. All such modifications are intended to be within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not limitations of this disclosure.

[0094] [Symbol Explanation]

[0095] 1a Electronic device

[0096] 1b Electronic devices

[0097] 1c electronic devices

[0098] 1d electronic device

[0099] 1e Electronic devices

[0100] 1f Electronic devices

[0101] 1g electronic device

[0102] 10 carriers

[0103] 10s1 surface

[0104] 10s2 surface

[0105] 10s3 surface

[0106] 12 Padding

[0107] 20 antenna assembly

[0108] 22 Dielectric Structure

[0109] 22b Lower part

[0110] 22bs1 surface

[0111] 22bs2 surface

[0112] 22bs3 surface

[0113] 22bs4 surface

[0114] 22p extension

[0115] 22ps1 sidewall

[0116] 22ps2 sidewall

[0117] 22s1 surface

[0118] 22s2 surface

[0119] 22s2-1 surface

[0120] 22s2-2 surface

[0121] 22s2-3 surface

[0122] 22s2-4 surface

[0123] 22t upper part

[0124] 24 Antenna Pattern

[0125] 25. Power supply structure

[0126] 26 Conductive Layer

[0127] 28 Conductive Layer

[0128] 29 Antenna Integration Structure

[0129] 30 Electronic Components

[0130] 32 Electrical Connectors

[0131] 40 capsules

[0132] 40s1 surface

[0133] 42 capsules

[0134] 42s1 surface

[0135] 42s2 surface

[0136] 46 capsules

[0137] 50 cavities

[0138] 52 recess

[0139] 60A Impedance Matching Assembly

[0140] 60b Impedance Matching Assembly

[0141] 72 Electrical Connectors

[0142] 74 Electrical connectors.

Claims

1. An electronic device comprising: Electronic components; An antenna assembly is disposed above the electronic assembly and defines a cavity, the cavity being configured to accommodate the assembly to adjust the impedance matching between the electronic assembly and the antenna assembly.

2. The electronic device of claim 1, wherein the antenna assembly includes an antenna pattern and a first conductive layer connected to the antenna pattern, and the first conductive layer is disposed on a sidewall of the antenna assembly defining the cavity.

3. The electronic device of claim 2, wherein the antenna assembly includes a second conductive layer spaced apart from the first conductive layer, and the assembly electrically connects the first conductive layer to the second conductive layer.

4. The electronic device of claim 1, wherein the component comprises at least one passive component.

5. The electronic device of claim 1, wherein the component comprises a stacked passive component.

6. The electronic device of claim 1, wherein the antenna assembly includes an antenna pattern and a feed structure extending downward away from the antenna pattern.

7. The electronic device of claim 6, wherein a portion of the sidewall defining the cavity of the antenna assembly is exposed by the feeding structure.

8. The electronic device of claim 7, further comprising: A carrier that supports the feed structure of the antenna assembly and electrically connects the electronic components to the antenna pattern.

9. The electronic device of claim 1, wherein the cavity penetrates the antenna assembly.

10. The electronic device of claim 1, wherein the antenna assembly includes a base portion exposed by the cavity and configured to support the assembly.

11. The electronic device of claim 1, further comprising: A protective layer that covers the component.

12. An electronic device comprising: carrier; An impedance matching assembly is disposed above the carrier; and An antenna assembly disposed above the carrier, wherein the antenna assembly defines a cavity and includes a feed structure extending into the cavity and electrically connected to the impedance matching assembly.

13. The electronic device of claim 12, wherein the antenna assembly includes a dielectric structure and an antenna pattern disposed on the dielectric structure, and the dielectric structure defines a substrate portion supporting the impedance matching assembly and the feed structure.

14. The electronic device of claim 13, wherein the feeding structure comprises a first conductive layer extending between the antenna pattern and the substrate portion of the dielectric structure.

15. The electronic device of claim 14, wherein the power supply structure includes a second conductive layer spaced apart from the first conductive layer, and the second conductive layer penetrates the substrate portion of the dielectric structure.

16. The electronic device of claim 15, wherein a portion of the first conductive layer does not laterally overlap with the second conductive layer.

17. An electronic device comprising: carrier; and An antenna assembly, disposed above the carrier and having sidewalls defining a cavity extending toward the carrier. The antenna assembly includes an antenna pattern and a feed structure disposed within the cavity and connected to the antenna pattern. Furthermore, a portion of the sidewall is exposed by the power supply structure.

18. The electronic device of claim 17, further comprising: An impedance matching component is disposed within the cavity and configured to electrically connect the antenna pattern and the carrier.

19. The electronic device of claim 18, wherein the impedance matching component is exposed to air.

20. The electronic device of claim 18, wherein the power supply structure comprises a first conductive layer connected to a first terminal of the impedance matching component and a second conductive layer connected to a second terminal of the impedance matching component.

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