Energy storage battery safety prevention and control system and method

Abstract

The present application relates to the technical field of energy storage power station safety protection, in particular to a kind of energy storage battery safety prevention and control system and method, the system includes impedance identification module, active arc suppression module and fault-tolerant reconstruction module.Impedance identification module is coupled to high-voltage DC bus, by injecting high-frequency perturbation current and demodulating voltage feedback signal, real-time calculation system dynamic impedance, once the arc characteristic negative impedance characteristic of detection triggers fault instruction.Active arc suppression module is integrated in bidirectional DC converter, responds to fault instruction and forcibly switches modulation logic, synthesizes virtual capacitor effect with extremely low impedance to high-frequency fault current at input end, utilizes the effect instantaneous absorption line inductance magnetic energy, so that current is reduced below the arc threshold, realizes no contact fast arc extinguishing.Fault-tolerant reconstruction module is used to isolate fault battery module after arc extinguishing, and dynamically adjusts the voltage modulation depth of the remaining healthy module according to the calculated voltage shortage.

Description

Technical Field

[0001] This invention relates to the field of energy storage power station safety protection technology, specifically to an energy storage battery safety control system and method. Background Technology

[0002] In existing high-voltage, high-capacity energy storage power supply systems and circuit devices, the operating status of battery packs is typically managed to ensure the stability of energy transmission on the DC bus. However, existing energy storage circuit architectures often lack smooth transition control and voltage regulation mechanisms when dealing with internal component failures (such as arcing faults). Traditional mechanical isolation methods cause a step drop in the port voltage of the energy storage battery cluster when disconnecting a faulty module, and existing power management strategies struggle to mobilize remaining battery cells for voltage compensation in real time. This lack of voltage regulation capability not only causes the DC bus voltage to deviate from the rated power supply range, damaging power quality, but also often forces the entire converter system to shut down because it cannot maintain the necessary support voltage. This severely restricts the ability of energy storage devices to maintain uninterrupted power supply and continuous power output under fault conditions.

[0003] Therefore, in order to solve the problem of maintaining a constant bus voltage after fault isolation while achieving rapid and non-destructive extinction of DC arc, a safety control system and method for energy storage batteries is proposed. Summary of the Invention

[0004] This invention aims to provide a safety control system and method for energy storage batteries. By using active arc suppression and dynamic voltage compensation technology based on virtual impedance, it can achieve microsecond-level contactless arc extinguishing while ensuring automatic recovery of bus voltage and uninterrupted system operation after fault isolation.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A safety control system for energy storage batteries, the system comprising:

[0007] Impedance identification module: Connected in parallel to the high-voltage DC bus, injecting high-frequency micro-perturbation current, collecting and demodulating voltage feedback signals to calculate real-time dynamic impedance; using absolute difference comparison, filtering out the inherent low-frequency negative impedance characteristics of the converter, and generating a fault trigger command when the dynamic impedance is determined to exhibit arc-like high-frequency negative impedance characteristics.

[0008] Active arc suppression module: Integrated into the bidirectional DC-DC converter, it responds to the fault trigger command to force switch the modulation logic of the power switch tube, and synthesizes a virtual capacitor effect with extremely low impedance to high frequency fault current at the input port; using the virtual capacitor effect to construct a low impedance commutation channel, it guides the line inductance magnetic energy to the energy absorption branch for absorption and buffering, so that the fault current is reduced to below the arc ignition threshold, and realizes contactless rapid arc extinguishing.

[0009] Fault-tolerant reconfiguration module: Connected to the battery module cascade unit, it uses a bypass switch to electrically isolate the faulty battery module after the arc is extinguished; at the same time, it calculates the bus voltage deficit caused by the isolation and dynamically adjusts the voltage modulation depth of the remaining healthy modules accordingly, so as to maintain a constant DC bus voltage while isolating the fault.

[0010] Preferably, the control logic for the impedance identification module to obtain the real-time dynamic impedance includes the following steps:

[0011] A weak sinusoidal disturbance current in the high-frequency band is superimposed on the fundamental current of the DC bus using the pulse width modulator of a bidirectional DC-DC converter. The voltage signal of the DC bus is acquired in real time and synchronously demodulated using digital lock-in amplification technology. The voltage response component with the same frequency as the disturbance current is extracted from the background noise. The DC voltage and DC current values ​​of the DC bus are acquired in real time, dimensionless normalization is performed, and the ratio of the two is calculated to obtain the steady-state DC impedance. The original dynamic impedance value is divided by the steady-state DC impedance to generate a dynamic impedance coefficient, which is defined as the real-time dynamic impedance.

[0012] Preferably, the discrimination logic for generating the fault trigger command by the impedance identification module includes the following steps:

[0013] The dimensionless dynamic impedance coefficient calculated in real time is compared with a preset linearity benchmark threshold. When the dynamic impedance coefficient is detected to deviate significantly from the unit value and exhibits a negative incremental change trend that decreases with increasing current in a specific high-frequency band unaffected by the converter voltage loop control bandwidth, the interference of the converter's low-frequency constant power characteristic is eliminated, and the system impedance characteristic is determined to change from linear to nonlinear. An AND logic judgment is performed based on whether the high-frequency noise floor of the DC bus current exhibits a non-periodic rise characteristic. When both conditions are met simultaneously, it is determined that there is a series arc fault in the current circuit, and the fault trigger command containing fault location information is immediately sent to the subsequent control module.

[0014] Preferably, the steps of the active arc suppression module performing control strategy switching and virtual impedance synthesis include:

[0015] During normal system operation, a constant power transmission closed-loop control strategy is executed. Within a very short time window after receiving the fault trigger command, the current constant power transmission closed-loop control parameters are frozen, and the digital control law of the bidirectional DC-DC converter is forcibly switched from steady-state mode to active damping arc suppression mode. In the active damping arc suppression mode, the voltage and current response relationship of the converter input port is changed by dynamically adjusting the duty cycle and phase shift angle of the power switch at high frequency, thereby synthesizing a virtual capacitor control characteristic that exhibits extremely low dynamic impedance to the rate of change of high-frequency fault current.

[0016] Preferably, the mechanism by which the active arc suppression module achieves arc blocking using electrical characteristics includes: using the extremely low dynamic impedance to treat the converter input as a virtual large-capacity capacitor connected in parallel across the fault point at the control logic level; using the effect of this virtual large-capacity capacitor to construct a low-impedance current bypass, guiding and transferring the magnetic field energy released in the inductance of the long conductor to the physical energy storage element on the converter output side for absorption or buffering, forcing the current flowing through the arc fault point to rapidly decay below the minimum sustaining current required for arc extinguishing, thus blocking the arc energy supply without disconnecting the physical mechanical circuit breaker.

[0017] Preferably, the fault-tolerant reconfiguration module performs electrical isolation by including:

[0018] In response to the fault location information contained in the fault trigger command, the faulty battery module is locked; a bypass command is sent to the cascaded full-bridge unit connected to the output terminal of the faulty battery module, driving the corresponding mechanical or solid-state bypass switch to perform a closing action; a low-impedance current path is established across the faulty battery module, physically short-circuiting and isolating the faulty battery module from the main series circuit of the system, and safely removing the fault point with the risk of arcing without cutting off the main circuit load current.

[0019] Preferably, the fault-tolerant reconfiguration module performs the following steps for dynamic adjustment: It uses a high-precision voltage sensor to collect the actual DC bus voltage after isolation, compares it with the system's rated reference voltage, and calculates the total voltage drop caused by the removal of the faulty module; using the voltage drop value, combined with the number weights of the remaining healthy modules in the current system and their respective states of charge, it recalculates and allocates the voltage gain coefficient of each healthy module; it updates the pulse width modulation depth parameters of each healthy module controller, controls the remaining healthy modules to increase their respective output voltages to compensate for the total voltage drop, and ensures that the DC bus voltage can automatically recover and remain within the rated operating range after the fault isolation and reconfiguration process is completed.

[0020] A safety control method for energy storage batteries includes: connecting in parallel to a high-voltage DC bus, injecting a high-frequency micro-perturbation current, and collecting and demodulating voltage feedback signals to calculate real-time dynamic impedance; using absolute difference comparison to filter out the inherent low-frequency negative impedance characteristics of the converter, and generating a fault trigger command when the dynamic impedance is determined to exhibit arc-like high-frequency negative impedance characteristics; integrating into a bidirectional DC-DC converter, responding to the fault trigger command to forcibly switch the modulation logic of the power switch transistor, and synthesizing a virtual capacitor effect with extremely low impedance to high-frequency fault current at the input port; using the virtual capacitor effect to construct a low-impedance commutation channel, guiding the line inductance magnetic energy to the energy absorption branch for absorption and buffering, reducing the fault current to below the arc initiation threshold, and achieving contactless rapid arc extinguishing; connecting to a battery module cascade unit, and using a bypass switch to electrically isolate the faulty battery module after the arc is extinguished; simultaneously calculating the bus voltage deficit caused by isolation, and dynamically adjusting the voltage modulation depth of the remaining healthy modules accordingly, maintaining a constant DC bus voltage while isolating the fault.

[0021] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0022] 1. This invention abandons the simple current threshold detection which is susceptible to interference. Instead, it actively injects high-frequency perturbation signals and demodulates feedback, using the unique negative impedance characteristics of the electric arc as a criterion. Compared with passive detection, this method can effectively distinguish between normal load fluctuations and electric arc faults, greatly improving the accuracy and anti-interference capability of high-voltage DC systems in identifying series electric arc faults under complex operating conditions.

[0023] 2. This invention utilizes a bidirectional converter to synthesize a virtual capacitor effect, providing a low-impedance bypass for the fault current at the physical level, instantly absorbing the magnetic energy released by the line inductance; through active damping control, it rapidly reduces the rise rate of the fault current within microseconds, and then attenuates the fault current to below the arc sustaining threshold within milliseconds, achieving contactless rapid arc extinguishing, which not only avoids the risk of mechanical contact burning, but also fundamentally blocks the accumulation of arc energy.

[0024] 3. After isolating the faulty module by bypass, this invention calculates the voltage deficit and dynamically adjusts the modulation depth of the remaining healthy modules to achieve real-time compensation for the total voltage drop. This ensures that the energy storage system does not need to shut down and the DC bus voltage remains constant when a battery failure occurs, guaranteeing the continuity and stability of power supply to downstream loads and significantly improving the system's fault tolerance and survivability. Attached Figure Description

[0025] Figure 1 This is an operation flowchart of an energy storage battery safety control system according to the present invention;

[0026] Figure 2 This is a flowchart illustrating the steps of a safety control method for energy storage batteries according to the present invention.

[0027] Figure 3 This is a flowchart illustrating the impedance identification module in Embodiment 1 of the present invention. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] Please see Figures 1 to 3 This invention provides a safety control system and method for energy storage batteries, referring to... Figure 1 Operation flowchart and Figure 2 The flowchart of the steps; the technical solution is as follows:

[0030] A safety control system for energy storage batteries, the system comprising:

[0031] Impedance identification module: Coupled to the high-voltage DC bus, injecting a high-frequency micro-perturbation current of a specific frequency into it, collecting and demodulating the voltage feedback signal to calculate the real-time dynamic impedance; using absolute difference comparison, filtering out the inherent low-frequency negative impedance characteristics of the converter, and generating a fault trigger command when it is determined that the dynamic impedance exhibits the high-frequency negative impedance characteristics unique to electric arc.

[0032] Active arc suppression module: integrated into the bidirectional DC-DC converter, it responds to the fault trigger command to force switch the modulation logic of the power switch tube, and synthesizes a virtual capacitor effect with extremely low impedance to high frequency fault current at the input port; using this effect to construct a low impedance commutation channel, it guides the line inductance magnetic energy to the physical capacitor or battery cell on the output side for storage or discharge, so that the fault current is reduced to below the arc ignition threshold to achieve contactless rapid arc extinguishing;

[0033] Fault-tolerant reconfiguration module: Connected to the battery module cascade unit, it uses a bypass switch to electrically isolate the faulty battery module after the arc is extinguished; at the same time, it calculates the bus voltage deficit caused by the isolation and dynamically adjusts the voltage modulation depth of the remaining healthy modules accordingly, so as to maintain a constant DC bus voltage while isolating the fault.

[0034] Example 1

[0035] This embodiment is set in the scenario of energy storage battery safety control. According to the impedance identification module of this system, the high-frequency micro-perturbation current is injected into the DC bus and the voltage feedback signal is demodulated and analyzed. This realizes the real-time extraction of complex arc impedance characteristics in the energy storage circuit and the accurate identification of nonlinear fault state.

[0036] Reference Figure 3The flowchart of the impedance identification module first uses the built-in digital pulse width modulator of the bidirectional DC converter to perform a disturbance injection operation. While maintaining the fundamental current output of the DC bus rated voltage of 500V, a weak sinusoidal disturbance current signal with a frequency set at 10kHz and a peak value of 2A is superimposed on the DC fundamental current by adjusting the duty cycle command value of the power switch.

[0037] Furthermore, an adaptive frequency hopping injection strategy based on background noise spectrum analysis is proposed to avoid fixed harmonic interference generated by power electronic switching operations.

[0038] Specifically, before formally injecting the perturbation signal, the impedance identification module first performs a "silent listening" cycle to scan the background noise on the DC bus using a fast Fourier transform and plot a real-time noise spectrum. The system has a set of preset alternative high-frequency injection points (such as 20kHz, 25kHz, and 30kHz). The module automatically compares the spectrum and identifies the "silent frequency band" with the lowest amplitude and highest signal-to-noise ratio. Subsequently, the module dynamically locks the carrier frequency of the signal generator to this silent frequency band for injection, instead of using a fixed single frequency. If changes in system operating conditions cause the noise in this frequency band to rise, the module will automatically jump to the new optimal frequency point in the next control cycle. In addition, the center frequency of the bandpass filter at the demodulation end is also adjusted synchronously to ensure that the transmit and receive frequencies are always consistent and in a low-interference range. By avoiding interference from the switching frequency of the bidirectional converter and its harmonics, this strategy significantly improves the extraction accuracy of weak fault characteristic signals and solves the technical problem of low impedance identification accuracy in strong electromagnetic interference environments. At the same time, the frequency hopping mechanism enables the system to adapt to operating conditions with different load characteristics, improving the robustness and environmental adaptability of arc detection.

[0039] Furthermore, the feedback signal of the DC bus is acquired in real time using a digital lock-in amplifier based on a digital signal processor. Specifically, the original voltage sequence with a sampling frequency of 1MHz is captured by a voltage sampling circuit and used as input. Inside the digital signal processing unit, the sequence is multiplied and mapped point by point with a set of preset in-phase and in-frequency reference sinusoidal signals. Then, the discrete data stream after multiplication is input into a fourth-order Butterworth low-pass filter with a cutoff frequency of 100Hz. The voltage response component with the same frequency as the disturbance current is extracted by filtering out high-frequency switching noise and DC offset.

[0040] Specifically, digital phase-locked amplifiers share a clock with the perturbation signal generator of the pulse width modulator and use the perturbation signal output by the pulse width modulator itself as a reference signal source. This reference signal is then time-aligned by a phase delay compensation block.

[0041] Synchronous demodulation involves multiplying the acquired bus voltage signal by a reference sine wave, then integrating and averaging it using a fourth-order Butterworth low-pass filter with a cutoff frequency of 100Hz and an attenuation slope of 80dB / decade. The integration time constant is set to 40 pulse width modulation cycles (i.e., 40 / 20kHz≈2ms). This filter design ensures that the attenuation of high-frequency switching noise (20-100kHz) and mid-frequency harmonic interference is no less than 60dB, while retaining the 10kHz component of the disturbance signal, resulting in a signal-to-noise ratio of no less than 40dB for the extracted signal.

[0042] For transient errors caused by rapid changes in the operating point, the system corrects them through an adaptive gain compensation mechanism: when the bus current change rate exceeds ±50A / ms, the low-pass filter cutoff frequency is automatically increased from 100Hz to 200Hz, shortening the response time to 1ms, and the slope error introduced by the change in the operating point is corrected through a feedforward compensation term.

[0043] Specifically, the peak envelope of the voltage response component is extracted from the output of the low-pass filter as the divisor, and the perturbation current amplitude of 2A set by the pulse width modulator in the previous step is used as the divisor to perform a division logic operation, thereby calculating the original dynamic impedance value of the DC bus under 10kHz frequency excitation.

[0044] Furthermore, the instantaneous DC voltage value of 500V and the instantaneous DC current value of 100A of the DC bus are collected in real time through an independent DC sampling branch. These two collected values ​​are input into a preset normalization operator. The maximum rated value of each physical quantity is used as a reference for dimensionless normalization mapping. Then, the ratio of the normalized DC voltage to the DC current is calculated to obtain the steady-state DC impedance that characterizes the operating characteristics of the system under the large-signal steady-state point.

[0045] Specifically, the dimensionless normalization process uses the system's rated operating point as a reference: the rated DC voltage is set to the system's design rated value (500V in this embodiment), and the rated DC current is set to the system's rated output current (100A in this embodiment). The normalization process calculates the ratio of DC voltage to current, and then compares this steady-state DC impedance with the reference impedance at the rated operating point to eliminate the absolute value differences between different power levels.

[0046] The original dynamic impedance value is the real part of the high-frequency impedance obtained by demodulation using digital phase-locked amplification technology under 10kHz frequency excitation. The ratio of this value to the steady-state DC impedance is the dynamic impedance coefficient. Under normal operating conditions, this coefficient should be stable within the range of 0.95 to 1.05. Deviation from this range indicates an abnormality in the system impedance characteristics. When the system operating conditions change (such as a sudden load change causing the current to change from 100A to 80A), the steady-state impedance will change accordingly, but the impedance coefficient after this dimensionless processing can still remain relatively stable, improving the operating condition robustness of fault diagnosis.

[0047] Specifically, the original dynamic impedance value obtained in the aforementioned steps is used as the numerator, and the calculated steady-state DC impedance is used as the denominator. A division calculation is performed in the logic controller to generate a dynamic impedance coefficient that eliminates DC operating point fluctuations. This coefficient is defined as the real-time dynamic impedance and serves as the core input data for the impedance identification module to determine the high-frequency negative impedance characteristics.

[0048] By extracting weak disturbance response signals using digital lock-in amplification technology, strong background noise interference on the bus is effectively suppressed, significantly improving the signal-to-noise ratio of impedance detection. Dimensionless normalization of the dynamic and steady-state impedance ratios is employed to eliminate the influence of baseline drift caused by changes in system power level and operating point, ensuring the accuracy and versatility of impedance identification results.

[0049] The real-time dimensionless dynamic impedance coefficient output by the preceding module is input into the hardware comparator and compared in real time with the preset linearity reference threshold of 1.0 stored in the register. The nonlinear deviation trend of the system's operating state is initially locked by calculating whether the absolute difference between the coefficient and the reference value exceeds 0.15.

[0050] Specifically, the lower limit of the specific high-frequency band is set to be more than 5 times the voltage loop control bandwidth. In this embodiment, the closed-loop control bandwidth of the bidirectional DC-DC converter is 1.5kHz (determined by the proportional coefficient Kp=0.5 and the integral coefficient Ki=0.3). Therefore, the specific high-frequency band is selected as a frequency range of not less than 8kHz. Within this frequency band, the feedback regulation effect of the voltage loop tends to zero, and the impedance characteristics of the system are jointly determined by the converter output impedance, line parasitic parameters, and fault arc characteristics. The system scans and monitors the dynamic impedance coefficient in the frequency range of 8-15kHz. The linearity reference threshold is preset to a unit value of 1.0, and the deviation standard is defined as an absolute difference exceeding 0.15. The physical meaning of this threshold is: under normal operating conditions, the ratio of the real part of the high-frequency impedance to the DC impedance should be close to 1, indicating that the system exhibits linear impedance characteristics; when this ratio deviates from 1.0 by more than 15%, it indicates that the system exhibits obvious nonlinear deviation.

[0051] The quantification standard for significant deviation is: within a continuous 100ms sampling window, the absolute value of the deviation of the dynamic impedance coefficient exceeds the preset threshold, and the duration of this deviation trend exceeds 3 control cycles (i.e., 60ms). In order to distinguish between transient fluctuations caused by rapid load changes and the continuous characteristics of arc faults, the system introduces time-damped filtering: the impedance deviation signal is processed by first-order low-pass filtering (cutoff frequency 0.2Hz) to ensure the stability of the judgment result, while maintaining a sensitive response to real arc faults (rise time is usually <1ms).

[0052] Furthermore, in order to eliminate the interference of the constant power load negative impedance characteristics exhibited by the bidirectional DC-DC converter in the low-frequency band on fault determination, the logic controller obtains the current voltage loop control bandwidth parameter as 1.5kHz, and performs impedance characteristic scanning in a specific high-frequency band from 8kHz to 15kHz.

[0053] Specifically, the system continuously collects 50 feature sample points within a 100-millisecond time window, and uses the first-order derivative operator to calculate the rate of change of dynamic impedance relative to bus current. When the derivative value is continuously negative and the amplitude exceeds 0.5, it is determined that the impedance characteristic shows a nonlinear negative increment trend of decreasing with increasing current, thereby accurately separating this physical characteristic from low-frequency constant power interference at the spectral level.

[0054] Furthermore, the DC bus current signal is synchronously acquired by a high-frequency signal processing circuit and input into a fast Fourier transform operator with a sampling frequency of 500kHz. This operator consists of a buffer with 1024 sampling points and radix-2 time-domain decimation logic, which is used to extract the high-frequency noise energy distribution in the frequency domain range of 60kHz to 100kHz in real time.

[0055] Specifically, the algorithm obtains the current high-frequency noise floor value by performing time averaging on the energy amplitude within the frequency domain interval, and compares it with the 5mV noise average recorded under normal operating conditions. When the noise floor shows an amplitude exceeding 25mV and exhibits a non-periodic broadband rise characteristic, a binary high-level signal indicating noise abnormality is generated.

[0056] Furthermore, the aforementioned nonlinear negative increment determination signal and the noise floor rise signal are input together into the AND logic gate array of the logic control unit. The system determines that there is indeed a physical series arc fault in the current DC circuit if and only if the two signals are at a valid logic level at the same time within one clock cycle.

[0057] Specifically, after confirming the fault, the processor immediately encapsulates a fault trigger instruction containing a 16-bit binary code, where the first 8 bits represent the fault type code 1010 and the last 8 bits represent the fault module location number 0011 determined by the sensor identifier. The instruction is then sent to the active arc suppression module immediately via the high-priority interrupt bus to initiate the subsequent arc extinguishing logic.

[0058] Specifically, the DC bus high-frequency noise floor is defined as the root mean square value of the current signal in the 60-100kHz frequency band. During the initial power-on phase, the system performs a "reference sampling" process, continuously collecting high-frequency current noise over 2 seconds, and calculating its statistical mean as the reference noise floor value I for this operating condition.

[0059] The mechanism for determining non-periodic rise is as follows: A fast Fourier transform is used to perform spectral analysis on the current in the 60-100kHz frequency band, calculating the real-time total energy E of this band, and comparing it with the reference noise floor energy E0. When the ratio of E / E0 exceeds 5 times within 50ms continuously, and this increase does not exhibit a periodic pattern, it is determined to be a "non-periodic rise." To adapt to reference drift under different load conditions, the system introduces an adaptive threshold mechanism: the reference noise floor value is not a fixed value, but is dynamically adjusted according to the current system power level. The specific calculation formula is as follows:

[0060] ;

[0061] Where I is the reference noise floor value, and P is the current output power of the system. This is the system's rated power.

[0062] By employing a dual criterion of "AND logic" based on specific high-frequency negative impedance characteristics and noise floor rise, the system completely eliminates misjudgment interference caused by the low-frequency constant power load characteristics of bidirectional converters from a physical perspective. This logic significantly improves the specificity of fault identification, ensuring that the system triggers protection only when a true series arc occurs, avoiding malfunctions caused by normal load fluctuations.

[0063] During normal operation of the energy storage system, the bidirectional DC-DC converter adopts a constant power transmission closed-loop control strategy. Through a dual closed-loop proportional-integral regulator consisting of an outer voltage loop and an inner current loop, the real-time collected bus voltage and inductor current feedback signals are converted into duty cycle control commands, which drive the power switching transistors at a carrier frequency of 20kHz to ensure that the power exchange deviation between the battery cells and the high-voltage DC bus is within ±0.5%.

[0064] Furthermore, after the logic control unit receives the fault trigger command containing the fault location information, the system enters the arc suppression response time window and freezes the integrator state value and duty cycle register value in the current constant power control algorithm within 50 microseconds through the hardware interrupt mechanism to prevent the current fluctuation caused by the fault from causing the control loop to saturate.

[0065] Specifically, the digital control law of the bidirectional DC-DC converter is forcibly switched from steady-state mode to active damping arc suppression mode. This mode nests a lightweight multilayer perceptron model for dynamic parameter optimization. The model architecture includes an input layer with 4 neurons, two hidden layers with 32 and 16 neurons respectively, and an output layer with 2 neurons.

[0066] Furthermore, the input layer of the multilayer perceptron model receives a real-time feature vector after normalization processing. This vector consists of the instantaneous value of the current bus voltage, the instantaneous value of the current, the sampled value of the current rate of change, and the sampled value of the voltage rate of change. The sampled data comes from the binary sequence output by the 12-bit analog-to-digital converter. The hidden layer uses the ReLU activation function to perform nonlinear mapping on the input features in order to fit the complex nonlinear impedance evolution law under fault conditions.

[0067] Specifically, the model generates an optimal control gain factor for the current fault condition through the output layer. This gain factor is passed to a high-speed pulse width modulation generator to perform high-frequency dynamic compensation on the duty cycle and phase shift angle of the power switch. Specifically, the pulse width modulation frequency is instantaneously increased to 100kHz, and the on-time of the switch is adjusted in real time according to the 0.15 offset component given by the output layer.

[0068] Furthermore, by altering the voltage and current response relationship at the converter input port through high-frequency modulation, a reverse compensation component proportional to the rate of change of current is introduced into the control algorithm, enabling the converter to simulate the charging and discharging behavior of a large-capacity capacitor in terms of electrical characteristics, thereby synthesizing a virtual capacitor control characteristic that exhibits extremely low dynamic impedance for high-frequency fault currents.

[0069] Specifically, the virtual capacitor control characteristic is realized based on the active damping control algorithm of the bidirectional DC-DC converter. When the system receives a fault trigger command, the controller immediately enters the active damping mode and performs virtual impedance synthesis control.

[0070] First, the controller rapidly acquires the bus voltage and converter input current, and calculates their rates of change in real time (i.e., voltage rate of change and current rate of change). Based on a feedback control law, the controller multiplies the current rate of change by a preset positive feedback coefficient (e.g., -50V·s / A) to generate a compensation voltage command, thereby effectively changing the dynamic impedance properties of the converter input port. Subsequently, this compensation voltage command is superimposed on the original steady-state reference voltage to generate a new voltage reference value. This new reference value is converted into a duty cycle control command by a modulation operator, driving the power switch to increase the duty cycle to 2.5. The time precision of s is 20 times that of the original 50. (Response speed of s cycle) Executes dynamic adjustment of duty cycle.

[0071] In this process, the equivalent parameters of the virtual impedance are determined according to the control law, where the equivalent capacitance corresponds to the negative value of the positive feedback coefficient (i.e., 50V·s / A); this is to address the extremely high current change rate that may occur in the early stages of a fault, such as ±100A / This control strategy can maintain the magnitude of the virtual impedance at the micro-ohm level, for example, 0.5. Ω), to achieve a fast dynamic response.

[0072] Furthermore, to prevent underdamped oscillations caused by excessive virtual impedance compensation, the controller incorporates a damping limiting mechanism: on the one hand, when the absolute value of the compensation voltage exceeds a preset threshold (e.g., 50V), it is automatically limited to that threshold; on the other hand, the duty cycle change rate within each control cycle is limited to within 0.1. Simultaneously, to ensure the stability of the virtual impedance, a first-order low-pass filter with a cutoff angular frequency of 5kHz is introduced into the control loop to effectively attenuate the transmission of high-frequency noise above 5kHz in the virtual impedance.

[0073] Specifically, the extremely low impedance channel generated by the virtual capacitor control characteristic rapidly diverts the inductance energy stored in the line that was originally maintaining the arc combustion, so that the fault current flowing through the arc fault point decreases at a rate of 20 amperes per microsecond. When the branch current is detected to be lower than the arc maintenance threshold of 0.5 amperes, the virtual impedance state is maintained until the arc plasma channel is completely extinguished, thereby achieving contactless and rapid absorption of arc energy.

[0074] By forcibly freezing steady-state parameters and switching to active damping mode within microseconds, the "maintenance" effect of conventional control on fault current is broken, creating the necessary electrical boundary conditions for arc extinction. By utilizing the high-frequency dynamic adjustment of the synthetic virtual capacitor control characteristics, the port impedance properties can be instantly changed through software definition without increasing external hardware costs, greatly improving the dynamic response speed of the system.

[0075] Based on the fault location information and measured current change rate data output by the preceding module, the active arc suppression module inputs the original current discrete sequence with a sampling frequency set to 2MHz into the virtual impedance calculation engine. In this engine, by calculating the ratio between the bus voltage disturbance and the current disturbance, the input port of the converter is equivalent to a virtual large-capacity capacitor connected in parallel across the series arc fault point at the control logic level.

[0076] Furthermore, the virtual impedance calculation engine nests a feedback network with adaptive gain adjustment function. This network consists of an input layer, a hidden layer containing 128 neurons, and an output layer. The Adam optimizer dynamically updates the equivalent capacitance value of the virtual capacitor in each control cycle, so that the transient impedance amplitude at the input end drops below 0.01 ohms in the 10kHz to 50kHz frequency band.

[0077] Specifically, the feedback network receives a 50A real-time current signal from the current transformer and a 500V voltage signal from the voltage sampling circuit as input feature vectors. It extracts the nonlinear characteristics of the current gradient through the hidden layer, calculates the negative feedback control weights used to offset the line inductance reactance, and converts these weights into the phase shift angle correction values ​​of the bidirectional DC-DC converter power switch transistors in the output layer.

[0078] Furthermore, a low-impedance bypass channel for high-frequency fault current is constructed using the virtual large-capacity capacitor effect. The equivalent capacitance value of this channel is simulated as 5000 microfarads under the drive of the control algorithm. By utilizing the physical characteristic that the voltage across the capacitor cannot change abruptly, the current flow of the high-frequency component in the fault circuit is forcibly changed.

[0079] Specifically, the low-impedance bypass channel guides the 10 millihenry inductor magnetic field energy originally stored in the 20-meter-long DC bus conductor, and through the high-frequency switching action of the power switch, quickly pulls it from the fault arc point to the 2200 microfarad electrolytic capacitor array connected in parallel on the converter output side, so that the electromagnetic energy is quickly absorbed and buffered in the form of electric field energy in the physical capacitor.

[0080] Furthermore, by rapidly transferring charge between the physical and virtual capacitors, the fault current flowing through the arc fault point is forced to decay significantly within 1.5 milliseconds, and the effective value change of the branch current is monitored in real time to determine whether it has dropped below the minimum sustaining current required for the arc to continue burning.

[0081] Specifically, the energy absorption branch is constructed as a combination of an electrolytic capacitor array and a battery cell connected in parallel on the converter output side. In this embodiment, the array preferably uses four 2200μF / 600V aluminum electrolytic capacitors (e.g., NIPPON CHEMICON KZH series) connected in parallel to form an energy storage unit with a total capacity of 8800μF and a voltage rating of 600V. To optimize high-frequency response characteristics, these capacitors are directly connected in parallel to the converter output via a low-impedance multi-core copper bus, and the lead length is strictly controlled (e.g., within 50mm) to ensure that the parasitic inductance does not exceed 5nH.

[0082] During energy transfer, the capacitor array is configured to shunt and absorb the magnetic energy stored in the line inductance through virtual impedance. Taking an operating condition with a line inductance of 10mH and a fault current rising from 0 to 100A within 1.5ms as an example, this process will generate approximately 50J of magnetic energy. After this energy is guided to the output-side capacitor for absorption, it will cause a temperature rise of approximately 5.68V across the capacitor. Even when the system is operating at its rated voltage of 500V, the total voltage after the summing (approximately 505.68V) is still significantly lower than the system's overvoltage protection threshold (560V), thus ensuring the safe operation of the system.

[0083] Furthermore, to further enhance the safety of the energy absorption branch, the system employs a multi-layered protection strategy combining hardware and software. At the hardware level, a varistor array with a working voltage of 560V is integrated before the output capacitor. Once the voltage across the capacitor exceeds 560V, the varistor will quickly conduct to discharge excess energy. The output capacitor voltage is monitored in real-time during each control cycle (e.g., 50μs). When the voltage exceeds a warning value (e.g., 530V), the controller automatically reduces the compensation coefficient of the virtual capacitor, thereby reducing the rate at which fault energy is injected into the output side and preventing voltage overshoot.

[0084] Specifically, the system has a preset minimum sustaining current threshold of 0.5 amperes. When the current value fed back by the current sensor is stably lower than 0.5 amperes and lasts for more than 20 carrier cycles, the active arc suppression module determines that the arc plasma channel has been deionized and extinguished. Throughout the process, there is no need to trigger the physical tripping action of the DC side physical mechanical circuit breaker, thereby realizing the online instantaneous interruption of the arc energy supply.

[0085] Furthermore, as one implementation method of this embodiment, a nonlinear variable-parameter virtual capacitor control method based on the fault current change rate (di / dt) is proposed to achieve "on-demand arc suppression" for arcs of different intensities. In traditional virtual capacitor control, the simulated capacitance value is usually a fixed constant. However, in this embodiment, the capacitance value is designed as a nonlinear function of the fault current change rate. When the fault current change rate is detected to be extremely high at the initial stage of arc initiation, the control algorithm instantly pushes the virtual capacitance coefficient to its peak value, for example, to 10 times the rated value, constructing an extremely low impedance "black hole" effect within microseconds to maximize the interception of current flowing through the fault point. As the fault current decreases and tends to level off, the algorithm automatically decays the virtual capacitance value according to an exponential law, smoothly transitioning to steady-state control. At the same time, the physical supercapacitor bank on the output side is used as an energy buffer to ensure that there is enough physical space for the huge transient energy to be processed. This dynamic adjustment avoids system oscillations that may be caused by a fixed large gain. This method solves the contradiction between rapid arc suppression and system stability in traditional fixed parameter control. It provides the strongest arc extinguishing capability at the moment of arc initiation and quickly restores system damping after arc extinction. Through nonlinear adjustment, the arc extinction time is shortened to the maximum extent, while reducing the voltage overshoot during control switching.

[0086] By utilizing the virtual capacitance effect to construct a low-impedance commutation channel, the destructive magnetic energy accumulated by the line inductance is guided to a safe physical energy storage element for absorption or buffering, thus avoiding the risk of voltage spike breakdown caused by energy having nowhere to dissipate. This energy transfer mechanism forces the fault point current to drop rapidly below the arc initiation threshold, achieving fast, safe, and contactless arc blocking without physically disconnecting the circuit.

[0087] The fault-tolerant reconfiguration module receives the 16-bit binary fault trigger instruction output by the active arc suppression module in real time through the buffer register, uses the instruction parsing operator to extract the low-order byte data 0011 from the 9th to the 16th bits of the instruction, and converts the binary value into the physical index number of the target battery module through the preset address mapping table, thereby locking the No. 3 battery module that has experienced an arc fault.

[0088] Furthermore, the fault-tolerant reconfiguration module sends an 8-bit binary bypass message instruction to the cascaded full-bridge unit at the output of the corresponding faulty battery module via the isolated CAN communication bus. This instruction includes a specific synchronization frame header and execution code 11110000, which is used to trigger the local logic controller in the cascaded unit to perform hardware protection logic switching.

[0089] Specifically, to ensure voltage stability during the isolation process, the fault-tolerant reconstruction module integrates a 1D-CNN convolutional neural network model for predicting the optimal switching timing. The model architecture includes an input layer for receiving current and voltage sampling sequences with a stride of 10 milliseconds, three convolutional layers with 16, 32, and 64 convolutional kernels of size 3 respectively, and a fully connected layer that outputs a probability distribution.

[0090] Furthermore, the 1D-CNN model uses the ReLU activation function to perform nonlinear processing on the transient electrical features extracted by the convolutional layer. By mapping the fluctuation trend of the current change rate to a feature map, the optimal trigger time offset of the bypass switch action is calculated, and this offset is output as a weight score to the local controller.

[0091] Specifically, after receiving the offset weight, the local controller generates a drive level signal with an amplitude of 15V through the gate drive circuit, which drives the solid-state bypass switch or mechanical contactor in the cascaded full-bridge unit to perform a closing action, and establishes a low-impedance current path with an impedance value of less than 2 milliohms across the bypass switch.

[0092] Furthermore, while the bypass switch is closing, the drive circuit simultaneously shuts off the original series power switch of the third faulty battery module, and uses the bypass branch to guide the 100A load current in the main circuit to this low-impedance path, thereby bypassing the arc fault point inside the faulty module.

[0093] Specifically, by establishing this bypass path, the third faulty battery module is physically short-circuited and isolated from the main series circuit of the system, so that the residual voltage at both ends of the fault point drops to below 0.1V within 3 milliseconds. Under the premise of not interrupting the continuous transmission of the 100A load current of the main circuit, safe electrical isolation and physical removal of the fault point at which the arc risk occurs are achieved.

[0094] Furthermore, the voltage modulation depth of dynamically adjusting the remaining healthy modules is refined, and a distributed collaborative voltage compensation strategy based on the weights of battery health state and state of charge is proposed.

[0095] When the isolation of a faulty module causes a voltage deficit on the bus, the system does not simply distribute the deficit equally among the remaining modules. The fault-tolerant reconfiguration module reads the battery health and state of charge data of all remaining healthy modules in real time and calculates the output capacity coefficient of each module using a weighted algorithm. Strong modules with good battery health and sufficient state of charge are assigned a larger voltage gain compensation task, while weak modules with severe aging or low charge are assigned a smaller gain increment. The controller independently adjusts the carrier amplitude of each cascaded unit according to the calculated allocation ratio, so that the total output voltage of each module not only meets the constant bus requirement, but also that the internal load distribution is in line with its own bearing capacity. This strategy avoids the overload or over-discharge problem of aging batteries that may be caused by "one-size-fits-all" average compensation, solves the technical hidden danger of energy efficiency imbalance in the system after fault isolation, maintains a constant DC bus voltage, and achieves life extension protection for the remaining healthy battery packs, further improving the safety and reliability of the energy storage system throughout its entire life cycle.

[0096] By controlling the bypass switch to create a low-impedance path, the faulty battery module is physically short-circuited and isolated from the main circuit, completely removing the fault point and eliminating the risk of arc reignition. This operation maintains the electrical continuity of the main series circuit while cutting off the faulty unit, laying the physical foundation for subsequent voltage reconstruction and continuous system operation.

[0097] The fault-tolerant reconfiguration module uses a high-precision voltage sensor located at the output end of the high-voltage DC bus to obtain the actual bus voltage sample value of 672V after isolating the fault module in real time. This sample value is then transmitted as an input signal to the arithmetic logic unit of the central processing unit. Within this unit, a subtraction operation is performed between the sample value and the system rated reference voltage of 720V stored in a preset read-only memory. This accurately calculates the total voltage drop of 48V caused by the removal of a single battery module.

[0098] Furthermore, in order to optimize the power distribution load of the remaining 15 healthy battery modules, the fault-tolerant reconfiguration module calls a pre-built GRU gated recurrent unit model to calculate the voltage compensation weight of each module. The model architecture specifically includes an input layer for receiving a feature vector composed of the real-time state of charge percentage of the 15 healthy modules, a gated recurrent layer containing 64 hidden neurons for extracting the temporal correlation features of the module energy state, and an output layer containing 15 neurons with a Softmax activation function.

[0099] Specifically, the gated loop unit model performs nonlinear mapping processing on the discrete values ​​of the state of charge of each input module through internal update and reset gate operators. The 15-dimensional weight scores generated by its output layer represent the proportion of voltage compensation tasks shared by each module. By setting the weight score corresponding to the healthy module with a state of charge of 0.95 to 0.08 through probability mapping, and setting the weight score corresponding to the healthy module with a state of charge of 0.60 to 0.04, the logic allocation of modules with higher energy reserves to undertake a higher proportion of voltage gain is realized.

[0100] Furthermore, the total voltage drop value of 48V calculated in the aforementioned steps is multiplied by the weight score corresponding to each healthy module in a nested multiplication operation in the multiplier circuit to calculate and output the voltage gain compensation target value corresponding to each healthy module. For example, the voltage gain target value of the module with a weight score of 0.08 is calculated to be 3.84V.

[0101] Specifically, the fault-tolerant reconfiguration module inputs the obtained target voltage gain values ​​of each module as correction variables into the duty cycle mapping table of the pulse width modulation generator. By accumulating the current original duty cycle register value of the module (0.85) with the step value corresponding to the correction variable, the pulse width modulation depth parameter of the health module controller is dynamically adjusted from 0.85 to 0.91.

[0102] Furthermore, the updated pulse width modulation command sequence is synchronously sent to the gate drive circuit of the full-bridge unit of each health module via a high-speed digital bus, driving the remaining 15 health modules to collaboratively increase their respective terminal voltage output within the same control cycle, in order to offset the 48V total voltage drop caused by fault isolation.

[0103] Specifically, a closed-loop feedback loop for bus voltage, constructed using a high-precision voltage sensor, continuously monitors the adjusted real-time voltage. When the actual DC bus voltage sampled gradually recovers from 672V and stabilizes within the rated range of 718.5V to 721.5V, the fault-tolerant reconfiguration module stops parameter adjustment and locks the current modulation depth, thereby ensuring that the DC bus voltage can automatically maintain within the rated operating range after the fault isolation and reconfiguration process is completed.

[0104] Specifically, the fault location information is obtained based on a distributed voltage sensor array. In the energy storage system, a real-time voltage sensor is installed on each cascaded unit of the battery module, which samples the voltage signal across the module and uploads it in real time to the impedance identification module via an isolated CAN bus.

[0105] The first step is that, during normal operation, the voltage of all battery modules should be evenly distributed, and the voltage of a particular module should be within ±0.5V of its rated value (e.g., 48V).

[0106] The second step is to detect an abnormal voltage drop across the fault point when a series arc fault occurs (the arc voltage is usually 50-100V). The impedance identification module calculates the voltage deviation vector by comparing the voltage of each module with its rated value and identifies the module with the largest deviation.

[0107] The third step involves assuming the 16 battery modules are numbered 0001 to 1111 (4-bit binary code). If an abnormal voltage is detected in module number 3 (binary code 0011), this code is used as fault location information and incorporated into the fault trigger command. The structure of this fault trigger command is: [Fault type code 4 bits | Fault location code 4 bits | Timestamp 8 bits] = [1010|0011|xxxxx].

[0108] The fourth step is to identify the number of modules with abnormal voltage in the case of multiple faults. If the number exceeds one, multiple fault commands are generated, each command corresponding to a fault module. The execution order of fault isolation is ensured by a message sequence with timestamps.

[0109] It achieves automatic compensation for bus voltage drops caused by fault clearing, which not only maintains the constant DC bus voltage and ensures the stable operation of downstream loads, but also prevents the remaining healthy modules from overloading or over-discharging due to undertaking too much voltage compensation tasks through a weighted gain allocation strategy.

[0110] This embodiment discloses a safety control method for energy storage batteries. By injecting a high-frequency perturbation sinusoidal current signal with a frequency set to 10kHz and an amplitude of 1.5A into the bus via a signal injection branch coupled to the high-voltage DC bus, a voltage feedback signal containing high-frequency characteristics is collected using a voltage transformer with a high sampling rate. This signal is then input into the quadrature demodulation module of a digital signal processor for amplitude and phase extraction, thereby calculating the real-time dynamic impedance value of the bus circuit.

[0111] Furthermore, based on the frequency domain difference characteristics, a digital high-pass filter is used to remove the low-frequency negative impedance component of the constant power load below 2kHz of the converter. Specifically, the real part of the impedance near the 10kHz frequency band is extracted. When it is determined that the real part of the dynamic impedance changes from a positive value to a negative 0.8 ohms and is accompanied by a rise in the high-frequency noise floor, the logic control unit immediately generates a binary fault trigger command containing the fault module location number 0011.

[0112] Specifically, upon receiving a fault trigger command, the active arc suppression module integrated into the bidirectional DC-DC converter forcibly switches the converter's pulse width modulation frequency from 20kHz in steady state to 100kHz through a hardware interrupt mechanism. It also enables a multilayer perceptron model nested in the control law. This model contains four feature input nodes, two hidden layers each containing 32 neurons, and two output gain nodes. The weight parameters output in real time by this model are used to dynamically correct the duty cycle and phase shift angle of the power switch every 10 microseconds.

[0113] Furthermore, by changing the voltage and current response gradients of the converter input port through high-frequency dynamic correction, a virtual capacitor effect with an equivalent capacitance of 5000 microfarads is synthesized at the control logic level. This effect is used to construct a low-impedance commutation bypass by utilizing the extremely low impedance characteristics exhibited by the high-frequency fault current. This guides the 10 millihenry inductance magnetic energy generated by the long conductor to transfer energy to the 2200 microfarad physical capacitor array on the converter output side, so that the current in the fault branch drops rapidly to below the arc sustaining threshold of 0.5A within 1.5 milliseconds, achieving rapid arc extinguishing in a contactless state.

[0114] Specifically, the fault-tolerant reconfiguration module connected to the battery module cascade unit locks the No. 3 battery module based on the fault location information. It uses a 1D-CNN convolutional neural network to extract features of the residual current evolution trend at the fault point. The network contains two convolutional layers, each configured with 16 convolutional kernels of size 3. The solid-state bypass switches at both ends of the fault module are driven to close by the trigger weights given by the output layer. While establishing a physical short circuit with an impedance of less than 2 milliohms, the power output path of the fault module is cut off, thereby safely removing the fault point with the risk of arcing from the main circuit.

[0115] Furthermore, the fault-tolerant reconfiguration module uses a high-precision voltage sensor to collect the bus voltage value of 672V after the faulty module is disconnected in real time, and subtracts it from the rated reference voltage of 720V to obtain a voltage drop value of 48V. Then, it calls the gated recurrent unit model to calculate the voltage gain coefficient based on the charge state distribution of the remaining 15 healthy modules. This model contains a gated recurrent layer with 64 hidden neurons.

[0116] Specifically, the gated cyclic unit model sets the compensation weight corresponding to the module with a state of charge of 0.95 to 0.08, and performs a multiplication operation on this weight and the voltage drop value of 48V to obtain the 3.84V voltage gain that the module needs to share. By synchronously updating the pulse width modulation depth parameter of each healthy module controller, the duty cycle of each module is increased from 0.85 to 0.91. The voltage boost of the remaining healthy modules is used to compensate for the total voltage deficit caused by the isolation fault, ensuring that the DC bus voltage automatically recovers to the rated operating range of 720V within 20 milliseconds.

[0117] This method uses high-frequency impedance feature identification technology to remove converter load interference to accurately capture arc characteristics, utilizes the active damping control technology of bidirectional DC converter to synthesize virtual impedance to achieve rapid arc extinguishing, and finally achieves isolation of battery module faults and closed-loop compensation of bus voltage without stopping the machine through cascaded unit fault-tolerant reconstruction technology based on deep learning weights.

[0118] In summary, this embodiment achieves precise isolation and contactless rapid interruption of series arc faults in energy storage systems through deep coupling of high-frequency impedance characteristic analysis and converter virtual impedance control technology. Furthermore, by combining a cascaded unit voltage reconstruction strategy based on deep learning weights, it ensures the bus power balance and steady-state voltage characteristics of the system after the physical isolation of the faulty unit.

[0119] Example 2

[0120] This embodiment is set in a complex implementation scenario of concurrent multi-point arc faults in a megawatt-level large containerized energy storage array. The impedance identification module introduces a deep learning inference architecture based on a multi-head self-attention mechanism. This architecture includes a position encoding layer for processing a 1024-point sampling sequence and four cascaded encoder modules. Each encoder module consists of a multi-head attention layer with eight independent attentions and a feedforward fully connected layer with 2048 neurons, which is used to extract the fingerprint features of multiple arc sources from the bus signal containing high-frequency noise interference.

[0121] Furthermore, in the algorithm processing of the multi-head attention layer, the system transforms the input normalized voltage disturbance vector into a query vector, a key vector, and a value vector. By calculating the dot product of the query vector and the key vector and dividing it by the scaling factor 8, a preliminary correlation weight matrix is ​​obtained. Then, the Softmax function is used to normalize the matrix, thereby obtaining the contribution weight of impedance characteristics to fault location determination in different time spans.

[0122] Specifically, the model provides a probability distribution sequence of arc faults for each battery cluster through the last classification layer containing 16 output neurons. When the fault probability scores of the 5th and 8th clusters reach 0.96 and 0.93 respectively, the system automatically generates a fault trigger command containing dual physical index information and pushes it to the active arc suppression execution unit in real time through the 100M Ethernet interface.

[0123] Furthermore, for the 96V total voltage deficit caused by the simultaneous isolation of two faulty modules, the fault-tolerant reconstruction module calls a deep convolutional neural network model containing 8 residual blocks to perform global voltage compensation calculation. Each residual block consists of two convolutional layers with 32 3x3 convolutional kernels and a cross-layer identity connection to process the input feature map composed of the real-time charge state of 224 healthy modules in the entire station.

[0124] Specifically, the residual network model extracts gradient features from the energy reserve differences of each module through convolutional kernels, compresses the high-dimensional feature map into 224 specific voltage gain compensation coefficients using a global average pooling layer, and injects these coefficients as correction variables into the pulse width modulation registers of each distributed controller. By synchronously increasing the duty cycle of the healthy module from 0.80 to 0.87, closed-loop smooth recovery with DC bus voltage ripple below 0.5% is achieved when dealing with large-scale instantaneous voltage drops.

[0125] In summary, this embodiment, through the deep integration of a multi-level deep learning architecture and virtual impedance control technology, not only achieves accurate identification and instantaneous arc extinguishing of multi-point parallel arc faults, but also solves the problem of global voltage steady-state reconstruction of large-scale energy storage systems after complex topology changes.

[0126] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A safety control system for energy storage batteries, characterized in that, The system includes: Impedance identification module: Connected in parallel to the high-voltage DC bus, injecting high-frequency micro-perturbation current, collecting and demodulating voltage feedback signals to calculate real-time dynamic impedance; using absolute difference comparison, filtering out the inherent low-frequency negative impedance characteristics of the converter, and generating a fault trigger command when the dynamic impedance is determined to exhibit arc-like high-frequency negative impedance characteristics. Active arc suppression module: Integrated into the bidirectional DC-DC converter, it responds to the fault trigger command to force switch the modulation logic of the power switch tube, and synthesizes a virtual capacitor effect with extremely low impedance to high frequency fault current at the input port; using the virtual capacitor effect to construct a low impedance commutation channel, it guides the line inductance magnetic energy to the energy absorption branch for absorption and buffering, so that the fault current is reduced to below the arc ignition threshold, and realizes contactless rapid arc extinguishing. Fault-tolerant reconfiguration module: Connected to the battery module cascade unit, it uses a bypass switch to electrically isolate the faulty battery module after the arc is extinguished; at the same time, it calculates the bus voltage deficit caused by the isolation and dynamically adjusts the voltage modulation depth of the remaining healthy modules accordingly, so as to maintain a constant DC bus voltage while isolating the fault.

2. The energy storage battery safety control system according to claim 1, characterized in that, The control logic for the impedance identification module to obtain the real-time dynamic impedance includes the following steps: A weak sinusoidal disturbance current in the high-frequency band is superimposed on the fundamental current of the DC bus using the pulse width modulator of the bidirectional DC converter; the voltage signal of the DC bus is acquired in real time and synchronously demodulated using digital lock-in amplification technology, and the voltage response component with the same frequency as the disturbance current is extracted from the background noise; the DC voltage and DC current values ​​of the DC bus are acquired in real time, dimensionless normalization is performed, the ratio of the two is calculated to obtain the steady-state DC impedance, and the original dynamic impedance value is divided by the steady-state DC impedance to generate the dynamic impedance coefficient, which is defined as the real-time dynamic impedance.

3. The energy storage battery safety control system according to claim 1, characterized in that, The discrimination logic for generating the fault trigger command by the impedance identification module includes the following steps: The dynamic impedance coefficient calculated in real time is compared with a preset linearity benchmark threshold. When the dynamic impedance coefficient is detected to deviate significantly from the unit value and shows a negative incremental change trend of decreasing with increasing current in a specific high-frequency band unaffected by the converter voltage loop control bandwidth, the interference of the converter's low-frequency constant power characteristic is eliminated, and the system impedance characteristic is determined to change from linear to nonlinear. The "AND logic" judgment is performed in combination with whether the high-frequency noise floor of the DC bus current shows a non-periodic rise characteristic. When both conditions are met at the same time, it is determined that there is a series arc fault in the current circuit, and the fault trigger command containing fault location information is immediately sent to the subsequent control module.

4. The energy storage battery safety control system according to claim 1, characterized in that, The steps of the active arc suppression module in performing control strategy switching and virtual impedance synthesis include: During normal system operation, a constant power transmission closed-loop control strategy is executed. Within a very short time window after receiving the fault trigger command, the current constant power transmission closed-loop control parameters are frozen, and the digital control law of the bidirectional DC-DC converter is forcibly switched from steady-state mode to active damping arc suppression mode. In the active damping arc suppression mode, the voltage and current response relationship of the converter input port is changed by dynamically adjusting the duty cycle and phase shift angle of the power switch at high frequency, thereby synthesizing a virtual capacitor control characteristic that exhibits extremely low dynamic impedance to the rate of change of high-frequency fault current.

5. The energy storage battery safety control system according to claim 1, characterized in that, The mechanism by which the active arc suppression module achieves arc blocking using electrical characteristics includes: using extremely low dynamic impedance to treat the converter input as a virtual large-capacity capacitor connected in parallel across the fault point at the control logic level; using the effect of this virtual large-capacity capacitor to construct a low-impedance current bypass, guiding and transferring the magnetic field energy released in the inductance of the long conductor to the energy absorption branch for absorption or buffering, forcing the current flowing through the arc fault point to rapidly decay below the minimum sustaining current required for arc extinguishing, thus blocking the arc energy supply without disconnecting the physical mechanical circuit breaker.

6. The energy storage battery safety control system according to claim 1, characterized in that, The steps by which the fault-tolerant reconfiguration module performs electrical isolation include: In response to the fault location information contained in the fault trigger command, the faulty battery module is locked; a bypass command is sent to the cascaded full-bridge unit connected to the output terminal of the faulty battery module, driving the corresponding mechanical or solid-state bypass switch to perform a closing action; a low-impedance current path is established across the faulty battery module, physically short-circuiting and isolating the faulty battery module from the main series circuit of the system, and safely removing the fault point with the risk of arcing without cutting off the main circuit load current.

7. The energy storage battery safety control system according to claim 1, characterized in that, The fault-tolerant reconfiguration module performs the following dynamic adjustment steps: It uses a high-precision voltage sensor to collect the actual DC bus voltage after isolation, compares it with the system's rated reference voltage, and calculates the total voltage drop caused by the removal of the faulty module; using the voltage drop value, combined with the number weights of the remaining healthy modules in the current system and their respective states of charge, it recalculates and allocates the voltage gain coefficient of each healthy module; it updates the pulse width modulation depth parameters of each healthy module controller, controls the remaining healthy modules to increase their respective output voltages to compensate for the total voltage drop, and ensures that the DC bus voltage can automatically recover and remain within the rated operating range after the fault isolation and reconfiguration process is completed.

8. A method for safety control of energy storage batteries, characterized in that, The method includes: connecting in parallel to a high-voltage DC bus, injecting a high-frequency perturbation current, acquiring and demodulating voltage feedback signals to calculate real-time dynamic impedance; using absolute difference comparison to filter out the inherent low-frequency negative impedance characteristics of the converter, and generating a fault trigger command when the dynamic impedance is determined to exhibit arc-like high-frequency negative impedance characteristics; integrating into a bidirectional DC-DC converter, responding to the fault trigger command to forcibly switch the power switch modulation logic, and synthesizing a virtual capacitor effect with extremely low impedance to high-frequency fault current at the input port; using the virtual capacitor effect to construct a low-impedance commutation channel, guiding the line inductance magnetic energy to the energy absorption branch for absorption and buffering, reducing the fault current to below the arc initiation threshold, and achieving contactless rapid arc extinguishing; connecting to a battery module cascade unit, and using a bypass switch to electrically isolate the faulty battery module after the arc is extinguished; simultaneously calculating the bus voltage deficit caused by isolation, and dynamically adjusting the voltage modulation depth of the remaining healthy modules accordingly, maintaining a constant DC bus voltage while isolating the fault.

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