High-speed EML driver chip integrated with burst mode function for laser and SOA
By integrating burst mode function circuits into the high-speed EML driver chip, the problem that traditional chips cannot meet high communication rates and long communication distances is solved, achieving space saving and cost reduction in optical modules. At the same time, the control of lasers and SOA is optimized to meet the requirements of 50G ONU.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-03-04
- Publication Date
- 2026-04-03
AI Technical Summary
Traditional low-speed ONU DML driver chips cannot meet the higher communication rates and longer communication distances required by 50G ONUs, and external circuitry for burst mode functionality occupies optical module space and increases costs.
The burst mode function circuit is integrated into the high-speed EML driver chip, including a low-impedance current buffer, a current-to-analog converter, and a delay controller, to realize the control of the laser and SOA.
It saves internal space of optical modules, reduces manufacturing costs, and meets the high communication rate, long communication distance and high bandwidth requirements of 50G ONU, while optimizing the turn-on and turn-off sequence of lasers and SOA.
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Figure CN121791963A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of optical module technology, and more specifically, to a high-speed EML driver chip that integrates burst mode functionality for lasers and SOA. Background Technology
[0002] like Figure 1 The diagram illustrates an optical access network. The operator's cloud server connects to an Optical Line Terminal (OLT) via a core switch. The OLT connects to multiple Online Units (ONUs) via optical fibers, and each ONU connects to the user's internet access devices, such as PCs, video devices, and voice devices. Because an OLT connects to multiple ONUs simultaneously, and multiple ONUs send data to the same OLT via the same optical fiber link, the ONUs use a time-division multiplexing method for data transmission. This means that only one ONU sends data to the OLT using burst mode within a given time period. With the rapid development of cutting-edge technologies such as 5G, IoT, and cloud computing, bandwidth demand has surged. Currently, ONUs with speeds of 10G and below have become insufficient, and the demand for high bandwidth is driving the technological development of 50G ONUs. For traditional low-speed ONUs, data transmission mainly uses Direct Modulated Laser (DML) driver chips with burst mode functionality and DML, which generally only support communication speeds of 10G and below and communication distances of 10KM and below. When faced with the development needs of 50G ONU, the DML driver chip and DML still failed to meet the requirements of higher communication rates and longer communication distances, and the eye diagram quality during data transmission could not meet the usage requirements.
[0003] In traditional designs, such as patent CN117834032A - Burst drive and monitoring circuit, method and optical communication device based on external modulation, external circuits are used to implement burst mode function. This occupies a lot of space inside the optical module and increases the manufacturing cost of the optical module. Summary of the Invention
[0004] This invention addresses the problem that using external circuitry to implement burst mode functionality occupies a significant amount of internal space in the optical module and increases manufacturing costs. It proposes a high-speed EML driver chip that integrates burst mode functionality for both lasers and SOA. By integrating the burst mode function circuitry within the EML driver chip, the optical module no longer requires external circuitry to implement burst mode functionality, saving considerable internal space and reducing manufacturing costs.
[0005] The specific implementation details of this invention are as follows: A high-speed EML driver chip integrating burst mode functionality for lasers and SOA, connected to an EML chip; including an EML driver and burst mode function circuitry integrated within the high-speed EML driver chip. The input terminal of the EML driver is connected to the RF_IN pin of the high-speed EML driver chip, and the output terminal of the EML driver is connected to the RF_EA pin of the high-speed EML driver chip. The controlled terminal of the burst mode function circuit is connected to the BEN pin of the high-speed EML driver chip, the first bias output terminal of the burst mode function circuit is connected to the LD_BIAS pin of the high-speed EML driver chip, and the second bias output terminal of the burst mode function circuit is connected to the SOA_BIAS pin of the high-speed EML driver chip.
[0006] To better realize the present invention, the burst mode functional circuit further includes a first low-impedance current buffer and a second low-impedance current buffer. One end of the first low-impedance current buffer is connected to the BEN pin of the high-speed EML driver chip, and the other end is connected to the LD_BIAS pin of the high-speed EML driver chip. One end of the second low-impedance current buffer is connected between the BEN pin of the high-speed EML driver chip and the input terminal of the first low-impedance current buffer, and the other end is connected to the SOA_BIAS pin of the high-speed EML driver chip.
[0007] To better realize the present invention, the burst mode functional circuit further includes a first current digital-to-analog converter and a second current digital-to-analog converter; The output terminal of the first current-to-analog converter is connected to the input terminal of the first low-impedance current buffer; The output of the second current-to-analog converter is connected to the input of the second low-impedance current buffer.
[0008] To better realize the present invention, the burst mode functional circuit further includes a first delay controller and a second delay controller; The input terminal of the first delay controller is connected to the BEN pin of the high-speed EML driver chip, and the output terminal is connected to the first low-impedance current buffer. The input terminal of the second delay controller is connected to the BEN pin of the high-speed EML driver chip, and the output terminal is connected to the second low-impedance current buffer.
[0009] The present invention has the following beneficial effects: (1) By integrating the burst mode function circuit inside the EML driver chip, the present invention eliminates the need for external circuits to implement the burst mode function in the optical module, saving a lot of space inside the optical module and reducing the manufacturing cost of the optical module.
[0010] (2) This invention integrates burst mode function inside the EML driver chip, enabling it to meet the requirements of 50GONU for higher communication rate, longer communication distance and higher bandwidth.
[0011] (3) By setting a delay controller to adjust the response speed of the low impedance current buffer output, the present invention realizes the control of the turn-on and turn-off sequence of the laser and semiconductor optical amplifier SOA, and finally obtains the best turn-on and turn-off performance. Attached Figure Description
[0012] Figure 1 This is a schematic diagram of a traditional optical access network.
[0013] Figure 2 A schematic diagram of a high-speed EML driver chip structure that integrates burst mode functionality for lasers and semiconductor optical amplifiers (SOA) is provided for this invention.
[0014] Figure 3 This is a schematic diagram of an EML for a high-speed electroabsorption modulated laser that integrates a semiconductor optical amplifier (SOA).
[0015] Figure 4 A schematic diagram of the DC bias I1 of the laser and the DC bias I2 of the semiconductor optical amplifier SOA in burst mode provided by the present invention.
[0016] Figure 5 The present invention provides a schematic diagram of DC current bias I and I' connected to different output impedances R and R'. Detailed Implementation
[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments, and therefore should not be regarded as a limitation on the scope of protection. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "set up," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances. Example 1:
[0019] This embodiment proposes a high-speed EML driver chip that integrates burst mode functionality for lasers and SOA, and is connected to an EML chip; it includes an EML driver and burst mode function circuitry integrated within the high-speed EML driver chip. The input terminal of the EML driver is connected to the RF_IN pin of the high-speed EML driver chip, and the output terminal of the EML driver is connected to the RF_EA pin of the high-speed EML driver chip. The controlled terminal of the burst mode function circuit is connected to the BEN pin of the high-speed EML driver chip, the first bias output terminal of the burst mode function circuit is connected to the LD_BIAS pin of the high-speed EML driver chip, and the second bias output terminal of the burst mode function circuit is connected to the SOA_BIAS pin of the high-speed EML driver chip.
[0020] Working principle: This embodiment integrates the burst mode function circuit inside the EML driver chip, so that the optical module no longer needs external circuitry to implement the burst mode function, saving a lot of space inside the optical module and reducing the manufacturing cost of the optical module. Example 2:
[0021] This embodiment is based on the above embodiment 1, such as... Figure 2 As shown, the structure of the burst mode functional circuit is described in detail with a specific embodiment.
[0022] The burst mode functional circuit includes a first low-impedance current buffer and a second low-impedance current buffer. One end of the first low-impedance current buffer is connected to the BEN pin of the high-speed EML driver chip, and the other end is connected to the LD_BIAS pin of the high-speed EML driver chip. One end of the second low-impedance current buffer is connected between the BEN pin of the high-speed EML driver chip and the input terminal of the first low-impedance current buffer, and the other end is connected to the SOA_BIAS pin of the high-speed EML driver chip.
[0023] The burst mode functional circuit also includes a first current-to-digital converter and a second current-to-digital converter. The output terminal of the first current-to-analog converter is connected to the input terminal of the first low-impedance current buffer; The output of the second current-to-analog converter is connected to the input of the second low-impedance current buffer.
[0024] The burst mode functional circuit also includes a first delay controller and a second delay controller; The input terminal of the first delay controller is connected to the BEN pin of the high-speed EML driver chip, and the output terminal is connected to the first low-impedance current buffer. The input terminal of the second delay controller is connected to the BEN pin of the high-speed EML driver chip, and the output terminal is connected to the second low-impedance current buffer.
[0025] Working principle: such as Figure 2 The diagram shown illustrates the structure of this embodiment, including the main driver section and the integrated burst-mode functional circuitry for the laser and semiconductor optical amplifier (SOA). This circuit consists of two delay controllers, two current-to-analog converters (IDACs), and two low-impedance current buffers. It can provide DC current bias to the external circuitry via the LD_BIAS and SOA_BIAS pins. The IDACs precisely control the magnitude of the DC current output by the low-impedance current buffers. The delay controllers adjust the response speed of the low-impedance current buffers and control their on / off states based on the BEN pin voltage. The low-impedance current buffers output DC current only when the BEN pin is low; otherwise, the LD_BIAS and SOA_BIAS pins are in a high-impedance state.
[0026] The other parts of this embodiment are the same as those in Embodiment 1 above, so they will not be described again. Example 3:
[0027] This embodiment is based on any one of Embodiments 1-2 above, such as Figure 3 The diagram shown is an EML diagram integrating SOA, which includes a distributed feedback laser (DFB), an electroabsorption modulator (EAM), and a semiconductor optical amplifier (SOA).
[0028] The EML chip includes a distributed feedback laser; The distributed feedback laser includes a laser diode (LD); One end of the laser diode LD is connected to the first low-impedance current buffer through the LD_BIAS pin of the high-speed EML driver chip, and the other end is connected to ground. like Figure 3As shown, the distributed feedback laser in this embodiment also includes an equivalent ground capacitance C1; one end of the capacitor C1 is connected between the laser diode LD and the LD_BIAS pin of the high-speed EML driver chip, and the other end is connected to the ground.
[0029] like Figure 3 As shown, the EML chip in this embodiment also includes a semiconductor optical amplifier; One end of the semiconductor optical amplifier is connected to the second low-impedance current buffer through the SOA_BIAS pin of the high-speed EML driver chip, and the other end is connected to ground. The semiconductor optical amplifier in this embodiment also includes an equivalent ground capacitor C2. One end of the capacitor C2 is connected between the semiconductor optical amplifier and the SOA_BIAS pin of the high-speed EML driver chip, and the other end is connected to the ground.
[0030] The EML chip also includes an electroabsorption modulator; One end of the electroabsorption modulator is connected to the output of the EML driver through the RF_EA pin of the high-speed EML driver chip, and the other end is connected to ground.
[0031] Working Principle: In this embodiment, the DFB laser can be equivalent to a laser diode (LD) and a capacitance to ground (C1), while the semiconductor optical amplifier (SOA) includes an equivalent capacitance to ground (C2). In practical applications, the RF_EA pin of the EML driver chip is connected to the RF_EA pin of the EML, providing the EML chip with an RF signal input. The LD_BIAS and SOA_BIAS pins of the EML driver chip are connected to the LD_BIAS and SOA_BIAS pins of the EML, respectively, providing DC current biases I1 and I2 to the laser LD and the semiconductor optical amplifier (SOA), respectively. When I1 and I2 are greater than the threshold currents required by the laser diode LD and the semiconductor optical amplifier (SOA), the EML chip begins to transmit data normally.
[0032] This embodiment integrates burst mode functionality within the EML driver chip, enabling it to meet the requirements of a 50G ONU for higher communication rates, longer communication distances, and higher bandwidth.
[0033] The other parts of this embodiment are the same as any one of the above embodiments 1-2, so they will not be described again. Example 4:
[0034] This embodiment is based on any one of embodiments 1-3 above, such as Figure 4 , Figure 5 As shown, a specific embodiment will be described in detail.
[0035] First, in this embodiment, the burst mode function circuit is integrated inside the EML driver chip, so that the optical module no longer requires an external circuit to implement the burst mode function, saving a large amount of space inside the optical module and reducing the manufacturing cost of the optical module.
[0036] Second, for a 50G ONU, within 25 ns after BEN changes from high level to low level, the EML needs to start emitting light stably, that is, the DC bias I1 of the laser and the DC bias I2 of the SOA need to increase from 0 to the normal operating current in a shorter time. When the LD_BIAS pin and SOA_BIAS pin of the EML driver chip in this embodiment are connected to the LD_BIAS pin and SOA_BIAS pin of the EML chip for use, although the capacitances C1 and C2 of the EML chip are relatively large under the existing manufacturing process, the output impedances R1 and R2 of the low-impedance current buffer are optimized to be relatively small. According to the time constant formula τ = RC, finally τ is still relatively small. As Figure 4 shown, it is a schematic diagram of the DC bias I1 of the laser and the DC bias I2 of the SOA in burst mode. The smaller τ makes the rise times of the DC bias I1 of the laser and the DC bias I2 of the SOA shorter, meeting the requirement of T < 25 ns for 50G ONU, where T is the time from BEN changing to low level to the EML starting to emit light stably.
[0037] In addition, the smaller output impedances R1 and R2 can improve the bandwidth utilization rate of the ONU. As Figure 5 shown, it is a schematic diagram of the DC current biases I and I’ connected to different output impedances R and R’, where R > R’. During the same period when BEN is at low level, that is, in the burst mode time period, the bias currents I and I’ increase from 0 to the same normal operating current at the same moment. According to the time constant formula τ = RC, because R > R’, the rise time of the bias current I’ is shorter. Eventually, the normal operating times of the bias currents I and I’ are different, that is, t < t’, indicating that the optimized bias current is established faster, effectively extending the available data transmission time, where t and t’ respectively represent the rise times of the bias currents I and I’.
[0038] More importantly, by adjusting the response speed of the output of the low-impedance current buffer through the delay controller, the control of the turn-on and turn-off sequences of the laser and the SOA can be achieved, and finally the best turn-on and turn-off performance can be obtained.
[0039] Other parts of this embodiment are the same as any one of the above Embodiment 1 - Embodiment 3, so they will not be elaborated here.
[0040] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any simple modifications or equivalent changes made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the present invention.
Claims
1. A high-speed EML driver chip integrating burst mode functionality for lasers and SOA, connected to an EML chip; characterized in that, This includes the EML driver and burst mode function circuitry integrated into the high-speed EML driver chip; The input terminal of the EML driver is connected to the RF_IN pin of the high-speed EML driver chip, and the output terminal of the EML driver is connected to the RF_EA pin of the high-speed EML driver chip. The controlled terminal of the burst mode function circuit is connected to the BEN pin of the high-speed EML driver chip, the first bias output terminal of the burst mode function circuit is connected to the LD_BIAS pin of the high-speed EML driver chip, and the second bias output terminal of the burst mode function circuit is connected to the SOA_BIAS pin of the high-speed EML driver chip.
2. A high-speed EML driver chip integrating burst mode functionality for lasers and SOA according to claim 1, characterized in that, The burst mode functional circuit includes a first low-impedance current buffer and a second low-impedance current buffer. One end of the first low-impedance current buffer is connected to the BEN pin of the high-speed EML driver chip, and the other end is connected to the LD_BIAS pin of the high-speed EML driver chip. One end of the second low-impedance current buffer is connected between the BEN pin of the high-speed EML driver chip and the input terminal of the first low-impedance current buffer, and the other end is connected to the SOA_BIAS pin of the high-speed EML driver chip.
3. A high-speed EML driver chip integrating burst mode functionality for lasers and SOA according to claim 2, characterized in that, The burst mode functional circuit also includes a first current-to-digital converter and a second current-to-digital converter. The output terminal of the first current-to-analog converter is connected to the input terminal of the first low-impedance current buffer; The output of the second current-to-analog converter is connected to the input of the second low-impedance current buffer.
4. A high-speed EML driver chip integrating burst mode functionality for lasers and SOA according to claim 2, characterized in that, The burst mode functional circuit also includes a first delay controller and a second delay controller; The input terminal of the first delay controller is connected to the BEN pin of the high-speed EML driver chip, and the output terminal is connected to the first low-impedance current buffer. The input terminal of the second delay controller is connected to the BEN pin of the high-speed EML driver chip, and the output terminal is connected to the second low-impedance current buffer.
Citation Information
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