NiSi layer forming method

Abstract

The invention provides a method for forming a NiSi layer, which comprises the following steps of: sequentially forming a Ti layer and a Ni layer on a Si substrate, and annealing to enable Ni in the Ni layer to penetrate through the Ti layer and react with the Si substrate to form the NiSi layer. The Ti layer serves as a diffusion delay layer, so that the diffusion rate of Ni in Si is effectively restrained, and the problems of uniformity and short circuit caused by transverse diffusion are solved. The temperature uniformity in the annealing process is ensured through the AP-MWA process, local overheating or underheating is avoided, formation of NiSi2 high-resistance phases is reduced, the interface quality is improved, and the NiSi laminar resistance is reduced. The thermal expansion coefficient of the Ti layer is between that of Ni and that of Si, so that a mechanical buffering effect is achieved, the interface stress generated by thermal mismatch is effectively relaxed, and the mechanical and electrical reliability is improved. Therefore, according to the method, the uniformity, the stability and the low-resistance characteristic of the NiSi layer are improved, the thermal budget is reduced, and the forming process of the NiSi layer is optimized.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for forming a NiSi layer. Background Technology

[0002] Rapid thermal annealing (RTA) and microwave annealing (MWA) techniques are commonly used to diffuse nickel (Ni) into silicon (Si) to form a nickel-silicon (NiSi) layer. However, these techniques have several shortcomings in practical applications. For example, during RTA annealing, the excessively rapid diffusion rate of Ni in Si can easily lead to lateral diffusion, which not only affects the uniformity of NiSi formation but may also cause short-circuit problems. RTA technology typically requires high temperatures (above 500°C), which not only increases the thermal budget but may also lead to interface damage and the formation of high-resistivity phases (such as NiSi2), thus affecting the electrical performance and reliability of the device. During NiSi formation, uneven local heating in both RTA and MWA processes causes fluctuations in the sheet resistance (Rs) distribution, which in turn affects the stability of the device. Simultaneously, due to thermal expansion mismatch during NiSi formation, significant residual stress may be generated at the interface, which can negatively impact the long-term reliability of the device. Furthermore, although there are studies on inserting barrier layers (such as TaN) or improving annealing methods, existing solutions often compromise on these aspects. For example, introducing a barrier layer may increase interfacial resistance or process complexity; and improving the annealing method, if not combined with a suitable material system, will still be difficult to effectively suppress diffusion and stress. Therefore, how to achieve controlled diffusion and uniform reaction of Ni at low temperatures and form a low-stress, low-resistance NiSi interface through a simple, integrated process remains a technical challenge that urgently needs to be overcome in this field. Summary of the Invention

[0003] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for forming a NiSi layer, which solves the problems in the prior art such as uneven NiSi formation caused by the excessively fast diffusion rate of Ni in Si, the formation of the high-resistivity NiSi2 phase, and the large interface stress caused by thermal expansion mismatch during NiSi formation.

[0004] To achieve the above and other related objectives, the present invention provides a method for forming a NiSi layer, the method comprising:

[0005] S1 provides a Si substrate;

[0006] S2, a Ti layer is formed on the Si substrate;

[0007] S3, a Ni layer is formed on the Ti layer;

[0008] S4, an automatic power-controlled microwave annealing process is used to allow the Ni in the Ni layer to pass through the Ti layer and react with the Si substrate to form a NiSi layer; wherein, the automatic power-controlled microwave annealing process is configured to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature.

[0009] Optionally, in step S2, the Ti layer is formed using a chemical vapor deposition process or a physical vapor deposition process, and the thickness of the Ti layer is 10 angstroms to 50 angstroms; after step S4, a wet etching process is also included to remove the Ti layer and the unreacted Ni layer.

[0010] Optionally, the thickness of the Ni layer formed in step S3 is 100 angstroms to 250 angstroms.

[0011] Optionally, the annealing temperature is stabilized to bring the real-time temperature toward a target annealing temperature, which is 200°C to 500°C.

[0012] Optionally, the method in step S4 for using the automatic power-controlled microwave annealing process to allow Ni in the Ni layer to pass through the Ti layer and react with the Si substrate to form the NiSi layer includes:

[0013] S41, Perform the first annealing step; the temperature of the first annealing step is 200℃~250℃, and the time is 60s~120s, so that Ni in the Ni layer can pass through the Ti layer and diffuse into the Si substrate to form Ni. x Si y Where x > 0, y > 0;

[0014] S42, perform the second annealing step; the temperature of the second annealing step is 400℃~500℃, and the time is 10s~30s, so that the Ni... x Si y NiSi is formed through a phase transition.

[0015] Furthermore, the annealing machine of the automatic power control microwave annealing process has a multi-frequency microwave source that can be tuned to at least two bands, the two bands including a first band and a second band, the microwave frequency of the first band being lower than the microwave frequency of the second band, the first band being used for the first annealing step, and the second band being used for the second annealing step.

[0016] Furthermore, the microwave frequency of the first band is 2.45 GHz, and the microwave frequency of the second band is 5.8 GHz.

[0017] Furthermore, after the first annealing step, the Ni layer includes a first Ni layer that penetrates the Ti layer and diffuses into the Si substrate, and a second Ni layer that does not penetrate the Ti layer. After step S41, the step of removing the second Ni layer is further included.

[0018] Optionally, the automatic power control microwave annealing process utilizes a closed-loop feedback system to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature; the closed-loop feedback system includes a temperature monitoring device and a central controller connected to it via a signal; wherein,

[0019] The temperature monitoring device monitors the real-time temperature of the surface of the Si substrate and sends the monitored real-time temperature to the central controller.

[0020] The central controller compares the received real-time temperature as a feedback signal with the target annealing temperature, and continuously adjusts the microwave power according to the comparison result through a control algorithm so that the real-time temperature converges to the target annealing temperature.

[0021] Optionally, the automatic adjustment range of the microwave power is 3800W~4500W.

[0022] As described above, the method for forming the NiSi layer of the present invention has the following beneficial effects:

[0023] To address the diffusion problem: Ti and Ni layers are sequentially formed on a Si substrate, and annealing allows Ni in the Ni layer to penetrate the Ti layer and react with the Si substrate to form a NiSi layer. The Ti layer acts as a diffusion retardation layer, effectively suppressing the diffusion rate of Ni in Si and avoiding uniformity and short-circuit problems caused by lateral diffusion.

[0024] To address the issues of thermal budget and high resistivity phase: By employing an automatic power-controlled microwave annealing process (AP-MWA) and setting a low-temperature annealing window of 200℃~500℃, the temperature uniformity of the annealing process can be ensured, avoiding local overheating or underheating, thereby reducing the formation of high-resistivity phase in NiSi2, improving interface quality, and reducing NiSi layer resistance (Rs).

[0025] Regarding stress issues: The thermal expansion coefficient of the Ti layer is between that of Ni and Si, which acts as a mechanical buffer, effectively relaxing the interfacial stress caused by thermal mismatch and improving the mechanical and electrical reliability of the device.

[0026] In summary, this method significantly improves the uniformity, stability, and low resistance of NiSi layers, reduces the thermal budget compared to existing technologies, and optimizes the NiSi layer formation process, making it more suitable for the manufacture of high-performance semiconductor devices. Attached Figure Description

[0027] Figure 1 The diagram shows a flow chart of the method for forming the NiSi layer according to the present invention.

[0028] Figures 2 to 4 The diagram shows the structural schematics of each step in the method for forming the NiSi layer of the present invention.

[0029] Component labeling explanation: 1 Si substrate, 2 Ti layer, 3 Ni layer, 4 NiSi layer, S1~S4 steps. Detailed Implementation

[0030] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0031] Please see Figures 1 to 4 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0032] This embodiment provides a method for forming a NiSi layer, such as Figure 1 As shown, the forming method includes:

[0033] S1 provides a Si substrate;

[0034] S2, a titanium (Ti) layer is formed on the Si substrate;

[0035] S3, a Ni layer is formed on the Ti layer;

[0036] S4, an automatic power-controlled microwave annealing process is used to allow the Ni in the Ni layer to pass through the Ti layer and react with the Si substrate to form a NiSi layer; wherein, the automatic power-controlled microwave annealing process is configured to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature.

[0037] The NiSi layer formation method in this embodiment involves sequentially forming a Ti layer and a Ni layer on a Si substrate. Annealing allows the Ni in the Ni layer to penetrate the Ti layer and react with the Si substrate to form the NiSi layer. The Ti layer, acting as a diffusion retardation layer, effectively suppresses the diffusion rate of Ni in Si, avoiding uniformity and short-circuit problems caused by lateral diffusion. By employing an automated power-controlled microwave annealing process, temperature uniformity during annealing is ensured, preventing localized overheating or underheating, thereby reducing the formation of the high-resistivity NiSi2 phase, improving interface quality, and lowering the NiSi layer sheet resistance (Rs). The thermal expansion coefficient of the Ti layer, between that of Ni and Si, acts as a mechanical buffer, effectively relaxing interface stress caused by thermal mismatch and improving the mechanical and electrical reliability of the device. In summary, this method significantly improves the uniformity, stability, and low resistance characteristics of the NiSi layer, and compared to existing technologies, reduces the thermal budget and optimizes the NiSi layer formation process, making it more suitable for the manufacture of high-performance semiconductor devices.

[0038] The method for forming the NiSi layer in this embodiment will be described in detail below with reference to the specific accompanying drawings.

[0039] like Figure 2 As shown, step S1 is performed first, providing a Si substrate 1.

[0040] Specifically, the size of the Si substrate 1 can be selected according to actual needs, and no excessive restrictions are imposed here. In this embodiment, it is preferably wafer-level.

[0041] As an example, the Si substrate 1 also contains device structures including, but not limited to, shallow trench isolation, wherein a SiO2 layer and / or SiN layer are formed in the device structures. x The specific membrane structure can be designed according to actual performance requirements, and no excessive restrictions are imposed here.

[0042] like Figure 2 As shown, step S2 is then performed to form a Ti layer 2 on the Si substrate 1.

[0043] As an example, the Ti layer 2 may be formed in step S2 using processes including but not limited to chemical vapor deposition (CVD) or physical vapor deposition (PVD), wherein the PVD process can exemplarily be an electron beam evaporation process.

[0044] As an example, the thickness of the formed Ti layer 2 is 10 angstroms to 50 angstroms, and illustratively, it is 10 angstroms in this embodiment.

[0045] like Figure 3 As shown, step S3 is then performed to form a Ni layer 3 on the Ti layer 2.

[0046] As an example, the thickness of the Ni layer 3 formed in step S3 is 100 angstroms to 250 angstroms; illustratively, it is 100 angstroms in this embodiment. The specific thickness of the Ni layer 3 can be adjusted according to electrical requirements, and no excessive limitation is made here.

[0047] like Figure 4 As shown, step S4 is then performed, in which an automatic power-controlled microwave annealing process is used to allow the Ni in the Ni layer 3 to pass through the Ti layer 2 and react with the Si substrate 1 to form the NiSi layer 4; wherein, the automatic power-controlled microwave annealing process is configured to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature.

[0048] As an example, after step S4, a wet etching process is also included to remove the Ti layer 2 and the unreacted Ni layer 3. It should be noted here that the unreacted Ni layer 3 refers to the Ni layer 3 that did not penetrate the Ti layer 2 and react with the Si substrate 1 to form the NiSi layer 4 in step S4.

[0049] Specifically, in step 4, during the annealing process using the automatic power-controlled microwave annealing process, the SiO2 layer and the SiN layer in the substrate 1... x Since the layer absorbs very little energy in the microwave field, in step S4, microwave heating can be selectively applied only to the formation region of the NiSi layer 4, thereby reducing thermal damage to the substrate 1 and reducing interface damage.

[0050] Specifically, the lattice structure and chemical properties of Ti result in a higher diffusion activation energy for Ni atoms in the Ti layer 2. This means that Ni atoms require higher energy to diffuse through the Ti layer 2 into the Si substrate 1. The Ti layer 2 effectively slows down the diffusion rate of Ni atoms, making the diffusion of Ni in the Si substrate 1 more controllable. Thus, the Ti layer 2 acts as a diffusion retardation layer, effectively suppressing the diffusion rate of Ni in the Si substrate 1 and avoiding uniformity and short-circuit problems caused by lateral diffusion. Simultaneously, Ti has low chemical reactivity with both Ni and Si, resulting in a chemically stable Ti layer 2 that is less prone to chemical reactions with Ni or Si. Furthermore, the thermal expansion coefficient of Ti is between that of Ni and Si, acting as a mechanical buffer and effectively relaxing interfacial stresses caused by thermal mismatch, thereby improving the mechanical and electrical reliability of the device.

[0051] As an example, a stable annealing temperature is used to bring the real-time temperature closer to the target annealing temperature, which is 200°C to 500°C. This is lower than the annealing temperature in the prior art (above 500°C). Combined with the automatic power control microwave annealing process, while ensuring the temperature uniformity of the annealing process and avoiding local overheating or underheating, the formation of the high-resistivity phase of NiSi2 is further reduced, the interface quality is improved, and the sheet resistance of the NiSi layer 4 is reduced, thereby improving device performance.

[0052] As a preferred example, the method in step S4 using an automatic power-controlled microwave annealing process to allow Ni in the Ni layer 3 to pass through the Ti layer 2 and react with the Si substrate 1 to form the NiSi layer 4 includes:

[0053] S41, Perform the first annealing step; the temperature of the first annealing step is 200℃~250℃, and the time is 60s~120s, so that Ni in the Ni layer 3 passes through the Ti layer 2 and diffuses into the Si substrate 1 to form Ni. x Si y Where x > 0, y > 0. For example, the temperature of the first annealing step can be 250°C and the time can be 80s. In some embodiments, after the first annealing step, the Ni layer 3 includes a first Ni layer that penetrates the Ti layer 2 and diffuses into the Si substrate 1 and a second Ni layer (not shown) that does not penetrate the Ti layer 2. After step S41, the step of removing the second Ni layer is further included.

[0054] S42, perform the second annealing step; the temperature of the second annealing step is 400℃~500℃, and the time is 10s~30s, so that the Ni... x Si y The phase transformation forms NiSi. For example, the temperature of the second annealing step can be 400°C or 500°C, and the time is 20 seconds.

[0055] As a preferred example, the annealing machine of the automatic power-controlled microwave annealing process has a multi-frequency microwave source that can be tuned to at least two bands, including a first band and a second band. The microwave frequency of the first band is lower than that of the second band. The first band is used for the first annealing step, and the second band is used for the second annealing step. In this embodiment, the microwave frequency of the first band is 2.45 GHz, and the microwave frequency of the second band is 5.8 GHz. That is, the microwave source used in the first annealing step has a microwave frequency of 2.45 GHz, and the microwave source used in the second annealing step has a microwave frequency of 5.8 GHz. The interaction mechanisms of microwaves in different bands with semiconductor materials are different. The lower frequency first band microwaves have a greater penetration depth, which is beneficial for overall heating of bulk silicon or thick film structures; while the higher frequency second band microwaves have higher energy absorption efficiency in materials, which can provide more precise spatial control capabilities.

[0056] As a preferred example, the automatic power control microwave annealing process utilizes a closed-loop feedback system to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature; the closed-loop feedback system includes a temperature monitoring device and a central controller connected to it via a signal; wherein...

[0057] The temperature monitoring device monitors the real-time temperature of the surface of the Si substrate 1 and sends the monitored real-time surface temperature to the central controller; the temperature monitoring device is, for example, a non-contact infrared thermal imager or other real-time temperature sensing device.

[0058] The central controller compares the received real-time temperature as a feedback signal with the target annealing temperature, and continuously adjusts the microwave power according to the comparison result through a control algorithm to make the real-time temperature converge to the target annealing temperature. The control algorithm is, for example, a proportional-integral-derivative (PID) algorithm.

[0059] As an example, based on the precise calculation and experimental verification of the energy requirements during the formation of the NiSi layer 4, and taking into account the thermal budget, the automatic adjustment range of the microwave power is preferably 3800W~4500W. By dynamically adjusting the microwave power within this range, precise control of the Ni diffusion and NiSi phase transition processes can be achieved, while avoiding process defects such as thermal damage caused by excessively high or low power.

[0060] The formation method described in this embodiment is applicable to advanced semiconductor process technology, including but not limited to the fabrication of NiSi layers in complementary metal-oxide-semiconductor (CMOS) devices, FinFET devices, gate-all-around field-effect transistors (GAAFET) devices, and power devices. The power devices are, for example, silicon carbide (SiC) or gallium nitride (GaN) power devices. If the thermal expansion coefficient and lattice constant of the NiSi layer 4 and the Si substrate 1 are mismatched, high stress will be generated at the interface. The scattering mechanisms include stress scattering and defect scattering. Specifically, the stress scattering mechanism involves the interface stress field itself directly scattering charge carriers, increasing resistance; the defect scattering mechanism involves high stress inducing interface dislocations, dangling bonds, and other defects. These defects act as charge centers, generating strong Coulomb scattering of charge carriers. This embodiment, through the Ti layer 2 and the automatic power-controlled microwave annealing process, significantly reduces interface stress, weakens stress scattering, and suppresses the generation of interface defects, thereby reducing these two key scattering mechanisms. At the same time, it brings additional gains to the FinFET device and the GAAFET device: the device channel itself has artificially introduced beneficial strain (such as tensile strain to improve electron mobility), and harmful NiSi interface stress will locally relax or destroy these beneficial strains. This embodiment protects and maintains the beneficial strain in the device channel by reducing harmful stress, so that the device mobility enhancement effect can be fully utilized.

[0061] In summary, the NiSi layer formation method of the present invention involves sequentially forming a Ti layer and a Ni layer on a Si substrate, followed by annealing to allow Ni in the Ni layer to penetrate the Ti layer and react with the Si substrate to form the NiSi layer. The Ti layer, acting as a diffusion retardation layer, effectively suppresses the diffusion rate of Ni in Si, avoiding uniformity and short-circuit problems caused by lateral diffusion. By employing an automated power-controlled microwave annealing (AP-MWA) process, temperature uniformity during annealing is ensured, avoiding localized overheating or underheating, thereby reducing the formation of the high-resistivity NiSi2 phase, improving interface quality, and lowering the NiSi layer sheet resistance (Rs). The thermal expansion coefficient of the Ti layer, falling between that of Ni and Si, acts as a mechanical buffer, effectively relaxing interface stress caused by thermal mismatch and improving the mechanical and electrical reliability of the device. In conclusion, this method significantly improves the uniformity, stability, and low resistance characteristics of the NiSi layer, and compared to existing technologies, reduces the thermal budget and optimizes the NiSi layer formation process, making it more suitable for the manufacture of high-performance semiconductor devices. Therefore, the present invention effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0062] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for forming a NiSi layer, characterized in that, The forming method includes: S1 provides the Si substrate; S2, a Ti layer is formed on the Si substrate; S3, a Ni layer is formed on the Ti layer; S4, an automatic power-controlled microwave annealing process is used to allow the Ni in the Ni layer to pass through the Ti layer and react with the Si substrate to form a NiSi layer; wherein, the automatic power-controlled microwave annealing process is configured to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature.

2. The method for forming a NiSi layer according to claim 1, characterized in that: In step S2, the Ti layer is formed using a chemical vapor deposition process or a physical vapor deposition process, and the thickness of the Ti layer is 10 angstroms to 50 angstroms. After step S4, the process further includes removing the Ti layer and the unreacted Ni layer using a wet etching process.

3. The method for forming a NiSi layer according to claim 1, characterized in that: The thickness of the Ni layer formed in step S3 is 100 angstroms to 250 angstroms.

4. The method for forming a NiSi layer according to claim 1, characterized in that: In step S4, the annealing temperature is stabilized so that the real-time temperature approaches the target annealing temperature, which is 200℃~500℃.

5. The method for forming a NiSi layer according to claim 1 or 4, characterized in that: The method in step S4 for using the automatic power-controlled microwave annealing process to allow Ni in the Ni layer to pass through the Ti layer and react with the Si substrate to form the NiSi layer includes: S41, Perform the first annealing step; the temperature of the first annealing step is 200℃~250℃, and the time is 60s~120s, so that Ni in the Ni layer can pass through the Ti layer and diffuse into the Si substrate to form Ni. x Si y Where x > 0, y > 0; S42, perform the second annealing step; the temperature of the second annealing step is 400℃~500℃, and the time is 10s~30s, so that the Ni... x Si y Phase transition forms NiSi.

6. The method for forming a NiSi layer according to claim 5, characterized in that: The annealing machine of the automatic power control microwave annealing process has a multi-frequency microwave source that can be tuned to at least two bands, the two bands including a first band and a second band, the microwave frequency of the first band being lower than the microwave frequency of the second band, the first band being used for the first annealing step, and the second band being used for the second annealing step.

7. The method for forming a NiSi layer according to claim 6, characterized in that: The microwave frequency of the first band is 2.45 GHz, and the microwave frequency of the second band is 5.8 GHz.

8. The method for forming a NiSi layer according to claim 5, characterized in that: After the first annealing step, the Ni layer includes a first Ni layer that penetrates the Ti layer and diffuses into the Si substrate and a second Ni layer that does not penetrate the Ti layer. After step S41, the step of removing the second Ni layer is further included.

9. The method for forming a NiSi layer according to claim 1, characterized in that: The automatic power control microwave annealing process utilizes a closed-loop feedback system to dynamically adjust the microwave power based on real-time temperature monitoring feedback to stabilize the annealing temperature; the closed-loop feedback system includes a temperature monitoring device and a central controller connected to it via a signal; wherein... The temperature monitoring device monitors the real-time temperature of the surface of the Si substrate and sends the monitored real-time temperature to the central controller. The central controller compares the received real-time temperature as a feedback signal with the target annealing temperature, and continuously adjusts the microwave power according to the comparison result through a control algorithm so that the real-time temperature converges to the target annealing temperature.

10. The method for forming a NiSi layer according to claim 1, characterized in that: The automatic adjustment range of the microwave power is 3800W~4500W.

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