Data transmission method, electronic equipment, chip system and storage medium

Abstract

The invention provides a data transmission method, electronic equipment, a chip system and a storage medium, and relates to the technical field of data transmission, the method is applied to communication adopting C-PHY, and data is transmitted between a sending end and a receiving end through three signal lines; due to the adoption of an octonary coding rule, a sending end maps 16-bit data into six octonary symbols, and six states are obtained according to the coding rule, the initial states of three signal lines and the six octonary symbols; according to the six states, voltage value changes of the three signal lines are controlled; the receiving end obtains six states according to the changed voltage values of the three signal lines; obtaining six octal symbols according to a decoding rule, the initial state and the six states; the six octal symbols are reflected into 16-bit data; through the octonary coding rule, 16-bit data can be transmitted by adopting 6 symbols, which is equivalent to that each symbol carries 2.66-bit data, so that the data transmission rate is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data transmission, and particularly relates to a data transmission method, an electronic device, a chip system and a storage medium. BACKGROUND

[0002] C-PHY is a high-speed serial interface that provides high-throughput performance on bandwidth-limited lanes, and is usually used to connect to peripherals such as displays, cameras, etc. C-PHY uses a three-phase symbol encoding technology, and does not need a traditional clock line, but transmits 2.28 bits of data per symbol through three signal lines. Due to its high data transmission rate, it can usually be applied in high-end displays and camera modules. However, the rate of transmitting data using C-PHY is still low at present. SUMMARY

[0003] The present application provides a data transmission method, an electronic device, a chip system and a storage medium, which can improve the data transmission rate.

[0004] To achieve the above object, the first aspect of the present application provides a data transmission method applied to a sending end for transmitting data by using C-PHY, wherein the sending end comprises a sending interface circuit, and three signal lines of the sending interface circuit are used to connect three signal lines of a receiving interface circuit of a receiving end, and the method comprises the following steps:

[0005] obtaining first data to be transmitted, wherein the first data is binary data, and the bit number of the first data is 16;

[0006] mapping the first data into second data according to a first mapping relationship, wherein the first mapping relationship is a mapping relationship between 16-bit binary data and six octal symbols, and the second data comprises six octal symbols;

[0007] obtaining an initial state corresponding to current voltage values of the three signal lines of the sending interface circuit;

[0008] obtaining six states according to an encoding rule, the initial state and the six octal symbols in the second data;

[0009] controlling the voltage values of the three signal lines of the sending interface circuit to change periodically according to the six states, and the voltage value changes of the three signal lines of the sending interface circuit are used to transmit data to the receiving end.

[0010] In the application, 16-bit binary data is mapped to 6 octal symbols according to an octal coding rule; 6 states can be obtained according to the coding rule, the initial state of the three signal lines of the transmitting interface circuit, and the 6 octal symbols, and the voltage values of the three signal lines of the transmitting interface circuit are controlled to periodically change through the 6 states; for the receiving interface circuit, 16-bit data can be obtained from the periodically changing voltage values of the three signal lines through the opposite process; in the above process, 16-bit data is transmitted through 6 octal symbols, which is equivalent to carrying 16 / 6 (2.66) bit data through 1 symbol, thereby improving the data transmission efficiency.

[0011] As an implementation form of the first aspect, the voltage values of the three signal lines of the transmitting interface circuit are different in the same period, and the states represented by the voltage values of the three signal lines of the transmitting interface circuit include six states.

[0012] The states represented by the voltage values of the three signal lines of the transmitting interface circuit are different in adjacent two periods, the state change of the adjacent two periods is recorded as a transition state, and the number of types of the transition state is 30.

[0013] The coding rule includes 8 octal symbols, and each octal symbol corresponds to one or more transition states; the 30 transition states each correspond to an octal symbol.

[0014] In the application, the voltage values of the three signal lines are different in the same period, and the states represented by the voltage values of the three signal lines include six states: high, middle, and low, high-low, middle-high, middle-low, low-high, low-middle, and high.

[0015] The states represented by the voltage values of the three signal lines of the transmitting interface circuit are different in adjacent two periods, and the possible state changes include 30. Taking any one state as an example, the state can change to another 5 states, which is equivalent to that there are 5 transition states for any state; in the case of 6 states, there are 30 transition states.

[0016] There are 8 symbols in the octal symbol, and any octal symbol can be set to correspond to one or more transition states, of course, each transition state corresponds to only one octal symbol; in this way, the octal coding rule can be obtained. In the case where any two parameters of the previous state, the next state, and the octal symbol are known, the other unknown parameter can be obtained. As an implementation form of the first aspect, the 6 states include: +x, -x, +y, -y, +z, and -z.

[0017] The eight symbols in the encoding rule include three bit positions, wherein the highest bit position is the first character, indicating that the state of the next period is the state after positive or negative inversion of the state of the previous period; the highest bit position is the second character, indicating that the state of the next period is not the state after positive or negative inversion of the state of the previous period.

[0018] In the encoding rule, the highest bit position is the first character, and the four eight symbols and the six transition states have a corresponding relationship; the highest bit position is the second character, and the four eight symbols and the 24 transition states have a corresponding relationship.

[0019] This example is a possible encoding rule.

[0020] As an implementation form of the first aspect, the six states are obtained according to the encoding rule, the initial state and the six eight symbols in the second data, and the six states include:

[0021] The first state corresponding to the initial state and the first eight symbol in the second data is searched from the encoding rule.

[0022] The i+1th state corresponding to the i th state and the i+1th eight symbol in the second data is searched from the encoding rule, i is an integer from 1 to 5.

[0023] In the present application, as described above, in the case that any two parameters of the previous state, the next state and the eight symbol are known, the other unknown parameter is obtained. In the sending end, the previous state is usually known, and the eight symbol is known, and the next state is obtained.

[0024] The second aspect of the present application provides a data transmission method applied to a receiving end for transmitting data by using C-PHY, the receiving end including a receiving interface circuit, three signal lines of the receiving interface circuit being used for connecting three signal lines of a sending interface circuit of a sending end, and the method including:

[0025] Six states are obtained through six voltage values of the three signal lines of the receiving interface circuit periodically changing;

[0026] An initial state corresponding to an initial voltage value of the three signal lines of the receiving interface circuit is obtained;

[0027] Six eight symbols are obtained according to a decoding rule, the initial state and the six states.

[0028] According to the first mapping relationship, the six octal symbols are mapped to 16-bit binary data, the first mapping relationship is a mapping relationship between 16-bit binary data and the six octal symbols, and the 16-bit binary data is the data received by the receiving end.

[0029] In the application, the receiving end is a process opposite to the sending end, the receiving end receives voltage values on three signal lines that periodically change, the six states can be determined according to the voltage values, the six octal symbols are obtained according to the decoding rule, the initial state and the determined six states, and finally the six octal symbols are mapped to 16-bit binary data; in the process, 16-bit data is transmitted through the six octal symbols, which is equivalent to carrying 16 / 6 (2.66) bit data through one symbol, and the data transmission efficiency is improved.

[0030] As an implementation manner of the second aspect, the voltage values of the three signal lines of the receiving interface circuit are not the same in the same period, and the states represented by the voltage values of the three signal lines of the receiving interface circuit include six states.

[0031] The states represented by the voltage values of the three signal lines of the receiving interface circuit are different in adjacent two periods, the state change of the adjacent two periods is recorded as a transition state, and the number of types of the transition state is 30.

[0032] The decoding rule includes eight octal symbols, and each octal symbol corresponds to one or more transition states; the 30 transition states each correspond to one octal symbol.

[0033] In the application, the voltage values of the three signal lines are not the same in the same period, so the states represented by the voltage values of the three signal lines include six states: high, middle and low, high-low-middle, middle-high-low, middle-low-high, low-high-middle and low-middle-high.

[0034] The states represented by the voltage values of the three signal lines of the sending interface circuit are different in adjacent two periods, so the possible state changes include 30 kinds. Taking any one state as an example, the state can change into another five states, which is equivalent to that there are five transition states for any state; in the case of six states, there are 30 transition states.

[0035] There are eight symbols in the octal symbol, and any one octal symbol can be set to correspond to one or more transition states, of course, each transition state corresponds to only one octal symbol; in this way, the encoding rule of the octal symbol can be obtained. In the case that any two parameters of the previous state, the next state and the octal symbol are known, the other unknown parameter can be obtained.

[0036] As an implementation form of the second aspect, the six states include: +x, -x, +y, -y, +z, and -z.

[0037] The octal symbol in the decoding rule includes three bit positions, wherein, when the highest bit position is a first character, it indicates that the state of the next period is the state of the previous period after positive and negative inversion; when the highest bit position is a second character, it indicates that the state of the next period is not the state of the previous period after positive and negative inversion.

[0038] In the decoding rule, the four octal symbols with the highest bit position being the first character have a corresponding relationship with the six conversion states; and the four octal symbols with the highest bit position being the second character have a corresponding relationship with the 24 conversion states.

[0039] This example is a possible decoding rule.

[0040] As an implementation form of the second aspect, the six octal symbols are obtained according to the decoding rule, the initial state, and the six states, and the method includes:

[0041] Finding the first octal symbol corresponding to the case of switching from the initial state to the first state in the six states from the decoding rule.

[0042] Finding the j+1th octal symbol corresponding to the case of switching from the jth state in the six states to the j+1th state in the six states from the decoding rule, j is an integer from 1 to 5.

[0043] In this application, the decoding rule and the encoding rule adopt the same rule, except that the two known parameters and the finally obtained parameter are different; as described above, in the case where any two parameters in the previous state, the next state, and the octal symbol are known, the other unknown parameter is obtained. In the receiving end, the previous state is usually known, the next state is known, and the octal symbol is obtained.

[0044] In a third aspect, an electronic device is provided, which adopts the audio service architecture of the first aspect, and further includes a processor configured to invoke a computer program stored in a memory to implement the method of any one of the first aspect and / or the method of any one of the second aspect.

[0045] In a fourth aspect, a chip system is provided, which adopts the audio service architecture of the first aspect, and includes a processor coupled with a memory, and the processor executes a computer program stored in the memory to enable the electronic device to implement the method of any one of the first aspect and / or the method of any one of the second aspect.

[0046] In a fifth aspect, a computer-readable storage medium is provided, and the computer-readable storage medium stores a computer program. When the computer program is executed on an electronic device, the electronic device is caused to implement the method of any one of the first aspect and / or the method of any one of the second aspect.

[0047] In a sixth aspect, a computer program product is provided. When the computer program product is executed on an electronic device, the electronic device is caused to implement the method of any one of the first aspect and / or the method of any one of the second aspect.

[0048] It can be understood that the beneficial effects of the third aspect to the sixth aspect described above can be referred to the related description in the first aspect and the second aspect, and will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0049] Figure 1 A hardware structure schematic diagram of an electronic device using C-PHY is provided for the embodiments of the present application;

[0050] Figure 2 A schematic diagram of a sending end interface circuit is provided for the embodiments of the present application;

[0051] Figure 3 A schematic diagram of a receiving end interface circuit is provided for the embodiments of the present application;

[0052] Figure 4 A schematic diagram of current flow in the +x state is provided for the embodiments of the present application;

[0053] Figure 5 A schematic diagram of the relationship between the conversion between various states and the corresponding quinary symbols is provided for the embodiments of the present application;

[0054] Figure 6 A process schematic diagram of transmitting data based on the quinary coding rule of C-PHY is provided for the embodiments of the present application;

[0055] Figure 7 A transmission process schematic diagram when the transmitted 16-bit data is 0x3fff is provided for the embodiments of the present application;

[0056] Figure 8 A schematic diagram of the relationship between the conversion between various states and the corresponding octal symbols corresponding to Table 4 is provided for the embodiments of the present application;

[0057] Figure 9 A process schematic diagram of transmitting data based on the octal coding rule of C-PHY is provided for the embodiments of the present application. DETAILED DESCRIPTION

[0058] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known methods, devices, and techniques are omitted so as not to obscure the description of the present application with unnecessary detail.

[0059] It should be understood that the term "comprising" as used in the specification and in the following claims indicates the presence of the described features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0060] It should also be understood that "one or more" of an element or aspect means that one, two, or more elements or aspects are present; "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated items, as well as the lack of an item; and that the singular forms "a", "an" and "the" include both singular and plural referents unless the context clearly dictates otherwise.

[0061] In addition, the terms "first", "second", "third", "fourth", etc. as used in the description and the appended claims are used for distinguishing between similar elements and do not necessarily have an ordinal meaning.

[0062] The terms "one embodiment", "some embodiments", "an embodiment", "one certain embodiment", "certain embodiments", "some certain embodiments", etc. as used in the specification are meant to be interpreted in their most restrictive sense to mean that the specific feature, structure, or characteristic described is included in at least one embodiment of the application. As such, appearances of the phrases "in one embodiment", "in some embodiments", "in an embodiment", "in one certain embodiment", "in certain embodiments", "in some certain embodiments", etc. in various places in the specification are not necessarily all referring to the same embodiment, unless otherwise indicated. The use of the term "comprising" (or "including") in the specification is intended to mean that the listed feature, element, step, operation, limitation, or component is present, but not excluding the presence of one or more other features, elements, steps, operations, limitations, components, or groups thereof. The use of the term "comprising" (or "including") also means "consisting essentially of" or "consisting of".

[0063] The data transmission method provided by the embodiments of the present application can be applied in an electronic device or some peripheral device, of course, the peripheral device also belongs to a kind of electronic device. The electronic device in the embodiments of the present application can be tablet computer, mobile phone, wearable device, notebook computer, ultra-mobile personal computer (UMPC), netbook, personal digital assistant (PDA) and the like. Of course, it can also be host, camera, screen and the like. The specific type of electronic device is not limited in the embodiments of the present application.

[0064] Figure 1 A structural schematic diagram of an electronic device is shown. The electronic device 100 can include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headset jack 170D, a sensor module 180, a key 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 can include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0065] It can be understood that the structure shown in the embodiments of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 can include more or fewer components than shown, or combine certain components, or split certain components, or different component arrangements. The components shown can be implemented in hardware, software, or a combination of software and hardware.

[0066] The processor 110 can include one or more processing units, for example: the processor 110 can include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units can be independent devices, or can be integrated in one or more processors.

[0067] The processor 110 can also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory can hold instructions or data that the processor 110 has recently used or has used frequently. If the processor 110 needs to use the instructions or data again, it can be retrieved directly from the memory. This avoids repeated accesses and reduces the latency of the processor 110, thus improving the efficiency of the system.

[0068] The internal memory 121 can be used to store computer executable program codes, which include instructions. The processor 110 performs various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 can include a program storage area and a data storage area. The program storage area can store an operating system and at least one application program (such as an image playing function, etc.) required by a function. The touch sensor 180K, also referred to as a "touch panel". The touch sensor 180K can be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, also referred to as a "touch panel". The touch sensor 180K is used to detect a touch operation acting on or near it. The touch sensor can transmit the detected touch operation to the application processor to determine the touch event type. Visual output related to the touch operation can be provided through the display screen 194. In other embodiments, the touch sensor 180K can also be disposed on the surface of the electronic device 100, which is different from the position where the display screen 194 is located.

[0069] The electronic device 100 can realize audio functions through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the earphone interface 170D, and the application processor, etc. For example, music playing, recording, etc.

[0070] The audio module 170 is used to convert digital audio signals into analog audio signals for output, and is also used to convert analog audio inputs into digital audio signals. The audio module 170 can also be used to encode and decode audio signals. In some embodiments, the audio module 170 can be disposed in the processor 110, or part of the functions of the audio module 170 can be disposed in the processor 110.

[0071] The speaker 170A, also referred to as a "loudspeaker", is used to convert audio electrical signals into sound signals. The electronic device 100 can listen to music or listen to a hands-free call through the speaker 170A.

[0072] The receiver 170B, also referred to as a "earpiece", is used to convert audio electrical signals into sound signals. When the electronic device 100 answers a call or a voice message, the receiver 170B can be held close to the ear to listen to the voice.

[0073] Microphone 170C, also known as "microphone", "microphone", is used to convert sound signals into electrical signals. When making a call or sending voice information, the user can speak by approaching the microphone 170C with the mouth, and input the sound signal into the microphone 170C. The electronic device 100 can be provided with at least one microphone 170C. In other embodiments, the electronic device 100 can be provided with two microphones 170C, in addition to listening to voice information, it can also realize the function of noise reduction. In other embodiments, the electronic device 100 can also be provided with three, four or more microphones 170C, to realize the functions of collecting sound signals, noise reduction, and identifying sound sources, and realizing directional recording functions, etc. For example, the microphone 170C can be used to collect the voice information related in the embodiments of the present application.

[0074] The earphone interface 170D is used to connect the wired earphone. The earphone interface 170D can be a USB interface 130, or a 3.5mm open mobile terminal platform (OMTP) standard interface, a cellular telecommunications industry association of the USA (CTIA) standard interface.

[0075] The electronic device 100 realizes the display function through the GPU, the display screen 194, and the application processor, etc. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 can include one or more GPUs that execute program instructions to generate or change display information.

[0076] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can adopt liquid crystal display (LCD), organic light-emitting diode (OLED), active-matrix organic light emitting diode (AMOLED), flex light-emitting diode (FLED), Miniled, MicroLed, Micro-OLED, quantum dot light emitting diodes (QLED), etc. In some embodiments, the electronic device 100 can include 1 or N display screens 194, N is a positive integer greater than 1.

[0077] The camera 193 is configured to capture still images or videos. An object projects an optical image through a lens to a photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transmitted to an ISP to be converted into a digital image signal. The ISP outputs the digital image signal to a DSP for processing. The DSP converts the digital image signal into an image signal in a standard format, such as RGB, YUV, or the like. In some embodiments, the electronic device 100 can include one or N cameras 193, where N is a positive integer greater than 1. The camera 193 can be a camera module in subsequent embodiments.

[0078] The embodiments of the present application do not particularly limit the specific structure of the execution subject of the data transmission method, as long as the execution subject of the data transmission method can communicate according to the data transmission method provided by the embodiments of the present application by running the code of the data transmission method. For example, the execution subject of the data transmission method provided by the embodiments of the present application can be a functional module capable of calling and executing programs in an electronic device, or a communication device applied to an electronic device, such as a chip.

[0079] C-PHY is a high-speed serial interface that provides high-throughput performance on bandwidth-limited lanes, and is usually used to connect to peripherals, such as displays, cameras, etc. C-PHY uses a three-phase symbol encoding technique, which does not require a traditional clock line, but transmits 2.28 bits of data per symbol through three signal lines. Due to its high data transmission rate, it can be commonly applied in high-end displays and camera modules.

[0080] C-PHY involves a transceiver interface circuit, wherein the transmitting end interface circuit can refer to Figure 2 , and the receiving end interface circuit can refer to Figure 3 ; of course, Figure 2 is only an example of the transmitting end interface circuit, Figure 3 is also only an example of the transmitting end interface circuit.

[0081] In which the levels on the three signal lines A, B and C are different at the same time. For example, the levels on the three signal lines are high, medium and low at the same time. According to this arrangement, there can be six states. Respectively: high medium low, high low medium, medium high low, medium low high, low high medium, low medium high.

[0082] Referring to Figure 4The current flow direction in one of the states is shown. Of course, in actual applications, the six states are named as +x, +y, +z, -x, -y and -z respectively. The levels on the A, B and C signal lines in each state can be referred to Table 1.

[0083] Table 1 Comparator output of the receiving circuit in the six states

[0084]

[0085]

[0086] Referring to Figure 4 Taking +x as an example, the levels on the A, B and C signal lines are in the combination of high and low. PU_A can be set to 1 and PD_A to 0, the MOS tube on the upper side of the transmitting end on the A line is turned on and the MOS tube on the lower side is not turned on; PU_B can be set to 0 and PD_B to 1, the MOS tube on the lower side of the transmitting end on the B line is turned on and the MOS tube on the upper side is not turned on; PU_TC can be set to 1 and PD_TC to 1, the MOS tubes on the upper side and the lower side of the transmitting end on the C line are both turned on. According to the principle of resistance voltage division, the level on the A line is 0.75V, the level on the B line is 0.25V and the level on the C line is 0.5V.

[0087] Taking +x as an example, the differential structure is used inside the receiving end, and the three lines are differentially connected two by two to obtain the following differential levels: A-B is +0.5V, B-C is -0.25V and C-A is -0.25V.

[0088] Referring to Table 1, in combination with the six states, four differential levels can be obtained, which are +0.5V, -0.5V, +0.25V and -0.25V. +0.5V and +0.25V can be defined as digital signal "1" and -0.5V and -0.25V can be defined as digital signal "0". Correspondingly, the digital signal output by the receiving end in the +x state is 100.

[0089] In this way, the comparator output of the receiving end interface circuit in the six states shown in Table 1 can be obtained. The current flow direction in other states is not illustrated one by one.

[0090] The C-PHY transmission information is not realized directly through the 6 states, but through the transition between the 6 states. For each state, there are 5 possible transition states; for example, taking the current state +x as an example, the next state can be: -x, +y, -y, +z and -z. For the 5 transition states, at least 3-bit binary representation is required.

[0091] Table 2 One encoding rule of the transition state

[0092]

[0093] Referring to Table 2, an encoding rule of a conversion state provided by an embodiment of the present application is provided.

[0094] In theory, five 3-bit data can be used to represent five possible conversion states. For example, 000, 001, 010, 011 and 1XX, wherein X can be any one of 0 and 1.

[0095] In actual application, the following rule can be made so that the 3-bit data representing the symbol (hereinafter referred to as symbol) of the conversion state is more regular. The highest bit Flip in the 3-bit data represents flip, the middle bit Rotate represents rotation, and the lowest bit Polarity represents reverse polarity.

[0096] Flip represents flip, wherein 1 represents that the next state is the flip of the previous state. For example, +x changes to -x, +y changes to -y, +z changes to -z, -x changes to +x, -y changes to +y, and -z changes to +z; 0 represents that the next state is not the flip of the previous state.

[0097] Rotate represents rotation, wherein 1 represents that the next state is clockwise rotation relative to the previous state, for example, +x changes to +y or -y, -x changes to +y or -y, +y changes to +z or -z, -y changes to +z or -z, +z changes to +x or -x, and -z changes to +x or -x; 0 represents that the next state is counterclockwise rotation relative to the previous state, for example, +x changes to +z or -z, -x changes to +z or -z, +z changes to +y or -y, -z changes to +y or -y, +y changes to +x or -x, and -y changes to +x or -x.

[0098] Polarity represents reverse polarity, wherein 1 represents that the polarity of the next state and the previous state is opposite, but not flip, for example, from +x to -y or -z, from -x to +y or +z; from +y to -x or -z, from -y to +x or +z; from +z to -x or -y, and from -z to +x or +y; 0 represents that the polarity of the next state and the previous state is the same, but not flip, for example, from +x to +y or +z, from -x to -y or -z; from +y to +x or +z, from -y to -x or -z, from +z to +x or +y, and from -z to -x or -y.

[0099] Based on the encoding rule, the conversion schematic diagram between each state shown in Table 2 can be obtained. Figure 5 In order to facilitate the uniformity of the encoding process, 1XX can be 100, which is used to represent flip.

[0100] AsFigure 5 As shown, as an example, if the state represented by the levels on the 3 signal lines in the current transmitting interface circuit is +x, and the symbol information to be transmitted is 010, referring to Table 1 or Table 2, it can be determined that the next state of the levels on the 3 signal lines in the transmitting interface circuit should be +y; therefore, the levels on the 3 signal lines in the transmitting interface circuit can be controlled to be 0.5V, 75V and 0.25V respectively. For the last period of the two consecutive periods in the receiving interface circuit, the comparator output is 100, corresponding to the +x state; for the next period, the comparator output is 010, corresponding to the +y state; referring to Table 1 or Table 2, it can be determined that the received symbol information is the symbol corresponding from +x to +y, i.e. 010. Figure 5 Figure 5

[0101] According to the above encoding rule, the information transmission can be realized.

[0102] Based on the above description, it can be understood that there are actually only 5 state changes in the encoding rule, and actually only 5 quinary symbols are needed, and each quinary symbol is encoded by 3 bits, that is, the data bits are converted from binary to quinary.

[0103] In order to more clearly describe the above encoding process and the corresponding decoding process, reference is made to Figure 6 The C-PHY based data transmission schematic diagram is shown.

[0104] In the high-speed (HS) mode of C-PHY, the minimum unit of data transmission is 16 bits, that is, the data to be transmitted needs to be an integer multiple of 16 bits, and 16 bits of data (2 raised to the power of 16 is 65536) needs to be transmitted by at least 7 quinary symbols (5 raised to the power of 6 is 15625, and 5 raised to the power of 7 is 78125). The symbol is also called symbol.

[0105] In actual application, it is also necessary to set the mapping relationship between 16 bits of data and 7 quinary symbols. That is, at the transmitting end, given a 16-bit data, the corresponding 7 quinary symbols can be queried by the mapping relationship. Correspondingly, at the receiving end, after the received information is converted into 7 quinary symbols, the corresponding 16-bit data can be queried by the mapping relationship (or inverse mapping relationship).

[0106] ​​As shown in the figure, if the sending end sends 16-bit data, the 16-bit data is first mapped to 7 symbols, each symbol being 3-bit data, and a total of 21-bit data. The sending end looks up the first state corresponding to the current state (which can be understood as the 0th state) and the 1st symbol to be transmitted from the encoding rule, and then controls the A, B and C signal lines to change according to the 1st state and change to the signal line level value corresponding to the 1st state; in the next period, the 2nd state corresponding to the 1st state and the 2nd symbol to be transmitted is continuously looked up from the encoding rule (this process can be understood as encoding), and the A, B and C signal lines are controlled to change according to the 2nd state through the sending interface circuit and change to the signal line level value corresponding to the 2nd state; in this way, the A, B and C signal lines change 7 times.

[0107] The receiving end determines the 0th state according to the comparator output at the 0th state, and determines 7 states according to the comparator output of the receiving interface circuit at each subsequent period; the state change process of each adjacent two periods is looked up from the encoding rule, and 7 symbols (this process can be understood as decoding) can be obtained, each symbol being 3-bit data; finally, according to the mapping relationship described above, the 7 quinary symbols can be converted into 16-bit data (this process can be understood as an inverse mapping process). In this way, 16-bit data can be transmitted through 7 quinary symbols.

[0108] As an example of a transmission process, refer to Figure 7 When the 16-bit data to be transmitted is 0x3fff, the corresponding binary data is 0011 1111 1111 1111. According to the mapping relationship between the set 16-bit data and the 7 quinary symbols, the 7 symbols can be obtained as follows: 011, 011, 011, 011, 011, 011, 011.

[0109] After obtaining the 7 symbols, the next state corresponding to each symbol and the previous state needs to be looked up from the encoding rule.

[0110] The first symbol is 011, so the next period state needs to be determined according to the encoding rule shown in Table 2 and the current state represented by the level on the ABC line:

[0111] If the current period ABC line level represents the current state as the +x state, the next period state needs to be changed to -y;

[0112] If the current period ABC line level represents the current state as the -x state, the next period state needs to be changed to +y;

[0113] If the current ABC line level indicates that the current state is +y state, the next state needs to be changed to -z;

[0114] If the current ABC line level indicates that the current state is -y state, the next state needs to be changed to +z;

[0115] If the current ABC line level indicates that the current state is +z state, the next state needs to be changed to -x;

[0116] If the current ABC line level indicates that the current state is -z state, the next state needs to be changed to +x;

[0117] According to the process, it can be understood that in the case of determining the current state, the next state corresponding to each symbol can be found according to the encoding rule shown in Table 2, so as to control the level on the ABC line to change to the next state in the next period.

[0118] Taking the current state as +x state as an example, the subsequent 7 states -y, +z, -x, +y, -z, +x and -y are determined according to 7 symbols (011, 011, 011, 011, 011, 011 and 011).

[0119] Referring to Figure 7 In the 0th period, the current state of the sending end interface circuit is +x state, and the levels on the A line, the B line and the C line are 0.75V, 0.25V and 0.5V respectively; the current output of the comparator of the receiving end interface circuit is 100, and it is determined to be +x state.

[0120] In the 1st period, the sending end interface circuit controls PU_A, PD_A, PU_B, PD_B, PU_TC and PD_TC to switch to -y state, that is, the level on the A line is 0.5V, the level on the B line is 0.25V, and the level on the C line is 0.75V. The output of the comparator of the receiving end interface circuit is 101, and it is determined to be -y state.

[0121] According to the state in the 1st period and the state in the 0th period, it is determined that the 1st quinary symbol is 3, and the corresponding 3bit data is 011.

[0122] In the 2nd period, the sending end interface circuit controls PU_A, PD_A, PU_B, PD_B, PU_TC and PD_TC to switch to +z state, that is, the level on the A line is 0.25V, the level on the B line is 0.5V, and the level on the C line is 0.75V. The output of the comparator of the receiving end interface circuit is 001, and it is determined to be +z state.

[0123] According to the state of the second period and the state of the first period, the second quinary symbol is determined to be 3, and the corresponding 3bit data is 011.

[0124] …

[0125] The specific values of the levels of each period and the comparator output can be referred to Table 3, and will not be described in detail.

[0126] Table 3 is Figure 7 the levels of each period and the comparator output

[0127]

[0128]

[0129] In this way, after 7 periods, 7 quinary symbols: 011, 011, 011, 011, 011, 011, 011 will be obtained. According to the mapping relationship between the above 16bit data and the 7 quinary symbols, the 7 quinary symbols are converted into 16bit data: 0011 1111 1111 1111, that is, 0x3fff.

[0130] It can be understood through the example that 7 quinary symbols are transmitted through three signal lines, that is, the transmission of 16bit data is realized, and each quinary symbol transmits 2.28bit (16 / 7) data.

[0131] The embodiment of the application can also further improve the data carrying capacity for the above C-PHY. For example, the quinary in the encoding rule can be changed to octal.

[0132] As shown in Table 2 and Figure 5 When +x is switched to -x, -x is switched to +x, +y is switched to -y, -y is switched to +y, +z is switched to -z, and -z is switched to +z, the symbol is 100. The embodiment of the application can be set to encode the middle bit and the lowest bit again in the case where the highest bit is 1.

[0133] Flip represents flip, where 1 represents that the next state is the flip of the previous state. For example, +x changes to -x, +y changes to -y, +z changes to -z, -x changes to +x, -y changes to +y, and -z changes to +z; 0 represents that the next state is not the flip of the previous state.

[0134] In the case where Flip is 0, the meanings and rules of Rotate and Polarity remain unchanged:

[0135] Rotate represents rotation, where 1 represents a clockwise rotation of the next state relative to the previous state, for example, +x changes to +y or -y, -x changes to +y or -y, +y changes to +z or -z, -y changes to +z or -z, +z changes to +x or -x, -z changes to +x or -x; 0 represents a counterclockwise rotation of the next state relative to the previous state, for example, +x changes to +z or -z, -x changes to +z or -z, +z changes to +y or -y, -z changes to +y or -y, +y changes to +x or -x, -y changes to +x or -x.

[0136] Polarity represents polarity, where 1 represents that the polarity of the next state and the previous state is opposite, but not flipped, for example, from +x changes to -y or -z, from -x changes to +y or +z; from +y changes to -x or -z, from -y changes to +x or +z; from +z changes to -x or -y, from -z changes to +x or +y; 0 represents that the polarity of the next state and the previous state is the same, but not flipped, for example, from +x changes to +y or +z, from -x changes to -y or -z; from +y changes to +x or +z, from -y changes to -x or -z, from +z changes to +x or +y, from -z changes to -x or -y.

[0137] In the case of Flip being 1, the meanings of Rotate and Polarity are redefined as follows:

[0138] Rotate (in practical applications, it can also be redefined as other names) is 0, which is used to represent the flip of x and y, and is 1, which represents the flip of z.

[0139] Polarity (in practical applications, it can also be redefined as other names) is 1, which represents flip +, and is 0, which represents flip -.

[0140] According to the rule, the extended 8-bit coding rule shown in Table 4 can be obtained.

[0141] Table 4: 8-bit coding rule

[0142]

[0143]

[0144] Table 4 is only an example of an 8-bit coding rule. The coding rule can be referred to as shown in Table 5, which is another coding rule provided in the embodiments of the present application. Figure 8 Table 5: 8-bit coding rule

[0145]

[0146] ​

[0147] It can be understood that, on the basis of the above-mentioned five coding rules, when the coding rule is extended to octal, the six changes (+x changes to -x, +y changes to -y, +z changes to -z, -x changes to +x, -y changes to +y, and -z changes to +z) can be corresponded to the four symbols with the highest bit being 1. For example, three of them can be corresponded to one symbol, and the other three changes can be corresponded to the other three symbols respectively; or four of them can be corresponded to two symbols averagely, and the other two changes can be corresponded to the other two symbols respectively; other possible coding rules will not be listed one by one.

[0148] Of course, in actual application, actually 30 state changes (in the case of a total of 6 states, each state can change to another 5 states) are included, and the 30 state changes can also be redistributed according to other rules in 8 symbols. The specific state changes corresponding to each symbol can be allocated according to actual conditions. The embodiments of the present application will not be listed one by one.

[0149] It can be understood that the focus of the embodiments of the present application is not the specific octal coding rule, but the further extension of the five coding rule to the octal coding rule. The octal coding rule in which the eight symbols correspond to which state change does not affect the implementation of the coding rule.

[0150] In addition, since the five coding rule is changed to the octal coding rule, in the case that the minimum unit of data transmission is still 16-bit data, 16-bit data (2 raised to the power of 16 is 65536) needs at least 6 octal symbols (8 raised to the power of 5 is 32768, and 8 raised to the power of 6 is 262144) for transmission. Through three wires, 2.66 bits (16 / 6) of data are transmitted for each octal symbol. Compared with the five coding rule, the data carrying capacity of each symbol is higher, and the data carrying capacity is increased by (2.66-2.28) / 2.28=16.7%. The octal coding rule, compared with the traditional binary data, the data amount is 3 times (log2 8=3), compared with the five coding rule (the data amount is 2.32 times (log2 5=2.32)), the data amount is increased by (3-2.32) / 2.32=29.2%.

[0151] Of course, in specific implementation, the mapping relationship between 16-bit data and 7 five symbols before needs to be updated to the mapping relationship between 16-bit data and 6 octal symbols.

[0152] The data transmission process using the octal coding rule can refer to the data transmission process shown in Figure 9 and Figure 6The difference between the data transmission processes corresponding to the encoding rules of the quinary shown in FIG. 1 and the encoding rules of the octal shown in FIG. 2 is that:

[0153] Figure 6 The quinary encoding rules in FIG. 1 are updated to the octal encoding rules in FIG. 2; correspondingly, Figure 6 The mapping relationship between the 16-bit data and the seven quinary symbols shown in FIG. 1 is updated to the mapping relationship between the 16-bit data and the six octal symbols; correspondingly, Figure 6 The seven quinary symbols transmitted are updated to the six octal symbols.

[0154] The process of transmitting data by the octal encoding rules is described in detail below.

[0155] Embodiments of the present application provide a data transmission method, applied to a sending end for transmitting data by C-PHY, the sending end comprising a sending interface circuit, three signal lines of the sending interface circuit being used for connecting three signal lines of a receiving interface circuit of a receiving end, and the method comprising:

[0156] obtaining first data to be transmitted, the first data being binary data, and the bit number of the first data being 16;

[0157] mapping the first data into second data according to a first mapping relationship, the first mapping relationship being a mapping relationship between 16-bit binary data and six octal symbols, and the second data comprising the six octal symbols;

[0158] obtaining an initial state corresponding to current voltage values of the three signal lines of the sending interface circuit;

[0159] obtaining six states according to an encoding rule, the initial state and the six octal symbols in the second data;

[0160] controlling the voltage values of the three signal lines of the sending interface circuit to change periodically according to the six states, and the voltage value changes of the three signal lines of the sending interface circuit being used for transmitting data to the receiving end.

[0161] In embodiments of the present application, the voltage values of the three signal lines of the sending interface circuit are different in the same period, and the states represented by the voltage values of the three signal lines of the sending interface circuit comprise six kinds.

[0162] The states represented by the voltage values of the three signal lines of the sending interface circuit are different in adjacent two periods, the state changes of adjacent two periods are recorded as transition states, and the number of kinds of the transition states is 30.

[0163] The encoding rule includes 8 octal symbols, each of which corresponds to one or more conversion states; and 30 conversion states each correspond to one octal symbol.

[0164] The 6 states include: +x, -x, +y, -y, +z, and -z.

[0165] The octal symbol in the encoding rule includes 3 bit positions, wherein, when the highest bit position is a first character (for example, 1), it indicates that the state of the next period is the state after the positive and negative of the state of the previous period are flipped; and when the highest bit position is a second character (for example, 0), it indicates that the state of the next period is not the state after the positive and negative of the state of the previous period are flipped.

[0166] In the encoding rule, the 4 octal symbols with the highest bit position being the first character have a corresponding relationship with the 6 conversion states; and the 4 octal symbols with the highest bit position being the second character have a corresponding relationship with the 24 conversion states.

[0167] The encoding rule can refer to Table 4 or Table 5.

[0168] As another embodiment of the present application, the 6 states obtained according to the encoding rule, the initial state, and the 6 octal symbols in the second data include:

[0169] The first state corresponding to the first octal symbol in the initial state and the second data is found from the encoding rule.

[0170] The i+1th state corresponding to the i th state and the i+1th octal symbol in the second data is found from the encoding rule, i being an integer from 1 to 5.

[0171] The present application also provides a data transmission method applied to a receiving end for transmitting data by using C-PHY, wherein the receiving end includes a receiving interface circuit, and three signal lines of the receiving interface circuit are used to connect three signal lines of a sending interface circuit of a sending end, and the method includes:

[0172] The 6 states are obtained through 6 voltage values of the three signal lines of the receiving interface circuit periodically changing;

[0173] An initial state corresponding to an initial voltage value of the three signal lines of the receiving interface circuit is obtained.

[0174] 6 octal symbols are obtained according to a decoding rule, the initial state, and the 6 states.

[0175] According to the first mapping relationship, the six octal symbols are mapped to 16-bit binary data, the first mapping relationship is a mapping relationship between 16-bit binary data and the six octal symbols, and the 16-bit binary data is data received by the receiving end.

[0176] In the embodiment of the application, the voltage values of the three signal lines of the receiving interface circuit are not the same in the same period, and the states represented by the voltage values of the three signal lines of the receiving interface circuit include six states.

[0177] The states represented by the voltage values of the three signal lines of the receiving interface circuit are not the same in adjacent two periods, the state change of adjacent two periods is recorded as a transition state, and the number of types of the transition state is 30.

[0178] The decoding rule includes eight octal symbols, and each octal symbol corresponds to one or more transition states; and the 30 transition states each correspond to one octal symbol.

[0179] The six states include +x, -x, +y, -y, +z and -z.

[0180] The octal symbol in the decoding rule includes three bit positions, wherein when the highest bit position is a first character (for example, 1), it indicates that the state of the next period is the state after the positive and negative of the state of the previous period are flipped; and when the highest bit position is a second character (for example, 0), it indicates that the state of the next period is not the state after the positive and negative of the state of the previous period are flipped.

[0181] In the decoding rule, the four octal symbols with the first character in the highest bit position have a corresponding relationship with the six transition states; and the four octal symbols with the second character in the highest bit position have a corresponding relationship with the 24 transition states.

[0182] The encoding rule can refer to Table 4 or Table 5.

[0183] As another embodiment of the application, the six octal symbols are obtained according to the decoding rule, the initial state and the six states, and the obtaining includes:

[0184] Finding a first octal symbol corresponding to a case that the initial state is switched to a first state in the six states from the decoding rule;

[0185] Finding a (j+1)th octal symbol corresponding to a case that a jth state in the six states is switched to a (j+1)th state in the six states from the decoding rule, and j is an integer from 1 to 5.

[0186] It should be understood that the size of the serial number of each step in the above embodiments does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0187] The embodiments of the present application further provide a computer readable storage medium, which stores a computer program. The computer program can implement the steps in each method embodiment of the present application when running on an electronic device.

[0188] The embodiments of the present application further provide a computer program product. When the computer program product runs on an electronic device or a wireless router, the electronic device can implement the steps in each method embodiment.

[0189] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the present application can implement all or part of the processes in the above-mentioned embodiments by a computer program to instruct related hardware to complete. The computer program can be stored in a computer readable storage medium, and the computer program can implement the steps of each method embodiment when executed by a processor. The computer program includes computer program code, which can be in the form of source code, object code, executable file or some intermediate form. The computer readable medium at least includes any entity or device capable of carrying the computer program code to the first device, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium. For example, U disk, mobile hard disk, magnetic disk or optical disk, etc. In some jurisdictions, according to legislation and patent practice, the computer readable medium cannot be an electrical carrier signal and a telecommunication signal.

[0190] The embodiments of the present application further provide a chip. The chip includes a processor and a memory. The processor is coupled with the memory. The processor invokes a computer program stored in the memory to implement the steps of any method embodiment of the present application. The chip can be a single chip or a chip module composed of multiple chips.

[0191] In the above embodiments, the description of each embodiment has its own focus. The parts not described or recorded in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0192] Those skilled in the art can understand that the units and method steps of each example described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in the form of hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0193] The above embodiments are only used to illustrate the technical solutions of the present application, but not limit the technical solutions of the present application; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some technical features can be replaced by equivalent replacements; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A data transmission method, characterized in that, An application is made in a transmitting end that transmits data using a C-PHY, the transmitting end including a transmitting interface circuit, wherein three signal lines of the transmitting interface circuit are used to connect to three signal lines of a receiving interface circuit of a receiving end, the method comprising: Obtain the first data to be transmitted, which is binary data and has 16 bits. According to the first mapping relationship, the first data is mapped to the second data. The first mapping relationship is the mapping relationship between 16-bit binary data and 6 octal symbols. The second data includes 6 octal symbols. Obtain the initial state corresponding to the current voltage values ​​of the three signal lines of the transmitting interface circuit; Based on the encoding rules, the initial state, and the six octal symbols in the second data, six states are obtained; Based on the six states, the voltage values ​​of the three signal lines of the transmitting interface circuit are controlled to change periodically, and the voltage changes of the three signal lines of the transmitting interface circuit are used to transmit data to the receiving end.

2. The data transmission method as described in claim 1, characterized in that, The voltage values ​​of the three signal lines of the transmitting interface circuit are different within the same cycle, and the voltage values ​​of the three signal lines of the transmitting interface circuit represent six states. The voltage values ​​of the three signal lines of the transmitting interface circuit represent states that are different in two adjacent cycles. The state change between two adjacent cycles is called a transition state, and there are 30 types of transition states. The encoding rules include 8 octal symbols, each octal symbol corresponding to one or more transition states; each of the 30 transition states corresponds to one octal symbol.

3. The data transmission method as described in claim 2, characterized in that, The voltage values ​​of the three signal lines of the transmitting interface circuit represent six states, including: +x, -x, +y, -y, +z, and -z. The octal symbol in the encoding rule includes 3 bits. When the highest bit is the first character, it indicates that the state of the next cycle is the state of the previous cycle after a positive-negative reversal. When the highest bit is the second character, it indicates that the state of the next cycle is not the state of the previous cycle after a positive-negative reversal. In the encoding rules, there is a correspondence between the four octal symbols of the first character and the six transition states, and a correspondence between the four octal symbols of the second character and the 24 transition states, with the highest bit being the first character.

4. The data transmission method according to any one of claims 1 to 3, characterized in that, Based on the encoding rules, the initial state, and the six octal symbols in the second data, six states are obtained, including: Find the first state corresponding to the initial state and the first octal symbol in the second data from the encoding rules; Find the (i+1)th state from the encoding rules that corresponds to the i-th state and the (i+1)-th octal symbol in the second data, where i is an integer from 1 to 5.

5. A data transmission method, characterized in that, An application to a receiver that transmits data using a C-PHY, the receiver including a receiver interface circuit, wherein three signal lines of the receiver interface circuit are used to connect to three signal lines of a transmitter interface circuit of a transmitter, the method comprising: The six states are obtained by periodically changing six voltage values ​​on the three signal lines of the receiving interface circuit. Obtain the initial state corresponding to the initial voltage values ​​of the three signal lines of the receiving interface circuit; Based on the decoding rules, the initial state, and the six states, six octal symbols are obtained; According to the first mapping relationship, the six octal symbols are mapped to 16 bits of binary data. The first mapping relationship is the mapping relationship between 16 bits of binary data and six octal symbols. The 16 bits of binary data is the data received by the receiving end.

6. The data transmission method as described in claim 5, characterized in that, The voltage values ​​of the three signal lines of the receiving interface circuit are different within the same cycle, and the states represented by the voltage values ​​of the three signal lines of the receiving interface circuit include six types. The voltage values ​​of the three signal lines of the receiving interface circuit represent states that are different in two adjacent cycles. The state change between two adjacent cycles is called a transition state, and there are 30 types of transition states. The decoding rules include 8 octal symbols, each octal symbol corresponding to one or more transition states; each of the 30 transition states corresponds to one octal symbol.

7. The data transmission method as described in claim 6, characterized in that, The voltage values ​​of the three signal lines of the receiving interface circuit represent six states, including: +x, -x, +y, -y, +z, and -z. The octal symbol in the decoding rule consists of 3 bits. When the highest bit is the first character, it indicates that the state of the next cycle is the state of the previous cycle after a positive-negative reversal. When the highest bit is the second character, it indicates that the state of the next cycle is not the state of the previous cycle after a positive-negative reversal. In the decoding rules, there is a correspondence between the four octal symbols of the first character and the six transition states, and a correspondence between the four octal symbols of the second character and the 24 transition states, with the highest bit being the first character.

8. The data transmission method according to any one of claims 5 to 7, characterized in that, Based on the decoding rules, the initial state, and the six states, six octal symbols are obtained, including: Find the first octal symbol corresponding to the case of switching from the initial state to the first of the six states from the decoding rules; Find the (j+1)th octal symbol in the decoding rules corresponding to the case of switching from the j-th state among the six states to the (j+1)-th state among the six states, where j is an integer from 1 to 5.

9. An electronic device, characterized in that, It includes one or more processors and one or more memories; wherein the one or more memories are coupled to the one or more processors, and the one or more memories are used to store a computer program that, when the one or more processors execute the computer program, causes the electronic device to perform the method as claimed in any one of claims 1 to 4 and / or the method as claimed in any one of claims 5 to 8.

10. A chip system applied to an electronic device, the chip system comprising one or more processors, characterized in that, The processor is configured to invoke computer instructions to cause the electronic device to perform the method as described in any one of claims 1 to 4 and / or the method as described in any one of claims 5 to 8.

11. A computer-readable storage medium comprising a computer program, characterized in that, When the computer program is run on an electronic device, the electronic device causes the electronic device to perform the method as described in any one of claims 1 to 4 and / or the method as described in any one of claims 5 to 8.

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