Multi-algorithm adaptive switching digital power supply control method and digital power supply

Abstract

The invention discloses a multi-algorithm adaptive switching digital power supply control method, which comprises the following steps of: acquiring working state data of a digital power supply, identifying the working condition of the digital power supply based on the working state data, and selecting a digital power supply stable output control algorithm matched with the working condition based on the identified working condition parameters. Performing stability control on the output of the digital power supply based on the selected digital power supply stable output control algorithm; and presetting a plurality of digital power supply stable output control algorithms and matching the algorithms with the working condition parameters. According to the invention, dynamic control requirements under multiple working conditions are met, and stable control of the digital power supply in a full scene is realized.

Description

Technical Field

[0001] This invention relates to the field of digital power supply control, and in particular to a digital power supply control method and digital power supply with multi-algorithm adaptive switching. Background Technology

[0002] Digital power supply technology is based on digital signal processors (DSPs) or microcontrollers (MCUs). Its core feature is the integration of power management functions on the basis of power control. Compared with traditional analog power supplies, it has significant advantages in controllability and real-time performance in complex high-performance systems. Analog power supplies rely on fixed parameters in hardware and are only suitable for simple scenarios with fixed parameters. In contrast, digital power supplies can flexibly adjust the control logic through software to adapt to dynamic needs with multiple loads and multiple input conditions.

[0003] Digital power supply closed-loop control algorithms aim to ensure output accuracy and operational stability. PID control (proportional-integral-derivative control) is a key technology for achieving this goal. It precisely regulates the power supply output through the coordinated action of three stages: proportional (P), integral (I), and derivative (D). The proportional stage adjusts the control quantity proportionally to the deviation between the current output value and the set value. The larger the deviation, the larger the adjustment, which can quickly reduce the deviation to meet the real-time response requirements of the digital power supply and provide the system with basic regulation capabilities. The integral stage continuously adjusts by accumulating historical deviations, which can completely eliminate static deviations after the power supply has stabilized, directly matching the core advantage of high output accuracy of digital power supplies. The derivative stage adjusts the control quantity in advance according to the rate of change of the deviation, effectively suppressing overshoot (large fluctuations in output value after exceeding the set value), ensuring the stable operation of the digital power supply. This is especially suitable for the needs of complex and high-performance systems. The synergy of these three stages provides the core algorithmic support for the high accuracy, high stability, and fast response of digital power supplies.

[0004] Existing digital power supplies rely on a single PID or PI algorithm, which cannot dynamically adjust according to operating conditions. Under light loads, the derivative term of the PID algorithm easily amplifies sampling noise, leading to increased output ripple. When the output voltage fluctuates drastically, the PI algorithm's response speed is insufficient, failing to quickly suppress deviations. The robustness of the PID closed-loop control parameters in existing digital power supplies is insufficient; the parameters of a single algorithm need to be tuned for specific operating conditions, failing to cover all scenarios, and are prone to over- and under-regulation during sudden changes in operating conditions. The integral term of the PID algorithm is prone to accumulating errors during power-on and load surges, causing the control quantity to exceed physical limits. Furthermore, DSPs only serve as the execution unit of the PID algorithm, lacking integrated functions such as operating condition identification and algorithm optimization, and cannot support dynamic control requirements under multiple operating conditions. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a digital power supply control method and digital power supply with multi-algorithm adaptive switching, so as to solve the dynamic control requirements under multiple working conditions and realize stable control of digital power supply in all scenarios.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A digital power supply control method with multi-algorithm adaptive switching is proposed, which involves collecting digital power supply operating status data and identifying the operating conditions of the digital power supply based on the operating status data, selecting a stable output control algorithm for the digital power supply that matches the operating conditions based on the identified operating condition parameters, and performing stability control on the output of the digital power supply based on the selected stable output control algorithm; multiple stable output control algorithms for the digital power supply are pre-set and matched with the operating condition parameters.

[0008] The operating parameters obtained by identification and calculation include load rate β and voltage fluctuation rate k. The real-time load rate β and voltage fluctuation rate k calculated in each sampling period are compared with the set judgment threshold, and the corresponding digital power supply stable output control algorithm is selected according to the comparison result.

[0009] The digital power supply stable output control algorithm includes PI control algorithm, conventional PID algorithm and high-speed response PID algorithm; among them, conventional PID algorithm and high-speed response PID algorithm are implemented by adjusting the parameter values ​​in PID algorithm; in particular, the KP, KI and KD parameter values ​​of high-speed response PID algorithm are all greater than the corresponding parameter values ​​of conventional PID algorithm.

[0010] In each sampling period, the real-time output current and voltage data of the digital power supply are collected. Then, the real-time load factor β and voltage fluctuation rate k are calculated based on the collected current and voltage data. The calculation method for the load factor β is as follows:

[0011] ;

[0012] The voltage fluctuation rate k is calculated as follows:

[0013] .

[0014] When the load rate β < the first load rate threshold and the voltage fluctuation rate k < the first voltage fluctuation rate threshold, it is determined to be a light load stable operating condition, and the PI algorithm is selected to control the stable output of the digital power supply. When the first load rate threshold ≤ the load rate β ≤ the second load rate threshold and the voltage fluctuation rate k < the first voltage fluctuation rate threshold, it is determined to be a medium load / full load stable operating condition, and the conventional PID algorithm is selected to control the stable output of the digital power supply. When the load rate β > the second load rate threshold or the voltage fluctuation rate k ≥ the first voltage fluctuation rate threshold, it is determined to be a heavy load / severe fluctuation operating condition, and the high-speed response PID algorithm is selected to control the stable output of the digital power supply.

[0015] In each sampling period, the target algorithm corresponding to the current operating condition is determined based on the calculated load rate β and voltage fluctuation rate k. If the target algorithm is consistent with the currently executed algorithm, the algorithm remains unchanged; if the target algorithm is different from the current algorithm, the algorithm switching process is triggered and the algorithm is switched to the target algorithm.

[0016] When the algorithm switching process is triggered, record the start time of the switch. A transition time τ is set, and the control quantity is calculated using weighted average. The calculation method for the control quantity during the transition time period is as follows:

[0017] in , The control quantity calculated by the algorithm before the switchover. The control quantity calculated by the target algorithm after the switch is used during the transition period. Control the digital power supply; when Δt=τ, The switch is completed, and then the target algorithm is used to calculate... Control the digital power supply.

[0018] When using a target algorithm to control a digital power supply, the deviation between the current output voltage and the target voltage is calculated in each sampling period. A deviation threshold is set. If the target algorithm to be executed is a PID control algorithm, when If the integral term in the PID control algorithm outputs 0, then the control algorithm retains only the proportional and derivative terms for closed-loop control; if The integral component in the PID control algorithm is working normally and the integral output has been modified to... , where k is the sampling time from 0 to n, and T is the sampling period.

[0019] When using conventional PID algorithms and high-speed response PID algorithms to control the output of a digital power supply, a first-order low-pass filter is used to process the differential signal in the PID control algorithm. The preprocessing formula is as follows: ,in This is the filtered differential output at the current time. This is the differential output after filtering at the previous time step. These are the filter coefficients. The value of is related to the current operating condition. The preprocessed differential output is combined with the integral and proportional outputs in the PID control algorithm to generate the corresponding control signal to regulate and control the output of the digital power supply.

[0020] A digital power supply, wherein the output voltage of the digital power supply is stably controlled by the aforementioned multi-algorithm adaptive switching digital power supply control method.

[0021] Compared to existing digital power supply technologies, this invention offers several significant advantages: First, by adaptively switching between multiple algorithms—PI, conventional PID, and high-speed response PID—it covers all operating conditions from light load to medium load to full load to sudden load changes, solving the problems of increased ripple and insufficient response under light load and drastic output voltage fluctuations in existing single algorithms, thus ensuring the stability of power supply operation under different conditions. Second, the improved PID algorithm's integral separation module avoids the accumulation of integral errors during power supply startup and sudden load changes, while the differential filtering module suppresses noise interference under light load, significantly reducing output voltage ripple and static deviation, further improving output accuracy. Third, the DSP control unit integrates modules for operating condition identification, algorithm decision-making, and switching, fully leveraging the hardware's computational potential, resulting in higher computational efficiency compared to existing solutions that only function as a single PID execution unit. Fourth, the weighted transition switching mechanism during algorithm switching avoids output fluctuations caused by sudden changes in control quantities, ensuring stable operation of the load equipment. Attached Figure Description

[0022] The following is a brief explanation of the contents of each of the accompanying drawings and the markings in the drawings:

[0023] Figure 1 This is a flowchart illustrating the control principle of the present invention under heavy and light load conditions.

[0024] Figure 2 This is a flowchart illustrating the principle of the control method of the present invention. Detailed Implementation

[0025] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and the description of the preferred embodiments.

[0026] Traditional PID control algorithms still have certain shortcomings in controlling the stability of digital power supply output. They cannot provide targeted control for different operating conditions, thus failing to achieve the goal of stable output of digital power supply. This solution achieves the goal of stable output control of digital power supply by adjusting and setting the parameters of the PID algorithm.

[0027] This embodiment of a digital power supply control method with multi-algorithm adaptive switching includes collecting digital power supply operating status data and identifying the operating conditions of the digital power supply based on the operating status data; selecting a digital power supply stable output control algorithm that matches the operating conditions based on the identified operating condition parameters; performing stability control on the output of the digital power supply based on the selected digital power supply stable output control algorithm; and pre-setting multiple digital power supply stable output control algorithms and matching them with the operating condition parameters.

[0028] The collected digital power supply operating status data includes voltage and current data. Operating parameters are calculated based on the voltage and current data. The calculated operating parameters include load rate β and voltage fluctuation rate k. The real-time load rate β and voltage fluctuation rate k calculated in each sampling period are compared with the set judgment thresholds, and the corresponding digital power supply stable output control algorithm is selected according to the comparison results.

[0029] The stable output control algorithm of the digital power supply is pre-set in the control chip of the digital power supply, typically a DSP chip. Multiple calibrated control algorithms are pre-set in the DSP, including PI control, conventional PID, and high-speed response PID algorithms. The conventional and high-speed response PID algorithms are implemented by adjusting the parameter values ​​in the PID algorithm. Specifically, the KP, KI, and KD parameters of the high-speed response PID algorithm are all greater than their corresponding parameters in the conventional PID algorithm. Based on the calculated load rate β and voltage fluctuation rate k, the appropriate control algorithm (PI control, conventional PID, or high-speed response PID) is determined, thus achieving algorithm-matched output control of the digital power supply and satisfying the stability control requirements.

[0030] In this embodiment, the real-time output current and voltage data of the digital power supply are collected in each sampling period. Then, the real-time load factor β and voltage fluctuation rate k are calculated based on the collected current and voltage data. The load factor β is calculated as follows:

[0031] ;

[0032] The voltage fluctuation rate k is calculated as follows:

[0033] .

[0034] When the load rate β < the first load rate threshold and the voltage fluctuation rate k < the first voltage fluctuation rate threshold, it is determined to be a light load stable operating condition, and the PI algorithm is selected to control the stable output of the digital power supply. When the first load rate threshold ≤ the load rate β ≤ the second load rate threshold and the voltage fluctuation rate k < the first voltage fluctuation rate threshold, it is determined to be a medium load / full load stable operating condition, and the conventional PID algorithm is selected to control the stable output of the digital power supply. When the load rate β > the second load rate threshold or the voltage fluctuation rate k ≥ the first voltage fluctuation rate threshold, it is determined to be a heavy load / severe fluctuation operating condition, and the high-speed response PID algorithm is selected to control the stable output of the digital power supply.

[0035] In each sampling period, the target algorithm corresponding to the current operating condition is determined based on the calculated load rate β and voltage fluctuation rate k. If the target algorithm is consistent with the currently executed algorithm, the algorithm remains unchanged; if the target algorithm is different from the current algorithm, the algorithm switching process is triggered and the algorithm is switched to the target algorithm.

[0036] When the algorithm switching process is triggered, record the start time of the switch. A transition time τ is set, and the control quantity is calculated using weighted average. The calculation method for the control quantity during the transition time period is as follows:

[0037] in , The control quantity calculated by the algorithm before the switchover. The control quantity calculated by the target algorithm after the switch is used during the transition period. Control the digital power supply; when Δt=τ, The switch is completed, and then the target algorithm is used to calculate... Control the digital power supply.

[0038] When using a target algorithm to control a digital power supply, the deviation between the current output voltage and the target voltage is calculated in each sampling period. A deviation threshold is set. If the target algorithm to be executed is a PID control algorithm, when If the integral term in the PID control algorithm outputs 0, then the control algorithm retains only the proportional and derivative terms for closed-loop control; if The integral component in the PID control algorithm is working normally and the integral output has been modified to... , where k is the sampling time from 0 to n, and T is the sampling period.

[0039] When using conventional PID algorithms and high-speed response PID algorithms to control the output of a digital power supply, a first-order low-pass filter is used to process the differential signal in the PID control algorithm. The preprocessing formula is as follows: ,in This is the filtered differential output at the current time. This is the differential output after filtering at the previous time step. These are the filter coefficients. The value of is related to the current operating condition. The preprocessed differential output is combined with the integral and proportional outputs in the PID control algorithm to generate the corresponding control signal to regulate and control the output of the digital power supply.

[0040] This embodiment also provides a digital power supply, the output voltage of which is stably controlled by the multi-algorithm adaptive switching digital power supply control method described in the above embodiments. The digital power supply possesses all the features of the control methods described in the above embodiments, and therefore has all their technical advantages, which will not be elaborated upon here.

[0041] The following section provides a detailed explanation of the specific parameter settings and working principles of the PI algorithm, the conventional PID algorithm, and the high-speed response PID algorithm:

[0042] This invention addresses the shortcomings of existing technologies in terms of operating condition adaptation, parameter stability, hardware utilization, and switching stability by optimizing the PID algorithm structure, adding integral separation and differential filtering modules, constructing multiple algorithm libraries and parameter groups, and designing a DSP integrated control architecture. This includes modules for operating condition identification, algorithm decision-making, and switching. The system achieves stable control of digital power supplies across all scenarios. The system adopts a closed-loop architecture of "sampling-decision-control-execution," with a DSP as the core control unit. This unit integrates five major modules: operating condition identification, algorithm storage, algorithm decision-making, improved PID calculation, and algorithm switching.

[0043] To address the issues of integral accumulation error and light-load noise amplification in existing PID algorithms, this invention optimizes the PID algorithm structure by adding an integral separation module and a differential filtering module, and designs a multi-parameter group adaptation mechanism. The integral separation module's function is to prevent the continuous accumulation of error in the integral stage during large deviation scenarios such as power-on and sudden load changes, which could cause the control quantity to exceed physical limits. First, a deviation threshold is set. The DSP calculates the deviation between the current output voltage and the target voltage in each sampling cycle. .

[0044]

[0045] in The output voltage is set, and n is the current sampling time. This represents the digital power supply output voltage at the current sampling moment. In cases of sudden load changes causing voltage drops, the integral output is zero. In this situation, the control algorithm retains only the proportional and derivative components (if the current algorithm is PID). The proportional component quickly reduces the deviation, avoiding integral accumulation. This indicates that the system is close to a stable state with a small deviation, meaning the integral element is working normally and the integral output is... (Where k is the sampling time from 0 to n, T is the sampling period, and KI is the integral coefficient of the PID algorithm). Static deviation is completely eliminated through the integral stage, ensuring output accuracy. The integral output in the PID algorithm has been modified here, while the derivative and proportional outputs remain unchanged. In existing technologies, if a PID algorithm is used under light load conditions, its derivative stage amplifies noise; while under medium / full load and heavy load conditions, a PID algorithm (without removing the derivative) is required to ensure stability and response speed. Therefore, this invention designs a derivative filtering module to solve the noise amplification problem of the derivative stage in PID algorithms (conventional and high-speed response types); simultaneously, for light load conditions, a PI algorithm without a derivative stage is directly adopted to avoid noise problems in this scenario at the source. A first-order low-pass filter is used to process the derivative signal, and the specific filtering formula is as follows: ,in The "differential coefficient" in the PID control algorithm. The "output voltage deviation" at the current sampling moment. This represents the "output voltage deviation" at the previous sampling time. This is the filtered differential output at the current time. This is the differential output after filtering at the previous time step. These are the filter coefficients (values ​​ranging from 0 to 1). The value of is related to the current operating condition: when the system is under light load, the noise proportion in the sampled signal is higher. Setting it to 0.1 enhances the filtering effect to suppress noise; when the system is under heavy load, the signal-to-noise ratio is low, and the fast response capability of the differential element must be ensured. Setting it to 0.8 balances filtering with response speed; The specific value is automatically adjusted by the DSP's operating condition identification module. Differential filtering is primarily applied to operating conditions using the PID algorithm (medium / full load and heavy / severe fluctuation conditions), rather than light load conditions. Light load conditions use the PI algorithm, which already avoids noise issues introduced by the differential component, therefore differential filtering is unnecessary. The differential filtering design aims to suppress noise interference that may be introduced by the differential component when using the PID algorithm under medium / heavy load conditions.

[0046] The "differential coefficient" in the PID control algorithm. The "output voltage deviation" at the current sampling moment. This represents the "output voltage deviation" at the previous sampling time.

[0047] To meet the needs of different operating conditions, three different sets of control algorithm parameters are pre-stored in the DSP to adapt to three common typical operating conditions: light load, stable full load, and severe fluctuation.

[0048]

[0049] This is the rated output current of the power supply. The current output current is obtained from the current sampling. For light load conditions (load rate β < 20%), due to the sensitivity to noise and low requirement for response speed under these conditions, the PI algorithm is selected. The corresponding parameters for the PI algorithm are set as KP1 = 2.0 and KI1 = 0.5. The PI algorithm is chosen instead of the PID algorithm to remove the derivative element and avoid the problem of derivative amplification noise. At the same time, the lower KP1 and KI1 can ensure output stability and avoid increased ripple caused by control fluctuations under light load conditions.

[0050]

[0051] in It is the "actual output voltage" of the digital power supply in the nth sampling period. The output voltage data from the previous sampling period is used for comparison and calculation of voltage change amplitude. For stable full-load conditions (20%≤β≤80%, and voltage fluctuation rate k<2), the system requires a balance between output accuracy and operational stability. A conventional PID algorithm is selected, with parameters set as KP2=3.5, KI2=1.2, and KD2=0.8. KP2 is set higher than KP1 in the PI algorithm to improve the response speed of the proportional element; KI2 ensures that the integral element effectively eliminates static deviation; and KD2 is set appropriately to suppress output overshoot without excessively amplifying noise.

[0052] For operating conditions with severe fluctuations (β>80% or k≥2), the system needs to quickly suppress deviations and rapidly restore voltage during severe fluctuations. A high-speed response PID algorithm is selected, with parameters set as KP3=5.0, KI3=1.8, and KD3=1.5. Compared to conventional PID algorithms, the significantly increased values ​​of KP3 and KD3 enhance the rapid adjustment capability of the proportional terminator and the predictive adjustment capability of the derivative terminator, thus quickly suppressing deviations. The increased KI3 ensures that the integral terminator can promptly eliminate static deviations after the deviation decreases, balancing response speed and output accuracy.

[0053] The multi-algorithm adaptive switching mechanism is implemented collaboratively by a load condition identification module, an algorithm decision module, and a switching module. First, the load condition identification module identifies the load condition, judging the stability of the output voltage based on the load rate β and the voltage fluctuation rate k. The DSP calculates β and k in each sampling cycle and temporarily stores the results in an internal register as the basis for algorithm decisions. The algorithm decision module pre-stores three sets of load condition judgment thresholds (stored in the load condition threshold area of ​​Flash memory, which can be modified by the user) and establishes a mapping relationship between load conditions and algorithms: when β < 20% and k < 2, it is determined to be a light-load stable load condition, and the mapping algorithm is the PI algorithm; when 20% ≤ β ≤ 80% and k < 2, it is determined to be a medium-load / full-load stable load condition, and the mapping algorithm is the conventional PID algorithm; when β > 80% or k ≥ 2, it is determined to be a heavy-load / severely fluctuating load condition, and the mapping algorithm is the high-speed response PID algorithm. In each sampling period, the algorithm decision module compares the current values ​​of β and k with the threshold to determine the target algorithm corresponding to the current working condition. If the target algorithm is consistent with the currently executed algorithm, the algorithm remains unchanged. If the target algorithm is different from the current algorithm, the algorithm switching process is triggered, and a switching command is sent to the switching module.

[0054] When changes in operating conditions cause algorithm switching, such as switching from PI to PID, directly replacing the control input can easily lead to sudden changes in the PWM duty cycle, causing output voltage fluctuations. When the algorithm decision module triggers the switch, the switching module records the start time of the switch. And set the transition time τ (the default value is 5 sampling periods); then calculate the weighted control quantity within the transition time period (i.e. The control quantity is calculated using the following formula:

[0055]

[0056] in , The control quantity calculated by the algorithm before the switchover. The control quantity is calculated for the target algorithm after the switch; using this formula, the control quantity changes from... Gradually transition to To avoid sudden changes; the third step is the completion of the switch, when Δt=τ, The switching module sends a "switching complete" signal to the algorithm calculation module, and subsequent control quantities are directly calculated using the target algorithm. The algorithm switching process ends here. The essence of the control quantity is the PWM duty cycle (the proportion of the pulse width modulation signal's on time). The DSP controls the on / off time of the power device (IGBT) by adjusting this duty cycle, ultimately stabilizing the output voltage.

[0057] The entire system workflow is as follows: First, the system is powered on and initialized, then the required voltage value is set. The system sets light load threshold and voltage fluctuation threshold. After the parameters are set, the sampling unit starts and collects signals such as Uin, Uo, and Io according to the sampling period. Then, the signals are input to the DSP's ADC interface. The DSP calculates the load rate β and voltage fluctuation rate k in each sampling period. The algorithm decision module compares β and k with the preset thresholds to determine the current operating condition and match the target algorithm. The DSP's improved PID calculation module performs integral separation and differential filtering (for PID algorithm) operations according to the target algorithm (PI or PID) and the corresponding parameters to calculate the PWM duty cycle control quantity D(n). If there is an algorithm switching requirement, the switching module calculates according to the weighted transition method. Finally, the DSP converts the control quantity into a PWM signal.

[0058] The technical features of this embodiment include: First, an improved PID algorithm structure containing an integral separation module and a differential filtering module. This structure can dynamically adapt to the error suppression requirements under different operating conditions, effectively solving the problems of integral accumulation error and light load noise amplification. Second, a DSP control architecture integrating "operating condition identification - algorithm decision - smooth switching" functions. By integrating multiple core modules within the DSP, it achieves precise matching between operating conditions and algorithms, fully leveraging the DSP hardware performance. Third, a multi-algorithm library design storing PI, conventional PID, high-speed response PID, and corresponding parameter groups. This design provides parameter support for full operating condition coverage and allows for the calling of optimized parameters according to different operating conditions. Fourth, a weighted transition-based algorithm switching method. By gradually transitioning through control quantities, it avoids output fluctuations during switching and ensures the continuity of system operation. Fifth, a working condition quantification identification method based on load rate and voltage fluctuation rate. By quantifying key feature values, it achieves accurate determination of operating conditions, providing a reliable basis for algorithm decision-making and serving as the foundation for multi-algorithm adaptive switching.

[0059] Obviously, the specific implementation of this invention is not limited to the above-described methods. Any non-substantial improvements made using the inventive concept and technical solution of this invention are within the protection scope of this invention.

Claims

1. A digital power supply control method with multi-algorithm adaptive switching, characterized in that: The system collects digital power supply operating status data and identifies the operating conditions of the digital power supply based on the operating status data. Based on the identified operating condition parameters, it selects a digital power supply stable output control algorithm that matches the operating conditions and performs stability control on the output of the digital power supply based on the selected digital power supply stable output control algorithm. Multiple digital power supply stable output control algorithms are pre-set and matched with the operating condition parameters.

2. The digital power supply control method with multi-algorithm adaptive switching as described in claim 1, characterized in that: The operating parameters obtained by identification and calculation include load rate β and voltage fluctuation rate k. The real-time load rate β and voltage fluctuation rate k calculated in each sampling period are compared with the set judgment threshold, and the corresponding digital power supply stable output control algorithm is selected according to the comparison result.

3. The digital power supply control method with multi-algorithm adaptive switching as described in claim 2, characterized in that: The digital power supply stable output control algorithm includes PI control algorithm, conventional PID algorithm and high-speed response PID algorithm; among them, conventional PID algorithm and high-speed response PID algorithm are implemented by adjusting the parameter values ​​in PID algorithm; in particular, the KP, KI and KD parameter values ​​of high-speed response PID algorithm are all greater than the corresponding parameter values ​​of conventional PID algorithm.

4. A digital power supply control method with multi-algorithm adaptive switching as described in any one of claims 1-3, characterized in that: In each sampling period, the real-time output current and voltage data of the digital power supply are collected. Then, the real-time load factor β and voltage fluctuation rate k are calculated based on the collected current and voltage data. The calculation method for the load factor β is as follows: ； The voltage fluctuation rate k is calculated as follows: 。 5. A digital power supply control method with multi-algorithm adaptive switching as described in any one of claims 1-3, characterized in that: When the load rate β < the first load rate threshold and the voltage fluctuation rate k < the first voltage fluctuation rate threshold, it is determined to be a light load stable operating condition, and the PI algorithm is selected to control the stable output of the digital power supply. When the first load rate threshold ≤ the load rate β ≤ the second load rate threshold and the voltage fluctuation rate k < the first voltage fluctuation rate threshold, it is determined to be a medium load / full load stable operating condition, and the conventional PID algorithm is selected to control the stable output of the digital power supply. When the load rate β > the second load rate threshold or the voltage fluctuation rate k ≥ the first voltage fluctuation rate threshold, it is determined to be a heavy load / severe fluctuation operating condition, and the high-speed response PID algorithm is selected to control the stable output of the digital power supply.

6. The digital power supply control method with multi-algorithm adaptive switching as described in claim 5, characterized in that: In each sampling period, the target algorithm corresponding to the current operating condition is determined based on the calculated load rate β and voltage fluctuation rate k. If the target algorithm is consistent with the currently executed algorithm, the algorithm remains unchanged. If the target algorithm is different from the current algorithm, the algorithm switching process is triggered and the algorithm is switched to the target algorithm.

7. The digital power supply control method with multi-algorithm adaptive switching as described in claim 6, characterized in that: When the algorithm switching process is triggered, record the start time of the switch. A transition time τ is set, and the control quantity is calculated using weighted average. The calculation method for the control quantity during the transition time period is as follows: ; in , The control quantity calculated by the algorithm before the switchover. The control quantity calculated by the target algorithm after the switch is used during the transition period. Control the digital power supply; when hour, The switch is completed, and then the target algorithm is used to calculate... Control the digital power supply.

8. A digital power supply control method with multi-algorithm adaptive switching as described in any one of claims 1-3, characterized in that: When using a target algorithm to control a digital power supply, the deviation between the current output voltage and the target voltage is calculated in each sampling period. A deviation threshold is set. If the target algorithm to be executed is a PID control algorithm, when In this case, the integral term in the PID control algorithm outputs 0, and the control algorithm retains only the proportional and derivative terms for closed-loop control; if The integral component in the PID control algorithm is working normally and the integral output has been modified to... , where k is the sampling time from 0 to n, and T is the sampling period.

9. A digital power supply control method with multi-algorithm adaptive switching as described in any one of claims 1-3, characterized in that: When using conventional PID algorithms and high-speed response PID algorithms to control the output of a digital power supply, a first-order low-pass filter is used to process the differential signal in the PID control algorithm. The preprocessing formula is as follows: ,in This is the filtered differential output at the current time. This is the differential output after filtering at the previous time step. These are the filter coefficients. The value of is related to the current operating condition. The preprocessed differential output is combined with the integral and proportional outputs in the PID control algorithm to generate the corresponding control signal to regulate and control the output of the digital power supply.

10. A digital power supply, characterized in that: The output voltage of the digital power supply is stably controlled by the multi-algorithm adaptive switching digital power supply control method as described in any one of claims 1-9.

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