Power decoupling topology based on symmetrical half bridges and control method thereof
By using a symmetrical half-bridge power decoupling topology and coordinated control method, the DC bus voltage problem caused by AC side power fluctuations was solved, and the stability and dynamic performance of the bus voltage were improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-15
- Publication Date
- 2026-04-07
AI Technical Summary
In single-phase or unbalanced three-phase scenarios, AC power fluctuations cause low-frequency drift of DC bus voltage and double-frequency voltage ripple, affecting the stable operation of DC/DC converters and sensitive loads. Traditional methods are bulky, have short lifespans, or increase complexity.
A power decoupling topology based on a symmetrical half-bridge is adopted, which combines inductors, capacitors and buffer units of the half-bridge structure, and achieves the absorption of the second harmonic ripple of the bus through coordinated control of the sampling unit, control unit and decoupling unit.
It effectively suppresses bus voltage ripple, improves system power density and reliability, and achieves high-bandwidth dynamic performance stability.
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Figure CN121813837A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronics technology, specifically a power decoupling topology based on a symmetrical half-bridge and its control method. Background Technology
[0002] With the rapid popularization of distributed energy grid-connected devices, photovoltaic inverters, electric vehicle charging systems, and DC microgrids, the problem of AC power fluctuations being transmitted to the DC side is becoming increasingly prominent. In single-phase or unbalanced three-phase scenarios, due to the inherent 2... Low-frequency ripple, if left unsuppressed, will directly lead to significant low-frequency drift and double-harmonic voltage ripple on the DC bus voltage, affecting the stable operation of downstream DC / DC converters, energy storage systems, and sensitive loads. Traditional power decoupling methods typically use large-capacity electrolytic capacitors to absorb power fluctuations, but this method is bulky, has a short lifespan, and low reliability, making it unsuitable for high power density applications. Another type of active power decoupling scheme absorbs and releases ripple energy by introducing additional switching links or energy buffer units. While this effectively reduces bus ripple, it increases the number of components, cost, and control complexity.
[0003] Power decoupling topologies based on symmetrical half-bridges have attracted widespread attention due to their simple structure requiring only two active switching devices and exhibiting excellent bidirectional energy flow characteristics. This topology utilizes a buffer unit composed of inductors, capacitors, and a half-bridge structure to provide dynamic energy regulation on the DC side, thereby suppressing AC power ripple. However, to achieve effective power decoupling, coordinated control of inductor current, buffer voltage, and bus voltage is required. This control must ensure steady-state voltage stability while rapidly compensating for dynamic fluctuations caused by load changes and input disturbances.
[0004] Therefore, researching a high-bandwidth, robust control method suitable for symmetrical half-bridge power decoupling topologies is of great engineering significance for improving system power density, reliability, and dynamic performance. Summary of the Invention
[0005] The purpose of this application is to provide a power decoupling topology based on a symmetrical half-bridge and its control method, which can achieve absorption of bus second harmonic ripple and exhibit better stability.
[0006] To achieve the above objectives, this application provides the following technical solution:
[0007] In a first aspect, an embodiment of this application provides a power decoupling topology based on a symmetrical half-bridge, including a bus capacitor, a power absorption unit, a decoupling unit, a sampling unit, and a control unit;
[0008] The output terminal of the bus capacitor is connected to the input terminal of the power absorption unit, and the output terminal of the power absorption unit is connected to the decoupling unit; the input terminal of the sampling unit is connected to the bus capacitor, the feedback terminal of the sampling unit is connected to the input terminal of the control unit, and the output terminal of the control unit is connected to the input terminal of the power absorption unit.
[0009] Bus capacitors include inverter capacitors and inverter capacitors Inverter capacitors negative terminal and inverter capacitor After connecting the positive terminal to the capacitor The negative terminal is connected to the inverter capacitor. The positive electrode and Pin D is connected to the inverter capacitor. negative electrode and The pin S is connected.
[0010] The power absorption unit includes a switching transistor. , , pin S and After pin D is connected to the inductor Connected to the input terminal, inductor Output terminal and capacitor The negative terminal is connected.
[0011] The decoupling unit adopts one of the structural networks with absorption characteristics, such as L, C, or LC, and is used to absorb the second harmonic component in the bus capacitor to reduce bus ripple.
[0012] When the decoupling unit uses L for absorption, the decoupling unit is an absorption inductor, and the positive terminal of the absorption inductor is connected to the output terminal of the power absorption unit and the midpoint of the bus capacitor.
[0013] When the decoupling unit uses C for absorption, the decoupling unit includes an absorption capacitor. The positive terminal of the absorption capacitor is connected to the output terminal of the power absorption unit, and the negative terminal of the absorption capacitor is connected to the midpoint of the bus (1).
[0014] When the decoupling unit uses LC absorption, the decoupling unit includes a filter inductor and an absorption capacitor. The positive terminal of the filter inductor is connected to the output terminal of the power absorption unit, the negative terminal is connected to the positive terminal of the absorption capacitor, and the negative terminal of the absorption capacitor is connected to the midpoint of the bus.
[0015] Secondly, embodiments of this application provide a control method based on a symmetrical half-bridge power decoupling topology. The implementation of the symmetrical half-bridge power decoupling topology includes the following steps:
[0016] S1: Bus voltage , Absorption circuit voltage Bus current After sampling, , The fluctuation power was extracted by decomposition. The phase angle θ is obtained by orienting the fluctuating power.
[0017] S2: For fluctuating power The voltage reference value of the absorption circuit is obtained by decomposition and calculation. ,Will With absorption circuit voltage The difference is sent to the PR controller to obtain the voltage command of the absorption circuit, which is then modulated to obtain the PWM signal of the absorption circuit.
[0018] Compared with existing technologies, the beneficial effects of this invention are: analyzing the principle of load imbalance, establishing a power decoupling model, and then generating trigger pulses through modulation and sending them to the drive module. The power decoupling circuit then compensates for the second harmonic power, thereby reducing bus capacitor ripple. The power decoupling circuit used in this application can maintain stability under various operating conditions and can absorb the second harmonic ripple of the bus. The design and control method of this application demonstrate better stability. Attached Figure Description
[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a power decoupling topology diagram based on a symmetrical half-bridge according to an embodiment of the present invention.
[0021] Figure 2 This is a specific circuit diagram of a power decoupling topology based on a symmetrical half-bridge when the decoupling circuit uses an L-circuit in an embodiment of the present invention.
[0022] Figure 3 This is a diagram showing the decoupling circuit structure that can be used in the embodiments of the present invention. Detailed Implementation
[0023] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. It should be noted that similar reference numerals and letters in the following drawings indicate similar items; therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0024] The terms “comprising,” “including,” or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase “comprising one…” does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0025] The terms “first,” “second,” etc., are used only to distinguish one entity or operation from another, and should not be construed as indicating or implying relative importance, nor as requiring or implying any such actual relationship or order between these entities or operations.
[0026] Embodiments of the present invention provide a power decoupling topology based on a symmetrical half-bridge and a corresponding control method thereof. Figures 1-3 The figures shown are a schematic diagram of a power decoupling topology based on a symmetrical half-bridge according to the present invention and a circuit diagram of an embodiment thereof.
[0027] like Figure 1 As shown, Figure 1 It is a power decoupling topology based on a symmetrical half-bridge, and the compensation topology includes a bus capacitor 1, a power absorption unit 2, a decoupling unit 3, a sampling unit 401, and a control unit 501;
[0028] The output terminal of bus capacitor 1 is connected to the input terminal of power absorption unit 2, and the output terminal of power absorption unit 2 is connected to decoupling unit 3; the input terminal of sampling unit 501 is connected to bus capacitor 1, the feedback terminal of sampling unit 401 is connected to the input terminal of control unit 501, and the output terminal of control unit 501 is connected to the input terminal of power absorption unit 2.
[0029] The power decoupling topology based on a symmetrical half-bridge, wherein the bus capacitor 1 and the inverter capacitor are... negative electrode and After connecting the positive terminal to the capacitor The negative terminal is connected. The positive electrode and Connected to pin D, negative electrode and The pin S is connected, and the type of switching transistor selected is one of the semiconductor devices with switching characteristics such as GaN, MOSFET, IGBT and BJT.
[0030] The power decoupling topology based on a symmetrical half-bridge includes a power absorption unit 2 comprising a switching transistor. , , pin S and After pin D is connected to the inductor Connected to the input terminal, inductor Output terminal and capacitor The negative terminal is connected, and the type of switching transistor selected is one of the semiconductor devices with switching characteristics such as GaN, MOSFET, IGBT and BJT.
[0031] Furthermore, the switching transistors can be cascaded using one or more of the following semiconductor devices with switching characteristics: GaN, MOSFET, IGBT, and BJT. The source of the first switching transistor is connected to the drain of the second switching transistor, the source of the second switching transistor is connected to the drain of the third switching transistor, and so on. The drain of the first switching transistor is the drain of the cascaded switch, and the source of the last switching transistor is the source of the cascaded switch.
[0032] The power decoupling topology based on a symmetrical half-bridge is described above. The decoupling unit 3 adopts one of the structural networks with absorption characteristics, such as L, C, or LC. The decoupling unit 3 is used to absorb the second harmonic component in the bus capacitor 1 and reduce the bus ripple.
[0033] When the decoupling unit 3 uses L for absorption, the decoupling unit 3 is an absorption inductor, and the positive terminal of the absorption inductor is connected to the output terminal of the power absorption unit 2 and the midpoint of the bus capacitor 1.
[0034] When the decoupling unit 3 uses C for absorption, the decoupling unit 3 includes an absorption capacitor. The positive terminal of the absorption capacitor is connected to the output terminal of the power absorption unit 2, and the negative terminal of the absorption capacitor is connected to the midpoint of the bus 1.
[0035] When the decoupling unit 3 performs LC absorption, the decoupling unit 3 includes a filter inductor and an absorption capacitor. The positive terminal of the filter inductor is connected to the output terminal of the power absorption unit 2, the negative terminal is connected to the positive terminal of the absorption capacitor, and the negative terminal of the absorption capacitor is connected to the midpoint of the bus 1.
[0036] The aforementioned half-bridge power decoupling topology implementation includes a phase-locked loop, a coordinate transformation unit, a control algorithm, a modulation strategy unit, and a drive unit.
[0037] The input of the phase-locked loop is the bus capacitor voltage signal. The output of the phase-locked loop is connected to the input of the control algorithm. The output of the phase-locked loop is connected to the input of the coordinate transformation unit. The output of the coordinate transformation unit is connected to the input of the control algorithm. The output of the control algorithm is connected to the input of the modulation strategy. The output of the modulation strategy is connected to the input of the drive circuit for outputting the modulation signal.
[0038] Furthermore, the phase-locked loop is used to control the frequency and phase of the internal oscillation signal using an externally input reference signal, so that the output voltage and the input voltage maintain a fixed phase difference. The phase-locked loop can be a phase-locked method with phase-locking characteristics, such as an improved EPLL based on hybrid filtering, a single-phase phase-locked loop based on cascaded delay signal cancellation, or a phase-locked loop based on a second-order generalized integrator.
[0039] Furthermore, in the control algorithm, controller 1 is used to control the current of the absorption circuit, and the controller can be one or more of the following: proportional-integral-derivative, proportional resonant controller, sliding mode control, etc.
[0040] Furthermore, the modulation strategy is used to output the duty cycle and switching frequency modulation signal of the mode selected by the mode selection unit.
[0041] Furthermore, the driving circuit is used to convert modulation into switching network control logic to control the power absorption unit;
[0042] The aforementioned control method for load imbalance compensation based on inter-phase power mutual assistance includes the following steps:
[0043] S1: Bus voltage , Absorption circuit voltage Bus current After sampling, , The fluctuation power was extracted by decomposition. The phase angle θ is obtained by orienting the fluctuating power.
[0044] S2: For fluctuating power The voltage reference value of the absorption circuit is obtained by decomposition and calculation. ,Will With absorption circuit voltage The difference is sent to the PR controller to obtain the voltage command of the absorption circuit, which is then modulated to obtain the PWM signal of the absorption circuit.
[0045] Furthermore, a control method based on a symmetrical half-bridge power decoupling topology, wherein the controller has one parameter , The determination process is as follows:
[0046] (1) Calculate controller parameters and debug. Check if the bus voltage ripple has decreased, and whether the amplitude of the decreased bus voltage ripple oscillates. If so, reduce it. Continue until the waveform oscillation is eliminated, then proceed to process (2); otherwise, proceed to step (1) to continue debugging. ;
[0047] (2) Fixed Value, debugging Check if the voltage ripple amplitude of the line bus fluctuates. If so, reduce it. Continue until the waveform oscillation is eliminated, then proceed to process (3); otherwise, proceed to process (2) to continue debugging. ;
[0048] (3) Determine , The final value is used as the coefficient of controller one;
[0049] (4) Based on operations (1)-(3), the output control loop parameters are finally obtained. , .
[0050] Compared with existing technologies, this invention analyzes the principle of load imbalance, establishes a power decoupling model, and then generates trigger pulses through modulation and sends them to the drive module. The power decoupling circuit then compensates for the second harmonic power, thereby reducing bus capacitor ripple. The power decoupling circuit used in this application can maintain stability under various operating conditions and can absorb the second harmonic ripple of the bus. The design and control method of this application demonstrate better stability.
[0051] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.
Claims
1. A power decoupling topology based on a symmetrical half-bridge, characterized in that, It includes a bus capacitor (1), a power absorption unit (2), a decoupling unit (3), a sampling unit (401), and a control unit (501). The output terminal of the bus capacitor (1) is connected to the input terminal of the power absorption unit (2), and the output terminal of the power absorption unit (2) is connected to the decoupling unit (3); the input terminal of the sampling unit (501) is connected to the bus capacitor (1), the feedback terminal of the sampling unit (401) is connected to the input terminal of the control unit (501), and the output terminal of the control unit (501) is connected to the input terminal of the power absorption unit (2).
2. The power decoupling topology based on a symmetrical half-bridge as described in claim 1, characterized in that, Bus capacitor (1) includes inverter capacitor and inverter capacitors Inverter capacitors negative terminal and inverter capacitor After connecting the positive terminal to the capacitor The negative terminal is connected to the inverter capacitor. The positive electrode and Pin D is connected to the inverter capacitor. negative electrode and The pin S is connected.
3. The power decoupling topology based on a symmetrical half-bridge as described in claim 2, characterized in that, The power absorption unit (2) includes a switching transistor. , , pin S and After pin D is connected to the inductor Connected to the input terminal, inductor Output terminal and capacitor The negative terminal is connected.
4. The power decoupling topology based on a symmetrical half-bridge as described in claim 2, characterized in that, The decoupling unit (3) adopts one of the structural networks with absorption characteristics of L, C or LC. The decoupling unit (3) is used to absorb the second harmonic component in the bus capacitor (1) and reduce the bus ripple. When the decoupling unit (3) uses L for absorption, the decoupling unit (3) is an absorption inductor, and the positive terminal of the absorption inductor is connected to the output terminal of the power absorption unit (2) and the midpoint of the bus capacitor (1); When the decoupling unit (3) uses C for absorption, the decoupling unit (3) includes an absorption capacitor. The positive terminal of the absorption capacitor is connected to the output terminal of the power absorption unit (2), and the negative terminal of the absorption capacitor is connected to the midpoint of the bus (1). When the decoupling unit (3) performs LC absorption, the decoupling unit (3) includes a filter inductor and an absorption capacitor. The positive terminal of the filter inductor is connected to the output terminal of the power absorption unit (2), the negative terminal is connected to the positive terminal of the absorption capacitor, and the negative terminal of the absorption capacitor is connected to the midpoint of the bus (1).
5. A control method based on a symmetrical half-bridge power decoupling topology, implemented based on the symmetrical half-bridge power decoupling topology as described in any one of claims 1-4, characterized in that, It includes the following steps: S1: Bus voltage , Absorption circuit voltage Bus current After sampling, , The fluctuation power was extracted by decomposition. The phase angle θ is obtained by orienting the fluctuating power. S2: For fluctuating power The voltage reference value of the absorption circuit is obtained by decomposition and calculation. ,Will With absorption circuit voltage The difference is sent to the PR controller to obtain the voltage command of the absorption circuit, which is then modulated to obtain the PWM signal of the absorption circuit.