Single-inductor hybrid buck converter of switched capacitor and load transient compensation circuit of single-inductor hybrid buck converter

By using a buck converter that combines a switched capacitor network with a single inductor and a load transient compensation circuit, the problems of low efficiency and feedback delay in traditional Buck converters under high voltage differential are solved, achieving high efficiency, high power density and fast response buck conversion, which is suitable for scenarios such as data centers and GPUs.

CN121813857APending Publication Date: 2026-04-07GUANGZHOU UNIVERSITY
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-01-07
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

Traditional Buck converters are inefficient under high voltage differential, have high switching losses, and limited feedback loop bandwidth, making it difficult to meet the fast dynamic load requirements of modern processors. Furthermore, existing topologies are complex, bulky, and costly.

Method used

A buck converter using a combination of switched capacitor network and single inductor is employed. The input voltage is divided by the switched capacitor network, a low-voltage MOSFET switch is used, and a load transient compensation circuit is combined to quickly respond to load current surges.

Benefits of technology

It achieves high efficiency and high power density, responds quickly to transient load changes, simplifies system structure, reduces switching losses and feedback delay, and is suitable for dynamic load scenarios such as data center CPUs and GPUs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of switching power supplies, and provides a single-inductor hybrid buck converter of a switched capacitor and a load transient compensation circuit thereof, and the converter comprises a power level circuit which comprises an inductor and a switched capacitor network; the switched capacitor network comprises at least two stages of switched capacitor units which are connected in series between an input voltage end and a reference ground, and each stage of switched capacitor unit comprises a first switching tube, a second switching tube and a flying capacitor which are connected in series; the inductor is connected between the lowest voltage output node of the switched capacitor network and the voltage output end of the converter; and the control circuit is used for controlling the switching tubes in each stage of switched capacitor unit to be switched on alternately, so that the switched capacitor network performs voltage division on the input voltage and provides a charging and discharging path for the inductor. The switched capacitor network voltage division is combined with the self-powered path of the level shifter, so that the system structure is simplified while the voltage stress of the power device is reduced.
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Description

Technical Field

[0001] This invention belongs to the field of switching power supply technology, and particularly relates to a single-inductor hybrid buck converter with switched capacitor and its load transient compensation circuit. Background Technology

[0002] With the rapid development of high-performance computing, artificial intelligence, and data centers, the operating voltage of core processors is constantly decreasing (to below 1V), while the power supply bus voltage is usually maintained at 12V. This results in an extremely high buck ratio (e.g., from 12V to 1V) for the power supply architecture. Traditional Buck converters operate under this high voltage difference, resulting in a very small duty cycle, high switching losses, and severe reverse recovery problems with freewheeling diodes or synchronous rectifiers, leading to overall low efficiency. To achieve a high buck ratio, existing technologies often employ two-stage or multi-stage cascaded DC-DC converters or coupled inductor topologies. However, these solutions often require multiple inductors, increasing system size, cost, and design complexity, which is not conducive to achieving high power density.

[0003] Furthermore, traditional voltage-mode control converters have limited feedback loop bandwidth. When the load current undergoes drastic changes, the output voltage fluctuates significantly and has a long recovery time, making it difficult to meet the demands of modern processors with their rapid dynamic loads. Additionally, driving the high-voltage side switch typically requires additional bootstrap circuitry or an isolated power supply, which increases the complexity and reliability of the system design.

[0004] Therefore, there is an urgent need for a buck converter topology and control method that can achieve high efficiency, high power density, ultra-fast transient response, and a simple system structure under high differential input. Summary of the Invention

[0005] In view of the above-mentioned deficiencies of the prior art, the present invention proposes a single-inductor hybrid buck converter with switched capacitors. The technical solution designed by the present invention includes: A power stage circuit includes an inductor and a switched capacitor network; the switched capacitor network includes at least two stages of switched capacitor units connected in series between the input voltage terminal and a reference ground, each stage of the switched capacitor unit including a first switch transistor, a second switch transistor, and a flying capacitor connected in series; the inductor is connected between the lowest voltage output node of the switched capacitor network and the voltage output terminal of the converter; The control circuit is used to control the switching transistors in each stage of the switched capacitor unit to conduct alternately, so that the switched capacitor network divides the input voltage and provides a charging and discharging path for the inductor.

[0006] Preferably, the switched capacitor network includes a three-stage switched capacitor unit; The series intermediate node of the first and second switching transistors of the first-stage unit is defined as the first intermediate node, and the flying capacitor of the first-stage unit is connected between the first intermediate node and the series intermediate node of the second-stage unit. The flying capacitor of the second-stage unit is connected between the series intermediate node of the second-stage unit and the series intermediate node of the third-stage unit. The inductor is connected between the first intermediate node and the voltage output terminal.

[0007] Preferably, the switched capacitor network further includes a first DC capacitor and a second DC capacitor; The first DC capacitor is connected between the series intermediate node of the second-stage unit and the reference ground; The second DC capacitor is connected between the series intermediate node of the third-stage unit and the reference ground.

[0008] Preferably, the control circuit includes a level shifter for converting a pulse width modulation signal in the first voltage domain into a drive signal in the second voltage domain to drive the high-side switching transistor. The high-potential and low-potential operating power supplies of the level shifter are provided by at least one intermediate node voltage generated in the switched capacitor network.

[0009] Preferably, the level shifter includes: The pulse current generation module is used to generate transient pulse current in response to changes in the input signal; A current mirror module is used to mirror the transient pulse current; A cross-coupled latch module is used to connect to the output node of the current mirror module to accelerate and lock the output state.

[0010] Preferably, the control circuit is a voltage-mode control circuit, including an error amplifier, a comparator, and a logic control circuit.

[0011] In addition, this invention also proposes a load transient compensation circuit for a switched-capacitor single-inductor hybrid buck converter, comprising: The detection unit is configured to monitor the voltage at the voltage output terminal and output a trigger signal when the voltage deviates from a preset steady-state window; The compensation current generation unit, in response to the trigger signal, generates and injects or extracts a compensation current that decays over time into the voltage output terminal.

[0012] Beneficial effects: 1. This application uses a switched capacitor network to perform a stepped voltage division of the high voltage input, so that each power switch only bears a portion of the input voltage, thereby allowing the use of low-voltage, low-on-resistance MOSFETs, significantly reducing switching losses and conduction losses, and improving conversion efficiency.

[0013] 2. This application uses only one inductor in the entire power stage, which significantly improves power density and reduces system size and cost compared to traditional multi-stage cascaded or multi-inductor schemes.

[0014] 3. This application integrates an independent load transient compensation circuit, which can quickly inject or extract an exponentially decaying compensation current into the output terminal when abnormal fluctuations in the output voltage are detected. Before the voltage feedback control loop takes effect, it actively offsets the impact of sudden changes in load current, thereby effectively suppressing overshoot and undershoot of the output voltage and greatly shortening the recovery time. It is particularly suitable for dynamic load scenarios such as CPUs and GPUs in data centers. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall structure of a buck converter according to a preferred embodiment of the present invention; Figure 2 This is a schematic diagram of the phase operation of a buck converter according to a preferred embodiment of the present invention; Figure 3 This is a schematic diagram of a level shifter circuit structure according to a preferred embodiment of the present invention; Figure 4 This is a schematic diagram illustrating the working principle of a transient compensation circuit according to a preferred embodiment of the present invention; Figure 5 This is a schematic diagram of the overall layout of a buck converter according to a preferred embodiment of the present invention. Detailed Implementation

[0016] The embodiments of the present invention will be described in detail below. The embodiments described below are implemented based on the technical solution of the present invention, and detailed implementation methods and specific operation processes are given. However, the protection scope of the present invention is not limited to the embodiments described below.

[0017] This invention designs a single-inductor hybrid buck converter with switched capacitors, the technical solution of which is as follows: Figure 1-5 As shown, it specifically includes: The power stage circuit includes an inductor (L) and a switched capacitor network. The switched capacitor network includes at least two stages of switched capacitor units connected in series between the input voltage terminal (VIN) and the reference ground. Each stage of the switched capacitor unit includes a first switch (S1, S3, S5), a second switch (S2, S4, S6), and a flying capacitor connected in series. The inductor (L) is connected between the lowest voltage output node of the switched capacitor network and the voltage output terminal (VOUT) of the converter. The control circuit is used to control the switching transistors in each stage of the switched capacitor unit to conduct alternately, so that the switched capacitor network divides the input voltage and provides a charging and discharging path for the inductor (L).

[0018] Specifically, in a preferred embodiment, the switched capacitor network includes a three-stage switched capacitor unit (S1-S6) and employs two-phase timing control (φ1, φ2). In phase φ1, switches S2, S4, and S6 are turned on, and S1, S3, and S5 are turned off. The input voltage (VIN) charges the inductor (L) and flying capacitor through the switched capacitor network. In phase φ2, switches S1, S3, and S5 are turned on, and S2, S4, and S6 are turned off. The inductor (L) discharges through the freewheeling current of the low-side switch, and the flying capacitor transfers energy to the intermediate DC capacitor. Based on the volt-second balance principle of the inductor (L), the steady-state output voltage satisfies VOUT=(VIN / 3)*D, where D is the duty cycle. The maximum voltage stress borne by each power switch (S1-S6) is only 1 / 3 of the input voltage VIN (e.g., when VIN=12V, the stress is 4V), thereby allowing the use of low-voltage, high-performance switching devices to improve efficiency.

[0019] In addition, the control circuit includes a voltage-mode control loop and a level shifter. The voltage-mode control loop includes an error amplifier, a comparator, and logic control circuitry, which generates a pulse-width modulation (PWM) signal by comparing the output voltage (VOUT) feedback with a reference voltage (VREF). The level shifter is used to convert the low-voltage domain (e.g., 0-5V) PWM signal generated by the controller into a high-voltage domain drive signal required to drive the high-voltage side switching transistor. Its high-potential operating power supply (VH) and low-potential operating power supply (VL) are directly provided by the intermediate node voltage (e.g., the voltage at node Y) generated by the switched capacitor network during steady-state operation, without the need for an external bootstrap circuit. Specifically, the level shifter may include: a pulse current generation module that generates transient pulse current in response to input signal transitions; a current mirror module for mirroring the transient pulse current; and a cross-coupled latch module connected to the output node of the current mirror module, which uses positive feedback to accelerate state switching and lock the output state, achieving nanosecond-level switching speeds while maintaining extremely low static power consumption.

[0020] Preferably, the switched capacitor network includes a three-stage switched capacitor unit; The series intermediate node of the first switch (S1) and the second switch (S2) of the first-stage unit is defined as the first intermediate node (X). The flying capacitor (CF1) of the first-stage unit is connected between the first intermediate node (X) and the series intermediate node (Y) of the second-stage unit. The flying capacitor (CF2) of the second-stage unit is connected between the series intermediate node (Y) of the second-stage unit and the series intermediate node (Z) of the third-stage unit. The inductor (L) is connected between the first intermediate node (X) and the voltage output terminal (VOUT).

[0021] Preferably, the switched capacitor network further includes a first DC capacitor (CDC1) and a second DC capacitor (CDC2). The first DC capacitor (CDC1) is connected between the series intermediate node (Y) of the second-stage cell and the reference ground; The second DC capacitor (CDC2) is connected between the series intermediate node (Z) of the third-level cell and the reference ground.

[0022] Specifically, in the embodiment of the three-stage switched capacitor unit, through two-phase timing control, the voltage VDC1 across the first DC capacitor (CDC1) can be approximately VIN / 3 and the voltage VDC2 across the second DC capacitor (CDC2) can be approximately 2*VIN / 3 in steady state. Simultaneously, the voltages of the two flying capacitors (CF1, CF2) are also stabilized at VIN / 3 and 2*VIN / 3, respectively. These intermediate node voltages are not only used for voltage division but also provide a reliable operating power supply for circuits such as level shifters.

[0023] Preferably, the control circuit includes a level shifter for converting a pulse width modulation signal in the first voltage domain into a drive signal in the second voltage domain to drive the high-side switching transistor. The high-potential operating power supply (VH) and low-potential operating power supply (VL) of the level shifter are provided by at least one intermediate node voltage generated in the switched capacitor network.

[0024] Preferably, the level shifter includes: The pulse current generation module is used to generate transient pulse current in response to changes in the input signal; A current mirror module is used to mirror transient pulse currents; A cross-coupled latch module is used to connect to the output node of the current mirror module to accelerate and lock the output state.

[0025] Preferably, the control circuit is a voltage-mode control circuit, including an error amplifier, a comparator, and a logic control circuit.

[0026] In addition, this invention also proposes a load transient compensation circuit for a switched-capacitor single-inductor hybrid buck converter, comprising: The detection unit is configured to monitor the voltage at the voltage output terminal (VOUT) and output a trigger signal when the voltage deviates from a preset steady-state window; The compensation current generation unit, in response to a trigger signal, generates or extracts a compensation current that decays over time to the voltage output terminal (VOUT).

[0027] Specifically, the detection unit may include a window comparator, which presets a steady-state window (e.g., VOUT ± 50mV) defined by a first reference voltage (VR1) and a second reference voltage (VR2). The compensation current generation unit includes an RC charging and discharging circuit and a controlled switching transistor. When a sudden increase in load causes the output voltage (VOUT) to drop below VR1, a trigger signal (VCP) controls the switching transistor (M2) to operate, causing the capacitor (C1) in the RC network to discharge rapidly, thereby driving a pull-up power transistor (MP) to turn on momentarily, injecting a large pull-up compensation current (IPU) into the output terminal (VOUT); subsequently, the trigger signal (VCP) resets, the switching transistor (M2) turns off, and the gate of the pull-up power transistor (MP) is slowly charged through a resistor (R1), causing the injected compensation current (IPU) to decay exponentially. When a sudden decrease in load causes VOUT to rise and exceed VR2, a control signal (VCN) for another path is triggered, generating an exponentially decaying pull-down compensation current (IPD) to draw current from the output terminal (VOUT). This compensation circuit is triggered and operates only during transient events and is completely shut down when the output voltage (VOUT) is within the steady-state window, thus consuming no static power. Its response speed is much faster than the voltage-mode control main loop, quickly offsetting the effects of sudden load current changes before the loop adjusts the inductor current, effectively suppressing output voltage overshoot and undershoot, and accelerating system recovery to stability.

[0028] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A single-inductor hybrid buck converter with switched capacitors, characterized in that, include: A power stage circuit includes an inductor and a switched capacitor network; the switched capacitor network includes at least two stages of switched capacitor units connected in series between the input voltage terminal and a reference ground, each stage of the switched capacitor unit including a first switch transistor, a second switch transistor, and a flying capacitor connected in series; the inductor is connected between the lowest voltage output node of the switched capacitor network and the voltage output terminal of the converter; The control circuit is used to control the switching transistors in each stage of the switched capacitor unit to conduct alternately, so that the switched capacitor network divides the input voltage and provides a charging and discharging path for the inductor.

2. The single-inductor hybrid buck converter with switched capacitors according to claim 1, characterized in that, The switched capacitor network includes a three-stage switched capacitor unit; The series intermediate node of the first and second switching transistors of the first-stage unit is defined as the first intermediate node, and the flying capacitor of the first-stage unit is connected between the first intermediate node and the series intermediate node of the second-stage unit. The flying capacitor of the second-stage unit is connected between the series intermediate node of the second-stage unit and the series intermediate node of the third-stage unit. The inductor is connected between the first intermediate node and the voltage output terminal.

3. A single-inductor hybrid buck converter with switched capacitors according to claim 2, characterized in that, The switched capacitor network also includes a first DC capacitor and a second DC capacitor; The first DC capacitor is connected between the series intermediate node of the second-stage unit and the reference ground; The second DC capacitor is connected between the series intermediate node of the third-stage unit and the reference ground.

4. A single-inductor hybrid buck converter with switched capacitors according to claim 1, characterized in that, The control circuit includes a level shifter for converting a pulse width modulation signal in the first voltage domain into a drive signal in the second voltage domain to drive the high-side switching transistor. The high-potential and low-potential operating power supplies of the level shifter are provided by at least one intermediate node voltage generated in the switched capacitor network.

5. A single-inductor hybrid buck converter with switched capacitors according to claim 4, characterized in that, The level shifter includes: The pulse current generation module is used to generate transient pulse current in response to changes in the input signal; A current mirror module is used to mirror the transient pulse current; A cross-coupled latch module is used to connect to the output node of the current mirror module to accelerate and lock the output state.

6. A single-inductor hybrid buck converter with switched capacitors according to claim 1, characterized in that, The control circuit is a voltage-mode control circuit, including an error amplifier, a comparator, and a logic control circuit.

7. A load transient compensation circuit for a switched-capacitor single-inductor hybrid buck converter, used to perform the switched-capacitor single-inductor hybrid buck converter as described in any one of claims 1-6, comprising: The detection unit is configured to monitor the voltage at the voltage output terminal and output a trigger signal when the voltage deviates from a preset steady-state window; The compensation current generation unit, in response to the trigger signal, generates and injects or extracts a compensation current that decays over time into the voltage output terminal.