Bus delay measuring device and bus delay measuring method

Abstract

The invention discloses a bus delay measurement device and a bus delay measurement method, and belongs to the technical field of bus communication. The bus delay measurement device is connected with a port of a node to be tested in a bus communication network, and comprises a signal generation module used for generating a plurality of test signals; the test signal has a corresponding identifier, and the value of each bit corresponds to the level of each test frame of the test signal. And the bus interface module is used for sending the plurality of test signals to the bus communication network and respectively receiving the plurality of test signals returned by the bus communication network. The identification location module may analyze the received return signal and identify an identifier bit represented by each test frame. The clock measurement module can measure the time difference of each test frame from the sending moment to the receiving moment. The delay processing module can carry out normalization processing on multi-frame delay data, so that high-precision and real-time measurement of bus delay is realized, and the coverage range and the accuracy of measurement signals are improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of bus communication, and particularly relates to a bus delay measurement device and a bus delay measurement method. BACKGROUND

[0002] CANFD (Controller Area Network with Flexible Data-rate) bus is widely used due to its high bandwidth, low delay and other characteristics. However, with the increase in the number of nodes and the improvement in the communication rate, the inconsistency of the communication delay between nodes gradually becomes a key factor affecting the stability and real-time performance of the system. In the prior art, the delay measurement mechanism provided by the CANFD controller is usually relied on, but this method is limited by the internal clock accuracy of the controller and the complexity of the communication path, and it is difficult to achieve high-precision and real-time delay measurement. Therefore, there is an urgent need for a CANFD bus delay measurement method that can achieve high-precision measurement without affecting normal communication. SUMMARY

[0003] The purpose of the embodiments of the application is to provide a bus delay measurement device and a bus delay measurement method, which can solve the problem that the prior art is difficult to achieve high-precision and real-time bus delay measurement.

[0004] In a first aspect, the embodiments of the application provide a bus delay measurement device, which is connected to a port of a node to be tested in a bus communication network, and comprises: a signal generation module configured to generate a plurality of test signals; the test signals have corresponding identifiers, and the identifiers comprise a plurality of bits, and the value of each bit corresponds to the level of each test frame of the test signals; a bus interface module configured to send the plurality of test signals to the bus communication network and receive the plurality of test signals returned by the bus communication network respectively; an identifier positioning module configured to determine the bit of the identifier corresponding to each test frame of the test signals returned by the bus communication network; a clock measurement module configured to determine the delay time of each test frame of the test signals according to the bit of the identifier corresponding to each test frame of the test signals; a delay processing module configured to perform normalization processing on the delay time of each test frame of the plurality of test signals to obtain delay information of the node to be tested.

[0005] Optionally, the bus interface module is further configured to send the delay information of the node to be tested to a controller of the bus communication network, so that the controller compensates for the delay of the node to be tested according to the delay information.

[0006] Optionally, the signal generation module is further configured to determine the load rate of the bus communication network and determine the generation frequency of the test frames of the test signal based on the load rate of the bus communication network.

[0007] Optionally, the signal generation module is configured to increase the generation frequency of test frames of the test signal when the load rate of the bus communication network is less than a first preset threshold; and to stop generating the test signal when the load rate of the bus communication network is greater than a second preset threshold; wherein the first preset threshold is less than the second preset threshold.

[0008] Optionally, the delay processing module is further configured to determine the propagation path difference of the delay information of the node under test based on the plurality of test signals; and to perform error calibration on the delay information of the node under test based on the propagation path difference of the delay information of the node under test.

[0009] Secondly, embodiments of this application provide a bus delay measurement method, applied to the aforementioned bus delay measurement device, the method comprising: Multiple test signals are generated by the signal generation module; each test signal has a corresponding identifier, which includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal. The bus interface module sends the multiple test signals to the bus communication network and receives the multiple test signals returned by the bus communication network. The identifier positioning module determines the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; The clock measurement module determines the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame of the test signal. The delay processing module normalizes the delay time of each test frame of the multiple test signals to obtain the delay information of the node to be tested.

[0010] Optionally, the method further includes: The delay information of the node under test is sent to the controller of the bus communication network through the bus interface module, so that the controller can perform delay compensation on the node under test according to the delay information.

[0011] Optionally, the method further includes: The load rate of the bus communication network is determined by the signal generation module; the generation frequency of the test frames of the test signal is determined based on the load rate of the bus communication network.

[0012] Optionally, determining the generation frequency of the test frames for the test signal based on the load rate of the bus communication network includes: If the load rate of the bus communication network is less than a first preset threshold, increase the generation frequency of the test frames of the test signal; if the load rate of the bus communication network is greater than a second preset threshold, stop generating the test signal; the first preset threshold is less than the second preset threshold.

[0013] Optionally, the method further includes: The delay processing module determines the propagation path differences of the delay information of the node under test based on the multiple test signals; and performs error calibration on the delay information of the node under test based on the propagation path differences of the delay information of the node under test.

[0014] The embodiments of this application have the following advantages: In this embodiment, the bus delay measurement device is connected to the port of the node under test in the bus communication network. The bus delay measurement device includes: a signal generation module for generating multiple test signals; each test signal has a corresponding identifier, which includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal; the identifier is a binary number, and each bit corresponds to the level state of a test frame, thereby realizing a test signal with its own identifier, which can complete the identification without additional timestamps or protocol fields. A bus interface module for sending multiple test signals to the bus communication network and receiving multiple test signals returned by the bus communication network; the bus interface module acts as a bridge between the physical layer and the data link layer, responsible for injecting test signals into the bus and listening to the feedback response. An identifier positioning module for determining the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; the identifier positioning module can analyze the received return signal, identify the identifier bits represented by each test frame, and locate the starting position of each test frame on the time axis. The clock measurement module determines the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame. The clock measurement module can measure the time difference from the transmission time to the reception time of each test frame based on a local high-precision clock. The delay processing module normalizes the delay time of each test frame of multiple test signals to obtain the delay information of the node under test. The delay processing module can normalize multi-frame delay data to extract the true delay characteristics of the node under test. The bus delay measurement device in this embodiment achieves active measurement by periodically injecting test frames, realizing high-precision, real-time measurement of bus delay. By using the level of the test frame corresponding to the test signal identifier, the coverage and accuracy of the measurement signal can be improved. Attached Figure Description

[0015] Figure 1 This is a structural block diagram of a bus delay measurement device according to an embodiment of the present invention; Figure 2 This is a flowchart of the steps of a bus delay measurement method according to an embodiment of the present invention.

[0016] Explanation of reference numerals in the attached figures: Signal generation module 11, bus interface module 12, identification and positioning module 13, clock measurement module 14, and delay processing module 15. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0018] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character "=" generally indicates that the preceding and following objects are in an "or" relationship.

[0019] The following description, in conjunction with the accompanying drawings, details a bus delay measurement device and a bus delay measurement method provided in this application through specific embodiments and application scenarios.

[0020] Reference Figure 1 This diagram illustrates a structural block diagram of a bus delay measurement device according to an embodiment of this application. The bus delay measurement device is connected to the port of a node to be tested (not shown) in a bus communication network. The bus delay measurement device includes: The signal generation module 11 is used to generate multiple test signals; each test signal has a corresponding identifier, the identifier includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal; The bus interface module 12 is used to send the plurality of test signals to the bus communication network and to receive the plurality of test signals returned by the bus communication network respectively. The identification and positioning module 13 is used to determine the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; The clock measurement module 14 is used to determine the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame of the test signal; The delay processing module 15 is used to normalize the delay time of each test frame of the plurality of test signals to obtain the delay information of the node to be tested.

[0021] In this embodiment, the signal generation module can generate a set of test signals with identifiers (IDs). Each test signal consists of multiple test frames. The identifier is a binary number, where each bit corresponds to the level state of a test frame, for example: 1 = high level, 0 = low level. For example, if the identifier is 1011, the four test frames sent are sequentially: high → low → high → high. This method realizes test signals with self-carrying identifiers, achieving identification without additional timestamps or protocol fields. The ID field of the test frame can be a series of toggling signals with specific patterns, including continuous bit toggling and truly random toggling, designed to stimulate various signal edge transitions on the bus to comprehensively measure delays under different signal modes. Continuous bit toggling: for example, 010101 (single bit alternation), 110011 (double bit alternation), 111000 (triple bit alternation), etc., covering rising and falling edges from single bits to multiple bits. Truly random toggling: generates completely random frame IDs to simulate random data patterns in real communication and capture edge delays of randomly spaced bits.

[0022] The bus interface module acts as a bridge between the physical layer and the data link layer, responsible for injecting test signals into the bus and listening for feedback responses. The bus interface module provides a standard CAN FD bus interface, with TX for transmitting and RX for receiving. Its electrical characteristics and connection methods are completely consistent with existing nodes in the bus communication network, allowing for plug-and-play functionality. In practical applications, the module can be directly replaced at pre-reserved network nodes or nodes to be measured, achieving seamless integration.

[0023] The identifier positioning module can analyze the received return signals and identify the identifier bits represented by each test frame. Specifically, it receives the return signal sequence (e.g., high → low → high → high), maps it to a binary sequence (1 → 0 → 1 → 1), matches it against a preset identifier template, confirms whether it is the expected response, and locates the starting position of each test frame on the time axis.

[0024] The clock measurement module can measure the time difference between the transmission and reception of each test frame based on a local high-precision clock. The module integrates a high-precision clock circuit, generating nanosecond-level timestamps, providing a fundamental guarantee for delay measurement. Utilizing the CAN FD protocol's characteristic that "information sent by a node is also received by itself," the clock measurement module transmits test frames through its TX port and simultaneously receives them from its RX port, thereby accurately capturing the complete loop delay of the signal from TX to RX.

[0025] The delay processing module can normalize multi-frame delay data to extract the true delay characteristics of the node under test. Common methods include averaging, medianing, or weighted averaging to obtain a stable and reliable normalized delay value.

[0026] In this embodiment, the bus delay measurement device is connected to the port of the node under test in the bus communication network. The bus delay measurement device includes: a signal generation module for generating multiple test signals; each test signal has a corresponding identifier, which includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal; the identifier is a binary number, and each bit corresponds to the level state of a test frame, thereby realizing a test signal with its own identifier, which can complete the identification without additional timestamps or protocol fields. A bus interface module for sending multiple test signals to the bus communication network and receiving multiple test signals returned by the bus communication network; the bus interface module acts as a bridge between the physical layer and the data link layer, responsible for injecting test signals into the bus and listening to the feedback response. An identifier positioning module for determining the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; the identifier positioning module can analyze the received return signal, identify the identifier bits represented by each test frame, and locate the starting position of each test frame on the time axis. The clock measurement module determines the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame. The clock measurement module can measure the time difference from the transmission time to the reception time of each test frame based on a local high-precision clock. The delay processing module normalizes the delay time of each test frame of multiple test signals to obtain the delay information of the node under test. The delay processing module can normalize multi-frame delay data to extract the true delay characteristics of the node under test. The bus delay measurement device in this embodiment achieves active measurement by periodically injecting test frames, realizing high-precision, real-time measurement of bus delay. By using the level of the test frame corresponding to the test signal identifier, the coverage and accuracy of the measurement signal can be improved.

[0027] In one embodiment, the bus interface module 12 is further configured to send the delay information of the node under test to the controller of the bus communication network, so that the controller can perform delay compensation on the node under test according to the delay information.

[0028] In this embodiment, after completing the delay measurement, the bus interface module can encapsulate the delay information of the node under test into a standard message and send it to the controller of the bus communication network. The controller then uses this message to perform delay compensation on the node. The delay information can be understood as a configuration parameter of the communication node. Subsequently, the controller of the communication network sends the delay information back to the communication node to complete the configuration. The delay information is typically in the nanosecond range. This embodiment proposes a closed-loop architecture for measurement, reporting, and compensation, which allows the traditional static configuration communication mode to evolve into a dynamically sensing and autonomously adjusting intelligent system, significantly improving the system's real-time performance, robustness, and maintainability.

[0029] In one embodiment, the signal generation module 11 is further configured to determine the load rate of the bus communication network and determine the generation frequency of the test frames of the test signal based on the load rate of the bus communication network.

[0030] In this embodiment, before generating the test signal, the signal generation module can sense the current load rate of the bus communication network and dynamically adjust the transmission frequency of the test frame accordingly. The signal generation module can dynamically adjust the injection frequency of the test frame and the toggle signal of the test frame ID based on the current bus load status. For example, when the bus load is high, the injection frequency of the test frame can be reduced to avoid affecting normal communication; when the load is low, the test density can be increased, for example, by increasing the number of test frames and using more diverse ID toggle signals to obtain more comprehensive delay information.

[0031] In one embodiment, the signal generation module 11 is configured to increase the generation frequency of test frames of the test signal when the load rate of the bus communication network is less than a first preset threshold; and to stop generating the test signal when the load rate of the bus communication network is greater than a second preset threshold; wherein the first preset threshold is less than the second preset threshold.

[0032] In this embodiment, the load rate can be calculated based on the baud rate, the number of test frames, and the length. For example, the first preset threshold can be 30%, and the second preset threshold can be 50%. Those skilled in the art can set the first and second preset thresholds to other appropriate values ​​based on the principles of this application, and this application does not impose any limitations on this. If the load rate is <30%, it is considered lightly loaded, and test frames can be sent at a high frequency to increase the sampling rate and obtain more accurate statistical delay. If the load rate is 30% to 50%, it is considered moderately loaded, and test frames can be sent at a medium frequency to balance measurement accuracy and interference levels. If the load rate is >90%, it is considered overloaded, and testing can be paused to avoid exacerbating congestion, preventing the triggering of erroneous frames or delay distortion, and protecting system stability. This embodiment can avoid collisions, retransmissions, or queuing delays caused by test signals under high load, ensuring the normal operation of the original system, and is suitable for complex networks with constantly changing operating states.

[0033] In one embodiment, the delay processing module 15 is further configured to determine the propagation path difference of the delay information of the node under test based on the plurality of test signals; and to perform error calibration on the delay information of the node under test based on the propagation path difference of the delay information of the node under test.

[0034] In this embodiment, the delay processing module can not only normalize the delay of multiple test signals, but also further analyze the different physical or logical propagation paths that these signals may experience in the bus network, identify the path difference delay caused by this, and perform error calibration on the final node delay information based on this difference to eliminate the measurement deviation caused by path asymmetry.

[0035] Generally, the longer the measured delay of a communication network, the farther the path from node TX to RX. This application allows for multiple measurements at the same node to confirm that multiple results are approximate, thus eliminating errors. This application can also perform multi-point measurements, connecting the measurement module sequentially to multiple preset node locations in the network for repeated measurements. By combining the differences in propagation paths caused by the different physical locations of each node on the bus, statistical analysis is performed on the large amount of collected measurement data. Through statistical analysis, inherent errors in the measurement system itself can be identified and calibrated, thereby improving the absolute accuracy of the overall measurement results.

[0036] Reference Figure 2 This document illustrates a flowchart of a bus delay measurement method according to an embodiment of this application, applied to the aforementioned bus delay measurement device. The method specifically includes the following steps: Step 201: Generate multiple test signals through the signal generation module; each test signal has a corresponding identifier, the identifier includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal; In this embodiment, the signal generation module can generate a set of test signals with identifiers (IDs). Each test signal consists of multiple test frames. The identifier is a binary number, where each bit corresponds to the level state of a test frame, for example: 1 = high level, 0 = low level. For example, if the identifier is 1011, the four test frames sent are sequentially: high → low → high → high. This method realizes test signals with self-carrying identifiers, achieving identification without additional timestamps or protocol fields. The ID field of the test frame can be a series of toggling signals with specific patterns, including continuous bit toggling and truly random toggling, designed to stimulate various signal edge transitions on the bus to comprehensively measure delays under different signal modes. Continuous bit toggling: for example, 010101 (single bit alternation), 110011 (double bit alternation), 111000 (triple bit alternation), etc., covering rising and falling edges from single bits to multiple bits. Truly random toggling: generates completely random frame IDs to simulate random data patterns in real communication and capture edge delays of randomly spaced bits.

[0037] Step 202: Send the plurality of test signals to the bus communication network through the bus interface module, and receive the plurality of test signals returned by the bus communication network respectively; In this embodiment, the bus interface module acts as a bridge between the physical layer and the data link layer, responsible for injecting test signals into the bus and listening for feedback responses. The bus interface module can provide a standard CAN FD bus interface, with TX for transmitting and RX for receiving. Its electrical characteristics and connection methods are completely consistent with the existing nodes in the bus communication network, thus enabling plug-and-play functionality. In practical applications, the module can be directly replaced at the network's reserved or measured node locations, achieving seamless embedding.

[0038] Step 203: The identifier positioning module determines the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; In this embodiment, the identifier positioning module can analyze the received return signal and identify the identifier bit represented by each test frame. Specifically, it receives the return signal sequence (e.g., high → low → high → high), maps it to a binary sequence (1 → 0 → 1 → 1), matches it against a preset identifier template, confirms whether it is the expected response, and locates the starting position of each test frame on the time axis.

[0039] Step 204: The clock measurement module determines the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame of the test signal. In this embodiment, the clock measurement module can measure the time difference between the transmission and reception times of each test frame based on a local high-precision clock. The clock measurement module integrates a high-precision clock circuit, capable of generating nanosecond-level timestamps, providing a fundamental guarantee for delay measurement. Utilizing the CAN FD protocol's characteristic that "information sent by a node is also received by itself," the clock measurement module transmits test frames through its TX port and simultaneously receives the frames from its RX port, thereby accurately capturing the complete loop delay of the signal from TX to RX.

[0040] Step 205: The delay time of each test frame of the multiple test signals is normalized by the delay processing module to obtain the delay information of the node to be tested.

[0041] In this embodiment, the delay processing module can normalize multi-frame delay data to extract the true delay characteristics of the node under test. Common methods include averaging, medianing, or weighted averaging to obtain a stable and reliable normalized delay value.

[0042] In one embodiment, the method further includes: sending the delay information of the node under test to the controller of the bus communication network through the bus interface module, so that the controller performs delay compensation on the node under test according to the delay information.

[0043] In this embodiment, after completing the delay measurement, the bus interface module can encapsulate the delay information of the node under test into a standard message and send it to the controller of the bus communication network. The controller then performs delay compensation for the node accordingly. For example, if the measured average response delay of a node is 120μs, while the system expectation is 100μs, the controller can initiate the request 20μs earlier when scheduling its data acquisition task, thereby ensuring that the overall control cycle remains unchanged. This embodiment proposes a closed-loop architecture of measurement, reporting, and compensation, which allows the traditional static configuration communication mode to evolve into a dynamic sensing + autonomous adjustment intelligent system, significantly improving the system's real-time performance, robustness, and maintainability.

[0044] In one embodiment, the method further includes: determining the load rate of the bus communication network through the signal generation module; and determining the generation frequency of the test frames of the test signal based on the load rate of the bus communication network.

[0045] In this embodiment, before generating the test signal, the signal generation module can sense the current load rate of the bus communication network and dynamically adjust the transmission frequency of the test frame accordingly. The signal generation module can dynamically adjust the injection frequency of the test frame and the toggle signal of the test frame ID based on the current bus load status. For example, when the bus load is high, the injection frequency of the test frame can be reduced to avoid affecting normal communication; when the load is low, the test density can be increased, for example, by increasing the number of test frames and using more diverse ID toggle signals to obtain more comprehensive delay information.

[0046] In one embodiment, determining the generation frequency of the test frame of the test signal based on the load rate of the bus communication network includes: increasing the generation frequency of the test frame of the test signal when the load rate of the bus communication network is less than a first preset threshold; and stopping the generation of the test signal when the load rate of the bus communication network is greater than a second preset threshold; wherein the first preset threshold is less than the second preset threshold.

[0047] In this embodiment, the load rate can be calculated based on the baud rate, the number of test frames, and the length. For example, the first preset threshold can be 30%, and the second preset threshold can be 50%. Those skilled in the art can set the first and second preset thresholds to other appropriate values ​​based on the principles of this application, and this application does not impose any limitations on this. If the load rate is <30%, it is considered lightly loaded, and test frames can be sent at a high frequency to increase the sampling rate and obtain more accurate statistical delay. If the load rate is 30% to 50%, it is considered moderately loaded, and test frames can be sent at a medium frequency to balance measurement accuracy and interference levels. If the load rate is >90%, it is considered overloaded, and testing can be paused to avoid exacerbating congestion, preventing the triggering of erroneous frames or delay distortion, and protecting system stability. This embodiment can avoid collisions, retransmissions, or queuing delays caused by test signals under high load, ensuring the normal operation of the original system, and is suitable for complex networks with constantly changing operating states.

[0048] In one embodiment, the method further includes: determining the propagation path difference of the delay information of the node under test based on the plurality of test signals by the delay processing module; and performing error calibration on the delay information of the node under test based on the propagation path difference of the delay information of the node under test.

[0049] In this embodiment, the delay processing module can not only normalize the delay of multiple test signals, but also further analyze the different physical or logical propagation paths that these signals may experience in the bus network, identify the path difference delay caused by this, and perform error calibration on the final node delay information based on this difference to eliminate the measurement deviation caused by path asymmetry.

[0050] Generally, the longer the measured delay of a communication network, the farther the path from node TX to RX. This application allows for multiple measurements at the same node to confirm that multiple results are approximate, thus eliminating errors. This application can also perform multi-point measurements, connecting the measurement module sequentially to multiple preset node locations in the network for repeated measurements. By combining the differences in propagation paths caused by the different physical locations of each node on the bus, statistical analysis is performed on the large amount of collected measurement data. Through statistical analysis, inherent errors in the measurement system itself can be identified and calibrated, thereby improving the absolute accuracy of the overall measurement results.

[0051] In this embodiment, the bus delay measurement device is connected to the port of the node under test in the bus communication network. The bus delay measurement device includes: a signal generation module for generating multiple test signals; each test signal has a corresponding identifier, which includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal; the identifier is a binary number, and each bit corresponds to the level state of a test frame, thereby realizing a test signal with its own identifier, which can complete the identification without additional timestamps or protocol fields. A bus interface module for sending multiple test signals to the bus communication network and receiving multiple test signals returned by the bus communication network; the bus interface module acts as a bridge between the physical layer and the data link layer, responsible for injecting test signals into the bus and listening to the feedback response. An identifier positioning module for determining the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; the identifier positioning module can analyze the received return signal, identify the identifier bits represented by each test frame, and locate the starting position of each test frame on the time axis. The clock measurement module determines the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame. The clock measurement module can measure the time difference from the transmission time to the reception time of each test frame based on a local high-precision clock. The delay processing module normalizes the delay time of each test frame of multiple test signals to obtain the delay information of the node under test. The delay processing module can normalize multi-frame delay data to extract the true delay characteristics of the node under test. The bus delay measurement device in this embodiment achieves active measurement by periodically injecting test frames, realizing high-precision, real-time measurement of bus delay. By using the level of the test frame corresponding to the test signal identifier, the coverage and accuracy of the measurement signal can be improved.

[0052] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0053] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0054] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A bus delay measurement device, characterized in that, The bus delay measurement device is connected to the port of the node to be tested in the bus communication network, and the bus delay measurement device includes: A signal generation module is used to generate multiple test signals; each test signal has a corresponding identifier, the identifier includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal; A bus interface module is used to send the plurality of test signals to the bus communication network and to receive the plurality of test signals returned by the bus communication network. The identification and positioning module is used to determine the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; A clock measurement module is used to determine the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame of the test signal; The delay processing module is used to normalize the delay time of each test frame of the multiple test signals to obtain the delay information of the node to be tested.

2. The bus delay measurement device according to claim 1, characterized in that, The bus interface module is also used to send the delay information of the node under test to the controller of the bus communication network, so that the controller can perform delay compensation on the node under test according to the delay information.

3. The bus delay measurement device according to claim 1, characterized in that, The signal generation module is also used to determine the load rate of the bus communication network and to determine the generation frequency of the test frames of the test signal based on the load rate of the bus communication network.

4. The bus delay measurement device according to claim 3, characterized in that, The signal generation module is used to increase the generation frequency of test frames of the test signal when the load rate of the bus communication network is less than a first preset threshold; and to stop generating the test signal when the load rate of the bus communication network is greater than a second preset threshold; wherein the first preset threshold is less than the second preset threshold.

5. The bus delay measurement device according to claim 1, characterized in that, The delay processing module is further configured to determine the propagation path difference of the delay information of the node under test based on the multiple test signals; and to perform error calibration on the delay information of the node under test based on the propagation path difference of the delay information of the node under test.

6. A method for measuring bus delay, characterized in that, Applied to the bus delay measurement apparatus as described in any one of claims 1 to 5, the method comprises: Multiple test signals are generated by the signal generation module; each test signal has a corresponding identifier, which includes multiple bits, and the value of each bit corresponds to the level of each test frame of the test signal. The bus interface module sends the multiple test signals to the bus communication network and receives the multiple test signals returned by the bus communication network. The identifier positioning module determines the bits of the identifier corresponding to each test frame of the test signal returned by the bus communication network; The clock measurement module determines the delay time of each test frame of the test signal based on the bits of the identifier corresponding to each test frame of the test signal. The delay processing module normalizes the delay time of each test frame of the multiple test signals to obtain the delay information of the node to be tested.

7. The bus delay measurement method according to claim 6, characterized in that, The method further includes: The delay information of the node under test is sent to the controller of the bus communication network through the bus interface module, so that the controller can perform delay compensation on the node under test according to the delay information.

8. The bus delay measurement method according to claim 6, characterized in that, The method further includes: The load rate of the bus communication network is determined by the signal generation module; the generation frequency of the test frames of the test signal is determined based on the load rate of the bus communication network.

9. The bus delay measurement method according to claim 8, characterized in that, Determining the generation frequency of the test frames for the test signal based on the load rate of the bus communication network includes: If the load rate of the bus communication network is less than a first preset threshold, increase the generation frequency of the test frames of the test signal; if the load rate of the bus communication network is greater than a second preset threshold, stop generating the test signal; the first preset threshold is less than the second preset threshold.

10. The bus delay measurement method according to claim 6, characterized in that, The method further includes: The delay processing module determines the propagation path differences of the delay information of the node under test based on the multiple test signals; and performs error calibration on the delay information of the node under test based on the propagation path differences of the delay information of the node under test.

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