Decoding method and decoder

Abstract

The embodiment of the invention discloses a decoding method and a decoder. The decoding method specifically comprises the following steps: determining a syndrome of a first finite field according to a receiving codeword polynomial of a decoder of the communication system, and converting the syndrome of the first finite field into a syndrome of a second finite field; based on the syndrome of the second finite field, determining an error codeword polynomial of the second finite field, the error codeword polynomial being used for indicating an error value corresponding to an error symbol position in the receiving codeword polynomial relative to the coding codeword polynomial sent by the sending end; the error codeword polynomial of the second finite field is converted into an error codeword polynomial of the first finite field, and a decoded codeword polynomial is determined based on the received codeword polynomial and the error codeword polynomial of the first finite field. According to the embodiment, the decoding performance of the chip is improved, and meanwhile, composite domain calculation is used for replacing finite domain calculation so as to solve the problems that the energy consumption of the chip is too high and the area is too large when the decoding performance is improved.

Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of communication technology, and more specifically to decoding methods and decoders. Background Technology

[0002] With the increasing demand for high bandwidth and high speed in communication systems, a large number of codeword transmission errors are inevitable due to link interference. As an FEC (Forward Error Correction) codec, RS (Reed-Solomon) codec is widely used in high-speed communication systems, such as Ethernet and JEDEC, due to its powerful error correction capabilities, in order to reduce the system's SER (Symbol Error Rate) and BER (Bit Error Rate).

[0003] Using long codeword encoding and decoding will inevitably increase the transmission latency at the sending and receiving ends of the system. In order to shorten the overall system latency, it is necessary to increase the computational parallelism. However, multiplication and inversion operations in finite fields consume a lot of hardware resources. Therefore, increasing the computational parallelism will lead to an increase in hardware resource consumption. Summary of the Invention

[0004] Embodiments of this disclosure present decoding methods and decoders.

[0005] In a first aspect, embodiments of this disclosure provide a decoding method, comprising: determining a syndrome of a first finite field based on a received codeword polynomial of a decoder in a communication system, and converting the syndrome of the first finite field into a syndrome of a second finite field, wherein the first finite field is a non-composite field, and the second finite field is a composite field algebraically isomorphic to the first finite field; determining an error codeword polynomial of the second finite field based on the syndrome of the second finite field, wherein the error codeword polynomial is used to indicate the error value corresponding to the position of the erroneous symbol in the received codeword polynomial relative to the encoded codeword polynomial transmitted by the transmitting end; converting the error codeword polynomial of the second finite field into an error codeword polynomial of the first finite field, and determining a decoding codeword polynomial based on the received codeword polynomial and the error codeword polynomial of the first finite field.

[0006] In some embodiments, the first finite field is GF(2). 10 The second finite field is GF((2 5 ) 2 ).

[0007] In some embodiments, converting the syndrome of the first finite field into the syndrome of the second finite field includes: performing vector-matrix multiplication on the syndrome of the first finite field with an isomorphic mapping matrix on a per-symbol basis to obtain the syndrome of the second finite field, wherein the isomorphic mapping matrix maps the symbols and operation rules of the first finite field to the second finite field while maintaining the consistency of symbol correspondence and operation logic.

[0008] In some embodiments, transforming the error codeword polynomial of the second finite field into the error codeword polynomial of the first finite field includes: multiplying the error codeword polynomial of the second finite field by a vector matrix using an inverse transformation matrix on a per-symbol basis to obtain the error codeword polynomial of the first finite field, wherein the inverse transformation matrix is ​​the inverse of the isomorphic mapping matrix.

[0009] In some embodiments, determining the error codeword polynomial of the second finite field based on the syndrome of the second finite field includes: determining the error location polynomial and the error estimation polynomial of the second finite field based on the syndrome of the second finite field; determining the error location based on the error location polynomial of the second finite field; and determining the error codeword polynomial of the second finite field based on the error estimation polynomial and the error location.

[0010] In some embodiments, determining the error positioning polynomial and the error estimation polynomial of the second finite field based on the adjoint of the second finite field includes: determining the shortest linear recurrence relation of the adjoint of the second finite field as the error positioning polynomial of the second finite field using the Berlekamp-Massey algorithm; and determining the error estimation polynomial of the second finite field based on the adjoint of the second finite field and the error positioning polynomial of the second finite field.

[0011] In some embodiments, determining the error location polynomial and the error estimate polynomial of the second finite field based on the adjoint of the second finite field includes: determining the error location polynomial and the error estimate polynomial of the second finite field based on the adjoint of the second finite field using the Euclidean algorithm.

[0012] In some embodiments, determining the location of an error based on the error location polynomial of the second finite field includes: determining the location of an error based on the error location polynomial of the second finite field using the Qian search algorithm.

[0013] In some embodiments, determining the error codeword polynomial of the second finite field based on the error estimation polynomial and the error occurrence location includes: determining the error codeword polynomial of the second finite field based on the error occurrence location, the error location polynomial of the second finite field, and the error estimation polynomial using the Furni algorithm.

[0014] In some embodiments, the decoder is an RS544 decoder with a computational parallelism of 32.

[0015] Secondly, embodiments of this disclosure provide a decoder, comprising: a syndrome solving module configured to determine the syndrome of a first finite field based on a received codeword polynomial, and to convert the syndrome of the first finite field into the syndrome of a second finite field, wherein the first finite field is a non-composite field, and the second finite field is a composite field algebraically isomorphic to the first finite field; a determination module configured to determine an error codeword polynomial determined in the second finite field based on the syndrome of the second finite field, wherein the error codeword polynomial is used to indicate the error value corresponding to the sign position where an error occurs in the received codeword polynomial; and an error correction module configured to convert the error codeword polynomial from the second finite field to the first finite field, and to determine a decoding codeword polynomial based on the received codeword polynomial and the error codeword polynomial of the first finite field.

[0016] In some embodiments, the first finite field is GF(2). 10 The second finite field is GF((2 5 ) 2 ).

[0017] In some embodiments, the adjoint solution module is further configured to: perform vector-matrix multiplication on a per-symbol basis with an isomorphic mapping matrix to obtain the adjoint of a second finite field.

[0018] In some embodiments, the error correction module is further configured to: multiply the error codeword polynomial of the second finite field by a vector matrix using an inverse transformation matrix on a per-symbol basis to obtain the error codeword polynomial of the first finite field, wherein the inverse transformation matrix is ​​the inverse of the isomorphic mapping matrix.

[0019] In some embodiments, the determining module includes a key equation solving module, a Qian search module, and a Furni algorithm module, wherein the key equation solving module is configured to determine the error location polynomial and the error estimation polynomial of the second finite field based on the adjoint expression of the second finite field; the Qian search module is configured to determine the error location based on the error location polynomial of the second finite field; and the Furni algorithm module is configured to determine the error codeword polynomial of the second finite field based on the error estimation polynomial and the error location.

[0020] In some embodiments, the key equation solving module is further configured to: determine the shortest linear recurrence relation of the adjoint of the second finite field as the error location polynomial of the second finite field using the Berlekamp-Massey algorithm; and determine the error estimate polynomial of the second finite field based on the adjoint relation of the second finite field and the error location polynomial of the second finite field.

[0021] In some embodiments, the key equation solving module is further configured to: determine the erroneous localization polynomial and the erroneous estimation polynomial of the second finite field based on the adjoint of the second finite field using the Euclidean algorithm.

[0022] In some embodiments, the money search module is further configured to: determine the location of the error based on the error location polynomial of the second finite field using the money search algorithm.

[0023] In some embodiments, the Furni algorithm module is further configured to: determine the error codeword polynomial of the second finite field based on the error occurrence location, the error location polynomial of the second finite field, and the error estimation polynomial of the second finite field using the Furni algorithm.

[0024] In some embodiments, the decoder is an RS544 decoder with a computational parallelism of 32.

[0025] Thirdly, embodiments of this disclosure provide an electronic device, including: one or more processors; and a storage decoder having stored one or more computer programs thereon, which, when executed by the one or more processors, cause the one or more processors to perform the method as described in any one of the first aspects.

[0026] Fourthly, embodiments of this disclosure provide a computer-readable medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method as described in any one of the first or second aspects.

[0027] Fifthly, embodiments of this disclosure provide a computer program product including a computer program that, when executed by a processor, implements the method as described in any one of the first aspects.

[0028] The decoding method and decoder provided in the embodiments of this disclosure solve the problems of excessive chip power consumption and excessive chip area caused by improving decoding performance by replacing finite field computation with composite field computation. This can reduce system latency while ensuring that the computational resources consumed are relatively small.

[0029] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0030] Other features, objects, and advantages of this disclosure will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1This is an exemplary system architecture diagram to which one embodiment of this disclosure can be applied; Figure 2 This is a flowchart of an embodiment of the decoding method according to the present disclosure; Figure 3 This is a schematic diagram of a finite field transformation according to the decoding method of this disclosure; Figure 4 This is a schematic diagram comparing the performance of decoders according to this disclosure; Figure 5 This is a schematic diagram of the structure of one embodiment of the decoder according to the present disclosure; Figure 6 This is a schematic diagram of the structure of a computer system suitable for implementing embodiments of the present disclosure. Detailed Implementation

[0031] The present disclosure will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0032] It should be noted that, unless otherwise specified, the embodiments and features described in this disclosure can be combined with each other. This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0033] The following are definitions of mathematical concepts used in decoder operations in this application: The synergistic form: The value of the received codeword polynomial at the power of the original element in the finite field is a condensed representation of the error characteristics. It is used to determine whether an error exists and is also the basis for solving the error polynomial in the subsequent process.

[0034] Finite field: A mathematical field containing only a finite number of elements. The result of operations (addition, subtraction, multiplication, and division) remains within the field. It is the fundamental environment for all operations of the decoder (e.g., GF(2). (The element is a 10-bit symbol).

[0035] Composite domain: composed of a small finite field (subfield, such as GF( The extended field is used to split high-bit wide elements into low-bit subfield elements for operation. Its core function is to reduce hardware resource consumption and improve operation speed.

[0036] Non-composite fields: In contrast to composite fields, directly defined primitive finite fields (such as GF(2)) Elements do not need to be split, and operations are performed directly based on their own bit width, which usually consumes more hardware than composite fields.

[0037] Error location polynomial: derived from the syndrome of the received codeword, with a finite field (or composite field) as the operation environment, the "root" is a polynomial of the power of the original element at the location of the error, and the specific index of the erroneous symbol in the received codeword can be deduced by solving its root.

[0038] Error estimation polynomial: Generated in conjunction with the error location polynomial, it combines error location information and uses the Furni algorithm to calculate the specific error size at each error location.

[0039] Error location: The index of the erroneous symbol in the received codeword, which is obtained by inverse calculation from the root of the error location polynomial. It is the "position coordinate" of the error correction.

[0040] Error codeword polynomial: The difference polynomial between the received codeword and the encoded codeword polynomial. The positions where the coefficients are non-zero are the error positions, and the magnitude of the coefficients is the error value, carrying complete error information.

[0041] Received codeword polynomial: The polynomial representation of the erroneous data actually received by the receiver. It is the input of the decoder and is equal to the superposition of the encoded codeword polynomial and the erroneous codeword polynomial.

[0042] Decoding codeword polynomial: The correct polynomial output by the decoder after error correction is obtained by subtracting the erroneous codeword polynomial from the received codeword polynomial, i.e., the recovered encoded codeword polynomial.

[0043] Isomorphic mapping matrix: A matrix (such as a 10×10 matrix) used for data transformation between different finite fields. It satisfies the "domain isomorphism" relationship, ensuring that the data operation logic is consistent before and after the transformation. It is the core tool for switching between finite fields and composite fields.

[0044] Figure 1 An exemplary system architecture for applying the decoding method of this disclosure is shown. The system architecture uses "received codeword → syndrome extraction → error feature solving → error location and estimation → error correction output" as its core chain, supporting parallel processing, such as 320 bits of data processing per cycle (32 degrees of parallelism × 10 bits / symbol), with a maximum bandwidth of 320 Gbps at a clock frequency of 1 GHz. The architecture chain is as follows: FIFO receive buffer → Synergistic computation → Isomorphic mapping → Solving key equations → Qian search → Fonnie algorithm → Error correction → Decoding output.

[0045] 1. FIFO Receive Buffer

[0046] The received codeword polynomial after physical layer preprocessing (e.g., containing 544 10-bit symbols, each symbol belonging to (GF(2)) (domain) to achieve data caching and time synchronization, matching the parallel processing rhythm of subsequent modules.

[0047] 2. Synergistic Calculation

[0048] The syndrome S(x) is calculated based on the received codeword polynomial. The essence of the syndrome is to reflect whether there is a transmission error: if the syndrome is all 0, that is, the error codeword polynomial is 0, it means that there is no transmission error; if the syndrome is not all 0, it means that there is a transmission error.

[0049] 3. Isomorphic mapping

[0050] Transform the adjoint of the first finite field into the adjoint of the second finite field. For example, GF(2 The adjoint expression of the domain is transformed into the composite domain GF(( The accompanying function of )²) reduces the hardware resource consumption of subsequent modules.

[0051] 4. Solving the key equations

[0052] Solve the error location polynomial based on the adjoint S(x). With the erroneous valuation polynomial This provides a core mathematical basis for misidentification and valuation.

[0053] 5. Money Search

[0054] Searching for elements in a composite field The root is the location of the symbol where the error occurred.

[0055] 6. Furniture Algorithm

[0056] Combining the location of the error symbol, The derivative and Calculate the error value (err_val) at the symbol location where each error occurred.

[0057] 7. Error Correction

[0058] The received codeword polynomial is subtracted from the error pattern (the sign position where the error occurred + the error value) by an equivalent XOR operation within the GF field to recover the error-free codeword polynomial.

[0059] Continue to refer to Figure 2This document illustrates a flow 200 of an embodiment of the decoding method according to this disclosure. The decoding method is applied to a decoder, which may include a syndrome solving module, a determination module, and an error correction module. The determination module includes a key equation solving module, a Qian search module, and a Furniture algorithm module. The method of this application can be applied not only to RS decoders but also to other decoders. This document uses the RS544 decoder with a parallelism of 32 as an example to explain its principle and technical effects, but in practical applications, the type of decoder and the parallelism are not limited to this model. The method includes the following steps: Step 201: Determine the syndrome of the first finite field based on the received codeword polynomial of the decoder of the communication system, and convert the syndrome of the first finite field into the syndrome of the second finite field.

[0060] In this embodiment, the first finite field is a non-composite field, and the second finite field is a composite field that is algebraically isomorphic to the first finite field.

[0061] Taking RS(544, 514) code as an example, the code length n=544, the original codeword length k=514, the parity bit length nk=2t=30, the maximum number of correctable errors t=15, and each symbol is 10-bit.

[0062] In one example, the data input to the decoder is represented by one symbol every 10 bits, which is the first finite field GF(2). 10 The data in this application is calculated with a parallelism of 32, meaning that the chip can process 320 bits of data per clock cycle. When the chip clock frequency is 1GHz, the maximum data bandwidth is 320Gbps.

[0063] The syndrome of the corresponding codeword can be solved using the syndrome solving module, and the syndrome can be calculated from the polynomial of the received codeword. ,0≤i<2t.

[0064] In one example, after calculating the adjoint expression, it is necessary to extract each symbol data in the adjoint expression from the first finite field GF(2) in units of symbol. 10 Mapping to the second finite field GF((2) using the isomorphic mapping matrix T) 5 ) 2 This is a composite domain, where subsequent module data is calculated.

[0065] Alternatively, the first finite field can be GF(2). 10 It can also be other finite fields; for example, the first finite field can be GF(2). 8 ), GF(2 4 The corresponding second finite fields are GF((2) 4 ) 2),GF((2 2 ) 2 Not limited to RS544 decoders, other decoders can use the corresponding first and second finite fields.

[0066] Step 202: Determine the error codeword polynomial of the second finite field based on the syndrome of the second finite field.

[0067] In this embodiment, the isomorphic mapping property of the composite field can be used to transform the adjoint of the second finite field into a vector on the subfield. The error position and error value can be quickly matched by a preset "error feature table" (a lookup table under the composite field) to obtain the error codeword polynomial.

[0068] The error codeword polynomial can also be obtained through the following steps from 2021 to 2023: Step 2021: Based on the adjoint of the second finite field, determine the erroneous positioning polynomial and the erroneous estimation polynomial of the second finite field.

[0069] In this embodiment, after data mapping is completed, the adjoint equation with a bit width of 2t symbols is sent to the critical equation solving module for solving the error location polynomial and the error estimation polynomial. The critical equation solving module is implemented using the Berlekamp-Massey algorithm. According to the iterative principle of the critical equation, RS544 requires a total of 30 iteration cycles to complete the calculation of the error location polynomial and the error estimation polynomial.

[0070] Optionally, the critical equation solving module can use the Euclidean algorithm to solve the error location polynomial and the error estimation polynomial, requiring a total of 30 iteration cycles.

[0071] Step 2022: Determine the location of the error based on the error location polynomial of the second finite field.

[0072] In this embodiment, after solving the key equation, the error location polynomial is sent to the Qian search module, for example, the composite field GF((2 5 ) 2 The data within the range are sequentially substituted into the error location polynomial to obtain the location of the error.

[0073] Step 2023: Determine the error codeword polynomial of the second finite field based on the error estimation polynomial of the second finite field and the error occurrence location.

[0074] In this embodiment, the error estimate polynomial calculated by the key equation solving module and the error occurrence position calculated by the Qian search algorithm are substituted into the Furni algorithm module to calculate the error codeword polynomial. Optionally, an exhaustive search method is used to find the root of the error position polynomial as the error codeword polynomial.

[0075] Step 203: Transform the error codeword polynomial of the second finite field into the error codeword polynomial of the first finite field, and determine the decoding codeword polynomial based on the received codeword polynomial and the error codeword polynomial of the first finite field.

[0076] In this embodiment, the error codeword polynomial needs to be converted from the composite field back to the finite field, and then the error codeword polynomial is subtracted from the received codeword polynomial by the error correction module to obtain the decoded codeword polynomial.

[0077] Furthermore, the 32-parallelism adjoint solution module needs to cover the range of primitive order corresponding to the RS (544,514) code length, that is, to calculate the primitive α to the power of 0~543×29 in sequence (because the code length n=544, each symbol corresponds to a primitive order, and the adjoint solution needs to be associated with the order of 2t=30 parity bits).

[0078] Since the module has a parallelism of 32, it can process 32 10-bit symbols per cycle (320 bits of input data in total). Therefore, each cycle only needs to specifically calculate the primitive element α to the power of 0 to 31 × 29, corresponding to the mathematical expression: (Where 0≤i<30, i is the adjoint index; 0≤j<32, j is the symbol index in the current period).

[0079] The specific calculation process is as follows: Step 1: Use the 320 bits of data (32 10-bit symbols) input in the current cycle as polynomial coefficients, and compare them with the pre-calculated data for the current cycle. (0≤i<30, 0≤j<32) Perform finite field multiplication to obtain 300 bits of the intermediate result of the syndrome (30 syndromes) for the current period; Step 2: The 300-bit adjoint intermediate result output from the previous cycle needs to be compared with the source element. Perform finite field multiplication (since 32 symbols are processed progressively per cycle, the order of the source element needs to be shifted by 32 bits synchronously) to obtain the intermediate result of the adjoint from the previous cycle, ensuring that its order is consistent with the order of the data in the current cycle. Step 3: Perform a finite field addition operation on the current period's adjoint intermediate result obtained in Step 1 and the previous period's adjoint intermediate result processed in Step 2 to obtain the final adjoint intermediate result for this period, which will be used for the next period iteration.

[0080] For a 32-degree-of-parallel RS (544,514) code, since the total code length is 544 symbols and 32 symbols are processed per cycle, a total of 17 cycles (544÷32=17) are required to complete the calculation of all syndromes. Throughout the calculation process, a total of 60 finite field multipliers and 30 finite field adders are needed to support parallel computation and data iteration.

[0081] In some optional implementations of this embodiment, for the RS544 decoder, the first finite field is GF(2). 10 The second finite field is GF((2 5 ) 2 ).

[0082] In some optional implementations of this embodiment, converting the syndrome of the first finite field into the syndrome of the second finite field includes: performing vector-matrix multiplication of the syndrome of the first finite field with the isomorphic mapping matrix on a per-symbol basis to obtain the syndrome of the second finite field.

[0083] An isomorphic mapping matrix is ​​used to map the symbols and operational rules of a first finite field to a second finite field while maintaining the consistency of symbol correspondence and operational logic.

[0084] In one example, the first finite field GF(2) Each 10-bit symbol of GF can be uniquely mapped to the second finite field GF(() through an isomorphic mapping matrix. A symbol of )²) is split into two 5-bit subfield elements, and conversely, it can be uniquely restored through the inverse transformation matrix, achieving bidirectional pairing of the two field elements without omission or repetition.

[0085] In one example, the first finite field GF(2) The addition rule is 10-bit bitwise XOR, and the multiplication rule is based on primitive polynomial shift combination; the second finite field GF (( The addition operation rule of )²) is to XOR the subfields separately, and the multiplication operation rule is to split it into subfield multiplication and addition, both of which follow their own fixed logic.

[0086] In one example, the first finite field GF(2) ) and the second finite field GF (( The operation logic is consistent with that of GF(2)²: the first finite field GF(2)² The result of element operations in ) is mapped to the second finite field GF (( The results of operations with the same name after )²) are completely identical after inverse mapping, only the operation carrier is different, and the essential logic remains unchanged.

[0087] The first finite field is GF(2) 10 The second finite field is GF((2 5 ) 2 For example, the calculated adjoint expression is multiplied by a vector matrix of 1x10 and 10x10 with the isomorphic mapping matrix, with each symbol representing a 1x10 vector. This yields a 1x10 vector, thus transforming the finite field GF(2) into a vector matrix. 10 The data within ) was transformed into the composite domain GF((2) 5 ) 2 Subsequent modules are all within the composite domain GF((2) 5 ) 2 The calculation is performed using GF(2). It should be noted that the application of isomorphic mapping matrices is not limited to GF(2). ) and GF (( In the domain transformation scenario of GF², mappings between other different finite fields can also be achieved using corresponding isomorphic mapping matrices. Different finite fields differ in element structure, bit width, and other characteristics, resulting in variations in the dimensions and element values ​​of their corresponding isomorphic mapping matrices. However, the core principle remains the same: satisfying the mathematical relationship of "domain isomorphism"—that is, achieving a one-to-one correspondence between elements within different fields through matrix multiplication, while ensuring the consistency of the operational logic before and after the transformation. For example, GF²... ) and GF (( )²), GF ( For finite field pairs such as GF((2³)²), a dedicated isomorphic mapping matrix can be designed to complete the data mapping. Only the matrix parameters need to be adjusted according to the primitive polynomial and element expression of the target field.

[0088] In some optional implementations of this embodiment, determining the error location polynomial and the error estimate polynomial of the second finite field based on the adjoint of the second finite field includes: determining the shortest linear recurrence relation of the adjoint of the second finite field as the error location polynomial of the second finite field using the Berlekamp-Massey algorithm; and determining the error estimate polynomial of the second finite field based on the adjoint of the second finite field and the error location polynomial of the second finite field.

[0089] Furthermore, it will be transformed into the composite domain GF((2) 5 ) 2 The adjoint expression is sent to the critical equation solving module to calculate the error location polynomial and the error estimate polynomial. In one example, this application uses the Berlekamp-Massey algorithm for computation, which can be used... The computational complexity of solving a problem of length is The shortest linear recurrence relation of the sequence is the error-locating polynomial.

[0090] The core of the Berlekamp-Massey (BM) algorithm is to find the shortest linear recurrence relation of the syndrome sequence in the composite field by gradually adjusting the structure of the linear feedback shift register (LFSR), ultimately generating the error localization polynomial. The following describes the complete execution flow of the error localization polynomial obtained by the BM algorithm in a practical application scenario of an RS544 decoder (syndrome sequence length 30, maximum correctable error count 15): 1. Initialization: Input 30 syndromes of the second finite field (each split into two 5-bit subfield elements), initialize the error location polynomial to 1, and the linear feedback shift register (LFSR) has no feedback logic.

[0091] 2. Iterative update: Iterate through each of the 30 adjoints one by one, calculate the deviation between the current LFSR and the adjoint, adjust the polynomial structure when the deviation is non-zero (combining historical polynomials and deviation values ​​for correction), and keep the polynomial unchanged when the deviation is zero, for a total of 30 iterations.

[0092] 3. Termination of output: After the iteration is completed, output the error location polynomial in the second finite field for use by the subsequent money search module.

[0093] When using the Berlekamp-Massey algorithm, the 10-bit elements of the first finite field need to undergo complex multiplication and inversion operations directly, resulting in a large number of logic gates and high resource consumption. In contrast, the second finite field splits the 10-bit elements into two 5-bit subfield elements. Core operations such as deviation calculation and polynomial correction in the algorithm iteration can be simplified to low-bit subfield operations, which greatly reduces the logical complexity. At the same time, the two fields satisfy the algebraic isomorphism relationship, ensuring that the error location polynomial solved by the algorithm is completely equivalent to that of the first finite field, without affecting the subsequent error location accuracy.

[0094] Therefore, in the second finite field (composite field GF (( Using the Berlekamp-Massey algorithm in the first finite field (GF(2)) Using the Berlekamp-Massey algorithm, hardware resource consumption can be reduced by about 60%, the computing speed can be increased by more than 40%, and the error correction accuracy remains the same.

[0095] The syndrome of RS544 can be viewed as a sequence. The shortest linear recurrence relation obtained ,satisfy For any Both hold true. The error-estimation polynomial is calculated from the error-locating polynomial and the adjoint. For RS544, where For the accompanying type, ; For erroneous polynomials; The maximum number of errors that can be corrected. .

[0096] In some optional implementations of this embodiment, determining the error location polynomial and the error estimate polynomial of the second finite field based on the adjoint of the second finite field includes: determining the error location polynomial and the error estimate polynomial of the second finite field based on the adjoint of the second finite field using the Euclidean algorithm.

[0097] The process of determining the erroneous localization polynomial and the erroneous estimate polynomial of the second finite field using the Euclidean algorithm can be as follows: Taking the second finite field (composite field GF (( Based on the adjoint polynomial of )²), the adjoint polynomial and a reference polynomial of fixed degree (corresponding to the check bit length) are first constructed. The process iterates step-by-step by dividing the polynomials: each time, the current remainder polynomial is divided by the previous remainder polynomial, updating the quotient and remainder polynomial, while simultaneously adjusting the coefficient matrix. The iteration terminates when the degree of the remainder polynomial meets a preset condition (less than the maximum correctable error number). The resulting two polynomials are the error location polynomial and the error estimation polynomial, respectively. Throughout the process, all division and multiplication operations are performed within the composite field, and the adjoint polynomial and polynomial coefficients are stored and operated on in the form of "two 5-bit subfield elements".

[0098] First finite field (GF(2)) The elements of the first finite field are 10-bit, and multiplication and inversion operations require processing the complete 10-bit data, resulting in a high number of logic gates and high latency. The second finite field splits the 10-bit elements into two 5-bit subfields, allowing operations to be decomposed into lower-bit subfield operations, simplifying the operational logic and significantly reducing the number of logic gates in a single operational unit. Simultaneously, the algebraic isomorphism between the two fields ensures consistency in operational logic, and the data operation results are completely equivalent to those of the first finite field, without affecting the accuracy of solving erroneous polynomials.

[0099] Therefore, using the Euclidean algorithm in the second finite field improves the computation speed by about 40% compared to using it in the first finite field, reduces hardware resource consumption by more than 50%, and does not lose error correction accuracy.

[0100] In some optional implementations of this embodiment, determining the error location based on the error location polynomial of the second finite field includes: determining the error location based on the error location polynomial of the second finite field using the Qian search algorithm.

[0101] The process of determining the location of an error using the Qian search algorithm can be as follows: Input the second finite field (composite field GF(( After determining the error-locating polynomial, the polynomial is recursively calculated for each element in the order of the powers of the original elements of the composite field. The current value is updated using the calculation results from the previous cycle to avoid repeated calculations. When the polynomial value is 0, the power of the corresponding original element indicates the sign position where the error occurred. All calculations are performed within the composite field, and the coefficients of the error-locating polynomial and intermediate results are processed in the form of "two 5-bit subfield elements".

[0102] First finite field (GF(2)) The elements are 10-bit, and directly calculating the polynomial value requires processing the complete 10-bit data, resulting in a high number of logic gate levels. The second finite field splits the elements into 5-bit subfield elements, allowing recursive operations to reuse intermediate results and simplifying the logic chain. At the same time, the algebraic isomorphism between the two fields ensures that the positioning results are completely equivalent, and there will be no position judgment deviation due to field conversion.

[0103] Therefore, compared with using the Qian search algorithm in the first finite domain, the computational latency is reduced by about 35% and the hardware resource consumption is reduced by 50%, while the error correction and positioning accuracy remains the same when using the Qian search algorithm in the second finite domain.

[0104] Furthermore, the essence of the Qian search algorithm is to use exhaustive search to find the root of the polynomial in the wrong position. While it doesn't reduce computational complexity, for digital circuits, using the Qian search algorithm can shorten the critical path. Without the Qian search algorithm, exhaustive search involves substituting 1, 2, 3...1023 sequentially into the polynomial in the wrong position to calculate whether the current value is a root. The Qian search algorithm, however, searches sequentially by the order of the primitive elements. By performing an exhaustive search, data from the previous cycle can be used as intermediate data for calculations, thus better ensuring circuit quality.

[0105] In some optional implementations of this embodiment, determining the error codeword polynomial based on the error estimation polynomial and the error occurrence location includes: determining the error codeword polynomial based on the error occurrence location, the error location polynomial, and the error estimation polynomial using the Furni algorithm.

[0106] Furthermore, the Fonni algorithm is used to calculate the error codeword polynomial. It calculates the error codeword polynomial using the error location obtained from the Qian search algorithm, the error localization polynomial obtained from the key equation module, and the error estimation polynomial. ,in It is a misvalued polynomial. It is a polynomial composed of even-numbered terms with coefficients of 0 in an incorrectly positioned polynomial. This indicates the location where the error occurred, and the value substituted into the formula needs to be inverted.

[0107] The process of determining the error codeword polynomial using the Furni algorithm is as follows: Input the error location polynomial and error estimation polynomial of the second finite field, as well as the error location obtained from the Qian search. First, extract the odd-numbered terms of the error location polynomial (equivalent to its derivative operation). Then, combine the values ​​of the error estimation polynomial at the error locations, and calculate the error value corresponding to each error location through multiplication and inversion operations within the composite field. Finally, integrate the error locations and error values ​​to generate the error codeword polynomial of the second finite field. The entire computation is based on the combination of 5-bit subfield elements of the composite field.

[0108] The multiplication and inversion of 10-bit elements in the first finite field require complex logic chains; the second finite field splits the elements into two 5-bit subfields, simplifying the operation logic and significantly reducing the number of logic gates in a single operation unit. At the same time, the two fields are algebraically isomorphic, and the operation results, after conversion, are completely consistent with those of the first finite field, without affecting the accuracy of error value calculation.

[0109] Therefore, using the Furni algorithm in the second finite field reduces hardware resource consumption by about 55% and computational latency by 40% compared to using it in the first finite field, while maintaining the same error correction accuracy.

[0110] In some optional implementations of this embodiment, the decoder is an RS544 decoder with a computational parallelism of 32. Compared to an RS544 decoder with a parallelism of 16, this offers better performance and lower power consumption.

[0111] RS encoding and decoding data are performed within the Galois field, a finite field. A finite field is a field containing only a finite number of elements; operations performed using elements within a finite field result in a number within that finite field. This mathematical property allows the use of finite field operations in digital circuits to transmit information within specific bandwidth constraints.

[0112] Addition and subtraction in finite fields are both implemented using bitwise XOR.

[0113] Multiplication in finite fields is an exponential operation.

[0114] In digital circuit implementation, the finite field GF(2) 10 Multiplication on the generator polynomial shifts the coefficients of the generator polynomial and operates on the tens digit.

[0115] Division in a finite field is an exponentiation operation, for example...

[0116] In digital circuit implementation, the finite field number will be processed first. Performing the inverse operation yields Then use multiplication to perform the calculation.

[0117]

[0118] This design employs composite field computation in the key equation solving module, Qian search algorithm module, and Furni algorithm module. The design of the finite field multiplier and the finite field multiplication inversion circuit directly affects hardware consumption and computation speed. For a finite field GF(2) algorithm... 10 Finite field operations (GF(2)) can be significantly reduced by using composite fields, which greatly decreases the hardware overhead of multipliers and multiplication inversion circuits and effectively improves computation speed. For example, using the subfield GF(2)... 5 Operations on GF(2) can be performed on the finite field GF(2). 10 The inverse operation method on the finite field transforms the calculation problem of 10-bit elements into the calculation of two 5-bit elements, thereby reducing the complexity of implementing finite field operations.

[0119] With finite field GF(2 10 Taking operations on ) as an example, to reduce computational complexity, a composite field GF((2) is constructed. 5 ) 2 Using the composite domain GF((2) 5 ) 2 The decoding calculation is completed. The finite field transformation process is as follows: Figure 3 As shown.

[0120] Assumption It is the domain GF(2) 10 Polynomials over ) It is the domain GF((2) 5 ) 2 Let the two polynomials over be denoted as and respectively. , Since the domain GF(2) 10 ) and domain GF((2 5 ) 2 ), can find isomorphic mapping matrices Make

[0121] This transformation allows the domain GF(2) to be established. 10 Polynomial transformation over GF((2) to the field GF((2) 5 )2 After completing the calculation, the inverse matrix of the isomorphic mapping is then used. The domain GF((2) 5 ) 2 The polynomial within ) is transformed into the field GF(2) 10 A polynomial over ) is:

[0122] Finite field GF(2) in the decoding module 10 The primitive polynomial is:

[0123] Finite field GF(2) 5 The primitive polynomial is:

[0124] Composite domain GF((2) 5 ) 2 The primitive polynomial is:

[0125] After isomorphic mapping matrix transformation, the data can be in the composite domain GF((2 5 ) 2 ) to perform calculations.

[0126] Addition and subtraction in composite fields are performed the same as in finite fields, using the XOR operator:

[0127] Composite field multiplication: Let A(A1, A0), B(B1, B0), and C(C1, C0) be composite fields GF((2 5 ) 2 The elements in GF(2) are represented as quadratic polynomials. A1, A2, B1, B2, C1, and C2 are subfields of GF(2). 5 The elements in ). and .

[0128] According to the composite domain GF((2) 5 ) 2 The primitive polynomial of ) has a root. , making ,Right now:

[0129] because

[0130] Right now

[0131] Therefore, if it is necessary to use the composite domain GF((2) 5 ) 2 To calculate the product c of any two arbitrary elements a and b, the specific algorithm is as follows: Multiply any numbers a and b by the transformation matrix T to obtain results A and B, respectively, and map the elements a and b in the finite field to the elements A and B in the composite field.

[0132] Since the elements in the composite field are expressed as quadratic polynomials, A and B are partitioned into A1, A2, B1, and B2, respectively, where A1, A2, B1, and B2 are all subfields of GF(2). 5 Elements in ).

[0133] Using the formulas derived above, we can calculate C1 = (A1B0 + A0B1 + A1B1) and C0 = (A0B0 + A1B1).

[0134] Multiply C(C1, C0) by the inverse transformation matrix T -1 The result is c.

[0135] Inverse operation of composite field: Let A(A1, A0) and B(B1, B0) be the composite field GF((2 5 ) 2 The elements in () are given. And B is the multiplicative inverse of A. That is, the two have the following relationship:

[0136] And because

[0137] Therefore, by combining the above equations, we can obtain a system of equations:

[0138] achievable

[0139] in .

[0140] Therefore, in one example, if it is necessary to use the composite domain GF((2) 5 ) 2 The multiplicative inverse b of any element a is obtained by the following algorithm: Multiply any number a by the transformation matrix T to obtain the result A, which maps the element a in the finite field to the element A in the composite field.

[0141] Since the elements in the composite field are expressed as quadratic polynomials, A is divided into A1 and A2, where A1 and A2 are both subfields GF(2). 5 Elements in ).

[0142] Calculate using the formula derived above

[0143] Multiply B(B1, B0) by the inverse transformation matrix T -1 The result is b.

[0144] As the receiver of the codec, the input end receives a total of 544 symbols in the codeword, the information codeword length is 514 symbols, the parity codeword length is 30 symbols, and the maximum error correction is 15 symbols.

[0145] Let the received codeword polynomial be... Where n=544, and each coefficient lies in the finite field GF(2). 10 On the above, it can be represented as:

[0146] At the receiving end, the exact information sent by the sending end cannot be known. However, we can first define a set of error codeword polynomials for calculating the error value and error location. Let the error codeword polynomials be: At this point, the coefficients of the error codeword polynomial are still unknown:

[0147] Furthermore, calculate the syndrome ,when When, we can define the adjoint:

[0148] in This is the fundamental element. According to the encoding principle, the transmitted codeword polynomial... It can generate polynomials Divisibility, i.e., generator polynomial For sending codeword polynomials The root, and when At that time, the original element To generate polynomials The root of this is also the sending codeword polynomial. The root, therefore:

[0149] Right now

[0150] In matrix form, we get:

[0151] For a decoder, the input received codeword polynomial can be viewed as the superposition of the encoded codeword polynomial and the error codeword polynomial. The encoded codeword polynomial, generated by the transmitting end after encoding, is the "reference polynomial" that should be transmitted to the receiving end without errors—it is the "correct target" that the decoder ultimately aims to recover and the core reference for judging transmission errors. According to the encoding principle, the original element... It is the root of the codeword polynomial, Substituting the input received codeword polynomial, the encoded codeword polynomial is 0. Therefore, we can obtain a value for only the error codeword polynomial, i.e., the syndrome. If the syntactic polynomial is all zeros, it means the error codeword polynomial is 0, i.e., no error has occurred; otherwise, it means an error has occurred.

[0152] In one example, when using a 32-degree-of-parallel decoder, 17 valid data cycles are required for input data. In each cycle, 10 bits of data are taken as polynomial coefficients and multiplied by the corresponding primitive elements. Simultaneously, a 320-bit register is needed to store the intermediate data calculated in the previous cycle, and the data in the register is multiplied uniformly. Then, the result of vector-matrix multiplication of the coefficients of the current periodic polynomial and the corresponding source elements is added, and this value is then updated in a 320-bit register for use in the next calculation cycle.

[0153] Furthermore, it is necessary to use the syntactic polynomial to calculate the error codeword polynomial, and first calculate the location where the error occurred.

[0154] Assume there is a total One error occurred, of which .

[0155] Set the location where the error occurred to The location can be Any position of a received codeword, i.e. .

[0156] Set parameters according to where the error occurred.

[0157] When an error occurs If not all values ​​are 0, we can obtain the following formula:

[0158] Furthermore, let the error location polynomial be...

[0159] Based on the formula structure, we can obtain...

[0160] because .

[0161] Multiply both sides of the equation We can obtain:

[0162] Will Move to the opposite side, in At that time, we can obtain:

[0163] Write all :

[0164] Written in vector-matrix multiplication form:

[0165] According to the above formula, the sequence... For sequence ,in The shortest linear recurrence relation. The Berlekamp-Massey algorithm can be used to locate incorrect polynomial coefficients. Perform the calculation.

[0166] The Berlekamp-Massey algorithm uses a linear feedback shift register (LFSR) to compute the shortest linear recurrence relation. The algorithm adopts an iterative approach, starting from an empty LFSR and checking the sequence elements one by one. If the current LFSR cannot satisfy the current data, it adaptively corrects the LFSR, ensuring that after each correction, the new LFSR can generate all the sequence elements so far.

[0167] Furthermore, the key equation solving module completes the solution of the key equations.

[0168]

[0169] in For mislocating polynomials, For the incorrectly valued polynomial, This is the adjoint form. By solving this step, the error-location polynomial can be calculated. With the erroneous valuation polynomial .

[0170] Furthermore, the Qian search algorithm is used to calculate the error localization polynomial. The root of the polynomial is an efficient method for finding the roots of polynomials in incorrect positions. The core idea of ​​Qian search is to recursively calculate the polynomial value to avoid repeated calculations.

[0171] For location :

[0172] For location :

[0173] Observations show that each coefficient can be updated recursively:

[0174] Error positioning polynomial The root is the location where the error occurred. The error location information (referred to as error location information) can be obtained through the Qian search algorithm module.

[0175] Furthermore, the Fonni algorithm module combines the error location information obtained from the Qian search algorithm module with the error localization polynomial obtained from the key equation solving module. With the erroneous valuation polynomial The error value is calculated to obtain the error codeword polynomial:

[0176] in Location where the error occurred The corresponding error value, For mislocating polynomials, For derivative, For the incorrectly valued polynomial, This indicates the location of the error. After differentiating the error-locating polynomial, all even-numbered terms sum to 0 in the finite field, leaving only odd-numbered terms. Therefore, the odd-numbered terms of the polynomial after differentiating the error-locating polynomial are equal to those of the original error-locating polynomial.

[0177] Furthermore, the error codeword polynomial is transformed using an inverse transformation matrix from the composite field GF((2) 5 ) 2 Transform to the finite field GF(2) 10 After that, the received codeword polynomial is subtracted from the erroneous codeword polynomial to obtain the decoded codeword polynomial.

[0178] like Figure 4 As shown, in one example, the performance, power, and area benefits are compared between a 16-degree parallelism finite-field RS544 decoder and the 32-degree parallelism composite-field RS544 decoder proposed in this design.

[0179] Performance: Synergistic computation module: A finite field RS544 decoder with 16 degrees of parallelism requires 544 / 16 = 34 cycles to complete the calculation of the syndrome; a composite field RS544 decoder with 32 degrees of parallelism requires 544 / 16 = 17 cycles to complete the calculation of the syndrome.

[0180] Key Equation Solving Module: Since RS544 has a 30-bit parity bit, both the 16-parallelism finite field RS544 decoder and the 32-parallelism composite field RS544 decoder require 30 cycles to solve the key equation.

[0181] Money Search Algorithm Module: A finite field RS544 decoder with 16 degrees of parallelism requires 544 / 16 = 34 cycles to complete the calculation of the error location polynomial root; a composite field RS544 decoder with 32 degrees of parallelism requires 544 / 16 = 17 cycles to complete the calculation of the error location polynomial root.

[0182] Furni algorithm module: A finite field RS544 decoder with 16 degrees of parallelism requires 544 / 16 = 34 cycles to complete the error value calculation; a composite field RS544 decoder with 32 degrees of parallelism requires 544 / 16 = 17 cycles to complete the error value calculation.

[0183] Furthermore, the adjoint equation solution and the solution of the critical equation cannot be pipelined, but after the critical equation is solved, the Qian search algorithm and the Furniture algorithm can be pipelined. Therefore, a 16-degree-of-parallel finite-field RS544 decoder requires 67 cycles to complete one RS544 decoding operation, while a 32-degree-of-parallel composite-field RS544 decoder requires 50 cycles. The comparison shows that the 32-degree-of-parallel composite-field RS544 decoder outperforms the 16-degree-of-parallel finite-field RS544 decoder by 34%.

[0184] Power (energy consumption): Use PowerPro to obtain the power data for each module.

[0185] Synergistic computation module: The total leakage power of the 16-parallelism finite-domain RS544 decoder is 137.27 μW, the total switching power is 8289.26 μW, the total internal power is 3037.14 μW, and the total hierarchical power is 11463.67 μW; the total leakage power of the 32-parallelism composite-domain RS544 decoder is 200.84 μW, the total switching power is 4781.17 μW, the total internal power is 4269.34 μW, and the total hierarchical power is 9251.35 μW.

[0186] Key Equation Solving Module: The total leakage power of the 16-parallel finite-field RS544 decoder is 180.52 μw, the total switching power is 1206.95 μw, the total internal power is 1507.25 μw, and the total hierarchical power is 2894.72 μw; the total leakage power of the 32-parallel composite-field RS544 decoder is 674.78 μw, the total switching power is 3268 μw, the total internal power is 4973.42 μw, and the total hierarchical power is 8916.2 μw.

[0187] Qian Search Algorithm Module + Furni Algorithm Module: The total leakage power of the 16-parallel finite-field RS544 decoder is 742.19 μw, the total switching power is 4476.65 μw, the total internal power is 5087.81 μw, and the total hierarchical power is 10306.65 μw; the total leakage power of the 32-parallel composite-field RS544 decoder is 549.17 μw, the total switching power is 1860.5 μw, the total internal power is 2834.27 μw, and the total hierarchical power is 5243.95 μw.

[0188] Furthermore, the total power consumption of the 16-parallelism finite-field RS544 decoder is 24665.04 μW, and the total power consumption of the 32-parallelism composite-field RS544 decoder is 23411.5 μW. Based on the higher coding parallelism, i.e. higher performance, the total power consumption of the 32-parallelism composite-field RS544 decoder is reduced by 5.4%.

[0189] Area: The area data for each module is obtained after synthesis using Design Compiler (DC).

[0190] Synergistic computation module: The area of ​​the 16-degree parallelism finite field RS544 decoder is 1007.55 for the Combinational logic, 145.033 for the Noncombinational logic, and 1152.565 for the Absolute logic. The area of ​​the 32-degree parallelism composite field RS544 decoder is 1545.869 for the Combinational logic, 273.467 for the Noncombinational logic, and 1819.336 for the Absolute logic.

[0191] Key Equation Solving Module: The 16-degree parallelism finite field RS544 decoder has a Combinational area of ​​1434.406, a Noncombinational area of ​​286.61, and an Absolute area of ​​1721.034; the 32-degree parallelism composite field RS544 decoder has a Combinational area of ​​3722.369, a Noncombinational area of ​​669.73, and an Absolute area of ​​4392.101.

[0192] Qian Search Algorithm Module + Furni Algorithm Module: The 16-degree parallelism finite field RS544 decoder has a Combinational area of ​​3357.803, a Noncombinational area of ​​867.897, and an Absolute area of ​​4225.705; the 32-degree parallelism composite field RS544 decoder has a Combinational area of ​​3143.169, a Noncombinational area of ​​699.764, and an Absolute area of ​​3842.932.

[0193] Furthermore, the total combinational area of ​​the 16-parallelism finite-field RS544 decoder is 5799.759, the total noncombinational area is 1299.54, and the total absolute area is 7099.304; the total combinational area of ​​the 32-parallelism composite-field RS544 decoder is 8411.407, the total noncombinational area is 1642.961, and the total absolute area is 10054.369. The total combinational area of ​​the 32-parallelism composite-field RS544 decoder is slightly increased compared to the 16-parallelism finite-field RS544 decoder.

[0194] In summary, compared with the 16-parallelism finite-field RS544 decoder, the proposed 32-parallelism composite-field RS544 decoder offers a significant performance improvement, a slight reduction in power, and an increase in area, making it highly valuable for high-speed RS encoding and decoding.

[0195] Further reference Figure 5 As an implementation of the methods shown in the above figures, this disclosure provides an embodiment of a decoder, which is similar to... Figure 2 Corresponding to the method embodiments shown, the decoder can be specifically applied to various electronic devices.

[0196] like Figure 5 As shown, the decoder 500 of this embodiment includes: a syndrome solving module 501, a determination module 502, and an error correction module 503. The syndrome solving module 501 is configured to determine the syndrome of a first finite field based on the received codeword polynomial, and convert the syndrome of the first finite field into the syndrome of a second finite field, wherein the first finite field is a non-composite field, and the second finite field is a composite field algebraically isomorphic to the first finite field. The determination module 502 is configured to determine an error codeword polynomial in the second finite field based on the syndrome of the second finite field, wherein the error codeword polynomial indicates the error value corresponding to the position of the erroneous symbol in the received codeword polynomial relative to the encoded codeword polynomial transmitted by the transmitting end. The error correction module 503 is configured to convert the error codeword polynomial of the second finite field into the error codeword polynomial of the first finite field, and determine the decoding codeword polynomial based on the received codeword polynomial and the error codeword polynomial of the first finite field.

[0197] In this embodiment, the specific processing of the synergistic solving module 501, the determining module 502 and the error correction module 503 of the decoder 500 can be described by steps 201, 202 and 203 in the embodiment corresponding to flow 200.

[0198] In some optional implementations of this embodiment, the first finite field is GF(2). 10 The second finite field is GF((2 5 ) 2 ).

[0199] In some optional implementations of this embodiment, the adjoint expression solving module 501 is further configured to: perform vector-matrix multiplication on each symbol of the adjoint expression of the first finite field with the isomorphic mapping matrix to obtain the adjoint expression of the second finite field.

[0200] In some embodiments, the error correction module 503 is further configured to: multiply the error codeword polynomial of the second finite field by a vector matrix using an inverse transformation matrix on a per-symbol basis to obtain the error codeword polynomial of the first finite field, wherein the inverse transformation matrix is ​​the inverse of the isomorphic mapping matrix.

[0201] In some embodiments, the determining module 502 includes a key equation solving module, a Qian search module, and a Furni algorithm module, wherein the key equation solving module is configured to determine the error location polynomial and the error estimation polynomial of the second finite field based on the adjoint expression of the second finite field; the Qian search module is configured to determine the error location based on the error location polynomial of the second finite field; and the Furni algorithm module is configured to determine the error codeword polynomial of the second finite field based on the error estimation polynomial and the error location.

[0202] In some optional implementations of this embodiment, the key equation solving module is further configured to: determine the shortest linear recurrence relation of the adjoint of the second finite field as the mislocation polynomial of the second finite field using the Berlekamp-Massey algorithm; and determine the erroneous estimation polynomial of the second finite field based on the adjoint and the erroneous location polynomial.

[0203] In some optional implementations of this embodiment, the key equation solving module is further configured to: determine the error location polynomial and the error estimate polynomial of the second finite field based on the adjoint of the second finite field using the Euclidean algorithm.

[0204] In some optional implementations of this embodiment, the money search module is further configured to: determine the location of the error based on the error location polynomial of the second finite field using the money search algorithm.

[0205] In some optional implementations of this embodiment, the Furni algorithm module is further configured to: determine the error codeword polynomial of the second finite field based on the error occurrence location, the error location polynomial of the second finite field, and the error estimation polynomial of the second finite field using the Furni algorithm.

[0206] In some optional implementations of this embodiment, the decoder is an RS544 decoder with a computational parallelism of 32.

[0207] It should be noted that the collection, gathering, updating, analysis, processing, use, transmission, and storage of user personal information involved in this disclosed technical solution all comply with relevant laws and regulations, are used for legitimate purposes, and do not violate public order and good morals. Necessary measures are taken to prevent unauthorized access to user personal information data and to safeguard user personal information security, network security, and national security.

[0208] According to embodiments of this disclosure, this disclosure also provides an electronic device and a readable storage medium.

[0209] An electronic device includes: one or more processors; and a memory having stored one or more computer programs thereon, wherein when the one or more computer programs are executed by the one or more processors, the one or more processors implement the method of process 200.

[0210] An electronic device includes: one or more decoders for implementing the method of process 200.

[0211] A computer-readable medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method of process 200.

[0212] A computer program product includes a computer program that, when executed by a processor, implements a method of process 200.

[0213] Figure 6 A schematic block diagram of an example electronic device 600 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile decoders, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing decoders. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0214] like Figure 6 As shown, device 600 includes a computing unit 601, which can perform various appropriate actions and processes based on a computer program stored in read-only memory (ROM) 602 or a computer program loaded into random access memory (RAM) 603 from storage unit 608. RAM 603 may also store various programs and data required for the operation of device 600. The computing unit 601, ROM 602, and RAM 603 are interconnected via bus 604. Input / output (I / O) interface 605 is also connected to bus 604.

[0215] Multiple components in device 600 are connected to I / O interface 605, including: input unit 606, such as keyboard, mouse, etc.; output unit 607, such as various types of monitors, speakers, etc.; storage unit 608, such as disk, optical disk, etc.; and communication unit 609, such as network card, modem, wireless transceiver, etc. Communication unit 609 allows device 600 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0216] The computing unit 601 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 601 performs the various methods and processes described above, such as road planning methods. For example, in some embodiments, the road planning method may be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 608. In some embodiments, part or all of the computer program may be loaded and / or installed on device 600 via ROM 602 and / or communication unit 609. When the computer program is loaded into RAM 603 and executed by the computing unit 601, one or more steps of the road planning method described above may be performed. Alternatively, in other embodiments, the computing unit 601 may be configured to perform the road planning method by any other suitable means (e.g., by means of firmware).

[0217] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations may include: implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a memory system, at least one input decoder, and at least one output decoder, and transferring data and instructions to the memory system, the at least one input decoder, and the at least one output decoder.

[0218] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to the processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing decoder, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0219] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, decoder, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, decoders, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0220] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display decoder (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing decoder (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of decoders can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0221] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0222] Computer systems can include clients and servers. Clients and servers are generally geographically separated and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be servers in distributed systems or servers incorporating blockchain technology. Servers can also be cloud servers, or intelligent cloud computing servers or intelligent cloud hosts with artificial intelligence technology.

[0223] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.

[0224] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A decoding method, comprising: determining a syndrome of a first finite field according to a received codeword polynomial of a decoder of a communication system, and converting the syndrome of the first finite field into a syndrome of a second finite field, wherein the first finite field is a non-composite field, and the second finite field is a composite field which is algebraically isomorphic to the first finite field; determining an error codeword polynomial of the second finite field based on the syndrome of the second finite field, wherein the error codeword polynomial is used to indicate error values corresponding to error symbol positions in the received codeword polynomial relative to a transmitted encoded codeword polynomial; converting the error codeword polynomial of the second finite field into an error codeword polynomial of the first finite field, and determining a decoded codeword polynomial based on the received codeword polynomial and the error codeword polynomial of the first finite field.

2. The method of claim 1, wherein, The first finite field is GF(2 10 ), and the second finite field is GF((2 5 ) 2 ).

3. The method of claim 1, wherein, The converting the syndrome of the first finite field into the syndrome of the second finite field comprises: performing vector matrix multiplication on the syndrome of the first finite field with an isomorphic mapping matrix on a per symbol basis to obtain the syndrome of the second finite field.

4. The method of claim 3, wherein, The converting the error codeword polynomial of the second finite field into the error codeword polynomial of the first finite field comprises: performing vector matrix multiplication on the error codeword polynomial of the second finite field with an inverse conversion matrix on a per symbol basis to obtain the error codeword polynomial of the first finite field, wherein the inverse conversion matrix is an inverse matrix of the isomorphic mapping matrix.

5. The method according to any one of claims 1 to 4, wherein, The determining the error codeword polynomial of the second finite field based on the syndrome of the second finite field comprises: determining an error locator polynomial of the second finite field and an error evaluator polynomial of the second finite field based on the syndrome of the second finite field; determining an error occurrence position based on the error locator polynomial of the second finite field; determining the error codeword polynomial of the second finite field based on the error evaluator polynomial of the second finite field and the error occurrence position.

6. The method of claim 5, wherein, The determining the error locator polynomial of the second finite field and the error evaluator polynomial of the second finite field based on the syndrome of the second finite field comprises: determining a shortest linear recurrence of the syndrome of the second finite field as the error locator polynomial of the second finite field by using a Berlekamp-Massey algorithm; determining the error evaluator polynomial of the second finite field based on the syndrome of the second finite field and the error locator polynomial of the second finite field.

7. The method of claim 5, wherein, The determining the error locator polynomial of the second finite field and the error evaluator polynomial of the second finite field based on the syndrome of the second finite field comprises: determining the error locator polynomial of the second finite field and the error evaluator polynomial of the second finite field based on the syndrome of the second finite field by using an Euclidean algorithm.

8. The method of claim 5, wherein, The determining the error occurrence position based on the error locator polynomial of the second finite field comprises: determining the error occurrence position based on the error locator polynomial of the second finite field by using a Chien search algorithm.

9. The method of claim 5, wherein, The determining the error codeword polynomial of the second finite field based on the error evaluator polynomial of the second finite field and the error occurrence position comprises: The error locator polynomial of the second finite field and the error evaluator polynomial of the second finite field are determined based on the error occurrence position by using the Forney algorithm.

10. The method of claim 1, wherein, The decoder is an RS544 decoder, and a calculation parallelism of the decoder is 32. 11.A decoder, comprising: a syndrome solving module configured to determine a syndrome of a first finite field according to a received codeword polynomial, and convert the syndrome of the first finite field into a syndrome of a second finite field, wherein the first finite field is a non-complex field, and the second finite field is a complex field which is algebraically isomorphic to the first finite field; a determining module configured to determine an error codeword polynomial of the second finite field based on the syndrome of the second finite field, wherein the error codeword polynomial is used to indicate error values corresponding to error symbol positions in the received codeword polynomial relative to a transmitted encoding codeword polynomial; a correcting module configured to convert the error codeword polynomial of the second finite field into an error codeword polynomial of the first finite field, and determine a decoding codeword polynomial based on the received codeword polynomial and the error codeword polynomial of the first finite field. 12.An electronic device, comprising: one or more processors; a memory having stored thereon one or more computer programs, when the one or more computer programs are executed by the one or more processors, cause the one or more processors to implement the method according to any one of claims 1-10.

13. A computer readable medium having stored thereon a computer program, wherein, The computer program is executed by a processor to implement the method according to any one of claims 1-10. 14.A computer program product, comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1-10.

15. An electronic device comprising: one or more decoders, the one or more decoders are used to implement the method according to any one of claims 1-10.

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