Template matching prediction for generic video coding

Abstract

Template matching prediction is combined with additional coding tools to provide a robust set of coding / decoding tools by advantageously using syntax elements. Some of these additional coding tools include matrix intra prediction, intra sub-partition, low frequency inseparable transform, multiple transform selection.

Description

[0001] This application is a divisional application of patent application No. 202180065493.5, filed on September 20, 2021, with the title “Template matching prediction for versatile video coding”. TECHNICAL FIELD

[0002] At least one of the embodiments of the present embodiments relates generally to a method or apparatus for video encoding or decoding, compression or decompression. BACKGROUND

[0003] To achieve high compression efficiency, image and video coding schemes usually employ prediction, including motion vector prediction, and transform to exploit the spatial and temporal redundancy in the video content. Generally, intra- or inter-frame prediction is used to exploit the intra- or inter-frame correlation, and then the difference between the original image and the predicted image, usually denoted as prediction error or prediction residual, is transformed, quantized and entropy coded. To reconstruct the video, the compressed data is decoded by the inverse processes corresponding to the entropy coding, quantization, transform and prediction. SUMMARY

[0004] At least one of the embodiments of the present embodiments relates generally to a method or apparatus for video encoding or decoding, and more particularly, to a method or apparatus using template matching prediction in combination with other coding tools as in the VVC (Versatile Video Coding or H.266) standard.

[0005] According to a first aspect, a method is provided. The method comprises a step for signaling use of at least a first encoding tool and a second encoding tool on a video block; and encoding the video block using the first encoding tool and the second encoding tool.

[0006] According to a second aspect, another method is provided. The method comprises a step for parsing a video bitstream to determine at least a first decoding tool and a second decoding tool for a video block; and decoding the video block using at least the first encoding tool and the second encoding tool to be used on the video block.

[0007] According to another aspect, an apparatus is provided. The apparatus comprises a processor. The processor can be configured to encode a video block or decode a bitstream by performing any of the preceding methods.

[0008] According to another general aspect in accordance with at least one embodiment, there is provided a device comprising: an apparatus according to any of the described decoding embodiments; and at least one of: (i) an antenna configured to receive a signal, the signal comprising a video block; (ii) a band limiter configured to limit the received signal to a frequency band comprising the video block; and (iii) a display configured to display an output representative of the video block.

[0009] According to another general aspect in accordance with at least one embodiment, there is provided a non-transitory computer readable medium comprising data content generated according to any of the described encoding embodiments or variants.

[0010] According to another general aspect in accordance with at least one embodiment, there is provided a signal comprising video data generated according to any of the described encoding embodiments or variants.

[0011] According to another general aspect in accordance with at least one embodiment, a bitstream is formatted to comprise data content generated according to any of the described encoding embodiments or variants.

[0012] According to another general aspect in accordance with at least one embodiment, there is provided a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to carry out any of the described decoding embodiments or variants.

[0013] These and other aspects, features, and advantages of the general aspects will become apparent to those of ordinary skill in the art through reading the following detailed description, with appropriate reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 Intra prediction modes in Versatile Video Coding (VVC) are shown.

[0015] Figure 2 An example of template matching prediction (TMP) is shown.

[0016] Figure 3 A standard versatile video compression scheme is shown.

[0017] Figure 4 A standard versatile video decompression scheme is shown.

[0018] Figure 5 An embodiment of a method in the general description aspect is shown.

[0019] Figure 6 Another embodiment of a method in the general description aspect is shown.

[0020] Figure 7 An exemplary apparatus in the context of the described aspects is shown.

[0021] Figure 8 A processor-based system for encoding / decoding in the context of the general description is shown.

[0022] Figure 9 An example of a template matching prediction with a smaller search range is shown.

[0023] Figure 10 An example of a template matching prediction with a smaller search range is shown.

[0024] Figure 11 An example of mutually exclusive search ranges for IBC and TMP is shown.

[0025] Figure 12 The search range allowed within the current CTU is shown.

[0026] Figure 13 SIMD optimization is shown where the line width of R1 and R2 is a multiple of 4.

[0027] Figure 14 SIMD optimization is shown where the top-left part of the template is removed to have the same size as the current block. DETAILED DESCRIPTION

[0028] The embodiments described herein are in the field of video compression and relate generally to video compression and video encoding and decoding, and more specifically aim to improve the intra prediction part of video compression by employing template matching prediction. This mode generates a prediction signal from blocks having a similar template within the reconstructed part of the image.

[0029] To achieve high compression efficiency, image and video coding schemes typically employ prediction, including motion vector prediction, and transforms to exploit spatial and temporal redundancy in the video content. Generally, intra- or inter-frame prediction is used to exploit intra- or inter-frame correlation, followed by transform, quantization, and entropy coding of the difference between the original image and the predicted image, often denoted as prediction error or prediction residual. To reconstruct the video, the compressed data is decoded by the inverse processes corresponding to the entropy coding, quantization, transform, and prediction.

[0030] Intra-picture prediction is a fundamental part of image and video compression. Traditionally, the prediction signal is generated from L-shaped reconstructed pixels (reference samples), assuming they are along different angles. This mechanism is called angular prediction. VVC uses 65 intra-prediction modes, among which 63 angles are defined, as well as DC and Planar prediction (see Figure 1 ).

[0031] Various tools are used to enhance the traditional intra prediction in VVC: - Cross-component linear model (CCLM): the chroma prediction block is generated by a linear model of the luma reconstructed samples.

[0032] - Multi-reference line prediction (MRL): more reference samples are used to generate the prediction block.

[0033] - Intra sub-partition (ISP): the prediction block is divided into 4 sub-blocks that share the same prediction mode.

[0034] - Matrix weighted intra prediction (MIP): the prediction block is generated by multiplying the reference samples by some offline optimized prediction matrix.

[0035] - Intra block copy (IBC): the prediction block is generated by copying another block from the already reconstructed image part, where a displacement vector is signaled in the bitstream.

[0036] Another mode (called multi-transform selection (MTS)) uses the core transform DCT-II or DST-VII combined with DCT-VIII to transform the residual block. The transformed block can be further transformed with a secondary non-separable transform to further compress the residual block. This process is called low-frequency non-separable transform (LFNST).

[0037] Template matching prediction (TMP) is yet another powerful intra prediction mode that is not included in VVC. TMP is performed by searching for a similar L-shaped neighborhood (called patch) to the target block. This is illustrated in the following figure. If TMP is used, the current template is composed of the reconstructed L-shaped neighboring parts. Similar templates are found with small differences to the current template. The blocks belonging to these templates (the target block) are used to generate the prediction signal by averaging them or considering only the one with the smallest template difference.

[0038] Integrating TMP into VVC requires proper interoperability with existing intra tools. Namely: - Interactions with ISP, MIP and MRL - Interactions with transform tools (MTS and LFNST, implicit MTS) - Interactions with combined inter and intra prediction (CIIP) The general aspects described herein relate to these interactions and propose embodiments implementing this mode for VVC.

[0039] Template matching prediction is an optional intra prediction mode in the Joint Exploration Test Model (JEM) of the Joint Video Exploration Team (JVET). It comes with an online process to derive the transform matrix using the same template as for TMP using Karhunen Loueve Transform (KLT). The prediction block is generated by averaging up to 8 candidate blocks.

[0040] In the context of the VVC development, a region-based template matching prediction is proposed in existing works. Compared to the JEM version, these existing works define smaller search regions where an index is signaled to guide the decoder to limit the search to a given region. This reduces the latency on the decoder side.

[0041] The general aspects described herein focus on implementing TMP in the context of VVC, where interactions with other tools as well as signaling are proposed.

[0042] The basic idea of the general aspects described herein is to integrate TMP into VVC, where interactions with these are defined as: - Interactions with ISP, MIP and MRL - Interactions with the transform tools (MTS and LFNST, implicit MTS) - Interactions with combined inter and intra prediction (CIIP) The encoder modules affected are Figure 3 the transform module (125) and the intra prediction module (160).

[0043] The decoder modules affected are Figure 4 the inverse transform module (250) and the intra prediction module (260).

[0044] Signaling of TMP flag A CU flag is signaled to indicate the use of TMP. This flag can be signaled at different levels in the codec design. However, CU level signaling is consistent with other intra tools. The current signaling in VTM is as follows: - The MIP flag (intra_mip_flag) is signaled first to indicate the use of MIP - If MIP is not used, the MRL flag (intra_mip_flag) is signaled to indicate the use of MRL - If MRL is not used, the ISP flag (intra_subpartitions_mode_flag) is signaled to indicate the use of ISP - If MRL is not used (MIP or ISP can be used), the prediction mode is further signaled.

[0045] The corresponding syntax is as follows:

[0046] For TMP, the following considerations are adopted: - MIP shall not be signaled as it cannot be used together with TMP - MRL shall not be signaled as it cannot be used together with TMP - Intra prediction mode shall not be signaled as TMP has no mode to signal.

[0047] - ISP can be used together with TMP, where each sub-partition uses a different matching template.

[0048] Therefore, the TMP flag can be signaled before the MIP flag, such that if all other flags are used, it is not signaled and inferred to be 0. The corresponding changes are as follows (added parts are shaded):

[0049] Where sps_TMP_enabled_flag is an SPS level flag for activating TMP, and intra_TMP_flag is a CU level flag for signaling the use of TMP. MaxTMPSize is the maximum allowed size of TMP. It is fixed or signaled at SPS level.

[0050] In this method, ISP and TMP cannot be used together. This case can be changed to allow the combination. This is done by signaling the TMP flag after or before the ISP flag. It shall only be signaled when MRL and MIP are not used. The following modification is made:

[0051] It should be noted that for both methods, in the case of region-based template matching prediction, additional syntax can be signaled. The additional syntax is signaled immediately after the signal of intra_TMP_flag.

[0052] In addition to the SPS flag, a general constraint flag can be defined for TMP. This is similar to most coding tools in VVC, which have a higher level flag to indicate whether they have been deactivated. The following flag can be added to the specification:

[0053] Where gci_no_tmp_constraint_flag, when equal to 1, indicates that sps_TMP_enabled_flag is equal to 0.

[0054] Interaction with transform tools : TMP can be allowed to be used together with MTS and / or LFNST. However, LFNST depends on the intra prediction mode used for selecting the transform kernel. The same MIP approach can be used. That is, for transform matrix selection, MIP is considered as planar intra prediction. Thus, TMP can be considered as such. That is, TMP is used when LFNST transform kernel corresponding to planar mode is used.

[0055] In addition, since LFNST is used for chroma components, a prediction mode is needed to select the transform matrix. Specifically, for CCLM, if MIP is used for luma component, the prediction mode is considered as planar mode. If TMP is used for luma component, the same operation is made here.

[0056] For MTS, there is a special mode called implicit MTS where MTS flag is not signaled but transform selection is derived from block size. However, transform selection for MIP mode or LFNST is DCT-II. The same transform selection is used for TMP as well.

[0057] The corresponding changes of Working Draft are as follows:

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[0072] To reduce the encoder runtime, MTS can not be allowed to have TMP. That is, when TMP is used as the prediction mode, the encoder does not try all possible MTS modes (DCT-II, DST-VII and DCT-VIII) and does not signal any information to the decoder. Instead, a fixed transform selection can be employed. The first choice is to use DCT-II for the vertical and horizontal directions. Another choice is to employ the implicit transform selection for the ISP mode. That is, the vertical and horizontal transforms are chosen as follows: TrHor = width <= 16? DST7 : DCT2 TrVer = height <= 16? DST7 : DCT2 Interaction with MPMs Most probable mode (MPM) is an efficient way to signal the intra prediction mode. MPM list generation requires knowledge of the current prediction mode. If TMP is used, it can be considered as a planar mode for MPM list generation.

[0073] TMP for luma and chroma components In general, TMP is only used for the luma component. However, it can be extended to use the luma and chroma components. To allow this, the following options are used: - A single flag is used to signal the use of TMP for both the luma and chroma components - Template matching is only performed for the luma component and the same position of the matching block is used for the chroma components (with appropriate scaling according to the chroma formation, e.g., 4:2:0). This is to reduce the complexity by avoiding the duplication of search for all components.

[0074] Interaction with CIIP CIIP is a prediction mode that combines intra and inter prediction. The intra part is the planar mode and the inter part is the regular merge mode. TMP can be used to replace the intra prediction part (planar mode).

[0075] The weighting of the two prediction signals can also be modified. Currently, the weights are defined as follows according to the neighboring coding units:

[0076] Instead, an equal weighting of the inter and intra parts can be used instead: Interaction with IBC In many cases, it is not useful to use both TMP and IBC at the same time, as both of them perform intra prediction by searching within the reconstructed part of the image. Therefore, it is proposed that both IBC and TMP should not be activated together. This can be done by regulating their SPS flags with each other. That is, if the SPS flag of IBC is 1, the SPS flag of TMP should be inferred to be 0. Another way is also possible: if the SPS flag of TMP is 1, the SPS flag of IBC will be inferred to be 0.

[0077] An example of such a method is given in the following syntax table (IBC on TMP regulation):

[0078] Another example (IBC on TMP regulation):

[0079] Figure 5 One embodiment of a method 500 under the general aspects described herein is shown in FIG. 5. The method starts in start block 501 and control proceeds to block 510 to signal use of at least a first encoding tool and a second encoding tool on a video block. Control proceeds from block 510 to block 520 for encoding the video block using the first encoding tool and the second encoding tool.

[0080] Figure 6 One embodiment of a method 600 under the general aspects described herein is shown in FIG. 6. The method starts in start block 601 and control proceeds to block 610 to parse a video bitstream to determine at least a first decoding tool and a second decoding tool for a video block. Control proceeds from block 610 to block 620 for decoding the video block using at least a first encoding tool and a second encoding tool to be used on the video block.

[0081] Figure 7 One embodiment of an apparatus 700 for encoding, decoding, compressing, or decompressing video data using a simplification of coding modes based on neighboring sample dependency parameter models is shown. The apparatus includes a processor 710 and can be interconnected to a memory 720 through at least one port. Both the processor 710 and the memory 720 can also have one or more additional interconnections to external connections.

[0082] The processor 710 is also configured to insert or receive information in a bitstream and to compress, encode, or decode using any of the aspects.

[0083] Single template prediction It was observed that a single matching block provides the best compression efficiency. That is, instead of searching for N similar templates, a single similar template is found and used as the prediction signal. The process is as follows: Figure 9 As shown in the image.

[0084] Variable search range The search range used to find the best matching template (multiple templates) can be set to variable or fixed. The maximum coding gain associated with the maximum complexity occurs when using the full range, that is, finding the template within the entire reconstructed portion of the current frame. However, to reduce complexity, a smaller search range can be used. Figure 10 An example is shown in the image.

[0085] It was found that the maximum coding gain can be achieved with a search range of 1024. However, for video sequences with low resolution, a smaller search range can be used. It was also found that a search range of 64 offers a reasonable trade-off between complexity and gain. Therefore, in this implementation, the search range is defined as: 64, 128, 256, 1024, or all of them. High-level syntax elements can be used to signal the value of the search range.

[0086] Search range within CTU The search range is allowed within the current CTU. That is, when the current block (PU / CU) is inside a larger CTU, predictive candidates can be searched both inside and outside the CTU. However, not all parts within the CTU are decoded and therefore cannot be used as predictive candidates.

[0087] To allow searching within the current CTU, only candidates located in the upper left corner of the current block are used. This is in Figure 12 As shown in the diagram, the darker search range is within the current CTU, where all pixels are decoded and reconstructed. A search range outside the CTU is also used, and the best candidate with the smallest template difference is used as the prediction block.

[0088] Template matching CABAC context derivation To signal a template match, an appropriate context for CABAC must be derived. In this implementation, the same approach as MIP is followed. This is consistent with the design of VVC. Four contexts are used: 1- Initialize the context with 0 2- If the left-hand CU uses template matching prediction, then add one. 3- If the CU above uses template matching prediction, then add one. 4. If the width is greater than twice the height, or the height is greater than twice the width, then set the context to 3. That is, the four categories are: 1 - No adjacent CU is using TMP 2 - One adjacent CU is using TMP 3 - Two adjacent CUs are using TMP 4 - The CU shape is elongated in one dimension.

[0089] A similar approach can be used without using the 4th context.

[0090] Variable maximum size The maximum CU size using TMP can be variable. It was found that up to 16x16 CUs provide the maximum coding gain while reducing the complexity. The value of the maximum size can be signaled with a high-level syntax element or can be kept to 16.

[0091] Removed redundant signaling The signaling of the TMP flag can be redundant as in some cases it is known that TMP cannot be used. One example of such a case is when the CU size is larger than the maximum allowed size of the TMP, when considering the previous implementation (variable maximum size), or when there are not enough reconstructed parts to search for a similar template. For example, for a CU of size 64x64, and a reconstructed part smaller than 64x64 plus the size of the template, TMP cannot be used and therefore its flag should not be signaled but inferred to be 0.

[0092] Search range outside current CTU The search range can be simplified to not include the current CTU. It was observed that by including the current CTU in the search range, there is no coding gain improvement. Therefore, as a simplification step, it is proposed to remove this region from the search range.

[0093] SIMD optimization By employing SIMD to compute the template difference, the runtime can be reduced. That is, the difference between the pixels of two templates can be done in parallel via SIMD optimization.

[0094] For SIMD operation, it is required that each comparison line is a multiple of 4. In Figure 13 , it is assumed that the block size (b_width and b_height) is always a multiple of 4 because in VVC, the block size is a multiple of 4. Therefore, to have a comparison of a multiple of 4, the line width of R1 and R2 (R1_width and R2_width) Figure 13 must be a multiple of 4: 1 - R1: b_width + t_width must be a multiple of 4. Therefore, t_width must be a multiple of 4.

[0095] 2 - R2: T_width must be a multiple of 4. Thus, T_width must be a multiple of 4.

[0096] Otherwise, the top-left part of the template is removed to have the same size as the current block. This is illustrated in Figure 14

[0097] By doing so, R1 width is equal to b_width (always a multiple of 4), and R2 is transposed before computing the difference, and will have a width of b_height (always a multiple of 4) at the end. This method provides SIMD optimization regardless of the template size.

[0098] Mutually exclusive search range for IBC and TMP In this embodiment, IBC and TMP use different reference regions. Typically, IBC uses one CTU region as reference. Thus, TMP should use the remaining part of the picture that has been reconstructed as reference.

[0099] In the case of a CTU of size 32x32 or 64x64, IBC can use more than one CTU region as reference, but always on the same CTU line as the current coding unit, and in this case, TMP should use all the reconstructed pictures except the current CTU line as reference.

[0100] Figure 11 An example of mutually exclusive search ranges for IBC and TMP is illustrated in

[0101] The embodiments described herein include various aspects, including tools, features, embodiments, models, methods, and the like. Many of these aspects are specifically described, and at least the individual features are illustrated, often in a manner that can sound limiting. However, this is for clarity of description, and does not limit the application or scope of these aspects. In fact, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, these aspects can also be combined and interchanged with aspects described in previous filings.

[0102] The aspects described and contemplated in this patent application can be implemented in many different forms. Figure 3 , Figure 4 and Figure 8 Some embodiments are provided, but other embodiments are contemplated, and Figure 3 , Figure 4 and Figure 8 ​The discussion of aspects is not limited to the breadth of a particular implementation. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects can be implemented as methods, apparatus, computer-readable storage media having stored thereon instructions for encoding or decoding video data according to any of the described methods, and / or computer-readable storage media having stored thereon a bitstream generated according to any of the described methods.

[0103] In this application, the terms “reconstruct” and “decode” can be used interchangeably, the terms “pixel” and “sample” can be used interchangeably, and the terms “image,” “picture,” and “frame” can be used interchangeably. Generally, but not necessarily, the term “reconstruct” is used at the encoding end, and “decode” is used at the decoding end.

[0104] Various methods are described herein, and each of the methods includes one or more steps or actions for accomplishing the methods. Unless a specific order of steps or actions is required for proper operation of a method, the order and / or use of specific steps and / or actions can be modified or combined.

[0105] Various methods and other aspects described in this patent application can be used to modify modules of video encoder 100 and decoder 200 (e.g., intra prediction, entropy encoding and / or decoding modules (160, 360, 145, 330)) as shown in Figure 10 and Figure 11 Furthermore, the inventive aspects are not limited to VVC or HEVC, and can be applied to, for example, other standards and recommendations (whether preexisting or future-developed) and extensions of any such standards and recommendations (including VVC and HEVC). Unless otherwise indicated or technically precluded, aspects described in this application can be used individually or in combination.

[0106] Various numerical values are used in this application. The specific values are for example purposes, and the described aspects are not limited to these specific values.

[0107] Figure 3 An encoder 100 is shown. Variations of this encoder 100 are contemplated, but for clarity the encoder 100 is described below without describing all contemplated variations.

[0108] Before being encoded, the video sequence can undergo pre-encoding processing (101), e.g., applying a color transform to the input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components in order to get a signal distribution more resilient to compression (e.g., using a histogram equalization of one of the color components). Metadata can be associated with the pre-processing and attached to the bitstream.

[0109] As described below, in the encoder 100, pictures are encoded by the encoder elements. The pictures to be encoded are partitioned (102) and processed in units, e.g., CUs. Each unit is encoded, e.g., using intra mode or inter mode. When a unit is encoded in intra mode, the unit performs intra prediction (160). In inter mode, motion estimation (175) and compensation (170) are performed. The encoder decides (105) which of intra mode or inter mode to use for encoding the unit, and indicates the intra / inter decision by, e.g., a prediction mode flag. The prediction residual is calculated, e.g., by subtracting (110) the prediction block from the original image block.

[0110] The prediction residual is then transformed (125) and quantized (130). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform, and apply quantization directly on the untransformed residual signal. The encoder can bypass both the transform and quantization, i.e., encode the residual directly without applying the transform or quantization processes.

[0111] The encoder decodes the encoded blocks to provide references for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (155) to reconstruct the image block. A loop filter (165) is applied to the reconstructed picture to perform, e.g., deblocking / Sample Adaptive Offset (SAO) filtering, to reduce coding artifacts. The filtered image is stored in the reference picture buffer (180).

[0112] Figure 4 A block diagram of a video decoder 200 is shown. In the decoder 200, the bitstream is decoded by the decoder elements, as described below. The video decoder 200 generally performs a decoding stage opposite to the encoding stage as described above with respect to the encoder 100. Figure 3 The encoder 100 generally also performs video decoding as part of encoding video data.

[0113] In particular, the input to the decoder includes a video bitstream, which can be generated by the video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coded information. Picture partitioning information indicates how the pictures are partitioned. Thus, the decoder can partition (235) the pictures according to the decoded picture partitioning information. The transform coefficients are dequantized (240) and inverse transformed (250) to decode the prediction residuals. The decoded prediction residuals and prediction blocks are combined (255) to reconstruct the image blocks. The prediction blocks can be obtained (270) by intra prediction (260) or motion-compensated prediction (i.e., inter prediction) (275). Loop filters (265) are applied to the reconstructed images. The filtered images are stored in the reference picture buffer (280).

[0114] The decoded pictures can also be subjected to post-decoding processing (285), e.g., inverse color transform (e.g., transform from YcbCr 4:2:0 to RGB 4:4:4) or inverse remapping that performs the inverse of the remapping performed in the pre-encoding process (101). The post-decoding processing can use metadata derived in the pre-encoding process and signaled in the bitstream.

[0115] Figure 8 A block diagram illustrating an example of a system in which various aspects and embodiments can be implemented is shown. The system 1000 can embody an apparatus including various means for performing the various functions disclosed herein and configured to perform one or more of the aspects described in this document. Examples of such apparatus include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 1000 can individually or collectively be embodied in a single integrated circuit (IC), multiple ICs, and / or a

[0116] The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing the various aspects described in this document, for example. The processor 1010 can include embedded memory, input output interface, and various other circuitries known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and / or a non-volatile memory device). The system 1000 includes a storage device 1040, which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and / or optical disk drive. The storage device 1040 can include an internal storage device, an attached storage device (including a removable and non-removable storage device), and / or a network accessible storage device, as non-limiting examples.

[0117] The system 1000 includes an encoder / decoder module 1030 configured, for example, to process data to provide encoded video or decoded video, and the encoder / decoder module 1030 can include its own processor and memory. The encoder / decoder module 1030 represents module(s) that can be included in a device to perform the encoding and / or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, the encoder / decoder module 1030 can be implemented as a separate element in the system 1000, or can be incorporated in the processor 1010 as a combination of hardware and software as known to those skilled in the art.

[0118] Program code to be loaded onto the processor 1010 or the encoder / decoder 1030 to perform the various aspects described in this document can be stored in the storage device 1040 and then loaded onto the memory 1020 for execution by the processor 1010. In accordance with various embodiments, one or more of the processor 1010, the memory 1020, the storage device 1040, and the encoder / decoder module 1030 can store one or more of a variety of items during the performance of the processes described in this document. Such storage items can include, but are not limited to, input video, decoded video or partially decoded video, bitstreams, matrices, variables, and intermediate or final results of processing equations, formulas, operations, and operational logic.

[0119] In some embodiments, memory within the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions as well as provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device can be a processor 1010 or encoder / decoder module 1030) is used for one or more of these functions. The external memory can be memory 1020 and / or storage 1040, such as dynamic volatile memory and / or non-volatile flash memory. In several embodiments, the external non-volatile flash memory is used to store, for example, the operating system of the television. In at least one embodiment, fast external dynamic volatile memory such as RAM is used as working memory for video encoding and decoding operations, such as MPEG-2 (MPEG refers to Moving Pictures Expert Group, MPEG-2 is also known as ISO / IEC 13818, and 13818-1 is also known as H.222, 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard developed by the Joint Video Expert Team (JVET)).

[0120] Input to elements of the system 1000 can be provided through various input devices as shown in block 1130. Such input devices include, but are not limited to: (i) a radio frequency (RF) portion that receives RF signals transmitted, for example, over the air by a broadcaster; (ii) a component (COMP) input terminal (or set of COMP input terminals); (iii) a universal serial bus (USB) input terminal; and / or (iv) a high-definition multimedia interface (HDMI) input terminal. Figure 8 Other examples, not shown in FIG. 11, include composite video.

[0121] In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements appropriate for (i) selecting a desired frequency (also known as selecting a signal, or limiting a signal frequency band to one frequency band), (ii) downconverting the selected signal, (iii) bandlimiting again to a narrower frequency band to select a signal frequency band, which can be referred to in some embodiments as a channel, for example, (iv) demodulating the downconverted and bandlimited signal, (v) performing error correction, and (vi) demultiplexing to select a desired data packet stream. The RF portion of various embodiments includes one or more elements for performing these functions, such as frequency selectors, signal selectors, bandlimiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various ones of these functions, including, for example, downconverting a received signal to a lower frequency (such as an intermediate frequency or a near-baseband frequency) or to a baseband frequency. In one set-top box embodiment, the RF portion and its associated input processing elements receive an RF signal transmitted over a wired (e.g., cable) medium, and perform frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements performing similar or different functions. Adding elements can include inserting elements between existing elements, such as inserting amplifiers and analog-to-digital converters. In various embodiments, the RF portion includes an antenna.

[0122] Additionally, the USB and / or HDMI terminals can include respective interface processors for connecting the system 1000 to other electronic devices across USB and / or HDMI connections. It will be appreciated that various aspects of input processing (such as Reed-Solomon error correction) can be implemented as desired, such as within a separate input processing IC or within the processor 1010. Similarly, various aspects of USB or HDMI interface processing can be implemented as desired, such as within a separate interface IC or within the processor 1010. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, the processor 1010 and the encoder / decoder 1030, which operates in conjunction with memory and storage elements to process the data stream as desired for presentation on an output device.

[0123] The various elements of the system 1000 can be provided in an integrated housing, within which the various elements can be interconnected and transmit data therebetween using suitable arrangements of connections, such as internal buses as known in the art, including Inter-IC (I2C) buses, wiring, and printed circuit boards.

[0124] The system 1000 includes a communication interface 1050 that enables communication with other devices via a communication channel 1060. The communication interface 1050 can include, but is not limited to, a transceiver configured to transmit and to receive data over the communication channel 1060. The communication interface 1050 can include, but is not limited to, a modem or network card, and the communication channel 1060 can be implemented, for example, within a wired and / or a wireless medium.

[0125] In various embodiments, data is streamed or otherwise provided to the system 1000 using a wireless network such as a Wi-Fi network, e.g., IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). Wi-Fi signals in these embodiments are received through the communication channel 1060 and the communication interface 1050 that are adapted for Wi-Fi communication. The communication channel 1060 of these embodiments is typically connected to an access point or router that provides access to outside networks, including the Internet, for allowing streaming applications and other over-the-top communications. Other embodiments provide streaming data to the system 1000 using a set-top box that delivers data through an HDMI connection of the input block 1130. Other embodiments provide streaming data to the system 1000 using an RF connection of the input block 1130. As noted above, various embodiments provide data in a non-streaming manner. In addition, various embodiments use wireless networks other than Wi-Fi, e.g., a cellular network or a Bluetooth network.

[0126] The system 1000 can provide output signals to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be used in a television set, a tablet computer, a notebook computer, a cellular telephone (mobile phone), or another device. The display 1100 can also be integrated with other components (e.g., as in a smartphone), or integrated with separate components (e.g., an external monitor for a laptop computer). In various examples of embodiments, the other peripheral devices 1120 include one or more of a stand-alone digital video recorder (or digital versatile recorder) (DVR, which can represent both terms), a disc player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide a function based on the output of the system 1000. For example, a disc player performs the function of playing the output of the system 1000.

[0127] In various embodiments, control signals are communicated among system 1000 and display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV.Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 1000 through respective interfaces 1070, 1080, and 1090 via dedicated connections. Alternatively, output devices can be connected to system 1000 using the communications channel 1060 via the communications interface 1050. Display 1100 and speakers 1110 can be integrated with other components of system 1000 in a single unit, such as in a television. In various embodiments, display interface 1070 includes a display driver such as, for example, a timing controller (T Con) chip.

[0128] If the RF portion of input 1130 is part of a separate set-top box, display 1100 and speakers 1110 can alternatively be separate from one or more of the other components. In various embodiments in which display 1100 and speakers 1110 are external components, the output signals can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.

[0129] These embodiments can be performed by computer software executed by processor 1010, or by hardware, or by a combination of hardware and software. As a non-limiting example, these embodiments can be implemented by one or more integrated circuits. Memory 1020 can be of any type appropriate for the technology environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory and removable memory, as non-limiting examples. Processor 1010 can be of any type appropriate for the technology environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.

[0130] Various implementations participate in decoding. As used in this application, “decoding” can include all or a portion of the processes performed on a received encoded sequence to produce a final output suitable for display, for example. In various embodiments, such processes include one or more processes typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such processes also or alternatively include processes performed by decoders of the various implementations described in this application.

[0131] As a further example, in an embodiment, "decoding" refers only to entropy decoding, in another embodiment, "decoding" refers only to differential decoding, and in yet another embodiment, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" refers specifically to a subset of operations or refers broadly to a more extensive decoding process will be clear based on the context of the specific description, and is believed to be well understood by those skilled in the art.

[0132] Various implementations participate in encoding. In a similar manner as discussed above with respect to "decoding," "encoding" as used in this application can encompass all or a portion of the process performed, e.g., on an input video sequence, to produce an encoded bitstream. In various embodiments, such a process includes one or more processes typically performed by an encoder, e.g., partitioning, differential encoding, transform, quantization, and entropy encoding. In various embodiments, such a process also includes or alternatively includes processes performed by the encoders of the various implementations described in this application.

[0133] As a further example, in an embodiment, "encoding" refers only to entropy encoding, in another embodiment, "encoding" refers only to differential encoding, and in yet another embodiment, "encoding" refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process" refers specifically to a subset of operations or refers broadly to a more extensive encoding process will be clear based on the context of the specific description, and is believed to be well understood by those skilled in the art.

[0134] Note that the syntax elements used herein are descriptive terms. Thus, they do not preclude the use of other syntax element names.

[0135] When the accompanying drawings present a flow diagram, it is understood that they also provide a block diagram of a corresponding apparatus. Similarly, when the accompanying drawings present a block diagram, it is understood that they also provide a flow diagram of a corresponding method / process.

[0136] Various embodiments can refer to parametric models or rate-distortion optimization. Specifically, during the encoding process, a balance or trade-off between rate and distortion is typically considered, often taking into account constraints of computational complexity. This can be measured by a rate-distortion optimization (RDO) metric or by a least mean square (LMS), mean absolute error (MAE), or other such measures. Rate-distortion optimization is often formulated as minimizing a rate-distortion function, which is a weighted sum of rate and distortion. There are different approaches to solve the rate-distortion optimization problem. For example, these approaches can be based on extensive testing of all encoding options, including all considered modes or encoding parameter values, and a full evaluation of their encoding cost as well as the relevant distortion of the reconstructed signal after encoding and decoding. Faster approaches can also be used to reduce the encoding complexity, in particular for the computation of an approximate distortion based on a prediction or predicted residual signal rather than the reconstructed residual signal. A mix of these two approaches can also be used, such as by using an approximate distortion for only some of the possible encoding options, while using a full distortion for other encoding options. Other approaches evaluate only a subset of the possible encoding options. More generally, many approaches employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a full evaluation of both the encoding cost and the relevant distortion.

[0137] The detailed and particular embodiments described herein can be implemented in, for example, a method or process, an apparatus, a software program, data streams, or signals. Even if discussed in the context of only a single form of specific implementation (for example, discussed only as a method), implementations of the features discussed can be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which is generally a processor of a processing device including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, a computer, a cell phone, a portable / personal digital assistant (“PDA”), and other devices that facilitate the communication of information between end users.

[0138] Reference to “one embodiment” or “an embodiment” or “one implementation” or “an implementation,” as well as other variants thereof, means that a particular feature, structure, characteristic, and so forth described in connection with an embodiment is included in at least one embodiment. Thus, the appearance of the phrase “in one embodiment” or “in an embodiment” or “in one implementation” or “in an implementation,” as well as any other variations thereof, throughout this application, are not necessarily all referring to the same embodiment. Additionally, the terms “comprising,” “including,” “having” and the like, as used herein, are specifically intended to be construed as open-ended terms (for example, the terms “comprising,” “including,” “having,” and / or the like, should be interpreted as “including” but not “consisting of”).

[0139] Additionally, the present application can refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

[0140] Moreover, the application can relate to “accessing” a variety of information. Accessing information can include one or more of, for example, receiving information, retrieving information (e.g., from storage), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0141] In addition, the application can relate to “receiving” a variety of information. As with “accessing,” receiving is intended to be a broad term. Receiving information can include one or more of, for example, accessing information or retrieving information (e.g., from storage). Moreover, “receiving” is generally involved, in one way or another, during operations such as, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0142] It should be understood that any of the following “ / ”, “and / or”, and “at least one of” are intended to encompass only selecting one of the items in the first list (A), or only selecting one of the items in the second list (B), or selecting both items (A and B). As a further example, in the cases of “A, B, and / or C” and “at least one of A, B, and C,” such phrasing is intended to cover the

[0143] Also, as used herein, the word "signal" refers to, among other things, indicating something to a corresponding decoder. For example, in certain implementations, an encoder signals a particular one of a plurality of transforms, coding modes, or flags. As such, in one implementation, the same transform, parameter, or mode is used on both the encoder side and the decoder side. Thus, for example, the encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter along with others, signaling can be used without transmission (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functionality, bit savings are achieved in various implementations. It should be understood that signaling can be implemented in various ways. For example, in various implementations, information is signaled to a corresponding decoder using one or more syntax elements, flags, and the like. While the foregoing relates to the verb form of the word "signal," the word "signal" can also be used as a noun herein.

[0144] It will be apparent to one of ordinary skill in the art that a particular implementation can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method or data generated by one of the implementations. For example, a signal can be formatted to carry a bitstream of a particular implementation. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

[0145] The preceding sections describe a number of implementations, across a variety of claim categories and types. Features of the implementations can be provided individually or in any combination. Further, implementations can include one or more of the following features, devices, or aspects, individually or in any combination, across various claim categories and types: • signaling that at least a first encoding tool and a second encoding tool can be used on a video block; and encoding the video block using the first encoding tool and the second encoding tool.

[0146] • parsing a video bitstream to determine at least a first decoding tool and a second decoding tool for a video block; and decoding the video block using at least a first encoding tool and a second encoding tool that will be used on the video block.

[0147] • Any of the above embodiments with first encoding / decoding tools including template matching prediction and second encoding / decoding tools including one of matrix intra prediction, intra sub-partition, low frequency non-separable transform, multi-transform selection and intra sub-partition.

[0148] • Any of the above embodiments using a single matching block for use as the prediction signal.

[0149] • Any of the above embodiments using a variable or fixed search range.

[0150] • Any of the above embodiments with context derivation for CABAC signaling the flag of template matching.

[0151] • Any of the above embodiments with the size of the coding unit using TMP can be variable.

[0152] • Any of the above embodiments removing redundant signaling.

[0153] • Any of the above embodiments with search range outside the current coding tree unit.

[0154] • Any of the above embodiments with IBC and TMP using different reference regions.

[0155] • Using a general constraint flag for TMP to indicate deactivation.

[0156] • Where TMP is used with LFNST transform kernel corresponding to planar mode.

[0157] • Multi-transform selection with template matching prediction is not allowed.

[0158] • TMP is used for luma and chroma components with syntax to signal the use of TMP for both luma and chroma components.

[0159] • Template matching is used for luma components with the position of the matching block being the same as the position of the matching block for chroma components.

[0160] • Prediction candidates inside and outside the coding tree unit are allowed.

[0161] • SIMD is used to calculate the template difference.

[0162] • Bitstream or signal including one or more of the described syntax elements or variations thereof.

[0163] • Bitstream or signal including syntax conveying information generated according to any of the described embodiments.

[0164] • creating and / or transmitting and / or receiving and / or decoding according to any of the described embodiments.

[0165] • a method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the described embodiments.

[0166] • inserting in the signaling a syntax element enabling the decoder to determine the decoded information in a manner corresponding to the manner used by the encoder.

[0167] • creating and / or transmitting and / or receiving and / or decoding a bitstream or signal including one or more of the described syntax elements or variations thereof.

[0168] • a television, set-top box, cell phone, tablet, or other electronic device performing the transform method according to any of the described embodiments.

[0169] • a television, set-top box, cell phone, tablet, or other electronic device determining and displaying the resulting image (e.g., using a monitor, screen, or other type of display) according to any of the described embodiments performing the transform method.

[0170] • a television, set-top box, cell phone, tablet, or other electronic device selecting, band-limiting, or tuning (e.g., using a tuner) a channel to receive a signal including an encoded image and performing the transform method according to any of the described embodiments.

[0171] • a television, set-top box, cell phone, tablet, or other electronic device receiving (e.g., using an antenna) a signal including an encoded image over the air and performing the transform method.

Claims

1. A method, the method comprising: Signal to notify the use of at least the first and second encoding tools on the video block; as well as The video block is encoded using the first encoding tool and the second encoding tool.

2. An apparatus, the apparatus comprising: Processor, the processor being configured to: Signal to notify the use of at least the first and second encoding tools on the video block; as well as The video block is encoded using the first encoding tool and the second encoding tool.

3. A method, the method comprising: Analyze the video bitstream to determine at least a first decoding tool and a second decoding tool for video blocks; as well as The video block will be decoded using at least the first encoding tool and the second encoding tool to be used on the video block.

4. An apparatus, the apparatus comprising: Processor, the processor being configured to: Analyze the video bitstream to determine at least a first decoding tool and a second decoding tool for video blocks; as well as The video block will be decoded using at least the first encoding tool and the second encoding tool to be used on the video block.

5. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein a universal constraint flag is used for TMP to indicate deactivation.

6. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein TMP is used when using an LFNST transform core corresponding to a planar mode.

7. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, does not allow for multiple transformation selection using template matching prediction.

8. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein the TMP is used for both the luminance and chrominance components, and a syntax is used to signal that the TMP is used for both the luminance and chrominance components.

9. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein template matching is used for the luminance component, and the same position of the matching blocks is used for the chrominance component.

10. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein prediction candidates are allowed from both inside and outside the coding tree unit.

11. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein SIMD is used for calculating template differences.

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