Sorting machine combined image inspection method and system, computer and storage medium

Abstract

The invention provides a combined image checking method and system for a sorting machine, a computer and a storage medium. The combined image checking method for the sorting machine comprises the steps that a wafer is scanned, a combined image file is formed, a plurality of preset verification coordinates are set, and whether coordinate data of the combined image file contain all the preset verification coordinates or not is judged; if the coordinate data of the composite image file does not contain all the preset verification coordinates, determining a plurality of preset verification coordinates contained in the coordinate data as a plurality of to-be-verified coordinates; identifying the crystal grains according to the to-be-verified coordinates, and judging whether the to-be-verified coordinates meet a first verification standard or not; if the to-be-verified coordinate accords with the first verification standard, identifying a crystal grain according to an auxiliary verification coordinate, and judging whether the to-be-verified coordinate accords with a second verification standard; and calculating a non-wafer verification success rate based on the number of the successfully verified coordinates and the number of the to-be-verified coordinates. According to the method, various wafer conditions can be effectively compatible, misjudgment of image combination inspection is reduced, and manual intervention is greatly reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, in particular to a sorting machine map checking method, system, computer and storage medium. BACKGROUND

[0002] LED is a kind of semiconductor electronic component widely used in display, lighting and intelligent equipment, in the production process of LED, wafer needs to be tested and sorted, and sorting operation is usually completed by a sorting machine.

[0003] In the sorting operation link, in order to ensure the accuracy of picking up the crystal, the sorting machine scans the wafer and locates each die to generate a scanning map, and then combines the map with the front-end document of the wafer, and then performs map checking to ensure that the position and coordinates of the chip die are matched correctly. In the continuous sorting process, since the carrier of the wafer is a ductile blue film, the blue film continues to shrink with the passage of time, resulting in continuous changes in the position of the chip, which will trigger a second scan when the change reaches a certain degree, and then the second scan needs to be combined again and checked again. Therefore, the accuracy of the checking map is of great significance to wafer production.

[0004] In the prior art, the map checking of the wafer can be performed automatically by verifying whether the map is accurate according to a plurality of verification coordinates preset on the entire wafer. However, the map checking has uncertainty. In the process of sorting and picking up the crystal, the wafer may be broken or have appearance damage, resulting in missing or unrecognizable die corresponding to the verification coordinates. For the continuous operation process, there is a possibility that the die corresponding to the verification coordinates has been picked up in the previous step after partial picking up, which will affect the judgment result of the automatic map checking, and often needs manual intervention. Manual checking of the map in multiple links leads to low production efficiency and a large amount of manpower and material resources. SUMMARY

[0005] In view of the deficiencies of the prior art, the present application aims to provide a sorting machine map checking method, system, computer and storage medium, which aims to solve the technical problems of the prior art that automatic map checking is difficult to be used for wafer breakage, wafer appearance damage and the like, and has insufficient applicability.

[0006] In order to achieve the above-mentioned purpose, the present application is realized by the following technical scheme: A sorting machine map checking method, comprising the following steps: Scanning a wafer, obtaining a scan file and a coordinate data file of the wafer, performing point matching and image matching on the scan file and the coordinate data file to form a combined image file, setting a plurality of preset verification coordinates, the wafer comprising a plurality of mark regions, one mark region corresponding to a plurality of preset verification coordinates, and judging whether all the preset verification coordinates are contained in the coordinate data of the combined image file; If all the preset verification coordinates are not contained in the coordinate data of the combined image file, a plurality of preset verification coordinates contained in the coordinate data are determined as a plurality of to-be-verified coordinates; According to the to-be-verified coordinates, a die is identified to determine whether the to-be-verified coordinates meet a first verification standard; If the to-be-verified coordinates meet the first verification standard, auxiliary verification coordinates corresponding to the to-be-verified coordinates are obtained, and according to the auxiliary verification coordinates, a die is identified to determine whether the to-be-verified coordinates meet a second verification standard, and if the to-be-verified coordinates meet the second verification standard, the to-be-verified coordinates are determined as verification success coordinates; Based on the number of verification success coordinates and the number of to-be-verified coordinates, a non-wafer verification success rate is calculated, and a non-wafer processing result is formed according to the non-wafer verification success rate.

[0007] Compared with the prior art, the beneficial effects of the present application are that: by screening a plurality of preset verification coordinates, a plurality of to-be-verified coordinates are selected, for the case of wafer fragments, wafer appearance damage or non-wafer wafers for which the dies used for verification have been picked, it can be avoided that multiple verification coordinates are misjudged as verification failure in automatic combined image inspection due to the fact that the coordinate data does not contain part of the preset verification coordinates, thereby causing misjudgment in automatic combined image inspection, effectively reducing misjudgment and also benefiting from greatly reducing manual intervention, greatly saving manpower and improving production efficiency; by combining the to-be-verified coordinates and the auxiliary verification coordinates for joint verification, it is beneficial to improve the accuracy of verification, and good combined image inspection accuracy is still maintained after discarding part of the preset verification coordinates.

[0008] Further, after the step of judging whether all the preset verification coordinates are contained in the coordinate data of the combined image file, the following steps are further included: If all the preset verification coordinates are contained in the coordinate data, the wafer is a wafer wafer, and all the preset verification coordinates are determined as wafer verification coordinates; According to the wafer verification coordinates, a die is identified, and if a die is identified, auxiliary wafer verification coordinates corresponding to the wafer verification coordinates are obtained; According to the auxiliary wafer verification coordinates, a die is identified, and if no die is identified, the wafer verification coordinates are determined as wafer verification success coordinates. Based on the number of successful coordinates and the number of wafer verification coordinates, the wafer verification success rate is calculated, and the wafer processing result is formed according to the wafer verification success rate.

[0009] Further, the step of forming a wafer processing result according to the wafer verification success rate comprises: Obtaining a wafer success rate threshold, if the wafer verification success rate is greater than or equal to the wafer success rate threshold, the wafer processing result is automatically entered into the production process; If the wafer verification success rate is less than the wafer success rate threshold, the wafer processing result is card control, and the wafer card control times are recorded, and the wafer is recombined or automatically returned according to the wafer card control times after card control.

[0010] Further, the step of judging whether the to-be-verified coordinate meets the first verification standard comprises: If the die is identified on the to-be-verified coordinate, the to-be-verified coordinate meets the first verification standard, and if the die is not identified on the to-be-verified coordinate, the to-be-verified coordinate does not meet the first verification standard.

[0011] Further, the auxiliary verification coordinate is located in the mark area corresponding to the to-be-verified coordinate, and the step of judging whether the to-be-verified coordinate meets the second verification standard comprises: If the die is not identified on the auxiliary verification coordinate, the to-be-verified coordinate meets the second verification standard, and if the die is identified on the auxiliary verification coordinate, the to-be-verified coordinate does not meet the second verification standard.

[0012] Further, the step of forming a non-wafer processing result according to the non-wafer verification success rate comprises: Obtaining a broken piece success rate threshold, if the non-wafer verification success rate is greater than or equal to the broken piece success rate threshold, the non-wafer processing result is automatically entered into the production process; If the non-wafer verification success rate is less than the broken piece success rate threshold, the non-wafer processing result is card control, and the broken piece card control times are recorded, and the wafer is recombined or automatically returned according to the broken piece card control times after card control.

[0013] Further, after the step of the non-wafer processing result being automatically entered into the production process, it further comprises: The picking order of the die corresponding to the verification success coordinate is set at the end of the picking sequence.

[0014] A sorting machine map checking system applies the sorting machine map checking method as described in the above technical solution, and the system comprises: The acquisition module is configured to scan a wafer, acquire a scan image file and a coordinate data file of the wafer, perform point-to-image matching on the scan image file and the coordinate data file to form a composite image file, set a plurality of preset verification coordinates, the wafer comprises a plurality of mark regions, and one mark region corresponds to a plurality of preset verification coordinates; and determine whether all the preset verification coordinates are contained in the coordinate data of the composite image file. The establishment module is configured to, if all the preset verification coordinates are not contained in the coordinate data of the composite image file, establish a plurality of the preset verification coordinates contained in the coordinate data as a plurality of to-be-verified coordinates. The first verification module is configured to identify a die according to the to-be-verified coordinates to determine whether the to-be-verified coordinates meet a first verification standard. The second verification module is configured to, if the to-be-verified coordinates meet the first verification standard, acquire auxiliary verification coordinates corresponding to the to-be-verified coordinates, identify a die according to the auxiliary verification coordinates to determine whether the to-be-verified coordinates meet a second verification standard, and if the to-be-verified coordinates meet the second verification standard, establish the to-be-verified coordinates as verification success coordinates. The processing module is configured to calculate a non-wafer verification success rate based on a quantity of the verification success coordinates and a quantity of the to-be-verified coordinates, and form a non-wafer processing result according to the non-wafer verification success rate. A computer comprises a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor implements the sorting machine composite image inspection method as described in the above technical solutions when executing the computer program.

[0015] A storage medium has a computer program stored thereon, and the computer program is executable on a processor to implement the sorting machine composite image inspection method as described in any one of the above technical solutions. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A flowchart of a sorting machine composite image inspection method in a first embodiment of the present application is shown in the figure. Figure 2 A structural block diagram of a sorting machine composite image inspection system in a second embodiment of the present application is shown in the figure. The following specific embodiments will further illustrate the present application in combination with the above figures. DETAILED DESCRIPTION

[0017] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the related drawings. The figures show several embodiments of the present application. However, the present application can be implemented in many different forms, and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0018] It should be noted that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. When an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements can also be present. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0020] Referring to Figure 1 The sorting machine combined image inspection method in the first embodiment of the present application includes the following steps: Step S10: scanning a wafer to obtain a scanning image file and a coordinate data file of the wafer, performing point-to-combined image on the scanning image file and the coordinate data file to form a combined image file, setting a plurality of preset verification coordinates, the wafer including a plurality of mark regions, one mark region corresponding to a plurality of preset verification coordinates, and judging whether all the preset verification coordinates are contained in the coordinate data of the combined image file; Preferably, in the sorting operation, the sorting machine scans the wafer to locate each die to generate a mapping diagram, i.e. the scanning file, and the mapping diagram is combined with the front-end document of the wafer to ensure the accuracy of the picking process. The steps of the sorting operation are in turn wafer loading, scanning, mapping, mapping checking, sorting, and wafer unloading. In the sorting operation, the wafer carrier is a blue film, which has strong ductility. During the sorting operation and the longer operation process of multiple picking and sorting, the blue film will continue to shrink over time, causing the position of the chip die to change continuously. If the change is significant and not corrected, picking errors will occur, causing serious quality problems. Therefore, a plurality of special appearance dies are arranged on the wafer to form mark points. The position of the mark points is automatically checked at regular intervals during the operation to automatically check the accuracy of the mapping. When the mapping is correct, the correct position of the die can be obtained during the picking process to avoid picking errors. The mark area is the mark point. The coordinates of the normal dies at the two opposite corners of the mark area are used as the preset verification coordinates. In this embodiment, the preset verification coordinates are arranged at the upper right corner and the lower left corner of the mark area. Only when the die at the preset verification coordinates is normal can the coordinates be verified successfully. However, when the wafer is a broken piece, the mark area with the preset verification coordinates set is missing, which will cause the coordinate verification to fail. When the die at the preset verification coordinates has been picked by the previous sorting operation, the coordinate verification will fail because there is no normal die at the preset verification coordinates. When the appearance of the die is damaged due to process problems and cannot be identified, the coordinate verification will fail. For the broken piece, the picked die at the preset verification coordinates, and the wafer with a damaged appearance, even if the mapping is accurate, the coordinate verification will fail, causing the automatic mapping check to fail in the traditional automatic mapping check, thereby easily causing error control and requiring a large amount of manual intervention for mapping check, wasting manpower and resources, and reducing production efficiency.

[0021] After the step S10, further comprising: S110: If all the preset verification coordinates are included in the coordinate data, the wafer is a wafer wafer, and all the preset verification coordinates are established as wafer verification coordinates; As can be understood, all the preset verification coordinates exist in the coordinate data of the mapping, the wafer is a complete wafer, and there is no appearance damage. At this time, the mapping check can be performed based on all the preset verification coordinates.

[0022] S120: identifying the die according to the wafer verification coordinates, and if a die is identified, obtaining the auxiliary wafer verification coordinates corresponding to the wafer verification coordinates; Preferably, the preset verification coordinates are paired with preset auxiliary verification coordinates, for example, the coordinates of the upper right corner outside the mark area, in particular, the coordinates of the upper right corner of the die are the preset verification coordinates, and the preset verification coordinates are located outside the mark area. The paired preset auxiliary verification coordinates of the preset verification coordinates are the coordinates inside the upper right corner, and the preset auxiliary verification coordinates are located inside the mark area. The wafer verification coordinates are the same as the preset verification coordinates, and the auxiliary wafer verification coordinates are the same as the preset auxiliary verification coordinates.

[0023] S130: identifying a die according to the auxiliary wafer verification coordinates, and if no die is identified, the wafer verification coordinates are determined as wafer verification success coordinates; Preferably, the preset auxiliary verification coordinates are located inside the mark area, and the appearance of the die inside is special, which cannot be identified under normal wafer die arrangement. Therefore, when no die is identified on the auxiliary wafer verification coordinates, the auxiliary wafer verification coordinates are verified successfully, and are associated with the wafer verification coordinates, and are considered as wafer verification success coordinates.

[0024] S140: calculating a wafer verification success rate based on the number of wafer verification success coordinates and the number of wafer verification coordinates, and forming a wafer processing result according to the wafer verification success rate; The S140 includes: S141: obtaining a wafer success rate threshold, and if the wafer verification success rate is greater than or equal to the wafer success rate threshold, the wafer processing result is to automatically enter the production process; S142: if the wafer verification success rate is less than the wafer success rate threshold, the wafer processing result is to be controlled, and the wafer control frequency is recorded. According to the wafer control frequency, the wafer is re-photographed or automatically returned.

[0025] It can be understood that if the wafer verification success rate is less than the wafer success rate threshold, the photomapping check fails, and the wafer needs to be re-photographed or returned for processing to prevent production quality problems.

[0026] Step S20: if the coordinate data of the synthesis file does not contain all the preset verification coordinates, a plurality of preset verification coordinates contained in the coordinate data are determined as a plurality of to-be-verified coordinates; It can be understood that the coordinate data of the synthetic file does not contain all the preset verification coordinates, so the wafer may be a fragment or have appearance damage or pollution. If the synthetic inspection is performed based on all the preset verification coordinates, the verification success rate is reduced due to the missing of the preset verification coordinates and the failure to identify the die, thereby causing the problem of misjudgment as the synthetic inspection fails. Therefore, the coordinates that can be used for verifying the synthetic inspection are screened from all the preset verification coordinates.

[0027] Step S30: identifying a die according to the to-be-verified coordinate to determine whether the to-be-verified coordinate meets the first verification standard. The step S30 includes: S310: If a die is identified on the to-be-verified coordinate, the to-be-verified coordinate meets the first verification standard. If no die is identified on the to-be-verified coordinate, the to-be-verified coordinate does not meet the first verification standard.

[0028] It can be understood that the to-be-verified coordinate is consistent with the verification mode of the wafer verification coordinate and the preset verification coordinate.

[0029] Step S40: If the to-be-verified coordinate meets the first verification standard, an auxiliary verification coordinate corresponding to the to-be-verified coordinate is obtained, a die is identified according to the auxiliary verification coordinate to determine whether the to-be-verified coordinate meets the second verification standard, and if the to-be-verified coordinate meets the second verification standard, the to-be-verified coordinate is established as a verification success coordinate. Preferably, the relative positional relationship between the auxiliary verification coordinate and the to-be-verified coordinate is consistent with the relative positional relationship between the preset auxiliary verification coordinate and the preset verification coordinate.

[0030] In the step S40, the auxiliary verification coordinate is located in the mark region corresponding to the to-be-verified coordinate, and the step S40 includes: S410: If no die is identified on the auxiliary verification coordinate, the to-be-verified coordinate meets the second verification standard. If a die is identified on the auxiliary verification coordinate, the to-be-verified coordinate does not meet the second verification standard.

[0031] It can be understood that the auxiliary verification coordinate is consistent with the verification mode of the auxiliary wafer verification coordinate and the preset auxiliary coordinate. By combining the to-be-verified coordinate and the auxiliary verification coordinate for joint verification, the accuracy of verification is improved, and good synthetic inspection accuracy is maintained after discarding part of the preset verification coordinates.

[0032] Step S50: calculating a non-wafer verification success rate based on the number of verification success coordinates and the number of to-be-verified coordinates, and forming a non-wafer processing result according to the non-wafer verification success rate.

[0033] It can be understood that, by screening a plurality of preset verification coordinates and selecting a plurality of to-be-verified coordinates, for wafer fragments, wafer appearance damage or non-wafer wafers for which dies for verification have been picked, the problem that multiple verification coordinates are misjudged as verification failure in automatic die mapping inspection due to the fact that the coordinate data does not contain part of the preset verification coordinates, and thus the automatic die mapping inspection is misjudged, can be avoided, which effectively reduces misjudgment and is also beneficial to greatly reducing manual intervention, greatly saving manpower and improving production efficiency.

[0034] The step S50 comprises: S510: obtaining a fragment success rate threshold, and if the non-wafer verification success rate is greater than or equal to the fragment success rate threshold, the non-wafer processing result is to automatically enter a production process; The S510 further comprises: S511: setting the picking sequence of the dies corresponding to the verification success coordinates at the end of the picking sequence.

[0035] It can be understood that, by changing the die picking sequence, the problem that the dies for verification are picked too early and thus affect the accuracy of die mapping inspection can be avoided in the process of multiple sorting operations.

[0036] S520: if the non-wafer verification success rate is less than the fragment success rate threshold, the non-wafer processing result is to be controlled, the fragment control number is recorded, and the wafer is re-mapped or automatically rejected according to the fragment control number after control.

[0037] Referring to Figure 2 , the sorting machine die mapping inspection system in the second embodiment of the application applies the sorting machine die mapping inspection method as described in the first embodiment, and the system comprises: An acquisition module 10 is configured to scan a wafer, acquire a scanning image file and a coordinate data file of the wafer, perform point mapping on the scanning image file and the coordinate data file to form a composite image file, set a plurality of preset verification coordinates, the wafer comprises a plurality of mark regions, one mark region corresponds to a plurality of preset verification coordinates, and it is determined whether all the preset verification coordinates are contained in the coordinate data of the composite image file. In the acquisition module 10, it comprises: A first unit is configured to, if all the preset verification coordinates are contained in the coordinate data, the wafer is a wafer wafer, and all the preset verification coordinates are established as wafer verification coordinates. A second unit is configured to identify a die according to the wafer verification coordinates, and if a die is identified, auxiliary wafer verification coordinates corresponding to the wafer verification coordinates are acquired. a third unit configured to identify a die according to the auxiliary wafer verification coordinates, and if no die is identified, determine the wafer verification coordinates as wafer verification success coordinates; a fourth unit configured to calculate a wafer verification success rate based on a number of the wafer verification success coordinates and a number of the wafer verification coordinates, and form a wafer processing result according to the wafer verification success rate; The fourth unit is specifically configured to: obtain a wafer success rate threshold, if the wafer verification success rate is greater than or equal to the wafer success rate threshold, the wafer processing result is to automatically enter a production process; if the wafer verification success rate is less than the wafer success rate threshold, the wafer processing result is to be controlled, and a wafer control frequency is recorded, and the wafer is re-photographed or automatically rejected according to the wafer control frequency.

[0038] a determination module 20 configured to, if the coordinate data of the synthesized file does not contain all the preset verification coordinates, determine a plurality of the preset verification coordinates contained in the coordinate data as a plurality of verification coordinates to be verified; a first verification module 30 configured to identify a die according to the verification coordinates to be verified, to determine whether the verification coordinates to be verified meet a first verification standard; The first verification module 30 includes: a fifth unit configured to, if a die is identified on the verification coordinates to be verified, the verification coordinates to be verified meet the first verification standard, and if no die is identified on the verification coordinates to be verified, the verification coordinates to be verified do not meet the first verification standard.

[0039] a second verification module 40 configured to, if the verification coordinates to be verified meet the first verification standard, obtain auxiliary verification coordinates corresponding to the verification coordinates to be verified, identify a die according to the auxiliary verification coordinates, to determine whether the verification coordinates to be verified meet a second verification standard, and if the verification coordinates to be verified meet the second verification standard, determine the verification coordinates to be verified as verification success coordinates; In the second verification module 40, the auxiliary verification coordinates are located in the mark area corresponding to the verification coordinates to be verified, and the second verification module 40 includes: a sixth unit configured to, if no die is identified on the auxiliary verification coordinates, the verification coordinates to be verified meet the second verification standard, and if a die is identified on the auxiliary verification coordinates, the verification coordinates to be verified do not meet the second verification standard.

[0040] a processing module 50 configured to calculate a non-wafer verification success rate based on a number of the verification success coordinates and a number of the verification coordinates to be verified, and form a non-wafer processing result according to the non-wafer verification success rate.

[0041] The processing module 50 comprises: A seventh unit is configured to acquire a broken wafer success rate threshold value, and if the non-round wafer verification success rate is greater than or equal to the broken wafer success rate threshold value, the non-round wafer processing result is to automatically enter a production process. The seventh unit is specifically configured to: The seventh unit is specifically configured to:

[0042] If the non-round wafer verification success rate is less than the broken wafer success rate threshold value, the non-round wafer processing result is to be controlled, and a broken wafer control number is recorded, and the wafer is re-photographed or automatically rejected according to the broken wafer control number.

[0043] The third embodiment of the present application provides a computer, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor executes the computer program to realize the wafer map checking method of the sorting machine as described in the first embodiment.

[0044] The fourth embodiment of the present application provides a storage medium, which stores a computer program executable by a processor to realize the wafer map checking method of the sorting machine as described in any one of the first embodiments.

[0045] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0046] The above embodiments only express several embodiments of the present application, and the description is more specific and detailed, but it cannot be understood as a limitation on the scope of the patent of the present application. It should be noted that for ordinary skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which are within the scope of protection of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for inspecting composite drawings in a sorting machine, characterized in that, Includes the following steps: Scan the wafer to obtain the scanned image and coordinate data document of the wafer. Combine the scanned image and coordinate data document to form a composite image. Set several preset verification coordinates. The wafer includes several mark areas. Each mark area corresponds to several preset verification coordinates. Determine whether the coordinate data of the composite image contains all the preset verification coordinates. If the coordinate data of the synthesized drawing file does not contain all the preset verification coordinates, then several preset verification coordinates contained in the coordinate data are established as several coordinates to be verified. The grain is identified based on the coordinates to be verified in order to determine whether the coordinates to be verified meet the first verification standard. If the coordinates to be verified meet the first verification standard, then the auxiliary verification coordinates corresponding to the coordinates to be verified are obtained, and the die is identified according to the auxiliary verification coordinates to determine whether the coordinates to be verified meet the second verification standard. If the coordinates to be verified meet the second verification standard, then the coordinates to be verified are established as the verification successful coordinates. Based on the number of successfully verified coordinates and the number of coordinates to be verified, the non-circular piece verification success rate is calculated, and the non-circular piece processing result is formed according to the non-circular piece verification success rate.

2. The sorting machine composite drawing inspection method according to claim 1, characterized in that, After the step of determining whether the coordinate data of the synthesized drawing file contains all the preset verification coordinates, the method further includes: If the coordinate data contains all the preset verification coordinates, then the wafer is a wafer wafer, and all the preset verification coordinates are established as wafer verification coordinates; The wafer is identified based on the wafer verification coordinates. If a wafer is identified, the auxiliary wafer verification coordinates corresponding to the wafer verification coordinates are obtained. The wafer is identified based on the auxiliary wafer verification coordinates. If no wafer is identified, the wafer verification coordinates are established as the wafer verification success coordinates. Based on the number of successfully verified coordinates of the disc and the number of verified coordinates of the disc, the disc verification success rate is calculated, and the disc processing result is formed according to the disc verification success rate.

3. The sorting machine composite drawing inspection method according to claim 2, characterized in that, The step of generating the wafer processing result based on the wafer verification success rate includes: Obtain the wafer success rate threshold. If the wafer verification success rate is greater than or equal to the wafer success rate threshold, the wafer processing result is to automatically enter the production process. If the wafer verification success rate is less than the wafer success rate threshold, the wafer processing result is a stuck wafer, and the number of stuck wafer counts is recorded. Based on the number of stuck wafer counts, the wafer is re-assembled or automatically ejected after the stuck wafer is determined.

4. The sorting machine composite drawing inspection method according to claim 1, characterized in that, The step of determining whether the coordinates to be verified meet the first verification standard includes: If a grain is identified at the coordinate to be verified, then the coordinate to be verified meets the first verification standard; if no grain is identified at the coordinate to be verified, then the coordinate to be verified does not meet the first verification standard.

5. The sorting machine composite drawing inspection method according to claim 1, characterized in that, The auxiliary verification coordinates are located within the mark area corresponding to the coordinates to be verified. The step of determining whether the coordinates to be verified meet the second verification standard includes: If no grain is identified on the auxiliary verification coordinates, the coordinates to be verified meet the second verification standard; if a grain is identified on the auxiliary verification coordinates, the coordinates to be verified do not meet the second verification standard.

6. The sorting machine composite drawing inspection method according to claim 1, characterized in that, The step of generating the non-circular wafer processing result based on the non-circular wafer verification success rate includes: Obtain the fragment success rate threshold. If the non-circular fragment verification success rate is greater than or equal to the fragment success rate threshold, the non-circular fragment processing result is to automatically enter the production process. If the non-circular wafer verification success rate is less than the wafer breakage success rate threshold, the non-circular wafer processing result is a stuck wafer, and the number of stuck wafers is recorded. Based on the number of stuck wafers, the wafer is re-assembled or automatically ejected after the stuck wafer is determined.

7. The sorting machine composite drawing inspection method according to claim 6, characterized in that, After the step where the non-circular wafer processing result is automatically entered into the production process, the following is also included: The picking order of the crystals corresponding to the verified successful coordinates is set at the end of the picking sequence.

8. A sorting machine composite drawing inspection system, employing the sorting machine composite drawing inspection method as described in any one of claims 1 to 7, characterized in that, The system includes: The acquisition module is used to scan the wafer, acquire the scanned image and coordinate data document of the wafer, perform point-to-point composite image of the scanned image and the coordinate data document to form a composite image, set a number of preset verification coordinates, the wafer includes a number of mark areas, one mark area corresponds to a number of preset verification coordinates, and determine whether the coordinate data of the composite image contains all the preset verification coordinates. The module is configured to, if the coordinate data of the synthesized drawing does not contain all the preset verification coordinates, then establish several preset verification coordinates contained in the coordinate data as several coordinates to be verified. The first verification module is used to identify the grains based on the coordinates to be verified, so as to determine whether the coordinates to be verified meet the first verification standard. The second verification module is used to obtain auxiliary verification coordinates corresponding to the coordinates to be verified if the coordinates to be verified meet the first verification standard, identify the die according to the auxiliary verification coordinates, and determine whether the coordinates to be verified meet the second verification standard. If the coordinates to be verified meet the second verification standard, the coordinates to be verified are established as the verification successful coordinates. The processing module is used to calculate the non-circular piece verification success rate based on the number of successfully verified coordinates and the number of coordinates to be verified, and to generate a non-circular piece processing result based on the non-circular piece verification success rate.

9. A computer comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the sorting machine drawing inspection method as described in any one of claims 1 to 7.

10. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the sorting machine combination diagram inspection method as described in any one of claims 1 to 7.

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