Air gap in top layer of semiconductor device

Abstract

Devices are disclosed that may incorporate air gaps in a top signal layer and / or power layer on a front side of a substrate. Alternatively or as a supplement thereof, an air gap may also be incorporated in the signal layer and / or power layer on the backside of the substrate. In this manner, the metal capacitance of the device may be reduced, thereby improving the performance of a semiconductor circuit such as a CPU.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to semiconductor devices and manufacturing techniques thereof, and more particularly but not exclusively, to providing air gaps, for example, in layers of a semiconductor device, such as in a top (or front side) signal layer and / or a power layer, to improve CPU performance. BACKGROUND

[0002] Integrated circuit (IC) technology has made great strides in improving computing power through miniaturization of active components. Higher frequencies in, for example, (central processing unit) CPU designs have been a continuous goal due to the surge in computing demand. As such devices continue to shrink, metal capacitance is becoming a key parameter for both performance and power. Metal capacitance contributes significantly to delay. For high performance CPUs or cores, long signal lines, typically thicker, are widely used in the top layer. Thus, top layer metal capacitance can be a significant contributor to capacitance in back end of line (BEOL) capacitance (e.g., up to 30% or more).

[0003] Accordingly, there is a need for systems, apparatuses, and methods that overcome the deficiencies of conventional devices, including the methods, systems, and apparatuses provided herein. SUMMARY

[0004] The following presents a simplified summary of one or more aspects and / or examples associated with the apparatuses and methods disclosed herein. As such, the following summary should not be considered an extensive overview of all contemplated aspects and / or examples, nor be interpreted as identifying key or critical elements of all contemplated aspects and / or examples, or delineating the scope of any

[0005] An example device is disclosed. The device can include a substrate. The device can also include a semiconductor circuit on a front side of the substrate. The device can further include one or more front side metal layers on the semiconductor circuit on the front side of the substrate. The device can also include one or more front side signal layers on the one or more front side metal layers on the front side of the substrate. The one or more front side signal layers can be configured to carry one or more signals to and / or from the semiconductor circuit. The one or more front side signal layers can include a first front side signal layer. The first front side signal layer can include one or more top signal metals including a first top signal metal. A front side air gap can be formed on a side surface of the first top signal metal.

[0006] A method of fabricating a device is disclosed. The method can include providing a substrate. The method can also include providing a semiconductor circuit on a front side of the substrate. The method can further include forming one or more front side metal layers on the semiconductor circuit on the front side of the substrate. The method can yet further include forming one or more front side signal layers on the one or more front side metal layers on the front side of the substrate. The one or more front side signal layers can be configured to carry one or more signals to and / or from the semiconductor circuit. The one or more front side signal layers can include a first front side signal layer. The first front side signal layer can include one or more top signal metals including a first top signal metal. A front side air gap can be formed on a side surface of the first top signal metal.

[0007] Other features and advantages associated with the various devices and methods disclosed herein will be apparent from the following description and the drawings, and from the claims. BRIEF DESCRIPTION OF DRAWINGS

[0008] Aspects of the disclosure, and many of the attendant advantages of such, will become more readily appreciated as the same become better understood by reference to the following detailed description, when considered in connection with the following drawing, wherein:

[0009] Figure 1 Views of a device having air gaps in stacked metal layers are illustrated in accordance with one or more aspects of the disclosure.

[0010] Figure 2 , Figure 3 and Figure 4 Embodiments of metal layers of a device having air gaps are illustrated in accordance with one or more aspects of the disclosure.

[0011] Figures 5A to 5E , Figures 6A to 6F and Figures 7A to 7F Various stages of fabricating metal layers of a device having air gaps are illustrated in accordance with one or more aspects of the disclosure.

[0012] Figure 8 Top views of a device having air gaps in stacked metal layers are illustrated in accordance with one or more aspects of the disclosure.

[0013] Figures 9 to 11 Flowcharts of example methods of fabricating metal layers of a device having air gaps are illustrated in accordance with one or more aspects of the disclosure.

[0014] Figure 12 Various electronic devices that can utilize one or more aspects of the disclosure are illustrated.

[0015] Other objects and advantages associated with the aspects disclosed herein will be apparent to those skilled in the art based on the accompanying drawings and detailed description. To the extent that the features illustrated in the drawings are not numbered, they can be referenced by their alphabetical letter designation. Accordingly, for clarity and the sake of brevity, the drawings can not be to scale. To the extent certain drawings are simplified, not all components of a particular device or method can be depicted. In addition, like reference numerals designate like features throughout the specification and drawings. DETAILED DESCRIPTION

[0016] Aspects of the disclosure are illustrated by way of example in the following description and associated drawings. Alternative aspects or embodiments can be devised without departing from the scope of the present teachings. Additionally, well-known elements of the illustrative embodiments described herein can not be described in detail or will be omitted so as not to obscure the relevant details of the disclosure.

[0017] In some described example implementations, instances are identified in which various component structures and portions of operation can be taken from known conventional techniques and subsequently arranged in accordance with one or more example embodiments. In such instances, internal details of known conventional component structures and / or portions of operation can be omitted to help avoid potential obscuring of the concepts illustrated in the illustrative embodiments disclosed herein.

[0018] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0019] As indicated above, metal capacitance is becoming a key parameter for both performance and power of a device. Metal capacitance has a large contribution to delay. For a high performance CPU or core, long signal lines, which are typically thicker, are widely used in the top layer. Thus, top layer metal capacitance can be a significant contributor to capacitance in back end of line (BEOL) capacitance (e.g., up to 30% or more).

[0020] To address these and other issues with conventional devices, an air gap is proposed in the signal lines. Specifically, an air gap is proposed in the top thick signal lines. Since air has a very low k-value, metal capacitance can be significantly reduced. Due to the reduced metal capacitance, CPU performance can be improved accordingly, especially when the air gap is used immediately adjacent to the critical path. If both the front and back sides of the substrate are used, air gaps can be combined in the critical signal paths on both the front and / or back sides.

[0021] Figure 1 A view illustrating a device having an air gap in a stacked metal layer according to one or more aspects of the present disclosure is shown. The stacked structure on the left illustrates a case where the metal layers are stacked only on the front side. For ease of reference, this structure may be referred to as a front-side-only stacked structure. As shown, the front-side-only stacked structure may include a substrate (e.g., a silicon (Si) substrate) 110 and semiconductor circuitry 120 on the front side of the substrate 110. Semiconductor circuitry 120 may be formed as a result of front-end (FEOL) and mid-end (MOL) processes. One or more lower front-side metal layers 130 may be located on the semiconductor circuitry 120 on the front side of the substrate 110. Then, one or more intermediate front-side metal layers 140 may be located on the lower front-side metal layer 130. The intermediate front-side metal layer 140 may be thicker than the lower front-side metal layer 130. More generally, the metal of the intermediate front-side metal layer 140 may have a larger cross-section than the metal of the lower front-side metal layer 130. The lower front-side metal layer 130 and the intermediate front-side metal layer 140 may also be generally referred to as front-side metal layers, individually or in combination.

[0022] One or more front-side signal layers 150 may be formed on a front-side intermediate metal layer 140 on the front side of the substrate 110. It should be noted that both a front-side lower metal layer 130 and a front-side intermediate metal layer 140 are not necessarily present simultaneously. Furthermore, other metal layers may exist between the front-side intermediate metal layer 140 and the front-side signal layer 150. In one aspect, it is envisioned that one or more front-side metal layers (e.g., front-side lower metal layer 130 and / or front-side intermediate metal layer 140) exist between the semiconductor circuit 120 and the front-side signal layer 150. The front-side signal layer 150 may be a top signal layer for carrying signals to and / or from the semiconductor circuit 120. The metal of the front-side signal layer 150 may be thicker than any metal of the front-side metal layers, including the metal of the front-side lower metal layer 130 and the metal of the front-side intermediate metal layer 140. More generally, the metal of the front-side signal layer 150 may have a larger cross-section than the metals of the front-side metal layers 130 and 140.

[0023] Air gap 170 may be formed in one or both front signal layers 150. For ease of reference, air gap 170 may be referred to as front air gap 170. As will be shown below, front air gap 170 may be formed on the side surface of a top signal metal, which may be the metal of the front signal layer 150. When multiple front air gaps 170 are present, one front air gap may be referred to as a first front air gap, another front air gap may be referred to as a second front air gap, and so on. It should be noted that front air gap 170 may be formed in at least two consecutive front signal layers 150.

[0024] The front-side stacked metal structure may include one or more front-side signal layers 150 on the front side of the substrate 110, and one or more front-side power layers 160 on the front side. The one or more front-side power layers 160 (also referred to as top power layers 160) may be configured to carry power to the semiconductor circuit 120. In one aspect, the metal of the front-side power layer 160 may have a larger cross-section than the top signal metal of the front-side signal layer 150.

[0025] Some critical paths may be designed within the top (front) power layer 160. To improve the performance of such critical paths, it may be desirable to construct air gaps around these paths in the front power layer 160. Air gaps 172 may be formed in one or both front power layers 160. For ease of reference, air gap 172 may be referred to as front power air gap 172. As will be shown below, front power air gap 172 may be formed on the side surface of a front power metal, which is the metal of the front power layer 160. When multiple front power air gaps 172 are present, one front power air gap may be referred to as the first front power air gap, another front power air gap may be referred to as the second front power air gap 172, and so on. It should be noted that front power air gaps 172 may be formed in at least two consecutive front power layers 160.

[0026] Figure 1 The stacked structure on the right illustrates a case where metal layers are stacked on both the front and back sides. For ease of reference, this structure may be referred to as a front / back stacked structure. As shown, the front / back stacked structure may include a substrate 110, semiconductor circuitry 120 on the front side of the substrate 110, and one or more front metal layers (e.g., a lower front metal layer 130, a middle front metal layer 140, etc.). These items are similar to the substrate 110, semiconductor circuitry 120, and front metal layers (e.g., a lower front metal layer 130, a middle front metal layer 140, etc.) discussed above regarding front-only stacked structures. Therefore, for the sake of brevity, their detailed description will be omitted.

[0027] The front / back stack structure may also include one or more front signal layers 150 formed on a front metal layer on the front side of the substrate 110. However, unlike a front-only stack structure, this structure does not require any front power layer. That is, in one aspect, one or more front signal layers 150 may be the top layer of the front / back stack structure. Consequently, an air gap 170 (referred to as the reinforcing air gap, as further shown below) may also be formed above the uppermost front signal layer 150.

[0028] On the back side of the substrate, the front / back stack structure may include one or more back signal layers 155. The back signal layers 155 may be configured to carry signals to and / or from the semiconductor circuitry 120. The metal of the back signal layers 155 may be thicker than any metal of the front metal layers (e.g., the metal of the front lower metal layer 130, the metal of the front middle metal layer 140, etc.). More generally, the metal of the back signal layers 155 may have a larger cross-section than the metal of the front metal layers.

[0029] Air gap 174 may be formed in one or both back signal layers 155. For ease of reference, air gap 174 may be referred to as back air gap 174. As will be shown below, back air gap 174 may be formed on the side surface of a back signal metal, which may be the metal of the back signal layer 155. When multiple back air gaps 174 are present, one back air gap may be referred to as the first back air gap, another back air gap may be referred to as the second back air gap, and so on. Note that back air gap 174 may be formed in at least two consecutive back signal layers 155.

[0030] The front / back stacked metal structure may include one or more back power layers 165 on one or more back signal layers 155 on the back side of substrate 110. The one or more back power layers 165 may be configured to carry power to semiconductor circuitry 120. In one aspect, the metal of the back power layer 165 may have a larger cross-section than the signal metal of the back signal layer 155.

[0031] Figure 2 A cross-section of the metal layer of device 200 is illustrated. As shown, device 200 may include a prior metal layer 225; a dielectric 235 formed on the prior metal layer 225; one or more metals 250 within the metal layer of dielectric 235; an air gap 270 between adjacent metals 250; and a protective layer 280 formed on the upper surface of the metals 250 and on the side surfaces of the metals 250 and dielectric 235 exposed by the air gap 270. In one aspect, dielectric 235 may be formed of silicon dioxide (SiO2) and / or a low-k dielectric. Protective layer 280 may be formed of a polymer (such as polycyclohexyl methacrylate (PCHMA)), tantalum nitride (TaN), titanium nitride (TiN) film, etc.

[0032] On the one hand, Figure 2 This can correspond to the front signal layer 150. In this example, it is assumed that... Figure 2 This corresponds to the first front signal layer 150 (one of one or more front signal layers 150). Then, metal 250 can be considered as the top signal metal of the first front signal layer 150. It is also assumed that the intermediate metal 250 is the first top signal metal, and the air gap 270 corresponds to the front air gap 170. In this example, it can be said that the front air gap 170 is formed at least on the side surface of the first top signal metal. It can also be said that the first top signal metal has a larger cross-section than any metal in the front metal layers 130, 140. Note that the air gap 270 is formed on both side surfaces of the intermediate metal 250. That is, another front air gap 170 can be formed on the other side surface of the first top signal metal.

[0033] Re-reference Figure 1 It should be noted that multiple front air gaps 170 may exist in different front signal layers 150. Then, Figure 2 The air gap 270 can be a first front air gap 170. When multiple front signal layers 150 exist, a second front signal layer 150 located directly above or below the first front signal layer 150 can exist. Then, a second front air gap 170 formed on the side surface of at least one signal metal 250 of the second front signal layer 150 can exist.

[0034] On the one hand, Figure 2 This can also correspond to the backside signal layer 155. In this example, it is assumed that... Figure 2 This corresponds to the first back-side signal layer 155 (one of the one or more back-side signal layers 155). Then, metal 250 can be considered as the back-side signal metal of the first back-side signal layer 155. It is also assumed that the intermediate metal 250 is the first back-side signal metal, and that the air gap 270 corresponds to the back-side air gap 174. In this example, it can be said that the back-side air gap 174 is formed at least on the side surface of the first back-side signal metal. It can also be said that the first back-side signal metal has a larger cross-section than any metal in the front-side metal layers 130, 140. Note that the air gap 270 is formed on both side surfaces of the intermediate metal 250. That is, another back-side air gap 174 can be formed on the other side surface of the first back-side signal metal.

[0035] Re-reference Figure 1 It should be noted that multiple back air gaps 174 may exist in different back signal layers 155. Then, Figure 2The air gap 270 can be a first back air gap 174. When multiple back signal layers 155 are present, a second back signal layer 155 located directly above or below the first back signal layer 155 can be present. Then, a second back air gap 174 formed on the side surface of at least one signal metal 250 of the second back signal layer 155 can be present.

[0036] On the one hand, Figure 2 This can also correspond to the layer of the front power layer 160. In this example, it is assumed that... Figure 2 This corresponds to the first front power layer 160 (one of the one or more front power layers 160). Then, metal 250 can be considered as the front power metal of the first front power layer 160. It is also assumed that the intermediate metal 250 is the first front power metal, and the air gap 270 corresponds to the front power air gap 172. In this example, it can be said that the front power air gap 172 is formed at least on the side surface of the first front power metal. It can also be said that the first front power metal has a larger cross-section than any metal of the front signal layer 150. Note that the air gap 270 is formed on both side surfaces of the intermediate metal 250. That is, another front power air gap 172 can be formed on the other side surface of the first front power metal.

[0037] Re-reference Figure 1 It should be noted that multiple front power air gaps 172 may exist in different front power layers 160. Then, Figure 2 The air gap 270 can be a first front power air gap 172. When multiple front power layers 160 are present, a second front power layer 160 can be located directly above or below the first front power layer 160. Then, a second front power air gap 172 can be formed on the side surface of at least one signal metal 250 of the second front power layer 160.

[0038] Figure 3 A cross-section of the metal layer of device 300 is illustrated. As shown, device 300 may include a prior metal layer 325; a dielectric 335 formed on the prior metal layer 325; one or more metals 350 within the metal layer of dielectric 335; an air gap 370 between adjacent metals 350; and a protective layer 380 formed on the upper surface of the metals 350 and on the side surfaces of the metals 350 and dielectric 335 exposed by the air gap 370. In one aspect, dielectric 335 may be formed of silicon dioxide (SiO2) and / or a low-k dielectric. Protective layer 380 may be formed of a polymer such as PCHMA.

[0039] On the one hand, Figure 3 This can correspond to a first front signal layer 150 (one of one or more front signal layers 150). In this example, the first front signal layer 150 can be...Figure 1 The top front signal layer 150 of the front / back stacked structure, wherein the front air gap 170 can be an enhancing air gap. That is, Figure 3 The air gap 370 can be a reinforcing air gap. Then, metal 350 can be considered as the top signal metal of the first front signal layer 150. It is also assumed that the intermediate metal 350 is the first top signal metal. The reinforcing air gap 370 may include at least one lateral portion (in this example, two lateral portions are shown) and an upper lateral portion. At least one lateral portion may be formed on a side surface of the first top signal metal 350. The upper lateral portion may be formed on the upper surface of the first top signal metal. Since there is another lateral portion, it can be said that the reinforcing air gap 370 includes another lateral portion formed on another side surface of the first top signal metal 350.

[0040] Figure 4 A cross-section of the metal layer of device 400 is illustrated. That is, device 400 may include a prior metal layer 425; a dielectric 435 formed on the prior metal layer 425; one or more metals 450 within the dielectric 435; an air gap 470 between adjacent metals 450; and a protective layer 480 formed on the upper surface of the metals 450 and on the side surfaces of the metals 450 and the dielectric 435 exposed by the air gap 470. In one aspect, the dielectric 435 may be formed of silicon dioxide (SiO2) and / or a low-k dielectric. The protective layer 480 may be formed of a polymer such as PCHMA.

[0041] On the one hand, Figure 4 This can correspond to a first front signal layer 150 (one of one or more front signal layers 150). In this example, it is similar to... Figure 3 The device 300, the first front signal layer 150 can be Figure 1 The top front signal layer 150 of the front / back stacked structure, wherein the front air gap 170 can be an enhancing air gap. That is, Figure 4 The air gap 470 can be a reinforcing air gap. Then, metal 450 can be considered as the top signal metal of the first front signal layer 150. It is also assumed that the intermediate metal 450 is the first top signal metal. The reinforcing air gap 470 may include at least one lateral portion (in this example, two lateral portions are shown) and an upper lateral portion. At least one lateral portion may be formed on a side surface of the first top signal metal 450. The upper portion may be formed on the upper surface of the first top signal metal. Since there is another lateral portion, it can be said that the reinforcing air gap 470 includes another lateral portion formed on another side surface of the first top signal metal 450.

[0042] One difference between devices 300 and 400 is as follows. As shown, there are multiple metals 450. If the metal to the left or right of the middle metal 450 is assumed to be the second top signal metal adjacent to the first top signal metal, then the lateral portion of the reinforcing air gap 470 can also be formed at least partially on the upper surface of the second top signal metal 450.

[0043] Figures 5A to 5E Various stages of manufacturing a metal layer of a device (such as device 200) according to one or more aspects of this disclosure are illustrated. Figure 5A An example is illustrated of a stage where the dielectric 235 formed over the prior metal layer 225 can be polished (e.g., by chemical mechanical polishing). Polishing can expose the upper surface of the metal 250.

[0044] Figure 5B This illustration shows a stage where dielectric 235 can be etched to expose the upper surface of metal 250. If the device corresponds to a front or back signal layer 150, 155, then the upper surface of the signal metal can be said to be exposed. If the device corresponds to a front power layer 160, then the upper surface of the power metal can be said to be exposed. Note that holes may be exposed to expose the side and top surfaces of the metals (signal metal, power metal). Thereafter, a protective layer 280 can be formed on dielectric 235 and on the exposed side and top surfaces of the metals (e.g., signal metal, power metal).

[0045] Figure 5C An example is illustrated where a stage is achieved where a sacrificial material 570 fills a hole on the protective layer 280. Typical sacrificial materials may include polymer-related materials. This material can be deposited, for example, using a spin coater. It may completely fill the hole up to the top of the metal, or only fill it to a height below the top of the metal.

[0046] Figure 5D This illustrates a stage where the orifice can be sealed using more dielectric 235 material. That is, dielectric 235 can also be constructed on the protective layer 280 and the sacrificial material 570.

[0047] Figure 5E An example is illustrated where the sacrificial material 570 can be removed to form the air gap 270. For example, the sacrificial material 570 can be thermally removed.

[0048] Figures 6A to 6F Various stages of manufacturing a metal layer of a device (such as device 300) according to one or more aspects of this disclosure are illustrated.

[0049] Figure 6A An example is illustrated of a stage where the dielectric 335 formed over the prior metal layer 325 can be polished (e.g., by chemical mechanical polishing). Polishing exposes the upper surface of the metal 350.

[0050] Figure 6B This illustrates a stage in which dielectric material may also be deposited on the polished upper surface of dielectric 335 and one or more top signal metals 350.

[0051] Figure 6C An example is illustrated in which dielectric 335 may be etched to expose the upper surface of top signal metal 350, which includes a first top signal metal. Etching may also form holes exposing one or more side surfaces of the top signal metal 350. A protective layer 380 may then be formed on dielectric 335 and on the exposed side and upper surfaces of metal 350.

[0052] Figure 6D An example is shown where the holes can be filled with sacrificial material 670 on the protective layer 380.

[0053] Figure 6E This illustrates a stage where the orifice can be sealed using more dielectric 335 material. That is, dielectric 335 can also be constructed on the protective layer 380 and the sacrificial material 670.

[0054] Figure 6F An example is illustrated of a stage in which sacrificial material 670 can be removed to form a reinforced air gap 370. For example, sacrificial material 670 can be thermally removed.

[0055] Figures 7A to 7F Various stages of manufacturing a metal layer of a device (such as device 400) according to one or more aspects of this disclosure are illustrated.

[0056] Figure 7A An example is illustrated of a stage where the dielectric 435 formed over the previous metal layer 425 can be polished (e.g., by chemical mechanical polishing). Polishing can expose the upper surface of the metal 450.

[0057] Figure 7B This illustrates a stage in which dielectric material may also be deposited on the polished upper surface of dielectric 435 and one or more top signal metals 450.

[0058] Figure 7C An example is illustrated where dielectric 435 may be etched to expose the upper surface of top signal metal 450, which includes a first top signal metal. Etching may also form holes exposing one or more side surfaces of the top signal metal 450. A protective layer 480 may then be formed on dielectric 435 and on the exposed side and upper surfaces of metal 450.

[0059] Figure 7D An example is shown where the holes on the protective layer 480 can be filled with sacrificial material 770.

[0060] Figure 7E This illustrates a stage where the orifice can be sealed using more dielectric 435 material. That is, dielectric 435 can also be constructed on the protective layer 480 and the sacrificial material 770.

[0061] Figure 7F An example is illustrated of a stage in which sacrificial material 770 can be removed to form reinforcing air gap 470. For example, sacrificial material 770 can be thermally removed. It should be noted that reinforcing air gap 470 may differ from reinforcing air gap 370. For example, the upper transverse portion of reinforcing air gap 470 may be at least partially formed on the upper surface of the second top signal metal 450 (e.g., the left metal and / or the right metal 450).

[0062] Figure 8 A top view of a device having air gaps in a stacked metal layer according to one or more aspects of this disclosure is illustrated. It should be noted that air gaps 270, 370, and 470 do not necessarily extend the entire length of metals 250, 350, and 450. In practice, for mechanical reliability reasons, air gaps 270, 370, and 470 may be spaced apart by dielectrics 235, 335, and 435.

[0063] Figure 9 A flowchart illustrating an example method 900 for manufacturing a metal layer of a device (such as device 200, 300, 400) having an air gap according to one or more aspects of this disclosure is provided.

[0064] In frame 910, substrate 110 may be provided.

[0065] In frame 920, semiconductor circuitry 120 may be provided on the front side of substrate 110.

[0066] In frame 930, one or more front metal layers, such as a lower front metal layer 130 and / or a middle front metal layer 140, may be formed on the semiconductor circuit 120 on the front side of the substrate 110.

[0067] In block 940, one or more front-side signal layers 150 may be formed on one or more front-side metal layers on the front side of the substrate. The one or more front-side signal layers 150 may be configured to carry one or more signals to and / or from the semiconductor circuit 120.

[0068] One or more front signal layers 150 may include a first front signal layer 150. The first front signal layer 150 may include one or more top signal metals (e.g., metals 250, 350, 450), which include the first top signal metal. A front air gap 170 may be formed on the side surface of the first top signal metals 250, 350, 450.

[0069] Figure 10A flowchart illustrating an example process for implementing block 940 is provided. In block 1010, a dielectric material formed over a previous metal layer can be polished. Polishing exposes the upper surface of the signal metal. Block 1010 may correspond to... Figure 5A .

[0070] In frame 1020, dielectric 235 can be etched to expose the upper surface of signal metal 250. Etching can also form holes exposing the side surfaces of signal metal 250. Frame 1020 may correspond to... Figure 5B .

[0071] In frame 1030, a protective layer 280 may be formed on the dielectric and on the exposed side and top surfaces of the signal metal. Frame 1030 may also correspond to... Figure 5B .

[0072] In frame 1040, the hole can be filled with sacrificial material 570 on the protective layer 280. Frame 1040 can correspond to... Figure 5C .

[0073] In frame 1050, the aperture can be sealed with more dielectric material. That is, the dielectric can also be constructed on the protective layer and the sacrificial material 570. Frame 1050 can correspond to... Figure 5D .

[0074] In frame 1060, sacrificial material 570 can be (e.g., thermally) removed to form air gap 270. Frame 1060 may correspond to... Figure 5E .

[0075] Figure 11 A flowchart illustrating another example process for implementing block 940 is provided. In block 1110, dielectrics 335, 435 formed over previous metal layers 325, 425 can be polished. Polishing exposes the upper surfaces of signal metals 350, 450. Block 1110 may correspond to... Figure 6A and / or Figure 7A .

[0076] In frame 1115, dielectric material may also be deposited on the polished upper surface of dielectrics 335, 435 and one or more top signal metals 350, 450. Frame 1115 may correspond to... Figure 6B and / or Figure 7B .

[0077] In frame 1120, the dielectric can be etched to expose the upper surface of the first top signal metals 350, 450. Etching can also form holes exposing one or more side surfaces of the top signal metals 350, 450. Frame 1120 may correspond to... Figure 6C and / or Figure 7C .

[0078] In frame 1130, protective layers 380, 480 may be formed on dielectrics 335, 435 and on the exposed side and top surfaces of one or more top signal metals 350, 450. Frame 1130 may also correspond to... Figure 6C and / or Figure 7C .

[0079] In frame 1140, the holes can be filled with sacrificial materials 670 and 770. Frame 1140 can correspond to... Figure 6D and / or Figure 7D .

[0080] In frame 1150, the orifice can be hermetically filled with more dielectrics 335 and 435. Frame 1150 can correspond to... Figure 6E and / or Figure 7E .

[0081] In frame 1160, sacrificial materials 670, 770 can be removed from the holes to form reinforcing air gaps 370, 470. Reinforcing air gaps 370, 470 may include at least one lateral portion and an upper transverse portion. At least one lateral portion may be formed on a side surface of the first top signal metal 350, 450. The upper transverse portion may be formed on the upper surface of the first top signal metal 350, 450. Frame 1160 may correspond to... Figure 6F and / or Figure 7F .

[0082] Re-reference Figure 9 In block 950, one or more backside signal layers 155 may be formed on the backside of substrate 110. The one or more backside signal layers 155 may be configured to carry one or more signals to and / or from semiconductor circuitry 120. The one or more backside signal layers 155 may include a first backside signal layer 155, which may include one or more backside signal metals. A backside air gap 174 may be formed on the side surface of the first backside signal metal. Block 950 may also be optional, as indicated by the dashed box.

[0083] In block 955, one or more front power layers 160 may be formed on one or more front signal layers 150 on the front side of substrate 110. The one or more front power layers 160 may be configured to carry power to semiconductor circuitry 120 and include a first front power layer 160, which may include one or more front power metals. A front power air gap 172 may be formed on a side surface of the first front power metal. At least one power metal of the one or more front power layers 160 may have a larger cross-section than any of the front signal metals of the one or more front signal layers 150.

[0084] In block 960, one or more back power layers 165 may be formed beneath one or more back signal layers 155 on the back side of substrate 110. The one or more back power layers 165 may be configured to carry power to semiconductor circuit 120. At least one power metal of the one or more back power layers 165 may have a larger cross-section than any back signal metal of the one or more back signal layers 155.

[0085] Figure 12 Various electronic devices 1200 that can be integrated with any of the aforementioned devices according to various aspects of this disclosure are illustrated. For example, mobile phone device 1202, laptop computer device 1204 and fixed location terminal device 1206 may each generally be regarded as user equipment (UE) and may include one or more devices as described herein (e.g., devices 200, 300, 400). Figure 12 The devices 1202, 1204, and 1206 illustrated are merely exemplary. Other electronic devices may also include die packages, including but not limited to a group of devices (e.g., electronic devices) that include: mobile devices, handheld personal communication system (PCS) units, portable data units (such as personal digital assistants), GPS-enabled devices, navigation devices, set-top boxes, music players, video players, entertainment units, fixed-location data units (such as instrument reading devices), communication devices, smartphones, tablet computers, computers, wearable devices, servers, routers, electronic devices implemented in motor vehicles (e.g., autonomous vehicles), Internet of Things (IoT) devices, or any other device or any combination thereof that stores or retrieves data or computer instructions.

[0086] The devices and functionalities disclosed above can be designed and configured in computer files (e.g., RTL, GDSII, GERBER, etc.) stored on a computer-readable medium. Some or all of these files can be provided to a manufacturing process provider that manufactures the device based on such files. The resulting product may include semiconductor wafers, which are subsequently diced into semiconductor dies and packaged into glass antenna devices. These glass antenna devices can then be used in the devices described herein.

[0087] Specific implementation examples are described in the following numbered clauses: Clause 1: A device comprising: a substrate; a semiconductor circuit located on a front side of the substrate; one or more front metal layers located on the semiconductor circuit on the front side of the substrate; and one or more front signal layers located on the one or more front metal layers on the front side of the substrate, the one or more front signal layers being configured to carry one or more signals to and / or from the semiconductor circuit and including a first front signal layer, wherein the first front signal layer includes one or more top signal metals, the one or more top signal metals including a first top signal metal, and wherein a front air gap is formed on a side surface of the first top signal metal.

[0088] Clause 2: The device according to Clause 1, wherein the first top signal metal has a larger cross-section than any metal of the front metal layer.

[0089] Clause 3: The device according to any one of Clauses 1 to 2, wherein another front air gap is formed on the other side surface of the first top signal metal.

[0090] Clause 4: The device according to any one of Clauses 1 to 3, wherein the front air gap is an enhanced air gap comprising at least one lateral portion and an upper transverse portion, the at least one lateral portion being formed on the side surface of the first top signal metal, and the upper transverse portion being formed on the upper surface of the first top signal metal.

[0091] Clause 5: The device according to Clause 4, wherein the enhanced air gap further includes another lateral portion formed on the other side surface of the first top signal metal.

[0092] Clause 6: In any one of Clauses 4 to 5, the one or more top signal metals also include a second top signal metal adjacent to the first top signal metal, and the upper lateral portion of the reinforcing air gap is at least partially formed on the upper surface of the second top signal metal.

[0093] Clause 7: The device according to any one of Clauses 4 to 6, wherein the first front signal layer is the uppermost metal layer on the front side of the substrate.

[0094] Clause 8: The device according to any one of Clauses 4 to 7 further comprises: one or more backside signal layers located on the backside of the substrate, the one or more backside signal layers being configured to carry one or more signals to and / or from the semiconductor circuit and including a first backside signal layer, wherein the first backside signal layer includes one or more backside signal metals, the one or more backside signal metals including a first backside signal metal, and a backside air gap being formed on a side surface of the first backside signal metal.

[0095] Clause 9: The device according to Clause 8, wherein the back air gap is a first back air gap, wherein the one or more back signal layers also include a second back signal layer located directly below or above the first back signal layer, and wherein the second back air gap is formed on the side surface of at least one signal metal of the second back signal layer.

[0096] Clause 10: The device according to any one of Clauses 8 to 9, the device further comprising: one or more back power layers, the one or more back power layers being located below the one or more back signal layers on the back side of the substrate, the one or more back power layers being configured to deliver power to the semiconductor circuit, wherein at least one power metal of the one or more back power layers has a larger cross-section than any back signal metal of the one or more back signal layers.

[0097] Clause 11: The device according to any one of Clauses 1 to 10, wherein the front air gap is a first front air gap, wherein the one or more front signal layers also include a second front signal layer located directly below or directly above the first front signal layer, and wherein the second front air gap is formed on the side surface of at least one signal metal of the second front signal layer.

[0098] Clause 12: The device according to any one of Clauses 1 to 11, the device further comprising: one or more front power layers, the one or more front power layers being located on the one or more front signal layers on the front side of the substrate, the one or more front power layers being configured to deliver power to the semiconductor circuit and including a first front power layer, wherein the first front power layer includes one or more front power metals, the one or more front power metals including a first front power metal, and a front power air gap being formed on a side surface of the first front power metal.

[0099] Clause 13: The device according to Clause 12, wherein the first front power metal has a larger cross-section than any top signal metal of the one or more front signal layers.

[0100] Clause 14: The device according to any one of Clauses 12 to 13, wherein the front power air gap is a first front power air gap, wherein the one or more front power layers also include a second front power layer located directly below or directly above the first front power layer, and wherein the second front power air gap is formed on at least one side surface of the front power metal of the second front power layer.

[0101] Clause 15: A device according to any one of Clauses 1 to 14, wherein the device is incorporated into an apparatus selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, Internet of Things (IoT) devices, laptop computers, servers, and devices in motor vehicles.

[0102] Clause 16: A method of manufacturing a device, the method comprising: providing a substrate; providing a semiconductor circuit on a front side of the substrate; forming one or more front metal layers on the semiconductor circuit on the front side of the substrate; and forming one or more front signal layers on the one or more front metal layers on the front side of the substrate, the one or more front signal layers being configured to carry one or more signals to and / or from the semiconductor circuit and including a first front signal layer, wherein the first front signal layer includes one or more top signal metals, the one or more top signal metals including a first top signal metal, and wherein a front air gap is formed on a side surface of the first top signal metal.

[0103] Clause 17: The method according to Clause 16, wherein the first top signal metal has a larger cross-section than any metal in the front metal layer.

[0104] Clause 18: The method according to any one of Clauses 16 to 17, wherein another front air gap is formed on the other side surface of the first top signal metal.

[0105] Clause 19: The method according to any one of Clauses 16 to 18, wherein forming the one or more front-side signal layers on the front side of the substrate comprises: polishing a dielectric formed over a prior metal layer to expose an upper surface of the one or more top signal metals; further depositing a dielectric on the dielectric and the polished upper surface of the one or more top signal metals; etching the dielectric to expose an upper surface of the first top signal metal, the etching also forming a hole exposing side surfaces of the one or more top signal metals; forming a protective layer on the dielectric and on the exposed side and upper surfaces of the one or more top signal metals; filling the hole with a sacrificial material; sealing the hole with more dielectric; and removing the sacrificial material from the hole to form an enhanced air gap comprising at least one lateral portion and an upper lateral portion, the at least one lateral portion being formed on the side surface of the first top signal metal, and the upper lateral portion being formed on the upper surface of the first top signal metal.

[0106] Clause 20: The method according to Clause 19, wherein the reinforcing air gap further includes another lateral portion formed on the other side surface of the first top signal metal.

[0107] Clause 21: The method according to any one of Clauses 19 to 20, wherein the one or more top signal metals also include a second top signal metal adjacent to the first top signal metal, and wherein the upper lateral portion of the reinforcing air gap is at least partially formed on the upper surface of the second top signal metal.

[0108] Clause 22: The method according to any one of Clauses 19 to 21, wherein the first front signal layer is the uppermost metal layer on the front side of the substrate.

[0109] Clause 23: The method according to any one of Clauses 19 to 22, the method further comprising forming one or more back-side signal layers on the back side of the substrate, the one or more back-side signal layers being configured to carry one or more signals to and / or from the semiconductor circuit and including a first back-side signal layer, wherein the first back-side signal layer includes one or more back-side signal metals, the one or more back-side signal metals including a first back-side signal metal, and a back-side air gap being formed on a side surface of the first back-side signal metal.

[0110] Clause 24: The method according to Clause 23, wherein the back air gap is a first back air gap, wherein the one or more back signal layers also include a second back signal layer located directly below or above the first back signal layer, and wherein the second back air gap is formed on the side surface of at least one signal metal of the second back signal layer.

[0111] Clause 25: The method according to any one of Clauses 23 to 24, the method further comprising: forming one or more back power layers below the one or more back signal layers on the back side of the substrate, the one or more back power layers being configured to carry power to the semiconductor circuit, wherein at least one power metal of the one or more back power layers has a larger cross-section than any back signal metal of the one or more back signal layers.

[0112] Clause 26: The method according to any one of Clauses 16 to 25, wherein the front air gap is a first front air gap, wherein the one or more front signal layers also include a second front signal layer located directly below or above the first front signal layer, and wherein the second front air gap is formed on the side surface of at least one signal metal of the second front signal layer.

[0113] Clause 27: The method according to any one of Clauses 16 to 26, the method further comprising: forming one or more front power layers on the one or more front signal layers on the front side of the substrate, the one or more front power layers being configured to carry power to the semiconductor circuit and including a first front power layer, wherein the first front power layer includes one or more front power metals, the one or more front power metals including a first front power metal, and a front power air gap being formed on a side surface of the first front power metal.

[0114] Clause 28: The method according to Clause 27, wherein the first front power metal has a larger cross-section than any top signal metal of the one or more front signal layers.

[0115] Clause 29: The method according to any one of Clauses 27 to 28, wherein the front power air gap is a first front power air gap, wherein the one or more front power layers also include a second front power layer located directly below or directly above the first front power layer, and wherein the second front power air gap is formed on at least one side surface of the front power metal of the second front power layer.

[0116] As used herein, the terms “user equipment” (or “UE”), “user device,” “user terminal,” “client device,” “communication device,” “wireless device,” “wireless communication device,” “handheld device,” “mobile device,” “mobile terminal,” “mobile station,” “phone,” “access terminal,” “subscriber device,” “subscriber terminal,” “subscriber station,” “terminal,” and variations thereof may interchangeably refer to any suitable mobile or stationary device capable of receiving wireless communication and / or navigation signals. These terms include, but are not limited to, music players, video players, entertainment units, navigation devices, communication devices, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, onboard equipment in motor vehicles, and / or other types of portable electronic devices that are typically carried by an individual and / or have communication capabilities (e.g., wireless, cellular, infrared, short-range radio, etc.). These terms are also intended to include devices that communicate with another device capable of receiving wireless communication and / or navigation signals (such as via short-range wireless, infrared, wired, or other connections), regardless of whether satellite signal reception, auxiliary data reception, and / or positioning-related processing occur at that device or at that other device. Furthermore, these terms are intended to encompass all devices, including wireless and wired communication devices capable of communicating with the core network via a radio access network (RAN), through which the UE can connect to external networks such as the Internet and other UEs. Of course, other mechanisms for connecting to the core network and / or the Internet are also possible for the UE, such as via a wired access network, a wireless local area network (WLAN) (e.g., based on IEEE 802.11, etc.). The UE can be implemented using any of several types of devices, including but not limited to printed circuit (PC) cards, compact flash memory devices, external or internal modems, wireless or wired telephones, smartphones, tablet devices, tracking devices, asset tags, etc. The communication link through which the UE can transmit signals to the RAN is called an uplink channel (e.g., reverse traffic channel, reverse control channel, access channel, etc.). The communication link through which the RAN can transmit signals to the UE is called a downlink or forward link channel (e.g., paging channel, control channel, broadcast channel, forward traffic channel, etc.). As used herein, the term “Traffic Channel (TCH)” may refer to either the uplink / reverse traffic channel or the downlink / forward traffic channel.

[0117] Wireless communication between electronic devices can be based on different technologies, such as Code Division Multiple Access (CDMA), W-CDMA, Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), Orthogonal Frequency Division Multiplexing (OFDM), Global System for Mobile Communications (GSM), 3GPP Long Term Evolution (LTE), 5G New Radio, and Bluetooth. ® (BT), Bluetooth® Low Energy (BLE), IEEE 802.11 (Wi-Fi) ® Bluetooth is compatible with IEEE 802.15.4 (Zigbee / Thread) and other protocols that can be used in wireless or data communication networks. ® Low power (also known as Bluetooth) ® LE, BLE and Bluetooth ® (Smart) is made of Bluetooth ® Bluetooth is a wireless personal area network (BLAN) technology designed and marketed by the Bluetooth Technology Alliance, aiming to provide significantly reduced power consumption and cost while maintaining similar communication range. BLE was merged into the main Bluetooth network in 2010. ® The standard uses Bluetooth. ® Core specification version 4.0 and in Bluetooth ® Updated in version 5.

[0118] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any detail described herein as "exemplary" is not to be construed as superior to other examples. Similarly, the term "example" does not imply that all examples include the features, advantages, or modes of operation discussed. Furthermore, specific features and / or structures may be combined with one or more other features and / or structures. Additionally, at least a portion of the apparatus described herein may be configured to perform at least a portion of the methods described herein.

[0119] It should be noted that the terms “connection,” “coupling,” or any variation thereof mean any direct or indirect connection or coupling between elements, and may cover the presence of an intermediate element between two elements through which the two elements are “connected” or “coupled” together, unless the connection is explicitly disclosed as a direct connection.

[0120] The use of designations such as "first," "second," etc., to refer to elements in this document does not limit the number and / or order of those elements. Rather, these designations are used as a convenient way to distinguish two or more elements and / or instances of elements. Moreover, unless otherwise stated, a collection of elements may include one or more elements.

[0121] Those skilled in the art will recognize that information and signals can be represented using any of a variety of different techniques and arts. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be mentioned throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof.

[0122] Nothing described or illustrated in this application is intended to offer any component, action, feature, benefit, advantage, or equivalent to the public, whether or not such component, action, feature, benefit, advantage, or equivalent is stated in the claims.

[0123] In the detailed description above, it can be seen that different features are grouped together in the various examples. This manner of disclosure should not be construed as reflecting an intention that the claimed examples have more features than those explicitly mentioned in the corresponding claims. Rather, this disclosure may include all features of fewer than the individual examples disclosed. Therefore, the appended claims should be considered as incorporated into this description, wherein each claim may be a separate example in itself. Although each claim may be a separate example in itself, it should be noted that while dependent claims in the claims may refer to a specific combination with one or more claims, other examples may also cover or include combinations of the subject matter of said dependent claim with any other dependent claim or any feature with other dependent and independent claims. Such combinations are presented herein unless explicitly stated that a particular combination is not intended to be used. Furthermore, it is intended that features of a claim may be included in any other independent claim, even if said claim is not directly dependent on that independent claim.

[0124] Furthermore, it should be noted that the methods, systems, and apparatuses disclosed in this description or claims may be implemented by devices including components for performing corresponding actions and / or functions of the disclosed methods.

[0125] Furthermore, in some examples, a single action can be subdivided into one or more sub-actions, or contain one or more sub-actions. Such sub-actions can be included in the disclosure of a single action or can be part of the disclosure of a single action.

[0126] Although the foregoing disclosure has shown illustrative examples of this disclosure, it should be noted that various changes and modifications may be made without departing from the scope of this disclosure as defined by the appended claims. The functions and / or actions in the method claims of the examples of this disclosure described herein do not necessarily have to be performed in any particular order. Furthermore, well-known elements will not be described in detail or may be omitted so as not to obscure the relevant details of the aspects and examples disclosed herein. Moreover, although elements of this disclosure may be described or claimed in the singular, the plural form may also be considered unless expressly stated as limited to the singular.

Claims

1. A device, the device comprising: substrate; A semiconductor circuit, wherein the semiconductor circuit is located on the front side of the substrate; One or more front-side metal layers, the one or more front-side metal layers being located on the semiconductor circuitry on the front side of the substrate; and One or more front-side signal layers, said one or more front-side signal layers being located on said one or more front-side metal layers on said front side of said substrate, said one or more front-side signal layers being configured to carry one or more signals to and / or from said semiconductor circuitry and including a first front-side signal layer. The first front signal layer includes one or more top signal metals, wherein the one or more top signal metals include a first top signal metal, and The front air gap is formed on the side surface of the first top signal metal.

2. The device of claim 1, wherein the first top signal metal has a larger cross-section than any metal in the front metal layer.

3. The device of claim 1, wherein another front air gap is formed on the other side surface of the first top signal metal.

4. The device of claim 1, wherein the front air gap is an enhanced air gap comprising at least one lateral portion and an upper transverse portion, the at least one lateral portion being formed on the side surface of the first top signal metal, and the upper transverse portion being formed on the upper surface of the first top signal metal.

5. The device of claim 4, wherein the enhanced air gap further comprises another lateral portion formed on the other side surface of the first top signal metal.

6. The device according to claim 4, The one or more top signal metals also include a second top signal metal adjacent to the first top signal metal, and The upper transverse portion of the enhanced air gap is at least partially formed on the upper surface of the second top signal metal.

7. The device of claim 4, wherein the first front signal layer is the uppermost metal layer on the front side of the substrate.

8. The device according to claim 4, further comprising: One or more back-side signal layers, said one or more back-side signal layers being located on said back-side of said substrate, said one or more back-side signal layers being configured to carry one or more signals to and / or from said semiconductor circuitry and including a first back-side signal layer. The first back signal layer includes one or more back signal metals, the one or more back signal metals including a first back signal metal, and a back air gap is formed on the side surface of the first back signal metal.

9. The device according to claim 8, The back air gap mentioned above is the first back air gap. The one or more back-side signal layers also include a second back-side signal layer located directly below or above the first back-side signal layer, and The second back air gap is formed on at least one side surface of the signal metal of the second back signal layer.

10. The device according to claim 8, further comprising: One or more back-side power layers, located below one or more back-side signal layers on the back side of the substrate, the one or more back-side power layers being configured to deliver power to the semiconductor circuit. At least one power metal of the one or more back power layers has a larger cross-section than any back signal metal of the one or more back signal layers.

11. The device according to claim 1, The front air gap mentioned above is the first front air gap. The one or more front signal layers also include a second front signal layer located directly below or above the first front signal layer, and The second front air gap is formed on at least one side surface of the signal metal of the second front signal layer.

12. The device according to claim 1, further comprising: One or more front-side power layers, said one or more front-side power layers being located on said one or more front-side signal layers on said front side of said substrate, said one or more front-side power layers being configured to carry power to said semiconductor circuit and including a first front-side power layer. The first front power layer includes one or more front power metals, the one or more front power metals including a first front power metal, and a front power air gap is formed on the side surface of the first front power metal.

13. The device of claim 12, wherein the first front power metal has a larger cross-section than any top signal metal of the one or more front signal layers.

14. The device according to claim 12, The aforementioned front power air gap is the first front power air gap. The one or more front power layers also include a second front power layer located directly below or above the first front power layer, and The second front power air gap is formed on at least one side surface of the front power metal of the second front power layer.

15. The device of claim 1, wherein the device is incorporated into an apparatus selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, Internet of Things (IoT) devices, laptop computers, servers, and devices in motor vehicles.

16. A method of manufacturing a device, the method comprising: Provide substrate; A semiconductor circuit is provided on the front side of the substrate; One or more front-side metal layers are formed on the semiconductor circuit on the front side of the substrate; as well as One or more front-side signal layers are formed on the one or more front-side metal layers on the front side of the substrate, the one or more front-side signal layers being configured to carry one or more signals to and / or from the semiconductor circuit and including a first front-side signal layer. The first front signal layer includes one or more top signal metals, wherein the one or more top signal metals include a first top signal metal, and The front air gap is formed on the side surface of the first top signal metal.

17. The method of claim 16, wherein the first top signal metal has a larger cross-section than any metal in the front metal layer.

18. The method of claim 16, wherein another front air gap is formed on the other side surface of the first top signal metal.

19. The method of claim 16, wherein forming the one or more front-side signal layers on the one or more front-side metal layers on the front side of the substrate comprises: Polishing forms a dielectric layer over the previous metal layer to expose the upper surface of the one or more top signal metals; A further dielectric is deposited on the polished surface of the dielectric and the one or more top signal metals; The dielectric is etched to expose the upper surface of the first top signal metal, and the etching also forms holes that expose the side surfaces of the one or more top signal metals; A protective layer is formed on the dielectric and on the exposed side and top surfaces of the one or more top signal metals; The holes are filled with sacrificial material; Seal the hole with more dielectric material; as well as The sacrificial material is removed from the hole to form an enhanced air gap comprising at least one lateral portion and an upper transverse portion, the at least one lateral portion being formed on the side surface of the first top signal metal, and the upper transverse portion being formed on the upper surface of the first top signal metal.

20. The method of claim 19, wherein the enhanced air gap further comprises another lateral portion formed on the other side surface of the first top signal metal.

21. The method according to claim 19, The one or more top signal metals also include a second top signal metal adjacent to the first top signal metal, and The upper transverse portion of the enhanced air gap is at least partially formed on the upper surface of the second top signal metal.

22. The method of claim 19, wherein the first front signal layer is the uppermost metal layer on the front side of the substrate.

23. The method of claim 19, further comprising: One or more back-side signal layers are formed on the back side of the substrate, the one or more back-side signal layers being configured to carry one or more signals to and / or from the semiconductor circuit and including a first back-side signal layer. The first back signal layer includes one or more back signal metals, the one or more back signal metals including a first back signal metal, and a back air gap is formed on the side surface of the first back signal metal.

24. The method according to claim 23, The back air gap mentioned above is the first back air gap. The one or more back-side signal layers also include a second back-side signal layer located directly below or above the first back-side signal layer, and The second back air gap is formed on at least one side surface of the signal metal of the second back signal layer.

25. The method according to claim 23, further comprising: One or more back-side power layers are formed beneath the one or more back-side signal layers on the back side of the substrate, and the one or more back-side power layers are configured to deliver power to the semiconductor circuit. At least one power metal of the one or more back power layers has a larger cross-section than any back signal metal of the one or more back signal layers.

26. The method according to claim 16, The front air gap mentioned above is the first front air gap. The one or more front signal layers also include a second front signal layer located directly below or above the first front signal layer, and The second front air gap is formed on at least one side surface of the signal metal of the second front signal layer.

27. The method according to claim 16, further comprising: One or more front-side power layers are formed on the one or more front-side signal layers on the front side of the substrate, the one or more front-side power layers being configured to carry power to the semiconductor circuit and including a first front-side power layer. The first front power layer includes one or more front power metals, the one or more front power metals including a first front power metal, and a front power air gap is formed on the side surface of the first front power metal.

28. The method of claim 27, wherein the first front power metal has a larger cross-section than any top signal metal of the one or more front signal layers.

29. The method according to claim 27, The aforementioned front power air gap is the first front power air gap. The one or more front power layers also include a second front power layer located directly below or above the first front power layer, and The second front power air gap is formed on at least one side surface of the front power metal of the second front power layer.

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