Display module and display device

Abstract

The embodiment of the invention provides a display module and a display device. The display module comprises a substrate, a driving chip and at least one heat dissipation structure. The driving chip is arranged on the substrate. The heat dissipation structure is arranged on the substrate. And the heat dissipation structure is connected with the driving chip. Wherein the driving chip and the heat dissipation structure are located on the same side of the substrate. According to the embodiment of the invention, the heat dissipation efficiency of the driving chip can be improved, the image display quality of the display panel is improved, and the display effect of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display module and display device. Background Technology

[0002] Organic light-emitting diode (OLED) and flat panel display devices based on light-emitting diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices.

[0003] However, the performance of current OLED display products needs to be improved. Summary of the Invention

[0004] In view of this, embodiments of this application provide a display module and a display device to at least partially solve the above-mentioned problems.

[0005] According to a first aspect of the embodiments of this application, a display module is provided. The display module includes a substrate, a driver chip, and at least one heat dissipation structure. The driver chip is disposed on the substrate. The heat dissipation structure is disposed on the substrate and connected to the driver chip. The driver chip and the heat dissipation structure are located on the same side of the substrate.

[0006] In some embodiments, the heat dissipation structure includes a first heat dissipation part and a second heat dissipation part, the second heat dissipation part is disposed on the side of the first heat dissipation part away from the substrate, and the orthographic projection of the first heat dissipation part on the substrate is located within the orthographic projection of the second heat dissipation part on the substrate.

[0007] In some embodiments, the heat dissipation structure further includes a third heat dissipation part, which is located on the side of the first heat dissipation part closer to the substrate, and the orthographic projection of the first heat dissipation part on the substrate is located within the orthographic projection of the third heat dissipation part on the substrate.

[0008] In some embodiments, the material of the second heat dissipation part includes titanium, the material of the first heat dissipation part includes aluminum, and the material of the third heat dissipation part includes molybdenum.

[0009] In some embodiments, the number of at least one heat dissipation structure is multiple, and the multiple heat dissipation structures are distributed at intervals along the circumferential direction of the driver chip; or, the number of at least one heat dissipation structure is one, and the heat dissipation structure surrounds the driver chip.

[0010] In some embodiments, the area of ​​the second heat sink projected onto the substrate is greater than or equal to the area of ​​the driver chip projected onto the substrate.

[0011] In some embodiments, the substrate includes at least one first conductive structure. A heat dissipation structure is connected to the first conductive structure via a via, and the first conductive structure is connected to a driver chip.

[0012] In some embodiments, the first conductive structure is disposed on the side of the heat dissipation structure facing the substrate;

[0013] Preferably, the substrate further includes a gate layer, a capacitor plate layer, a first source / drain electrode layer, a second source / drain electrode layer, and an anode, which are stacked together, and the first conductive structure is disposed in the same layer as one of the gate layer, the capacitor plate layer, the first source / drain electrode layer, the second source / drain electrode layer, and the anode.

[0014] Preferably, the substrate further includes a gate layer, a capacitor plate layer, a first source / drain electrode layer, and a second source / drain electrode layer stacked along the layers. The first conductive structure is a stacked structure, with a portion of the stacked structure disposed in the same layer as the second source / drain electrode layer, a portion of the stacked structure disposed in the same layer as the first source / drain electrode layer, and a portion of the stacked structure disposed in the same layer as the gate layer or the capacitor plate layer.

[0015] In some embodiments, the display module further includes an isolation structure, a display functional layer, and a first encapsulation layer. The isolation structure and the heat dissipation structure are located on the same side of the substrate; wherein, in the thickness direction of the display module, the isolation structure includes a first end and a second end facing away from each other, the first end being located on the side of the isolation structure closer to the substrate, and the second end being located on the side of the isolation structure farther from the substrate, the orthographic projection of the first end on the substrate falling within the orthographic projection of the second end on the substrate; the isolation structure defines a plurality of first openings. The display functional layer is disposed on one side of the substrate and includes a plurality of light-emitting devices, each light-emitting device including a first electrode, a light-emitting functional layer, and a second electrode sequentially stacked on the substrate, the orthographic projection of the light-emitting functional layer of the light-emitting device on the substrate overlapping the orthographic projection of the corresponding first opening on the substrate. The first encapsulation layer is disposed on the side of the display functional layer farther from the substrate.

[0016] In some embodiments, the heat dissipation structure and the isolation structure are arranged on the same layer.

[0017] In some embodiments, the partition includes a first isolation portion and a second isolation portion, the second isolation portion being disposed on the side of the first isolation portion away from the substrate; the orthographic projection of the first isolation portion on the substrate lies within the orthographic projection of the second isolation portion on the substrate. The material of the first isolation portion is the same as the material of the first heat dissipation portion, and / or the material of the second isolation portion is the same as the material of the second heat dissipation portion.

[0018] In some embodiments, the isolation structure further includes a third isolation portion, which is located on the side of the first isolation portion closer to the substrate, and the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate.

[0019] The heat dissipation structure further includes a third heat dissipation part, which is located on the side of the first heat dissipation part closer to the substrate, and the orthographic projection of the first heat dissipation part on the substrate is located within the orthographic projection of the third heat dissipation part on the substrate.

[0020] The material of the third isolation section is the same as that of the third heat dissipation section.

[0021] According to a second aspect of the embodiments of this application, a display module is also provided. The display module includes a substrate, at least one heat dissipation structure, an isolation structure, and a display functional layer. The substrate is provided with a first conductive structure for bonding a driver chip. The isolation structure and the heat dissipation structure are located on the same side of the substrate; wherein, in the thickness direction of the display module, the isolation structure includes a first end and a second end opposite to each other, the first end is located on the side of the isolation structure closer to the substrate, the second end is located on the side of the isolation structure away from the substrate, and the orthographic projection of the first end on the substrate is within the orthographic projection of the second end on the substrate; the isolation structure defines a plurality of first openings; the isolation structure and the heat dissipation structure are disposed in the same layer. The display functional layer is disposed on one side of the substrate and includes a plurality of light-emitting devices, each light-emitting device including a first electrode, a light-emitting functional layer, and a second electrode sequentially stacked on the substrate, the orthographic projection of the light-emitting functional layer of the light-emitting device on the substrate overlapping the orthographic projection of the corresponding first opening on the substrate.

[0022] In some embodiments, the heat dissipation structure is ring-shaped and surrounds the driver chip.

[0023] According to a third aspect of the embodiments of this application, a display device is provided. The display device includes the display module in any of the above embodiments.

[0024] According to the solution provided in this application embodiment, the driver chip is connected to the heat dissipation structure. In this case, the heat generated by the driver chip has two main heat dissipation paths: part of it is directly dissipated through the side of the driver chip away from the substrate and the sidewall, and part is conducted to the periphery of the driver chip through the heat dissipation structure. This expands the heat dissipation path, thereby reducing the temperature of the driver chip in a shorter time, increasing its lifespan, preventing damage, and ensuring that the driver chip continues to transmit signals to the pixel driving circuit, maintaining the brightness of the light-emitting device, improving the image display quality of the display panel, and enhancing the display effect. Furthermore, the increased heat dissipation efficiency of the driver chip prevents the temperature of the area corresponding to the driver chip on the display panel from becoming excessively high, thus extending the lifespan of the display panel. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0026] Figure 1 This is an exemplary structural diagram of a display device according to an embodiment of this application;

[0027] Figure 2 This is an exemplary structural diagram of a display panel according to an embodiment of this application;

[0028] Figure 3 for Figure 2 Enlarged view of point A in the middle;

[0029] Figure 4 A schematic diagram illustrating an exemplary structure of a display panel provided for some embodiments;

[0030] Figure 5 This is an exemplary structural diagram of a display panel according to an embodiment of this application;

[0031] Figure 6 This is a schematic diagram illustrating an exemplary structure of another display panel according to an embodiment of this application;

[0032] Figure 7a This is a cross-sectional view of a display panel along the thickness direction of the display panel, according to an embodiment of this application.

[0033] Figure 7b This is a cross-sectional view taken along the thickness direction of another display panel according to an embodiment of this application;

[0034] Figure 8 This is a partial exemplary structural diagram of a display panel according to an embodiment of this application;

[0035] Figure 9 This is a schematic diagram illustrating an exemplary structure of another display panel according to an embodiment of this application;

[0036] Figure 10 This is a partial exemplary structural diagram of another display panel according to an embodiment of this application;

[0037] Figure 11 This is a partial exemplary structural diagram of another display panel according to an embodiment of this application. Detailed Implementation

[0038] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.

[0039] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in the embodiments of this application refers to and includes any or all possible combinations of one or more associated listed items.

[0040] It should be understood that in the description of the embodiments of this application, the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the scheme of the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0041] Furthermore, when an element or layer is referred to as being "on" another element or layer, "connected to," or "bonded to" another element or layer, the element or layer may be directly on the other element or layer, directly connected to, or directly bonded to the other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly bonded to" another element or layer, there are no intermediate elements or layers.

[0042] The terms First, Second, etc., are used to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and / or part from another element, component, region, layer, and / or part.

[0043] Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0044] The specific implementation of the embodiments of this application will be further described below with reference to the accompanying drawings.

[0045] The relevant structural parts mentioned below, such as the content of the isolation structure, are found in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, and PCT / CN2024 / 099072. Further descriptions are provided in CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, ​​CN117396039A, CN116669480A, CN116600606A, and CN117500332A for reference.

[0046] Figure 1 This is an exemplary structural diagram of a display device according to an embodiment of this application.

[0047] See Figure 1 This application provides a display device 1000. The display device 1000 is an electronic device with image (including still images or moving images, wherein the moving images may be video) display function. For example, the display device 1000 may be any of the following: monitor, television set, billboard, digital photo frame, laser printer with display function, telephone, mobile phone, personal digital assistant (PDA), digital camera, portable camcorder, viewfinder, navigator, large-area wall, home appliance, information query device (such as business query device for e-government, bank, hospital, power and other departments), monitor, electronic display screen, virtual reality (VR) display device, augmented reality (AR) display device, and vehicle display, but is not limited thereto.

[0048] See also Figure 1The display device 1000 may include a display module. In some examples, the display module may include a display panel 100. Exemplarily, the display panel may be a self-emissive display panel, such as an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, or a mini LED (or microLED) display panel. In other examples, the display module may include a display panel 100 and a backlight module. Exemplarily, the display panel may be a liquid crystal display (LCD) panel. The light-emitting module is disposed on the back of the display panel and configured to provide backlight to the display panel. The embodiments of this disclosure are not limited to any particular display panel.

[0049] Figure 2 This is an exemplary structural diagram of a display panel according to an embodiment of this application.

[0050] For ease of description below, an XYZ coordinate system is established. The first direction X and the second direction Y are both parallel to the plane containing the display side of the display panel 100, and they intersect. For example, the first direction X and the second direction Y are perpendicular to each other. The third direction Z is perpendicular to the plane containing the display side of the display panel 100.

[0051] See Figure 2 The display panel 100 has a display area AA and a non-display area SA, wherein the display area AA is the area on the display panel 100 used for displaying images, and the non-display area SA is the area on the display panel 100 other than the display area AA. The non-display area SA may be located on at least one side of the display area AA (e.g., one side, or multiple sides), for example, the non-display area SA may be arranged around the display area AA.

[0052] Figure 3 for Figure 2 Enlarged view of point A in the middle.

[0053] See Figure 2 and Figure 3The display area AA contains multiple pixels P. These pixels P are arranged in an array within the display area AA, with the first direction X representing the row direction of the pixels P and the second direction Y representing the column direction. Each pixel P includes multiple sub-pixels, which are the smallest units for displaying images within the display panel. The sub-pixels emit different colors, and each sub-pixel can display a single color. For example, pixel P includes a first sub-pixel, a second sub-pixel, and a third sub-pixel, displaying red, green, or blue respectively. In this case, the first sub-pixel is the red sub-pixel R, the second sub-pixel is the green sub-pixel G, and the third sub-pixel is the blue sub-pixel B.

[0054] Multiple subpixel arrays are arranged in the display area AA of the display panel 100. The subpixel arrangement can be the standard RGB arrangement, Delta pixel arrangement, Pentile arrangement, diamond-like arrangement, etc.

[0055] Each sub-pixel includes a light-emitting device (described in detail below) and a pixel driving circuit that controls the light emission of that device. That is, one sub-pixel corresponds to one pixel driving circuit. The pixel driving circuit can be configured to write a data signal in response to a received scan signal and drive the light-emitting device to emit light through that electrical signal. The brightness of the light-emitting device can be positively correlated with the voltage value of the data signal line. By adjusting the brightness of different sub-pixels, multiple colors can be displayed through color overlay.

[0056] Figure 4 This is an exemplary structural diagram of a display panel provided for some embodiments.

[0057] In some embodiments, see Figure 4 The display panel 100A includes a substrate 10A and a driver chip 20A, with the driver chip 20A located on the substrate 10A. The driver chip 20A generates heat during operation. Because the driver chip 20A is directly attached to the substrate 10A, the heat generated by the driver chip 20A can only be dissipated through the side of the driver chip 20A away from the substrate 10A. Lacking a heat dissipation structure, the heat from the driver chip 20A has no other way to dissipate, resulting in low heat dissipation efficiency. This reduces the lifespan of the driver chip 20A, affects its ability to transmit signals to the pixel driving circuit, thus affecting the brightness of the light-emitting devices and consequently reducing the image display quality of the display panel 100A, leading to a decrease in the display effect. Furthermore, the temperature of the area where the driver chip 20A is located increases, which in turn raises the temperature of the corresponding area on the display panel 100A, further reducing the lifespan of the display panel 100A.

[0058] To address the aforementioned issues, this application provides a display panel 100. The display panel 100 incorporates a heat dissipation structure to improve the heat dissipation efficiency of the driver chip 20.

[0059] The display panel 100 includes a substrate 10, a driver chip 20, and a heat dissipation structure 30.

[0060] Figure 5 This is an exemplary structural diagram of a display panel according to an embodiment of this application.

[0061] In some embodiments, see Figure 5 The heat dissipation structure 30 is located between the substrate 10 and the driver chip 20. Specifically, the heat dissipation structure 30 is attached to the side of the driver chip 20 closest to the substrate 10. The heat dissipation structure 30 can be a graphite film or a SUS steel sheet. The graphite film can utilize its grain orientation and uniform thermal conductivity to rapidly transfer the heat generated by the driver chip 20 to the entire graphite film, dissipating the heat outside the driver chip 20 and improving the heat dissipation performance of the driver chip 20. The SUS steel sheet has good thermal conductivity and can disperse the heat generated by the driver chip 20 onto the SUS steel sheet, dissipating it outside the driver chip 20 and improving the heat dissipation performance of the driver chip 20. In other words, the heat generated by the driver chip 20 is dispersed outside the driver chip 20 by the heat dissipation structure 30, thereby reducing the temperature of the driver chip 20, reducing the impact of the increased temperature of the driver chip 20 on the display panel 100, thereby improving the display effect of the display panel 100 and extending the service life of the display panel 100.

[0062] However, since the heat dissipation structure 30 is located between the substrate 10 and the driver chip 20, the number of film layers in the display panel 100 increases. With the other film layers of the display panel 100 having the same thickness, the overall thickness of the display panel 100 increases, which is detrimental to achieving a thinner and lighter display panel 100. Furthermore, the heat dissipation structure 30 needs to be attached to one side of the driver chip 20 using adhesive. This adhesive covers a portion of the surface of the driver chip 20. Because the adhesive has poor thermal conductivity, the heat dissipation area on the surface of the driver chip 20 is reduced, making it more difficult for the heat generated by the driver chip 20 to dissipate, thus reducing the heat dissipation efficiency of the driver chip 20 and affecting the display effect of the display panel 100.

[0063] Figure 6 This is an exemplary structural diagram of another display panel according to an embodiment of this application.

[0064] This application embodiment also provides another display panel 100, see [link to relevant documentation] Figure 6The heat dissipation structure 30 is located around the driver chip 20. The heat generated by the driver chip 20 is dissipated to the surrounding area of ​​the driver chip 20 through the heat dissipation structure 30 to reduce the temperature of the driver chip 20, thereby extending the service life of the driver chip 20 and improving the display effect of the display panel 100.

[0065] Specifically, the display panel 100 includes a substrate 10, a driver chip 20, and at least one (e.g., one, or more) heat dissipation structure 30.

[0066] Figure 7a This is a cross-sectional view of a display panel along the thickness direction of the display panel, according to an embodiment of this application.

[0067] See Figure 7a The substrate 10 includes a substrate 11. The substrate supports other structures in the display panel 100. The substrate 11 can be configured according to actual needs. Exemplarily, the substrate 11 can be a rigid substrate. The material of the rigid substrate can be glass or polymethyl methacrylate (PMMA), etc. The substrate 11 can also be a flexible substrate. The material of the flexible substrate can be polyethylene terephthalate (PET), polyethylene naphthalate (PEN), ultrathin glass, or polyimide (PI), etc.

[0068] The substrate 10 may also include a pixel driving layer 12, which is located on one side of the substrate 10. The pixel driving layer 12 is configured to receive signals from the driving chip 20 and provide electrical signals to each light-emitting device, so that the light-emitting device emits light of a corresponding brightness.

[0069] The pixel driving layer 12 includes multiple pixel driving circuits, each electrically connected to a sub-pixel to drive the sub-pixel to emit light. The pixel driving circuit may include multiple transistors and capacitors, among other electronic components. For example, each pixel driving circuit may include three transistors and one capacitor, forming a 3T1C (i.e., one driving transistor, two switching transistors, and one capacitor). It may also include more than three transistors and at least one capacitor, such as a 4T1C (i.e., one driving transistor, three switching transistors, and one capacitor), a 5T1C (i.e., one driving transistor, four switching transistors, and one capacitor), or a 7T1C (i.e., one driving transistor, six switching transistors, and one capacitor). The transistors may be thin-film transistors (TFTs), metal oxide semiconductors (MOS), or other switching devices with similar characteristics; the embodiments of this disclosure do not limit the transistors used.

[0070] The following describes the structure of each film layer of the pixel driving layer 12.

[0071] See also Figure 7a The pixel driving layer 12 includes a gate layer 121, a capacitor plate layer 122, a first source / drain electrode layer 123, and a second source / drain electrode layer 124, which are stacked together. The gates of the transistors in the pixel driving circuit are located in the gate layer, the source / drain electrodes are located in the source / drain electrode layer, and the capacitors are located in the capacitor plate layer. The second source / drain electrode layer 124 is connected to the first source / drain electrode layer 123, for example, through a via connection. The first source / drain electrode layer 123 is connected to the gate layer 121, for example, through a via connection.

[0072] The pixel driving layer 12 may further include a gate insulator (GI) 125, a first insulating layer (CI) 126, a gate layer 121 located on the side of GI 125 closer to the substrate 11, and a capacitor plate layer 122 located between the first gate insulator 125 and the first insulating layer 126. Along the direction away from the substrate 11, the pixel driving layer 12 further includes an interlayer insulating layer (ILD) 127, a passivation layer (PVX) 128, and a planarization layer (PLN) stacked sequentially. The planarization layer includes a first planarization layer 1291 and a second planarization layer 1292. The capacitor plate layer 122 is located between the gate insulator 125 and the first insulating layer 126. A first source / drain electrode layer 123 is located between the interlayer insulating layer 127 and the passivation layer 128, and a second source / drain electrode layer 124 is located between the first planarization layer 1291 and the second planarization layer 1292.

[0073] The pixel driving layer 12 may further include a bottom shelter metal (BSM) 1210. The bottom shelter metal 1210 is located on the side of the gate layer 121 closest to the substrate 11, blocking light from the side of the substrate 11 away from the bottom shelter metal 1210 from entering the pixel driving layer 12. The material of the bottom shelter metal 1210 may be one or more of titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), etc. A second insulating layer 1211 is disposed between the bottom shelter metal 1210 and the gate layer 121.

[0074] The substrate 10 also includes an electrode layer disposed on the side of the planarization layer away from the substrate 11. The electrode layer includes electrodes for multiple light-emitting devices, such as anodes and cathodes. The electrodes are connected to the second source / drain electrode layer 124, for example, via a via connection.

[0075] See also Figure 2 A driver chip 20 is disposed on a substrate 10. Exemplarily, the orthographic projection of the driver chip 20 onto the substrate 10 lies within the non-display area SA of the display panel 100. The driver chip 20 is coupled to at least one (e.g., one, or more) light-emitting devices. Exemplarily, one driver chip 20 is coupled to multiple light-emitting devices and is configured to provide each of these light-emitting devices with its own required driving signal to drive them to operate. The driver chip 20 can independently control the brightness of each light-emitting device. The driving signals provided by the driver chip 20 to different light-emitting devices can be the same or different. For example, the driver chip 20 can be a display drive integrated circuit (DDIC). The DDIC is configured to provide output driving signals and relay signals to the light-emitting units; for example, the relay signal is an address signal provided to other driving elements, that is, other driving elements receive the relay signal as an input signal to obtain the address signal. Alternatively, the driving signal can be a driving current used to drive the light-emitting devices to emit light.

[0076] See also Figure 6 The driver chip 20 may include a chip body 21 and a connection structure 22. The connection structure 22 is closer to the substrate 10 than the chip body 21. The chip body 21 is connected to the substrate 10 through the connection structure 22. The material of the connection structure 22 may be a conductive material, which may be a single metal or alloy metal with adhesive and conductive properties, including tin (Sn), silver (Ag), copper (Cu), or gold (Au).

[0077] See also Figure 6The display panel 100 also includes at least one (e.g., one, or more) heat dissipation structure 30. The heat dissipation structure 30 is used to dissipate the heat generated by the driver chip 20. The heat dissipation structure 30 is disposed on the substrate 10, and the heat dissipation structure 30 and the driver chip 20 are located on the same side of the substrate 10. For example, the heat dissipation structure 30 is located on the side of the substrate 10 away from the light-emitting surface, and the driver chip 20 is located on the side of the substrate 10 away from the light-emitting surface; or, for another example, the heat dissipation structure 30 is located on the side of the substrate 10 close to the light-emitting surface, and the driver chip 20 is located on the side of the substrate 10 close to the light-emitting surface.

[0078] The heat dissipation structure 30 is connected to the driver chip 20. The heat dissipation structure 30 can be directly connected to the driver chip 20, for example, the heat dissipation structure 30 can be directly connected to the connection structure 22 of the driver chip 20. The heat dissipation structure 30 can also be indirectly connected to the driver chip 20, for example, the heat dissipation structure 30 can be connected to the connection structure 22 of the driver chip 20 through an intermediate connection structure.

[0079] Figure 8 This is a partial exemplary structural diagram of a display panel according to an embodiment of this application.

[0080] See Figure 6 and Figure 8 The orthographic projection of the heat dissipation structure 30 onto the substrate 10 does not overlap with the orthographic projection of the driving chip 20 onto the substrate 10. In other words, the boundary of the orthographic projection of the heat dissipation structure 30 onto the substrate 10 is outside the boundary of the orthographic projection of the driving chip 20 onto the substrate 10, and the heat dissipation structure 30 is located around the driving chip 20. At this time, along the third direction Z, the height of the side of the driving chip 20 away from the substrate 10 can be greater than, less than, or equal to the height of the side of the heat dissipation structure 30 away from the substrate 10 (in this case, the side of the driving chip 20 away from the substrate 10 and the side of the heat dissipation structure 30 away from the substrate 10 are on the same plane). Therefore, the heat dissipation structure 30 is not positioned between the driving chip 20 and the substrate 10. The sum of the thickness of the driving chip 20 and the thickness of the substrate 10 is necessarily less than the sum of the thickness of the driving chip 20, the thickness of the heat dissipation structure 30, and the thickness of the substrate 10, thus facilitating the thinning of the display panel.

[0081] The driver chip 20 is connected to the heat dissipation structure 30. At this point, the heat generated by the driver chip 20 has two main heat dissipation pathways: part of it is directly dissipated through the side and sidewall of the driver chip 20 away from the substrate 10, and the other part is conducted to the periphery of the driver chip 20 through the heat dissipation structure 30. This expands the heat dissipation path, thereby reducing the temperature of the driver chip 20 in a shorter time, increasing its lifespan, preventing damage, and ensuring that the driver chip 20 continues to transmit signals to the pixel driving circuit, maintaining the brightness of the light-emitting device, improving the image display quality of the display panel 100, and enhancing the display effect of the display panel. Furthermore, the increased heat dissipation efficiency of the driver chip 20 prevents the temperature of the area corresponding to the driver chip 20 on the display panel 100 from becoming excessively high, further extending the lifespan of the display panel 100.

[0082] In some embodiments, the pixel driving circuit is connected to the driving chip 20 via traces. The traces and the heat dissipation structure 30 are located on the same layer. In this way, the heat dissipation structure 30 can also function as a trace, connecting the driving chip 20 and the pixel driving circuit. During the manufacturing process of the display panel, only the heat dissipation structure 30 needs to be manufactured; it is not necessary to manufacture the traces first and then the heat dissipation structure 30. That is, the existing trace manufacturing process can be used to manufacture the heat dissipation structure 30 simultaneously with the trace manufacturing process, reducing process steps and improving manufacturing efficiency.

[0083] See also Figure 7a At least in the display area AA, the display panel 100 may also include a display functional layer 40 and an isolation structure 50. The display functional layer 40 and the isolation structure 50 are located on the substrate 10.

[0084] The display functional layer 40 is disposed on one side of the substrate 10. The display functional layer 40 includes multiple light-emitting devices. The light-emitting devices can be any one of organic light-emitting diode devices, quantum dot light-emitting diode devices, inorganic light-emitting diode devices, and micro light-emitting diode devices.

[0085] The light-emitting device includes a first electrode 41, a light-emitting functional layer 42, and a second electrode 43 sequentially stacked on a substrate 10. For example, the surface of the light-emitting functional layer 42 closest to the substrate 10 contacts the first electrode 41, and the surface furthest from the substrate 10 contacts the second electrode 43. That is, the second electrode 43 is closer to the light-emitting surface of the display panel 100 than the first electrode 41. The first electrode 41 is connected to the second source / drain electrode layer 124.

[0086] The first electrode 41 is a reflective electrode, meaning it can reflect light. The structure of the first electrode 41 can be a composite structure composed of sequentially stacked transparent conductive oxide films / metal films / transparent conductive oxide films. The transparent conductive oxide films are made of, for example, any one of indium tin oxide (ITO) and indium zinc oxide (IZO), and the metal films are made of, for example, any one of gold (Au), silver (Ag), aluminum (Al), neodymium aluminum (AlNd), molybdenum (Mo), titanium (Ti), nickel (Ni), and platinum (Pt). Alternatively, the first electrode can also be a single-layer structure, and the material of the single-layer structure can be any one of ITO, IZO, Au, Ag, Ni, and Pt.

[0087] The second electrode 43 is a transparent electrode. The second electrode 43 is disposed on the side of the first electrode 41 away from the substrate 10, meaning the second electrode 43 is closer to the light-emitting surface of the display panel 100 than the first electrode 41; therefore, the second electrode 43 is a light-emitting electrode. The material of the second electrode 43 may include a transparent conductive oxide, such as ITO or IZO.

[0088] Either the first electrode 41 or the second electrode 43 is an anode, and the other is a cathode. For example, the first electrode 41 is the anode, and the second electrode 43 is the cathode. Alternatively, the first electrode 41 is the cathode, and the second electrode 43 is the anode.

[0089] The light-emitting functional layer 42 may include a light-emitting layer and a functional material layer. For example, the functional material layer may include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), depending on actual needs. This embodiment does not impose any restrictions on this.

[0090] See also Figure 7a The isolation structure 50 and the heat dissipation structure 30 are located on the same side of the substrate 10. The isolation structure 50 defines a plurality of first openings (not shown in the figure), and the light-emitting functional layer 42 and the second electrode 43 are located in the first openings. The second electrode 43 is connected to the conductive portion of the isolation structure 50. Thus, the overall structure of the isolation structure 50 presents a mesh-like structure, with the first openings being the mesh openings, and the light-emitting devices being separated by the isolation structure 30. In another embodiment, the orthographic projection of the light-emitting functional layer 42 on the substrate 10 overlaps with the orthographic projection of the first opening on the substrate 10.

[0091] The isolation structure 50 is used to isolate adjacent light-emitting devices. The isolation structure 50 surrounds each light-emitting device. For example, along the first direction X, the isolation structure 50 is provided on both sides of the light-emitting device, and the electrode on the side of the light-emitting device away from the substrate 10 (taking the second electrode 43 as an example) is connected to the isolation structure 50.

[0092] The isolation structure 50 includes a first end 510 and a second end 520 facing away from each other. The first end 510 is located on the side of the isolation structure 30 closer to the substrate 10, and the second end 520 is located on the side of the isolation structure 30 away from the substrate 10. That is, the first end 510 is closer to the substrate 10 than the second end 520. The second end 520 covers the first end 510. Specifically, the orthographic projection of the first end 510 on the substrate 10 is located within the orthographic projection of the second end 520 on the substrate. In other words, the isolation structure 30 has an overall structure that is wider at the top and narrower at the bottom.

[0093] See also Figure 7a The display panel 100 may further include a pixel definition layer 60, which is located on one side of the substrate 10. The pixel definition layer 60 includes a pixel defining portion and a plurality of pixel openings formed by the pixel defining portion. An isolation structure 50 is located on the side of the pixel defining portion away from the substrate 10, and a first opening formed by the isolation structure 50 communicates with the pixel opening. The orthographic projection of the pixel opening on the substrate 10 is located within the orthographic projection of the corresponding first opening on the substrate 10. A light-emitting functional layer 42 covers the pixel opening. The pixel definition layer 60 is made of an insulating material, which may be a silicon (Si)-containing inorganic material, such as silicon oxide (SiO), silicon nitride (SiN), or a multilayer composite material (such as ITO / Ag / ITO).

[0094] In some implementations, the isolation structure 50 can be directly disposed on the substrate 10. In this case, the size of the first electrode 41 needs to avoid overlapping with the isolation structure 50 to avoid leakage and reduced luminous efficiency. In this case, the first electrode 41 defines the boundary of the effective functional area, that is, the effective functional area coincides with the first electrode 41.

[0095] See also Figure 7aThe display panel 100 may further include a first encapsulation layer 70, which is located on the side of the display functional layer away from the substrate 10. The first encapsulation layer 70 at least covers the light-emitting devices, and forms a dense thin film (e.g., a thin film with only a closed outline) over these light-emitting devices to prevent external water and oxygen from entering the light-emitting devices, thus protecting the film layer of the light-emitting devices. To achieve a better sealing effect, the first encapsulation layer 70 can extend from the display area AA to the non-display area SA, where its outline is located within the non-display area SA. The material of the first encapsulation layer 70 may include one or more inorganic insulating materials, such as silicon oxide, silicon nitride, and titanium oxide. The first encapsulation layer 70 can be formed using thin film deposition processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD).

[0096] It should be noted that while the light-emitting devices emitting different colors are fabricated independently, the film layers (evaporated film layers, such as the light-emitting functional layer) in each light-emitting device are deposited on the entire display panel during the evaporation process. For example, the light-emitting devices include a first light-emitting device, a second light-emitting device, and a third light-emitting device that emit different colors of light. Specifically, the first light-emitting device can emit red light, the second light-emitting device can emit green light, and the third light-emitting device can emit blue light. During the fabrication process, the first, second, and third light-emitting devices are fabricated sequentially. When fabricating the first light-emitting device, a first light-emitting device is formed in each first opening. A first encapsulation layer 70 is fabricated on the display panel to cover the first light-emitting device. Then, the first encapsulation layer 70, as well as the second electrode and the light-emitting functional layer of the light-emitting device in some of the first openings, are removed. In this process, the first encapsulation layer 70 is used to protect the first light-emitting devices in other first openings. Based on this method, the second and third light-emitting devices are then fabricated sequentially, ultimately forming the first encapsulation layer 70.

[0097] It should be noted that the first encapsulation layer 70 has already achieved the encapsulation effect for the light-emitting device, so it can also be called the first encapsulation layer (only one film layer is provided) or one of the film layers in the first encapsulation layer (when there are multiple encapsulation film layers).

[0098] In some embodiments, a plurality of heat dissipation structures 30 are located on at least one side of the driver chip 20. Specifically, the orthographic projection of the plurality of heat dissipation structures 30 on the substrate 10 is located on at least one side of the orthographic projection of the driver chip 20 on the substrate 10. For example, since the orthographic projection of the plurality of heat dissipation structures 30 on the substrate 10 is located on one side of the orthographic projection of the driver chip 20 on the substrate 10, the heat of the driver chip 20 can be dispersed through the heat dissipation structure 30 on one side. Again, for example, see... Figure 8 The orthographic projections of multiple heat dissipation structures 30 on the driver chip 10 surround the orthographic projection of the driver chip 20 on the substrate 10. This arrangement, with the heat dissipation structures 30 positioned around the driver chip 20, further increases their area. The heat from the driver chip 20 can be simultaneously dispersed through these surrounding heat dissipation structures 30, thereby improving the heat dissipation efficiency of the driver chip 20. Of course, the heat dissipation structures 30 can also be located on both sides or three sides of the driver chip 10, which will not be elaborated further here.

[0099] In some embodiments, the isolation structure 50 can be an integrated structure. Specifically, the isolation structure 50 is an independent film layer, and there is no physical interface in the film layer. At least the first end 510 and the second end 520 of the isolation structure 50 are two parts of the integrated structure. For example, along the third direction Z, the cross-sectional shape of the portion of the isolation structure 30 located between two adjacent light-emitting devices is an inverted trapezoid, with the first end 510 being the base of the inverted trapezoid and the second end 520 being the top of the inverted trapezoid. The integrated isolation structure 30 can be formed in one step during the manufacturing process of the display module, reducing process steps and improving manufacturing efficiency.

[0100] In some embodiments, the isolation structure 50 includes a multi-layer structure.

[0101] Exemplarily, the isolation structure 50 includes a first isolation portion 51 and a second isolation portion 52. The first isolation portion 51 and the second isolation portion 52 are stacked sequentially along a direction away from the substrate 10. The side of the first isolation portion 51 closest to the substrate 10 forms a first end portion 510, and the side of the second isolation portion 52 furthest from the substrate 10 forms a second end portion 520. The second isolation portion 52 covers the first isolation portion 51; specifically, the orthographic projection of the first isolation portion 51 onto the substrate 10 lies within the orthographic projection of the second isolation portion 52 onto the substrate 10. When forming a light-emitting device by vapor deposition, the isolation structure 50, being wider at the top and narrower at the bottom, can better isolate the light-emitting functional layers of each light-emitting device, preventing crosstalk between sub-pixels.

[0102] Figure 7b This is a cross-sectional view taken along the thickness direction of another display panel according to an embodiment of this application.

[0103] See also, for example, Figure 7bThe isolation structure 50 also includes a third isolation portion 53. The third isolation portion 53 is located on the side of the first isolation portion 51 closest to the substrate 10. The third isolation portion 53, the first isolation portion 51, and the second isolation portion 52 are sequentially stacked along a direction away from the substrate 10. The side of the third isolation portion 53 closest to the substrate 10 forms a first end portion 510, and the side of the second isolation portion 52 away from the substrate 10 forms a second end portion 520. The orthographic projection of the first isolation portion 51 onto the substrate 10 lies within the orthographic projection of the third isolation portion 53 onto the substrate 10. The width of the third isolation portion 53 in the first direction X is greater than the width of the first isolation portion 51 in the first direction X, making it easier for the second electrode 43 to connect to the isolation structure 50 during vapor deposition to form the light-emitting device.

[0104] In some embodiments, the heat dissipation structure 30 is an integrated structure. Specifically, the heat dissipation structure 30 can be an independent film layer without physical interfaces, thus allowing the heat dissipation structure 300 to be integrally formed. The side of the heat dissipation structure 30 closest to the substrate 10 and the side furthest from the substrate 10 constitute two parts of this integrated structure. For example, along the third direction Z, the heat dissipation structure 30 is an inverted trapezoid, with the side closest to the substrate 10 being the longer base of the inverted trapezoid, and the side furthest from the substrate 10 being the longer base. The length of the shorter base of the inverted trapezoid projected onto the substrate 10 along the first direction X is less than the length of the projected base of the shorter base projected onto the substrate 10 along the first direction X. In this design, the heat dissipation structure 30 has a wider top and a narrower bottom.

[0105] In some embodiments, see continue to see Figure 6 The heat dissipation structure 30 includes a first heat dissipation part 31 and a second heat dissipation part 32. The first heat dissipation part 31 and the second heat dissipation part 32 are stacked sequentially along the direction away from the substrate 10. That is, the second heat dissipation part 32 is located on the side of the first heat dissipation part 31 away from the substrate 10. The second heat dissipation part 32 covers the first heat dissipation part 31; specifically, the orthographic projection of the second heat dissipation part 32 onto the substrate 10 lies within the orthographic projection of the second heat dissipation part 32 onto the substrate 10. The heat dissipation structure 30 has an overall structure that is wider at the top and narrower at the bottom. This increases the area of ​​the first heat dissipation part 31, further improving the heat dissipation efficiency of the heat dissipation structure 30. The first heat dissipation part 31 is recessed relative to the second heat dissipation part 32. A portion of the surface of the second heat dissipation part 32 closest to the substrate 10 is not covered by the surface of the first heat dissipation part 31 closest to the substrate 10. This uncovered portion of the second heat dissipation part 32 can also serve as a heat dissipation area, further improving the heat dissipation efficiency of the heat dissipation structure 30.

[0106] Figure 9 This is an exemplary structural diagram of another display panel according to an embodiment of this application.

[0107] In some embodiments, see Figure 9The heat dissipation structure 30 also includes a third heat dissipation part 33, which is located on the side of the first heat dissipation part 31 closest to the substrate 10. The third heat dissipation part 33, the first heat dissipation part 31, and the second heat dissipation part 32 are stacked sequentially along the direction away from the substrate 10. Adding the third heat dissipation part 33 increases the heat dissipation area of ​​the heat dissipation structure 30, thereby improving the heat dissipation efficiency of the driver chip 20. The orthographic projection of the first heat dissipation part 31 on the substrate 10 lies within the orthographic projection of the third heat dissipation part 33 on the substrate 10. In this way, the first heat dissipation part 31 is recessed relative to the third heat dissipation part 33, and a portion of the surface of the third heat dissipation part 33 on the side furthest from the substrate 10 is not covered by the surface of the first heat dissipation part 31 closest to the substrate 10. This uncovered portion can also serve as a heat dissipation area, improving the heat dissipation efficiency of the heat dissipation structure 30.

[0108] In some embodiments, the material of the first heat dissipation part 31 includes aluminum, the material of the second heat dissipation part 32 includes titanium, and the material of the third heat dissipation part 33 includes molybdenum, which is beneficial to the heat dissipation structure 30.

[0109] In some embodiments, the heat dissipation structure 30 and the isolation structure 50 are disposed on the same layer. Exemplarily, the heat dissipation structure 30 and the isolation structure 50 are both integral structures, and the heat dissipation structure 30 and the isolation structure 50 are located on the same layer. When forming the heat dissipation structure 30, the isolation structure 50 can be formed simultaneously, which simplifies the manufacturing process. As another example, the heat dissipation structure 30 is a multi-layer structure, the isolation structure 50 is an integral structure, and one layer of the heat dissipation structure 30 (e.g., any one of the first heat dissipation structure 31, the second heat dissipation structure 32, and the third heat dissipation structure 33) is disposed on the same layer as the isolation structure 50. As another example, the isolation structure 50 is a multi-layer structure, the heat dissipation structure 30 is an integral structure, and one layer of the isolation structure 50 (e.g., any one of the first isolation structure 51, the second isolation structure 52, and the third isolation structure 53) is disposed on the same layer as the heat dissipation structure 30. As another example, both the heat dissipation structure 30 and the isolation structure 50 are multi-layer structures. One layer of the heat dissipation structure 30 is disposed on the same layer as at least one layer of the isolation structure 50.

[0110] In some embodiments, the heat dissipation structure 30 and the isolation structure 50 are made of the same material. This allows for the simultaneous formation of both the heat dissipation structure 30 and the isolation structure 50, which are made of the same material as the heat dissipation structure 30, during the manufacturing process, reducing manufacturing steps and improving the manufacturing efficiency of the display panel 100.

[0111] In other implementations, the isolation structure and the heat dissipation structure can be formed separately.

[0112] In some embodiments, the material of the first isolation portion 51 is the same as the material of the first heat dissipation portion 31, for example, both are aluminum. When manufacturing the display module, the first isolation portion 51 and the first heat dissipation portion 31 can be deposited using the same material, without having to change the deposition material midway. The first isolation portion 51 and the first heat dissipation portion 31 can also be formed simultaneously, reducing manufacturing steps and improving manufacturing efficiency.

[0113] In some embodiments, the material of the second isolation portion 52 is the same as that of the second heat dissipation portion 32, for example, both are titanium. When manufacturing the display module, the second isolation portion 52 and the second heat dissipation portion 32 can be formed by deposition using the same material, without having to change the deposition material midway. The second isolation portion 52 and the second heat dissipation portion 32 can also be formed simultaneously, reducing manufacturing steps and improving manufacturing efficiency.

[0114] In some embodiments, the material of the third isolation portion 53 is the same as that of the third heat dissipation portion 33, for example, both are molybdenum. When manufacturing the display module, the third isolation portion 53 and the third heat dissipation portion 33 can be deposited using the same material, eliminating the need to change the deposition material midway. Furthermore, the third isolation portion 53 and the third heat dissipation portion 33 can be formed simultaneously, reducing manufacturing steps and improving manufacturing efficiency.

[0115] Figure 10 This is a partial exemplary structural diagram of another display panel according to an embodiment of this application.

[0116] In some embodiments, see Figure 10 Multiple heat dissipation structures 30 are distributed circumferentially around the driver chip 20. Gaps are left between the heat dissipation structures 30. For example, second heat dissipation portions 32 are distributed circumferentially around the driver chip 20, with gaps between each second heat dissipation portion 32. This reduces the amount of material used in the heat dissipation structures 30, thus lowering costs.

[0117] Figure 11 This is a partial exemplary structural diagram of another display panel according to an embodiment of this application.

[0118] In some embodiments, see Figure 11 The number of heat dissipation structures 30 is one, and the heat dissipation structure 30 surrounds the driver chip 20. For example, the second heat dissipation part 32 surrounds the driver chip 20. In this way, the heat dissipation structure 30 surrounds the driver chip 20, the area of ​​the heat dissipation structure 30 is increased, and the heat generated by the driver chip 20 can be dissipated outward through the heat dissipation structure 30 around it. The heat dissipation path is increased and the heat dissipation area is increased, which can improve the heat dissipation efficiency of the heat dissipation structure 30.

[0119] In some embodiments, see continue to see Figure 10 and Figure 11There is a gap (hereinafter referred to as the first gap) between the orthographic projection of the heat dissipation structure 30 on the substrate and the orthographic projection of the driver chip 20 on the substrate 10. The first gap separates the heat dissipation structure 30 from the driver chip 20, preventing direct contact between the heat dissipation structure 30 and the driver chip 20 and causing a short circuit. On the other hand, the heat dissipation structure 30 and the driver chip 20 do not have direct contact. The heat generated by the driver chip 20 needs to be transferred to the substrate 10 first, and then transferred to the heat dissipation structure 30 through the substrate 10. In this way, the heat will not be directly transferred from the driver chip 20 to the heat dissipation structure 30. The heat transfer path becomes longer, and the heat is further dissipated outward during the transfer process. When the heat is transferred to the heat dissipation structure 30, the heat is reduced, which can lower the temperature of the heat dissipation structure 30 and prevent the heat dissipation structure 30 from overheating, thereby further improving the heat dissipation efficiency.

[0120] In some embodiments, the orthographic projections of the plurality of second heat dissipation portions 32 on the substrate 10 do not overlap. That is, the plurality of second heat dissipation portions 32 are laid flat on the substrate 10, and the sum of the areas of the orthographic projections of each second heat dissipation portion 32 on the substrate 10 is the area of ​​the heat dissipation emitted by the driver chip 20. In this way, the area of ​​the second heat dissipation portions 32 can be utilized as much as possible for heat dissipation of the driver chip 20, thereby improving its heat dissipation efficiency.

[0121] In some embodiments, the sum of the areas of the orthographic projections of the plurality of second heat dissipation portions 32 on the substrate 10 is greater than or equal to the area of ​​the orthographic projection of the driver chip 20 on the substrate 10. Exemplarily, the plurality of second heat dissipation portions 32 are laid flat on the substrate 10, and the sum of the areas of the orthographic projections of each second heat dissipation portion 32 on the substrate 10 is greater than or equal to the area of ​​the orthographic projection of the driver chip 20 on the substrate 10. Also exemplaryly, at least one second heat dissipation portion 32 overlaps with the orthographic projection of another second heat dissipation portion 32 on the substrate 10, and the sum of the areas of the orthographic projections of each second heat dissipation portion 32 on the substrate 10, minus the area of ​​the overlapping portion, is greater than or equal to the area of ​​the orthographic projection of the driver chip 20 on the substrate 10. This increases the area of ​​the second heat dissipation portions 32, facilitating their fabrication. A larger area of ​​the second heat dissipation portion 32 results in higher heat dissipation efficiency of the driver chip 20.

[0122] In some embodiments, see continue to see Figure 6The substrate 10 includes at least one (e.g., one, or more) first conductive structure 34. The first conductive structure 34 is used to bond the driver chip 20, connect the driver chip 20 and the heat dissipation structure 30, and is located on the side of the heat dissipation structure 30 facing the substrate 10. The heat dissipation structure 30 is connected to the first conductive structure 34, for example, via a via connection, and the first conductive structure 34 is connected to the driver chip 20. Exemplarily, the heat dissipation structure 30 at least covers a portion of the first conductive structure 34. For example, the orthographic projection of the layer of the heat dissipation structure 30 closest to the substrate 10 (the first heat dissipation portion 31) on the substrate 10 lies within the orthographic projection of the first conductive structure 34 on the substrate 10; as another example, see further... Figure 6 The orthographic projection of the layer of the heat dissipation structure 30 closest to the substrate 10 onto the substrate 10 is partially located within the orthographic projection of the first conductive structure 34 onto the substrate 10, and partially located outside the orthographic projection of the first conductive structure 34 onto the substrate 10. The material of the first conductive structure 34 is a metallic material or a suitable metal oxide. The metallic material can be a single metal or alloy metal with adhesive and conductive properties, including tin (Sn), silver (Ag), copper (Cu), or gold (Au). The metal oxide can include indium tin oxide (ITO) or zinc oxide (ZnO), etc. The substrate 10 is connected to the heat dissipation structure 30 through the first conductive structure 34, which can improve the connection quality of the heat dissipation structure 30 and prevent detachment. Furthermore, the metallic material has thermal conductivity. When the first conductive structure 34 is a metallic material, the heat generated by the driver chip 20 is transferred to the heat dissipation structure 30 through the first conductive structure 34, thereby dissipating the heat outside the driver chip 20 and improving the heat dissipation efficiency of the driver chip 20.

[0123] In some embodiments, the first conductive structure 34 is a single-layer structure. The first conductive structure 34 is disposed in the same layer as one of the gate layer 121, capacitor plate layer 122, first source / drain electrode layer 123, second source / drain electrode layer 124, and anode 41. When forming the first conductive structure 34, the first conductive structure 34 can be formed simultaneously when forming one of the gate layer 121, capacitor plate layer 122, first source / drain electrode layer 123, second source / drain electrode layer 124, and anode 41, reducing process steps and improving manufacturing efficiency. Furthermore, the co-layer arrangement can reduce the thickness of the display module, thereby achieving a thinner and lighter display device.

[0124] In some embodiments, the first conductive structure 34 is a stacked structure, with a portion of the stacked structure disposed on the same layer as the second source / drain electrode layer 124, a portion of the stacked structure disposed on the same layer as the first source / drain electrode layer 123, and a portion of the stacked structure disposed on the same layer as the gate layer 121 or the capacitor plate layer 122. The layers disposed on the same layer can be formed simultaneously, and this same-layer arrangement can also reduce the thickness of the display module, thereby achieving a thinner and lighter display device.

[0125] In some embodiments, the chip body 21 is connected to the first conductive structure 34 via a connection structure 22. The material of the connection structure 22 can be a metal or a metal oxide, as described above, and will not be repeated here. Metal materials have good welding performance, which can improve the connection quality between the first conductive structure 34 and the connection structure 22 and prevent the driver chip 20 from falling off. Furthermore, the heat generated by the chip body 21 needs to be transferred to the connection structure 22, and then to the heat dissipation structure 30 via the first conductive structure 34, and then dissipated to the periphery of the driver chip 20. In this way, the heat is not directly transferred from the chip body 21 to the heat dissipation structure 30, the heat transfer path is lengthened, and the heat can be further dissipated outward during the transfer process, thereby improving the heat dissipation efficiency.

[0126] In some embodiments, see continue to see Figure 6 The display panel 100 also includes a second encapsulation layer 80. The second encapsulation layer 80 is disposed on the side of the heat dissipation structure 30 away from the substrate 10, and covers the heat dissipation structure 30 to protect it. The material of the second encapsulation layer 80 can be found in the description of the material of the first encapsulation layer 70 above, and will not be repeated here. The second encapsulation layer 80 can be fabricated using a thin-film deposition process. It should be noted that the material of the second encapsulation layer 80 and the material of the first encapsulation layer 70 can be the same or different. For example, the material of the second encapsulation layer 80 is the same as the material of the first encapsulation layer 70. In this way, the second encapsulation layer 80 is formed simultaneously with the first encapsulation layer 70, which reduces the number of fabrication steps and improves fabrication efficiency.

[0127] The above embodiments are only used to illustrate the embodiments of this application, and are not intended to limit the embodiments of this application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of this application. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of this application, and the patent protection scope of the embodiments of this application should be defined by the claims.

Claims

1. A display module, characterized in that, include: substrate; The driver chip is disposed on the substrate; as well as At least one heat dissipation structure is disposed on the substrate; the heat dissipation structure is connected to the driving chip. The driving chip and the heat dissipation structure are located on the same side of the substrate.

2. The display module according to claim 1, characterized in that, The heat dissipation structure includes: First heat dissipation section, and The second heat dissipation part is disposed on the side of the first heat dissipation part away from the substrate; the orthographic projection of the first heat dissipation part on the substrate is located within the orthographic projection of the second heat dissipation part on the substrate.

3. The display module according to claim 2, characterized in that, The heat dissipation structure further includes a third heat dissipation part, which is located on the side of the first heat dissipation part closer to the substrate, and the orthographic projection of the first heat dissipation part on the substrate is located within the orthographic projection of the third heat dissipation part on the substrate.

4. The display module according to claim 3, characterized in that, The material of the second heat dissipation part includes titanium, the material of the first heat dissipation part includes aluminum, and the material of the third heat dissipation part includes molybdenum.

5. The display module according to claim 1, characterized in that, The number of the at least one heat dissipation structure may be multiple, and the multiple heat dissipation structures may be distributed at intervals along the circumference of the driving chip; or, the number of the at least one heat dissipation structure may be one, and the heat dissipation structure may surround the driving chip.

6. The display module according to claim 2, characterized in that, The area of ​​the second heat dissipation part projected onto the substrate is greater than or equal to the area of ​​the driver chip projected onto the substrate.

7. The display module according to claim 1, characterized in that, The substrate includes: At least one first conductive structure; the heat dissipation structure is connected to the first conductive structure via a via, and the first conductive structure is connected to the driver chip.

8. The display module according to claim 7, characterized in that, The first conductive structure is disposed on the side of the heat dissipation structure facing the substrate; Preferably, the substrate further includes a gate layer, a capacitor plate layer, a first source / drain electrode layer, a second source / drain electrode layer, and an anode stacked together, wherein the first conductive structure is disposed in the same layer as one of the gate layer, the capacitor plate layer, the first source / drain electrode layer, the second source / drain electrode layer, and the anode; Preferably, the substrate further includes a gate layer, a capacitor plate layer, a first source / drain electrode layer, and a second source / drain electrode layer stacked along the same layer. The first conductive structure is a stacked structure, with a portion of the stacked structure disposed in the same layer as the second source / drain electrode layer, a portion of the stacked structure disposed in the same layer as the first source / drain electrode layer, and a portion of the stacked structure disposed in the same layer as the gate layer or the capacitor plate layer.

9. The display module according to claim 1 or 3, characterized in that, Also includes: An isolation structure is located on the same side of the substrate as the heat dissipation structure; wherein, in the thickness direction of the display module, the isolation structure includes a first end and a second end facing away from each other, the first end being located on the side of the isolation structure closer to the substrate, the second end being located on the side of the isolation structure away from the substrate, and the orthographic projection of the first end on the substrate being within the orthographic projection of the second end on the substrate; the isolation structure defines a plurality of first openings; A display functional layer is disposed on one side of the substrate and includes multiple light-emitting devices. Each light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode sequentially stacked on the substrate. The orthographic projection of the light-emitting functional layer of each light-emitting device onto the substrate overlaps with the orthographic projection of the corresponding first opening onto the substrate. The first encapsulation layer is disposed on the side of the display functional layer away from the substrate.

10. The display module according to claim 9, characterized in that, The heat dissipation structure is disposed on the same layer as the isolation structure.

11. The display module according to claim 9, characterized in that, The isolation structure includes: The first isolation section, and The second isolation portion is disposed on the side of the first isolation portion away from the substrate; the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the second isolation portion on the substrate; Wherein, the material of the first isolation part is the same as the material of the first heat dissipation part, and / or, the material of the second isolation part is the same as the material of the second heat dissipation part.

12. The display module according to claim 11, characterized in that, The isolation structure further includes a third isolation portion, which is located on the side of the first isolation portion closer to the substrate, and the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate; The heat dissipation structure further includes a third heat dissipation part, which is located on the side of the first heat dissipation part closer to the substrate, and the orthographic projection of the first heat dissipation part on the substrate is located within the orthographic projection of the third heat dissipation part on the substrate. The material of the third isolation section is the same as the material of the third heat dissipation section.

13. A display module, characterized in that, include: The substrate has a first conductive structure, which is used to bond a driver chip. At least one heat dissipation structure is disposed on the substrate and connected to the first conductive structure; An isolation structure is located on the same side of the substrate as the heat dissipation structure; wherein, in the thickness direction of the display module, the isolation structure includes a first end and a second end facing away from each other, the first end being located on the side of the isolation structure closer to the substrate, and the second end being located on the side of the isolation structure away from the substrate, the orthographic projection of the first end on the substrate being within the orthographic projection of the second end on the substrate; the isolation structure defines a plurality of first openings; the isolation structure and the heat dissipation structure are disposed on the same layer; The display functional layer is disposed on one side of the substrate and includes multiple light-emitting devices. Each light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode that are sequentially stacked on the substrate. The orthographic projection of the light-emitting functional layer of the light-emitting device on the substrate overlaps with the orthographic projection of the corresponding first opening on the substrate.

14. The display module according to claim 13, characterized in that, The heat dissipation structure is ring-shaped and surrounds the driver chip.

15. A display device, characterized in that, include: The display module as described in any one of claims 1 to 14.

Images