Single-antenna satellite navigation signal synchronization method under carrier high-speed rotation condition
By combining short-time correlation matched filters and FFT acquisition methods, along with loop filters and code tracking methods, and using histogram methods for bit synchronization, the problem of single-antenna satellite signal synchronization under high-speed carrier rotation is solved, ensuring the normal operation of satellite navigation receivers and positioning and velocity measurement.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING AUTOMATION CONTROL EQUIP INST
- Filing Date
- 2025-12-24
- Publication Date
- 2026-04-17
AI Technical Summary
Under conditions of high-speed rotation of the carrier, the satellite navigation signal of a single antenna is affected by obstruction and dynamic characteristics, causing the satellite navigation receiver to fail to synchronize correctly and thus fail to perform positioning and velocity measurement functions.
A capture method combining short-time correlation matched filter and FFT is adopted, along with loop filter and code tracking method, to track the captured navigation signal. Bit synchronization is performed by histogram method, including demodulating bit stream, judging transitions and comparing counter values to determine bit synchronization point.
It achieves correct acquisition and position synchronization of satellite signals under high-speed rotation conditions, ensuring the normal operation of the satellite navigation receiver and providing positioning and velocity measurement results.
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Figure CN121878733A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of satellite navigation technology, and in particular to a method for synchronizing single-antenna satellite navigation signals under conditions of high-speed carrier rotation. Background Technology
[0002] Many modern aircraft carriers incorporate high-speed rotation capabilities into their control chains for aerodynamic purposes or other uses. Under high-speed rotation conditions, such as 100–400 r / s, satellite signals received by a single-antenna carrier will be distorted due to the carrier's own obstruction. Furthermore, the dynamic characteristics introduced by rotation will also affect satellite signal reception. Conventional satellite navigation receivers can no longer correctly perform position synchronization, thus failing to perform positioning and velocity measurement functions. Therefore, it is necessary to study methods for synchronizing single-antenna satellite navigation signals under high-speed rotation conditions to ensure the normal operation of the satellite navigation receiver and provide positioning and velocity measurement results for the carrier. Summary of the Invention
[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a single-antenna satellite navigation signal synchronization method under high-speed carrier rotation conditions, which can solve the problem that satellite navigation signals cannot be correctly synchronized by satellite navigation receivers under high-speed rotation conditions in the prior art.
[0004] The technical solution of this invention: a method for synchronizing single-antenna satellite navigation signals under conditions of high-speed carrier rotation, wherein the method includes:
[0005] Capture navigation signals;
[0006] Track the captured navigation signals;
[0007] The histogram method is used to perform bit synchronization on the locked signal during the tracking process.
[0008] Preferably, a short-time correlation matched filter and a combination of FFT and PMF-FFT are used to capture navigation signals.
[0009] Preferably, a loop filter and code tracking are used to track the captured navigation signal.
[0010] Preferably, bit synchronization of the locked signal during tracking using the histogram method includes:
[0011] S1, demodulates the signal locked during the tracking process to obtain multiple bit streams of a predetermined width;
[0012] S2, cyclically number multiple bit streams according to a predetermined sequence number range, where the first bit stream is any one of the multiple bit streams;
[0013] S3, determine whether a transition occurs between two adjacent bit streams;
[0014] S4. If a transition occurs from the i-th bit stream to the (i+1)-th bit stream, the counter value corresponding to the (i+1)-th histogram is incremented by one; otherwise, the counter value remains unchanged.
[0015] S5, after processing data for a time length of T, compare the counter value of each histogram with the threshold value N1.
[0016] S6, if there exists a histogram counter value equal to the first threshold value N1, then the bit synchronization point has been found;
[0017] S7. If at least two histogram counter values are equal to or exceed the second threshold value N2, clear all histogram counter values and return to S3.
[0018] Preferably, T is 1s.
[0019] Preferably, the first threshold value N1 is 20.
[0020] Through the above technical solution, when the satellite signal is received, the coarse Doppler frequency offset of the signal is captured, and then the tracking process is carried out to make a more precise estimate of the Doppler frequency offset. Then, the satellite signal can be bit synchronized to correctly extract bits from the signal, thereby ensuring the normal operation of the satellite navigation receiver. Attached Figure Description
[0021] The accompanying drawings, which form part of this specification, are provided to further illustrate embodiments of the invention and, together with the textual description, explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.
[0022] Figure 1 A flowchart of a single-antenna satellite navigation signal synchronization method under high-speed carrier rotation conditions provided in an embodiment of the present invention;
[0023] Figure 2 This is a block diagram of the signal acquisition scheme in an embodiment of the present invention;
[0024] Figure 3 This is a schematic diagram of a loop filter in an embodiment of the present invention;
[0025] Figure 4 This is a schematic diagram of the position synchronization result under high-speed rotation conditions in an embodiment of the present invention. Detailed Implementation
[0026] Specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings. In the following description, specific details are set forth for purposes of explanation and not limitation, in order to aid in a thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced in other embodiments departing from these specific details.
[0027] It should be noted that, in order to avoid obscuring the invention with unnecessary details, only the device structure and / or processing steps closely related to the solution according to the invention are shown in the accompanying drawings, while other details that are not closely related to the invention are omitted.
[0028] Figure 1 This is a flowchart of a single-antenna satellite navigation signal synchronization method under high-speed carrier rotation conditions, provided as an embodiment of the present invention.
[0029] like Figure 1 As shown, this embodiment of the invention provides a method for synchronizing single-antenna satellite navigation signals under conditions of high-speed carrier rotation, wherein the method includes:
[0030] Capture navigation signals;
[0031] Among these, the coarse Doppler frequency offset of the signal can be obtained by capturing it.
[0032] Track the captured navigation signals;
[0033] The histogram method is used to perform bit synchronization on the locked signal during the tracking process.
[0034] Bit synchronization is used to find the edges of data bits from the received signal, thereby achieving frame synchronization and deciphering the navigation message.
[0035] Through the above technical solution, when the satellite signal is received, the coarse Doppler frequency offset of the signal is captured, and then the tracking process is carried out to make a more precise estimate of the Doppler frequency offset. Then, the satellite signal can be bit synchronized to correctly extract bits from the signal, thereby ensuring the normal operation of the satellite navigation receiver.
[0036] According to one embodiment of the present invention, such as Figure 2 As shown, a short-time correlation matched filter and FFT combined (PMF-FFT) are used to capture navigation signals.
[0037] According to one embodiment of the present invention, a loop filter and code tracking are used to track the captured navigation signal.
[0038] The loop filter tracking (carrier tracking) employs a second-order frequency-locked loop (FLL) assisted by a third-order phase-locked loop (PLL) to resist dynamics. The frequency and phase detection utilize a two-quadrant arctangent phase detection method. The loop filter is as follows: Figure 3 As shown.
[0039] According to one embodiment of the present invention, tracking the captured navigation signal using a loop filter includes:
[0040] Set up one channel for noise floor statistics and obtain the noise channel coherence integral result I. N ;
[0041] For example, assuming a satellite signal at frequency B1I is used, the non-existent PRN code 0 is selected and correlated with the received signal to obtain the coherent integral result I of the noise channel. N The same applies to B3I and other frequency points.
[0042] Calculate the frequency discrimination error f e Phase detection error φ e ;
[0043] Based on the frequency discrimination error f e Phase detection error φ e Calculate the input of the loop filter;
[0044] The filter output result u is obtained from the loop filter input. f (s);
[0045] For the filter output result u f (s) Perform a bilinear transformation to obtain the transformed result u. f (z).
[0046] According to one embodiment of the present invention, when the coherence integration time is T coh At that time, the frequency discrimination error f is calculated using the following formula. e Phase detection error φ e :
[0047]
[0048] cross=I(n-1)Q(n)-Q(n-1)I(n),
[0049] dot=I(n-1)I(n)+Q(n-1)Q(n),
[0050] Where cross represents the cross product, dot represents the dot product, and T coh Q represents the coherent integration time. P I represents the instantaneous coherent integral result of the Q branch. P Let I(n) represent the current coherent integration result of branch I, I(n-1) represent the coherent integration result of branch I in the current frame, I(n-1) represent the coherent integration result of branch I in the previous frame, Q(n) represent the current coherent integration result of branch Q, and Q(n-1) represent the coherent integration result of branch Q in the previous frame.
[0051] According to one embodiment of the present invention, the frequency discrimination error f is determined by the following formula. e Phase detection error φ e Calculate the input of the loop filter:
[0052] c1 = f e a2ω nf
[0053]
[0054] c5=φ e b3ω n ,
[0055] Where c1, c2, c3, c4, and c5 are all filter inputs (loop inputs), a2, a3, and b3 are filter parameters (loop parameters), and ω nf ω is the characteristic frequency of the frequency-locked loop. n This is the characteristic frequency of the phase-locked loop.
[0056] According to one embodiment of the present invention, the filter output result u is obtained from the loop filter input using the following formula. f (s):
[0057]
[0058] Where s is the generalized complex frequency of the continuous-time system.
[0059] According to one embodiment of the present invention, the filter output result u is expressed by the following formula. f (s) Perform a bilinear transformation to obtain the transformed result u. f (z):
[0060]
[0061] Where z is the generalized complex frequency of the discrete-time system.
[0062] Therefore, the signal can be tracked and fed back according to the above formula.
[0063] For example, the loop parameters can be taken as the following ideal parameters:
[0064] a2 = 1.414
[0065] a3 = 1.1
[0066] b3 = 2.4
[0067] ω n =B PLL / 0.7845
[0068] ω nf =BFLL / 0.53,
[0069] Among them, B PLL For the phase-locked loop bandwidth, B FLL This is the bandwidth of the frequency-locked loop.
[0070] According to one embodiment of the present invention, tracking the captured navigation signal using a code loop via the following formula includes:
[0071]
[0072] Where, δ cp (n) represents the current phase detection error of the timing code. This is the output result of the code ring in the previous cycle. α is the code ring loop parameter, which is usually not less than 0.9.
[0073] In this invention, the code loop (code tracking) can be a first-order loop.
[0074] According to one embodiment of the present invention, bit synchronization of a locked signal during tracking using the histogram method includes:
[0075] S1, demodulates the signal locked during the tracking process to obtain multiple bit streams of a predetermined width;
[0076] S2, cyclically number multiple bit streams according to a predetermined sequence number range, where the first bit stream is any one of the multiple bit streams;
[0077] S3, determine whether a transition occurs between two adjacent bit streams;
[0078] S4. If a transition occurs from the i-th bit stream to the (i+1)-th bit stream, the counter value corresponding to the (i+1)-th histogram is incremented by one; otherwise, the counter value remains unchanged.
[0079] S5, after processing data for a time length of T, compare the counter value of each histogram with the threshold value N1.
[0080] S6, if there exists a histogram counter value equal to the first threshold value N1, then the bit synchronization point has been found;
[0081] S7. If at least two histogram counter values are equal to or exceed the second threshold N2, clear all histogram counter values (i.e., the signal is too weak, clear the histogram, and re-perform the transition judgment), and return to S3.
[0082] According to one embodiment of the present invention, T is 1s.
[0083] According to one embodiment of the present invention, the first threshold value N1 is 20.
[0084] The following description, with reference to examples, illustrates a single-antenna satellite navigation signal synchronization method under high-speed carrier rotation conditions according to the present invention.
[0085] Taking GPS signals as an example, the data code rate is 20 bps, meaning one bit lasts for 20 ms. During these 20 ms, the demodulated bits should have the same voltage level. However, signals typically contain noise, which introduces an inherent error probability into demodulation. Satellite navigation receivers cannot determine the bit synchronization point by instantly detecting changes in the demodulated voltage level. Therefore, this invention employs the histogram method for bit synchronization.
[0086] The histogram method first cyclically numbers the demodulated 1ms wide bit streams from 1 to 20, where the first 1ms bit stream can be arbitrarily chosen. Then, it counts the transitions between adjacent bit streams. If a transition occurs between the i-th and (i+1)-th bit streams, the counter value corresponding to the (i+1)-th histogram is incremented; otherwise, the counter value remains unchanged. Thus, after processing data of length T, the statistical results can be viewed using a histogram. When the counter value of one histogram reaches the threshold N1, a bit synchronization point has been found, i.e., the index value of that histogram. When the counter values of at least two histograms reach or exceed the threshold N2, the signal is too weak, the histogram needs to be cleared, and the statistics repeated.
[0087] Under high-speed rotation conditions, the case where T is 1s can be considered.
[0088] Within 1 second, there are 50 bits, each lasting 20 milliseconds. The histogram method can also statistically analyze the bit transitions in 20-millisecond intervals. Assuming the signal is ideal and noise-free, and these 50 bits continuously flip in a cycle of 101010..., then after 1 second, the histogram corresponding to the bit synchronization point should be 50, and N1 should also be 50—this is an ideal condition. First, we need to consider the perturbation caused by the bit flipping itself. Since the receiver does not know the content of the 50 transmitted bits, we need to consider the possibility of consecutive 0s or 1s causing the bits not to flip. With a very large sample size, the natural probability of 0 and 1 appearing is 1 / 2. Therefore, after adding the above perturbation, the histogram threshold N1 corresponding to the bit synchronization point can be set to 25.
[0089] Bit synchronization is essentially a probabilistic problem. Considering the disturbance caused by high-speed rotation, and the satellite antenna pattern under carrier obstruction, assuming the upper half of the pattern can receive satellite signals normally while the lower half cannot, the probability of successful demodulation is 1 / 2. In the other half of the time, signal demodulation involves demodulating noise signals. Since there are only two possibilities (0 or 1), the probability of the demodulated result being correct or incorrect is also 1 / 2. Therefore, under high-speed rotation conditions, the threshold value N1 can be set to 25 / 2 = 12.5 rounded up to 13, plus 25 / 4 = 6.25 rounded up to 7, resulting in N1 of 20. Rounding up increases the probability of successful bit synchronization; for faster bit synchronization, rounding down can be used.
[0090] Figure 4 The results of space synchronization under high-speed rotation conditions are shown. Figure 4 As can be seen, the demodulated data corresponds one-to-one with the original data, and bit synchronization has been successfully achieved.
[0091] As can be seen from the above embodiments, the single-antenna satellite navigation signal synchronization method under high-speed carrier rotation conditions described in this invention provides a technical solution from acquisition to synchronization. This solution allows the satellite navigation receiver to still perform normal bit synchronization of satellite signals under high-speed rotation conditions, so as not to fail to synchronize and thus fail to work properly.
[0092] The features described and / or illustrated above with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, and / or in combination with or in lieu of features in other embodiments.
[0093] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, components, or combinations thereof.
[0094] The apparatus and methods described above can be implemented in hardware or in combination with software. This invention relates to computer-readable programs that, when executed by a logic component, enable that logic component to implement the apparatus or constituent parts described above, or to implement the various methods or steps described above. This invention also relates to storage media for storing the above programs, such as hard disks, magnetic disks, optical disks, DVDs, flash memory, etc.
[0095] Many features and advantages of these embodiments are apparent from this detailed description, and therefore the appended claims are intended to cover all such features and advantages of these embodiments that fall within their true spirit and scope. Furthermore, since many modifications and alterations will readily occur to those skilled in the art, the embodiments of the invention are not intended to be limited to the precise structures and operations illustrated and described, but rather to encompass all suitable modifications and equivalents falling within their scope.
[0096] The parts of this invention not described in detail are techniques known to those skilled in the art.
Claims
1. A method for synchronizing single-antenna satellite navigation signals under conditions of high-speed carrier rotation, characterized in that, The method includes: Capture navigation signals; Track the captured navigation signals; The histogram method is used to perform bit synchronization on the locked signal during the tracking process.
2. The method according to claim 1, characterized in that, Navigation signals are captured using a combination of short-time correlation matched filter and FFT with PMF-FFT.
3. The method according to claim 2, characterized in that, Loop filters and code tracking are used to track the captured navigation signals.
4. The method according to claim 3, characterized in that, Bit synchronization of the locked signal during tracking using the histogram method includes: S1, demodulates the signal locked during the tracking process to obtain multiple bit streams of a predetermined width; S2, cyclically number multiple bit streams according to a predetermined sequence number range, where the first bit stream is any one of the multiple bit streams; S3, determine whether a transition occurs between two adjacent bit streams; S4. If a transition occurs from the i-th bit stream to the (i+1)-th bit stream, the counter value corresponding to the (i+1)-th histogram is incremented by one; otherwise, the counter value remains unchanged. S5, after processing data for a time length of T, compare the counter value of each histogram with the threshold value N1. S6, if there exists a histogram counter value equal to the first threshold value N1, then the bit synchronization point has been found; S7. If at least two histogram counter values are equal to or exceed the second threshold value N2, clear all histogram counter values and return to S3.
5. The method according to claim 4, characterized in that, T is 1s.
6. The method according to claim 5, characterized in that, The first threshold value N1 is 20.