Control circuit of display device

Abstract

The application discloses a control circuit, comprising an energy storage element having a first end coupled to a sample hold end and a second end coupled to a reference ground; the first control switch circuit is coupled between the received discharge voltage and the sampling holding end; the second control switch circuit is coupled between the sampling holding end and the discharging control end; the third control switch circuit is coupled between the discharge control end and the discharge connection end; a first discharge switch coupled between the common electrode end and the discharge connection end; and the second discharge switch is coupled between the discharge connecting end and the reference ground. According to the control circuit disclosed by the invention, a sampling and holding function and corresponding control logic are realized, and after the input voltage of the system is powered down, the holding time of the discharge voltage can be prolonged, so that the common voltage VCOM is fully discharged, and no residual charge exists in a pixel unit.

Description

Technical Field

[0001] This invention relates to electronic circuits. More specifically, this invention relates to control circuits for display devices. Background Technology

[0002] A liquid crystal display (LCD) is a display device that changes the light transmittance of a light source by altering the alignment of liquid crystal molecules under the influence of an electric field. Due to its advantages of high display quality, small size, and low power consumption, LCDs are widely used in display terminals such as mobile phones and large-size display panels such as flat-panel TVs.

[0003] When an LCD monitor is turned off, some residual charge remains in the liquid crystal molecules within the pixel units. This residual charge can cause problems such as ghosting during shutdown, affecting display quality. Therefore, a discharge operation needs to be performed on the pixel units during shutdown to effectively reduce residual charge.

[0004] In existing technology, to solve the problem of image retention when the display device is turned off, an XON module is installed in the drive circuit of the display device. When the display device is turned off, the input voltage drops, triggering the XON module to rapidly discharge the pixel units, thereby eliminating image retention.

[0005] However, existing XON modules suffer from incomplete discharge, which no longer meets the development needs of current display devices. Summary of the Invention

[0006] This application provides a control circuit with a sample-and-hold function and corresponding control logic. After the system input voltage is lost, the duration of the discharge voltage can be extended to fully discharge the common voltage VCOM and ensure that there is no residual charge in the pixel unit.

[0007] According to one embodiment of this application, a control circuit is provided, comprising: an energy storage element having a first end coupled to a sample-and-hold terminal and a second end coupled to a reference ground; a first control switch circuit coupled between receiving a discharge voltage and the sample-and-hold terminal; a second control switch circuit coupled between the sample-and-hold terminal and a discharge control terminal; a third control switch circuit coupled between the discharge control terminal and a discharge connection terminal; a first discharge switch coupled between a common terminal and a discharge connection terminal; and a second discharge switch coupled between the discharge connection terminal and the reference ground.

[0008] In one embodiment, the aforementioned first discharge switch includes a first N-type transistor having a drain terminal coupled to the common terminal, a source terminal coupled to the discharge connection terminal, and a gate terminal coupled to the discharge control terminal; and the aforementioned second discharge switch includes a second N-type transistor having a source terminal coupled to the discharge connection terminal, a drain terminal coupled to the reference ground, and a gate terminal coupled to the reference ground.

[0009] In one embodiment, the aforementioned first control switch circuit is turned on when the discharge voltage is greater than the sample-and-hold voltage of the sample-and-hold terminal; and the aforementioned second control switch circuit and the third control switch circuit are turned on and off in response to the discharge enable signal.

[0010] In one embodiment, the aforementioned control circuit further includes: a fast discharge module having a power supply terminal to receive an input voltage, a first output terminal to provide a discharge voltage, and a second output terminal and a third output terminal to provide a discharge enable signal and an inverted signal of the discharge enable signal, respectively.

[0011] According to one embodiment of this application, a discharge control method for a display device is provided, comprising: charging an energy storage element through a charging path and disconnecting the discharge path between the common terminal and the reference ground when the input voltage is normally supplied; and disconnecting the charging path of the energy storage element and using the energy storage element to supply power to the discharge control terminal of the discharge path to conduct the discharge path when the input voltage is de-energized.

[0012] In one embodiment, the aforementioned discharge control method, when the input voltage is normally supplied, charges an energy storage element through a charging path and disconnects the discharge path between the common terminal and the reference ground, comprising: coupling the discharge voltage to the energy storage element through a first control switch circuit; disconnecting the connection between the energy storage element and the discharge control terminal through a second control switch circuit; and connecting the discharge control terminal and the discharge connection terminal through a third control switch circuit; wherein the path includes a first N-type transistor and a second N-type transistor connected in series between the common terminal and the reference ground, and the discharge connection terminal is the connection point of the first N-type transistor and the second N-type transistor.

[0013] In one embodiment, the aforementioned discharge control method, when the input voltage drops, disconnects the charging path of the energy storage element and uses the energy storage element to supply power to the discharge control terminal of the control discharge path, including: disconnecting the discharge voltage from the energy storage element through a first control switch circuit; providing the voltage of the energy storage element to the discharge control terminal through a second control switch circuit; and disconnecting the third control switch circuit to disconnect the connection between the discharge control terminal and the discharge connection terminal. Attached Figure Description

[0014] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings:

[0015] Figure 1 This is a schematic diagram of the circuit structure of a control circuit 100 according to an embodiment of this application;

[0016] Figure 2 This is a schematic diagram of the circuit structure of a control circuit 200 according to an embodiment of this application;

[0017] Figure 3 According to an embodiment of this application Figure 3 Schematic diagrams of various signal waveforms in the embodiment;

[0018] Figure 4 This is a discharge control method 400 for a display device according to an embodiment of the present application. Detailed Implementation

[0019] Specific embodiments of the present invention will now be described in detail. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to practice the invention. In other instances, well-known circuits, materials, or methods have not been specifically described to avoid obscuring the invention.

[0020] The terms "first," "second," etc., used in the following description are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature specified with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "multiple" means two or more.

[0021] In this application, unless otherwise expressly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. Furthermore, the term "coupled" can refer to a method of electrical connection for signal transmission. "Coupled" can be a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0022] Figure 1 This is a schematic diagram of the circuit structure of a control circuit 100 according to an embodiment of this application. Figure 1As shown, the control circuit 100 includes a fast discharge module XON, an energy storage element 110, a first control switch circuit K1, a second control switch circuit K2, a third control switch circuit K3, a first discharge switch P1, and a second discharge switch P2. The fast discharge module XON has a power supply terminal to receive the input voltage VIN, a first output terminal to provide the discharge voltage VON, and second and third output terminals to provide a discharge enable signal EN_D and an inverted signal ENB_D of the discharge enable signal, respectively. The energy storage element 110 has a first terminal coupled to a sample-and-hold terminal 101 and a second terminal coupled to reference ground GND. The first control switch circuit K1 is coupled between the discharge voltage VON and the sample-and-hold terminal 101. The second control switch circuit K2 is coupled between the sample-and-hold terminal 101 and the discharge control terminal 102. The third control switch circuit K3 is coupled between the discharge control terminal 102 and the discharge connection terminal 103. The first discharge switch P1 is coupled between the common terminal VCOM and the discharge connection terminal 103. The second discharge switch P2 is coupled between the discharge connection terminal 103 and the reference ground GND.

[0023] It should be understood that the voltage at the common terminal VCOM supplies power to the pixel units of the display. After the display device is powered off, the voltage at the common terminal VCOM should quickly drop to zero and residual charge should be completely cleared to resolve the ghosting problem. When the display device is operating normally, the voltage at the common terminal VCOM should not be affected by the control circuit 100.

[0024] exist Figure 1 In this circuit, the fast discharge module XON is powered by the input voltage VIN, providing the discharge voltage VON. Furthermore, the power supply terminal of the fast discharge module XON also receives a backup power source, namely either the analog power supply voltage AVDD or another analog power supply voltage VGH. The control circuit 100 works in conjunction with the power management system of the display device. Under normal operating conditions, the input voltage VIN remains at its normal value, and the fast discharge module XON is powered by the input voltage VIN. When the display device is powered off, and the input voltage VIN drops to the undervoltage protection threshold, the analog power supply voltage AVDD or VGH powers the fast discharge module XON. In the power management system of the display device, the analog power supply voltages AVDD and VGH are connected to large external capacitors, resulting in a slow power drop relative to the input voltage VIN. After the power switch, the discharge voltage VON follows the analog power supply voltage AVDD or VGH, allowing it to decrease slowly.

[0025] exist Figure 1In this embodiment, when the input voltage VIN is normally supplied, the first control switch circuit K1 is turned on, and the discharge voltage VON supplies power to the energy storage element 110 until the value of the sampled and held voltage VH on the energy storage element 110 approaches the value of the discharge voltage VON. At this time, the second control switch circuit K2 is turned off, and the value of the voltage VH on the energy storage element 110 will remain at the value of the discharge voltage VON. Furthermore, the third control switch circuit K3 is turned on, short-circuiting the discharge control terminal 102 and the discharge connection terminal 103. Figure 1 In this embodiment, the first discharge switch P1 and the second discharge switch P2 each include a first N-type transistor and a second N-type transistor. The drain of the first discharge switch P1 is coupled to the common terminal VCOM, and the source terminal is coupled to the discharge connection terminal 103. The drain of the second discharge switch P2 is coupled to the reference ground GND, and the source terminal is coupled to the discharge connection terminal 103. The gate terminals of both the first discharge switch P1 and the second discharge switch P2 are coupled to the discharge control terminal 102. When the third control switch circuit K3 is turned on, and the discharge control terminal 102 and the discharge connection terminal 103 are short-circuited, the gate terminals and source terminals of the first discharge switch P1 and the second discharge switch P2 are coupled together, making the gate-source voltage VGS of both the first discharge switch P1 and the second discharge switch P2 zero, and the first discharge switch P1 and the second discharge switch P2 are turned off. In this case, the discharge path from the common terminal VCOM to the reference ground GND is blocked, and the voltage of the common terminal VCOM remains unchanged.

[0026] When the input voltage VIN is de-energized, the discharge voltage VON also decreases. When the input voltage VIN drops to the system's undervoltage protection threshold, the power supply to the fast discharge module XON switches to the analog power supply voltage AVDD. In some applications, the analog power supply voltage AVDD is higher than the input voltage VIN; therefore, after the power switch, the discharge voltage VON rises. Similarly, the sample-and-hold voltage VH on the sample-and-hold terminal 101 also rises. When the discharge voltage VON drops below the maximum value of the sample-and-hold voltage VH following the analog power supply voltage AVDD, the first control switch circuit K1 turns off. Due to the energy storage function of the energy storage element 110, the sample-and-hold voltage VH is maintained for a certain period of time. At this time, the second control switch circuit K2 turns on, and the voltage VH on the energy storage element 110 is supplied to the discharge control terminal 102. Furthermore, the third control switch circuit K3 turns off, disconnecting the discharge control terminal 102 from the discharge connection terminal 103. In this state, the voltage VG at the gate terminals of the first discharge switch P1 and the second discharge switch P2, i.e., the discharge control terminal 102, is the sample-and-hold voltage VH. Therefore, the first discharge switch P1 and the second discharge switch P2 are turned on, and the discharge path formed by them releases the charge on the common terminal VCOM to the reference ground GND. Due to the function of the energy storage element 110, the discharge voltage VON is maintained for a period of time, so the discharge on the common terminal VCOM lasts long enough to completely release the charge on the common terminal VCOM, eliminating the display ghosting caused by incomplete charge release on the common terminal VCOM when the display device is powered off.

[0027] Figure 2 This is a schematic diagram of the circuit structure of a control circuit 200 according to an embodiment of this application. Figure 2 As shown, the control circuit 200 includes a fast discharge module XON, an energy storage element 110, a first control switch circuit K1, a second control switch circuit K2, a third control switch circuit K3, a first discharge switch P1, and a second discharge switch P2.

[0028] exist Figure 2 In this embodiment, the energy storage element 110 includes a capacitor Cstg. The capacitor Cstg is charged when coupled to a discharge voltage VON, and provides a voltage to the discharge control terminal 102 when coupled to it. In other embodiments, the energy storage element 110 may also include other suitable devices, such as a battery.

[0029] exist Figure 2In this embodiment, the first control switch circuit K1 includes a diode, with its anode coupled to the discharge voltage VON and its cathode coupled to the sample-and-hold terminal 101. When the discharge voltage VON and the sample-and-hold voltage VH satisfy the following condition: VON - VH ≥ VF, where VF is the forward voltage drop of the diode (typically around 0.7V), the diode conducts, and the discharge voltage VON charges the capacitor Cstg until the value of the sample-and-hold voltage VH approaches the value of the discharge voltage VON, i.e., VON - VF, at which point the diode turns off. When the input voltage VIN is de-energized, the power supply terminal of the fast discharge module XON switches to another power supply, such as the analog power supply voltage AVDD or VGH. However, the analog power supply voltage AVDD only slows down the subsequent input voltage VIN; the discharge voltage VON will still drop in a short period. When the discharge voltage VON drops below VH + VF, the diode turns off. The sample-and-hold voltage VH on the capacitor Cstg is maintained at approximately the value of the discharge voltage VON before the power loss, meaning the value of the discharge voltage VH can be maintained at a relatively high level.

[0030] exist Figure 2 In this embodiment, the second control switch circuit K2 includes a first P-type transistor, with its source end coupled to the sample-and-hold terminal 101 and its drain end coupled to the discharge control terminal 102. The control terminal receives the inverted signal ENB_D of the discharge enable signal. When the display device is operating normally and the input voltage VIN is not de-energized, the inverted signal ENB_D of the discharge enable signal is high, the first P-type transistor is turned off, and the sample-and-hold voltage VH on capacitor Cstg is controlled by the discharge voltage VON. When the input voltage VIN is de-energized, the inverted signal ENB_D of the discharge enable signal jumps to low, the first P-type transistor is turned on, and the sample-and-hold voltage VH is provided to the discharge control terminal 102 through the first P-type transistor.

[0031] exist Figure 2 In this embodiment, the third control switch circuit K3 includes a third N-type transistor M1, a fourth N-type transistor M2, and a second P-type transistor M3. The source terminal of the third N-type transistor M1 is coupled to the discharge connection terminal 103, its drain terminal is coupled to the drain terminal of the second P-type transistor M3, and its gate terminal is connected to the gate terminal of the third N-type transistor M2. Furthermore, the gate terminal and drain terminal of the third N-type transistor M1 are connected together. The source terminal of the fourth N-type transistor M2 is coupled to the discharge connection terminal 103, its drain terminal is coupled to the discharge control terminal 102, and its gate terminal, after being connected to the gate terminal of the third N-type transistor M1, is coupled to the discharge connection terminal through a resistor R1. The source terminal of the second P-type transistor M3 receives the discharge voltage VON through a resistor R2, its drain terminal is coupled to the drain terminal of the third N-type transistor M3, and its gate terminal receives the discharge enable signal EN_D.

[0032] When the input voltage VIN is normally supplied, the fast discharge module XON outputs a low-level discharge enable signal EN_D. The discharge voltage VON is supplied to the source terminal of the second P-type transistor M3 through resistor R2, turning on the second P-type transistor M3. Consequently, the gate potentials of the third N-type transistor M1 and the fourth N-type transistor M2 are pulled high, turning on the third N-type transistor M1 and the fourth N-type transistor M2. The discharge control terminal 102 and the discharge connection terminal 103 are short-circuited. In this situation, the gate-source voltage VGS of the first discharge switch P1 and the second discharge switch P2 are close to zero, and the first discharge switch P1 and the second discharge switch P2 are turned off. The discharge path from the common terminal VCOM to the reference ground GND is blocked.

[0033] When the input voltage VIN is de-energized, the power supply of the fast discharge module XON switches to the analog power supply voltage AVDD or VGH, the output discharge enable signal EN_D is high, and the second P-type transistor M3 is turned off. At this time, the gate potentials of the third N-type transistor M1 and the fourth N-type transistor M2 are pulled down by resistor R1 to the voltage VM of the discharge connection terminal 103. That is, the gate-source voltage VGS of the third N-type transistor M1 and the fourth N-type transistor M2 is zero, and the third N-type transistor M1 and the fourth N-type transistor M2 are turned off. The discharge control terminal 102 and the discharge connection terminal 103 are disconnected. In this case, the gate voltages of the first discharge switch P1 and the second discharge switch P2, i.e., the voltage VG of the discharge control terminal 102, are the sample-and-hold voltage VH, and the first discharge switch P1 and the second discharge switch P2 are turned on. The discharge path from the common terminal VCOM to the reference ground GND is opened, and the charge on the common terminal VCOM is discharged through the discharge path.

[0034] Figure 3 According to an embodiment of this application Figure 3 Schematic diagrams of various signal waveforms from the embodiment. The following is in conjunction with... Figure 2 and Figure 3 To explain Figure 2 The working principle of the control circuit 200 in the embodiment.

[0035] like Figure 3 As shown, before time t0, when the input voltage VIN is normally supplied, both the analog power supply voltage AVDD and the discharge voltage VON maintain a certain voltage value, and the sampled and held voltage VH is approximately the same as the discharge voltage VON. The discharge enable signal EN_D remains low, and the inverted signal ENB_D remains high. Figure 3 In this embodiment, the voltage at the common terminal VCOM is negative. Before time t0, the second control switch circuit K2 remains open, and the third control switch circuit K3 remains on. Therefore, the voltage VG at the discharge control terminal 102 follows the voltage VM at the discharge connection terminal 103, as shown below. Figure 3 As shown.

[0036] From time t0 to t1, the output voltage VIN begins to decrease, and the supply voltage VON and the sample-and-hold voltage VH follow the decrease in input voltage VIN. Since the output voltage VIN remains at a relatively high value at this time, the discharge enable signal EN_D and its inverted signal ENB_D are largely unaffected. The second control switch circuit K2 remains open, and the third control switch circuit K3 remains on. The voltage VG at the discharge control terminal 102 follows the voltage VM at the discharge connection terminal 103.

[0037] From time t1, the output voltage VIN drops below the undervoltage protection threshold VIN_UVLO, and the discharge function of the control circuit 200 is activated. At this time, the power supply of the fast discharge module XON switches to the analog power supply voltage AVDD, and the discharge voltage VON and the sample-and-hold voltage VH follow the analog power supply voltage AVDD. The discharge enable signal EN_D jumps to a high level, turning off the third control switch circuit K3. The inverted signal ENB_D of the discharge enable signal jumps to a low level, turning on the second control switch circuit K2. The voltage VG at the discharge control terminal 102 is pulled to the value of the sample-and-hold voltage VH, turning on the first discharge switch P1 and the second discharge switch P2, so that a discharge path is formed between the common terminal VCOM and the reference ground GND, thereby releasing the charge on the common terminal VCOM until it is zero.

[0038] from Figure 3 As can be seen, after the discharge voltage VON drops below the sampling and holding voltage VH, the first control switch circuit K1 is turned off. Due to the energy storage effect of capacitor Cstg, the sampling and holding voltage VH can still maintain a high value, thereby maintaining the voltage VG of the discharge control terminal 102 at a high value for a longer period of time. This allows the first discharge switch P1 and the second discharge switch P2 to be turned on for a longer period of time, enabling the charge on the common terminal VCOM to be completely released. In addition, even though the discharge enable signal EN_D slowly decreases following the analog power supply voltage AVDD, and the gate voltage of the second P-type transistor M3 slowly decreases, the source terminal of the second P-type transistor M3 is connected to the discharge voltage VON through resistor R2, and the discharge voltage VON is also decreasing. Therefore, during the discharge process, the source-gate voltage VSG of the second P-type transistor M3 remains at 0 and cannot be turned on, allowing the third control switch circuit K3 to remain in the off state during the discharge.

[0039] Figure 3 The embodiment shows a waveform where the voltage at the common terminal VCOM is negative. It should be understood that in other embodiments, the voltage at the common terminal VCOM can be positive. That is, the control circuit of this application embodiment applies to both positive and negative voltages at the common terminal VCOM.

[0040] In this embodiment, after the input voltage VIN is de-energized, the analog power supply voltage AVDD is used to power the fast discharge module XON. It should be understood that in the power management system supplying power to the display device, other power supply voltages can maintain their voltage values ​​for a period of time after the input voltage VIN is de-energized. Therefore, in addition to the module power supply voltage AVDD, other power supply voltages can also be used as backup power supply voltages for the fast discharge module XON.

[0041] Figure 4 This application provides a discharge control method 400 for a display device according to an embodiment of the present application. The discharge control method 400 can be applied to devices as described in this application. Figure 1 and Figure 2 The control circuit of the embodiment. For example... Figure 4 As shown, the discharge control method 400 includes: step 401, when the input voltage is normally supplied, charging an energy storage element through a charging path and disconnecting the discharge path between the common terminal and the reference ground; and step 402, when the input voltage is de-energized, disconnecting the charging path of the energy storage element and using the energy storage element to supply power to the discharge control terminal of the discharge path control to conduct the discharge path.

[0042] In one embodiment, step 401 includes: coupling the discharge voltage to the energy storage element via a first control switch circuit; disconnecting the energy storage element from the discharge control terminal via a second control switch circuit; and connecting the discharge control terminal and the discharge connection terminal via a third control switch circuit; wherein the discharge path includes a first N-type transistor and a second N-type transistor connected in series between a common terminal and a reference ground, and the discharge connection terminal is the common connection terminal of the first N-type transistor and the second N-type transistor.

[0043] In one embodiment, step 402 includes: disconnecting the discharge voltage from the energy storage element via a first control switch circuit; providing the voltage of the energy storage element to the discharge control terminal via a second control switch circuit; and disconnecting the third control switch circuit to disconnect the connection between the discharge control terminal and the discharge connection terminal.

[0044] It should be understood that the high and low levels of the signals in the above embodiments are set in accordance with the type of transistor in the embodiments. In other embodiments, when the transistor type changes, the level form of the corresponding control signal will also change accordingly.

[0045] The above description is merely a preferred embodiment of this application and is not intended to limit the application in any way. Although this application has disclosed preferred embodiments above, it is not intended to limit the application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application using the methods and techniques disclosed above, or modify them into equivalent embodiments with equivalent changes, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall still fall within the protection scope of the technical solutions of this application.

Claims

1. A control circuit, comprising: An energy storage element has a first end coupled to a sample-and-hold terminal and a second end coupled to a reference ground; The first control switch circuit is coupled between the receiving discharge voltage and the sample and hold terminal; The second control switch circuit is coupled between the sample and hold terminal and the discharge control terminal; The third control switch circuit is coupled between the discharge control terminal and the discharge connection terminal; The first discharge switch is coupled between the common terminal and the discharge connection terminal; as well as The second discharge switch is coupled between the discharge connection terminal and the reference ground.

2. The control circuit as described in claim 1, wherein: The first discharge switch includes a first N-type transistor, having a drain terminal coupled to the common terminal, a source terminal coupled to the discharge connection terminal, and a gate terminal coupled to the discharge control terminal; as well as The second discharge switch includes a second N-type transistor having a source terminal coupled to the discharge connection terminal, a drain terminal coupled to a reference ground, and a gate terminal coupled to the reference ground.

3. The control circuit as described in claim 1, wherein: The first control switch circuit turns on when the discharge voltage is greater than the sample-and-hold voltage at the sample-and-hold terminal; and The second control switch circuit and the third control switch circuit are switched on and off in response to the discharge enable signal.

4. The control circuit as described in claim 3, wherein, The first control switch circuit includes: A diode, wherein the anode of the diode is coupled to a discharge voltage and the cathode of the diode is coupled to the sample-and-hold terminal.

5. The control circuit as described in claim 3, wherein, The second control switch circuit includes: The first P-type transistor has a source terminal coupled to the sample-and-hold terminal, a drain terminal coupled to the discharge control terminal, and a control terminal that receives the inverted signal of the discharge enable signal.

6. The control circuit as described in claim 3, wherein, The third control switch circuit includes: The third N-type transistor has a source terminal coupled to the discharge connection terminal; A fourth N-type transistor has a source terminal coupled to the discharge connection terminal, a drain terminal coupled to the discharge control terminal, and a gate terminal coupled to the gate terminal of the second N-type transistor and the discharge connection terminal; and The second P-type transistor has a source terminal that receives the discharge voltage, a drain terminal that is coupled to the drain terminal of the third N-type transistor, and a gate terminal that receives the discharge enable signal.

7. The control circuit as described in claim 1, further comprising: The fast discharge module has a power supply terminal to receive the input voltage, a first output terminal to provide the discharge voltage, and a second and a third output terminal to provide the discharge enable signal and the inverted signal of the discharge enable signal, respectively.

8. A discharge control method for a display device, comprising: When the input voltage is normally supplied, an energy storage element is charged through the charging path, and the discharge path between the common terminal and the reference ground is disconnected. as well as When the input voltage drops, the charging path of the energy storage element is disconnected, and the energy storage element is used to supply power to the discharge control terminal of the discharge path to enable the discharge path.

9. The discharge control method as described in claim 8, wherein when the input voltage is normally supplied, charging an energy storage element through a charging path and disconnecting the discharge path between the common terminal and the reference ground includes: The discharge voltage is coupled to the energy storage element through the first control switch circuit; The connection between the energy storage element and the discharge control terminal is disconnected by the second control switch circuit; as well as The discharge control terminal and the discharge connection terminal are connected via a third control switch circuit; The path includes a first N-type transistor and a second N-type transistor connected in series between the common terminal and the reference ground, and the discharge connection is the connection point of the first N-type transistor and the second N-type transistor.

10. The discharge control method as described in claim 8, wherein when the input voltage drops, disconnecting the charging path of the energy storage element and using the energy storage element to supply power to the discharge control terminal controlling the discharge path comprises: The discharge voltage is disconnected from the energy storage element by the first control switch circuit; The voltage of the energy storage element is supplied to the discharge control terminal through the second control switch circuit; as well as Disconnect the third control switch circuit to break the connection between the discharge control terminal and the discharge connection terminal.

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