Power driving module and switching power supply using same

Abstract

The invention discloses a power driving module and a switching power supply. According to the embodiment of the invention, the power driving module drives the power switch tube in a segmented manner, the power switch tube is driven by adopting a small driving current before the Miller plateau period, the power switch tube is driven by adopting a driving current with the same variation trend as the parasitic capacitance during the Miller plateau period, and the power switch tube is driven by adopting a large driving current after the Miller plateau period. Therefore, the EMI performance can be optimized, the loss is reduced, and the efficiency is improved.

Description

Technical Field

[0001] This invention relates to power electronics technology, specifically to power drive modules and switching power supplies. Background Technology

[0002] In switching converters, power switches control energy transfer through high-frequency switching operations. Therefore, the driving method of power switches has a significant impact on power supply performance. If the driving capability is too strong (i.e., the driving current is too large), the rate of change of the power terminal voltage and the current flowing through it will be too large, leading to severe EMI interference. If the driving capability is too weak (i.e., the driving current is too small), the switching speed of the power switch will be slowed down, resulting in greater switching losses.

[0003] In addition, during the turn-on process, a constant drive current is continuously supplied to the control terminal of the power switch, causing the voltage between the two power terminals of the power switch to be constantly changing. As a result, the parasitic capacitance between the control terminal and the power terminal of the power switch will also change with the change of the voltage between the two power terminals. This will cause a sudden change in the rate of change of the voltage at the power terminal of the power switch, and at the same time generate serious EMI interference. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a power drive module that improves EMI without increasing losses.

[0005] According to a first aspect of the present invention, a power drive module is provided, comprising:

[0006] The power switching transistor includes a control terminal, a first power terminal, and a second power terminal; and

[0007] The driving circuit is configured to generate a driving current based on the voltage between the first and second power terminals to provide to the control terminal;

[0008] Specifically, when the drive voltage at the control terminal of the power switch is in the Miller plateau period, the change trend of the drive current is opposite to that of the voltage between the first and second power terminals.

[0009] Preferably, after the Miller plateau period ends, the drive circuit uses a large drive current to drive the power switch.

[0010] Preferably, before the Miller plateau period begins, the drive circuit drives the power switch with a small drive current.

[0011] Preferably, the trend of the driving current changing with the voltage between the first and second power terminals is consistent with the trend of the parasitic capacitance between the control terminal and the first power terminal changing with the voltage between the first and second power terminals.

[0012] Preferably, the rate of change of the driving current with respect to the voltage between the first and second power terminals is the same as the rate of change of the parasitic capacitance between the control terminal and the first power terminal with respect to the voltage between the first and second power terminals.

[0013] Preferably, the driving circuit includes a detection circuit configured to sample the voltage between the first and second power terminals to generate a sampling signal.

[0014] Preferably, the driving circuit includes a current conversion circuit configured to generate the driving current based on the sampled signal.

[0015] Preferably, the current conversion circuit includes:

[0016] A voltage-controlled current source is configured to generate a first current proportional to the sampled signal;

[0017] The current generating circuit receives the first current and generates the driving current.

[0018] Preferably, the current generating circuit is configured to take the difference between the reference current and the first current to generate the driving current.

[0019] Preferably, the driving circuit and the power switch are integrated into an integrated circuit chip.

[0020] Preferably, the driving circuit and the power switch are packaged separately, wherein the driving circuit is integrated into an integrated circuit chip.

[0021] According to a second aspect of the present invention, a switching power supply is provided, comprising:

[0022] Includes any of the power drive modules described in the first aspect, for driving loads.

[0023] In this embodiment, the power drive module drives the power switching transistors in segments. Before the Miller plateau period, a small drive current is used to drive the power switching transistors. During the Miller plateau period, a drive current with the same trend as the parasitic capacitance is used to drive the power switching transistors. After the Miller plateau period ends, a large drive current is used to drive the power switching transistors. This optimizes EMI performance, reduces losses, and improves efficiency. Attached Figure Description

[0024] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0025] Figure 1 The diagram shown is a circuit diagram of the power drive module according to an embodiment of the present invention;

[0026] Figure 2 The diagram shown is the equivalent circuit diagram and related waveform diagram of the power switch transistor according to an embodiment of the present invention.

[0027] Figure 3 The figure shown is a waveform diagram of the power drive module in the first embodiment of the present invention.

[0028] Figure 4 The diagram shown is a circuit diagram of the driving circuit according to an embodiment of the present invention;

[0029] Figure 5 The diagram shown is a circuit diagram of the current conversion circuit according to an embodiment of the present invention;

[0030] Figure 6 The figure shown is a waveform diagram of the power drive module according to the second embodiment of the present invention.

[0031] Figure 7 The diagram shown is a circuit diagram of a switching power supply according to an embodiment of the present invention. Detailed Implementation

[0032] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0033] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0034] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0035] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0036] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0037] Figure 1 The diagram shows a circuit diagram of a power drive module according to an embodiment of the present invention. In this embodiment, the power drive module is used in a switching power supply and includes a power switch S1 and a drive circuit 10. The drive circuit 10 controls the power switch S1 to turn on or off, thereby adjusting the output voltage or output current of the switching power supply. The power switch includes a first power terminal D, a second power terminal S, and a control terminal G. In this embodiment, the first power terminal D, the second power terminal S, and the control terminal G correspond to the drain, source, and gate of an n-type MOSFET, respectively. In one implementation, the load is directly connected to the second power terminal S of the power switch S1, and the power drive module provides the converted energy to the load. In another implementation, the power switch S1 can be directly coupled to reference ground GND, or coupled to reference ground GND through a sampling resistor, etc., and the drain D is connected to the power stage circuit of the switching power supply, such as an inductor. It should be understood that although... Figure 1 The medium power switch S1 shown is an n-type MOSFET. The power switch S1 can be any type of field-effect transistor, and may also include other types of transistors that are within the scope of those skilled in the art without departing from the teachings of this invention.

[0038] The driving circuit 10 can be an integrated circuit chip with its own package and associated input and output pins. It can be mounted on a printed circuit board containing circuit components with a switching power supply, or on a single printed circuit board of the corresponding integrated circuit. The driving circuit 10 includes an input pin VCC for receiving the power supply voltage, a ground pin GND connected to a reference ground, and an output pin DRV for generating a driving voltage. The driving circuit 10 continuously charges or discharges the gate of the power switch S1 through the output pin to control the power switch S1 to turn on or off.

[0039] In one packaging application, the driver circuit 10 and the power switch S1 are packaged separately. In another packaging application, the driver circuit 10 and the power switch S1 are packaged together to form an integrated circuit chip to meet different application requirements.

[0040] In this embodiment, the drive circuit 10 is configured to provide a drive current Io to the control terminal of the power switch S1 to control the drive voltage at its control terminal to reach a predetermined value. The drive circuit 10 is configured to sample the voltage between the two power terminals of the power switch S1 and control the drive current Io based on this voltage. During the period when the drive voltage at the control terminal is at a Miller plateau, the change trend of the drive current Io is opposite to that of the voltage between the two power terminals. In one implementation, the drive current Io and the voltage between the two power terminals change negatively in a first interval and remain constant in a second interval. The first and second intervals are determined by the parasitic capacitance C between the control terminal of the power switch and the first power terminal D. GD Divide the data into sections. For example, the first section corresponds to the parasitic capacitance C. GD The capacitance value changes continuously within a certain range, which corresponds to the Miller plateau period of the driving voltage. The second range corresponds to the parasitic capacitance C. GD The capacitance value remains within a constant range.

[0041] Figure 2 The diagram shown is the equivalent circuit diagram and related waveform diagram of the power switch transistor according to an embodiment of the present invention. Figure 2 As shown, the power switch in this embodiment of the invention is illustrated using an n-type MOSFET as an example. This power switch includes a first power terminal D, a second power terminal S, and a control terminal G. In this embodiment, the first power terminal D, the second power terminal S, and the control terminal G correspond to the drain, source, and gate of the n-type MOSFET, respectively. Parasitic capacitance C GD Located at the first power terminal D and control terminal G of the power switch transistor, its voltage varies with the two power terminal voltages V of the power switch transistor. DS The change curve is as follows Figure 2 As shown in the left figure, this changing curve relationship can be obtained through electrical testing, simulation, etc. Therefore, in the parasitic capacitance C... GD During the turn-on and turn-off process of the power switch transistor, the voltage V changes accordingly. DS Changes cause voltage V DS The rate of change of voltage V changes abruptly, leading to EMI problems. DS rate of change dV DS / dt can be represented as follows:

[0042] dV DS / dt=Io / C GD

[0043] From the above equation, it can be seen that when the magnitude of the driving current Io is fixed, the voltage V DS The rate of change will vary with the parasitic capacitance C GD The change, and within a certain range, the parasitic capacitance C GD With voltage V DS The changes are opposite. For example... Figure 2 As shown in the left figure, when the voltage VDS When it is within the range a1, the parasitic capacitance C GD With voltage V DS The voltage V shows a negative correlation. DS Increase (decrease), parasitic capacitance C GD Decrease (increase). Therefore, the drive circuit disclosed in this application controls the drive current Io and voltage V. DS The trend of change is also opposite, which can offset the parasitic capacitance C. GD For voltage V DS The changes will solve the EMI problem.

[0044] In one embodiment, during the turn-on process of the power switch, the drive current Io charges the control terminal G, and the drive voltage V of the control terminal G... GATE As it rises, when the driving voltage V GATE When the current is large enough, the power switch turns on. During this process, the drive current Io will supply the parasitic capacitance C between the first power terminal and the control terminal of the power switch. GD During charging, the voltage at the first power terminal D of the power switch MOSFET gradually increases, thereby increasing the voltage V between the two power terminals of the power switch MOSFET. DS It gradually increases at a certain rate. Therefore, during the conduction process of the power switch, the parasitic capacitance C... GD It will draw a huge drive current, causing the drive voltage V to... GATE For a period of time, the voltage no longer rises at the original slope, forming a Miller plateau. At this point, due to the Miller effect, the voltage difference between the two power terminals of the power switch S1 is significant, resulting in noticeable power consumption and EMI issues. In this embodiment, the drive circuit operates at a drive voltage V... GATE Control drive current Io and voltage V during Miller plateau period DS The changing trend is opposite to that of the current, so as to complete the segmented control of the drive current.

[0045] It should be understood that although this example describes the turn-on of a power switch, the turn-off process is similar. The drive circuit discharges the control terminal of the power switch through the drive current Io. This discharge process causes the drive voltage of the control terminal of the power switch MOS to gradually decrease. The change of the drive current during the turn-off process is symmetrical to that during the turn-on process.

[0046] Figure 3 The figure shown is a waveform diagram of the power drive module of the first embodiment of the present invention. Figure 3 The parasitic capacitance C is shown in sequence. GD Relative to voltage V DS Drive current Io relative to voltage V DS and voltage V DS The waveform of the rate of change.

[0047] In this embodiment, the driving circuit is based on the voltage V between the two power transistors of the power switch. DS Control the drive current Io according to the voltage V DS The changing trend and parasitic capacitance C GD With voltage V DS The changing trend remains consistent, thereby maintaining the voltage V. DS rate of change dV DS By keeping / dt constant, the goal of reducing power consumption and EMI can be achieved.

[0048] In one embodiment, the drive current Io varies with the voltage V. DS The rate of change and parasitic capacitance C GD With voltage V DS The rates of change are the same, such as Figure 3 As shown. Before time t0, the driving current Io and parasitic capacitance C GD Maintaining the same rate of decline, after time t0, the drive current Io and parasitic capacitance C GD All remain constant, thus throughout the entire voltage V DS Within the range of variation, voltage V DS rate of change Io / C GD (dV DS / dt) can remain constant.

[0049] Figure 4 The diagram shown is a circuit diagram of a driving circuit according to an embodiment of the present invention. The driving circuit includes a voltage detection circuit 40 and a current conversion circuit 41. The voltage detection circuit 40 is configured to acquire the voltage V between the two power terminals of the power switch transistor. DS The current conversion circuit 41 is configured based on voltage V DS The drive current Io is controlled to supply power to the control terminal of the power switch. During the turn-on process of the power switch, the drive circuit charges the control terminal of the power switch through the drive current Io; during the turn-off process, the drive circuit discharges the control terminal of the power switch through the drive current Io. The voltage detection circuit 40 can directly sample the two power terminals of the power switch to generate a voltage V. DS This allows for the indirect acquisition of a sampled signal characterizing the voltage between the two power terminals of the power switch to generate voltage V. DS In one implementation, the voltage detection circuit 40 obtains the voltage V by subtracting the voltage at the second power terminal of the power switch from the voltage at the first power terminal of the power switch. DS The current conversion circuit 41 receives voltage V. DS And according to voltage V DSA drive current is generated to supply the control terminal of the power switch. When the power switch starts to conduct (corresponding to the Miller plateau of the drive voltage), the voltage V... DS It begins to decrease, parasitic capacitance C GD As the voltage increases, the drive circuit controls the drive current to follow the voltage V. DS It increases as it decreases.

[0050] In one embodiment, the current conversion circuit 41 includes a voltage-controlled current source 410 and a current generation circuit 411. The voltage-controlled current source 410 receives a voltage V. DS And generate voltage V DS The changing first current is received by the current generation circuit 411, which generates a drive current Io. This is based on the parasitic capacitance between the control terminal of the power switch and the first power transistor, and the voltage V. DS The reference curve between the current generation circuit 411 controls the drive current Io and voltage V. DS The change curve should be kept consistent with the reference curve, for example, by maintaining the same change.

[0051] Figure 5 The diagram shown is a circuit diagram of a current conversion circuit according to an embodiment of the present invention. The current conversion circuit includes a voltage-controlled current source 410 and a current generation circuit 50. The voltage-controlled current source 410 receives a voltage V. DS And generate voltage V DS The first current I1 changes. Specifically, the first current I1 is related to the voltage V. DS There is a positive correlation, voltage V DS As the voltage increases, the first current I1 increases, and the voltage V... DS As the current decreases, the first current I1 decreases. The current generating circuit 50 receives the first current I1 and the reference current I2, and generates a drive current Io. The reference current I2 is a fixed current generated by the current source.

[0052] In this embodiment, the current generating circuit 50 calculates the difference between the reference current I2 and the first current I1 to generate a drive current Io. As the voltage V... DS As the voltage V increases, the first current I1 increases, the reference current I2 remains unchanged, and the drive current Io decreases. Therefore, during the Miller plateau period, the drive circuit controls the drive current Io and voltage V. DS The trend of change is the opposite.

[0053] Figure 6 The figure shown is a waveform diagram of the power drive module in the second embodiment of the present invention. Figure 6 Parasitic capacitance C is shown in sequence. GD Drive voltage V GATEThe waveform of the drive current Io versus time is shown. Before the Miller plateau, i.e., between time t0 and t1, the voltage between the two power terminals of the power switch remains constant, and the parasitic capacitance C... GD The drive current Io remains constant and continuously charges the control terminal of the power switch, while the drive voltage V at the control terminal of the power switch remains constant. GATE It increases continuously. At time t1, the driving voltage V GATE During the Miller plateau phase, the power switch begins to conduct. During the Miller plateau phase, specifically between times t1 and t2, the voltage between the two power terminals of the power switch begins to decrease, and the parasitic capacitance C... GD Increasing the driving current Io and the parasitic capacitance maintains a consistent trend, ensuring that the rate of voltage change between the two power terminals of the power switch remains constant, thereby reducing EMI. After the Miller plateau ends, i.e., after time t2, the voltage between the two power terminals of the power switch remains constant, and the parasitic capacitance C... GD The driving current Io remains constant.

[0054] In this embodiment, before the Miller platform, the driving circuit uses a small driving current to drive the power switching transistor, and after the Miller platform, the driving circuit uses a large driving current to drive the power switching transistor. This can shorten the turn-on time of the power switching transistor, thereby improving efficiency, which is especially suitable for high-frequency application switching power supplies.

[0055] The embodiments disclosed in this application also provide a switching power supply. Figure 7 The diagram shown is a circuit diagram of a switching power supply according to an embodiment of the present invention. The switching power supply includes a power drive module 71 and a load 72 according to an embodiment of this application. The power drive module 71 is used to precisely control the load 72.

[0056] In this embodiment, the power drive module drives the power switch in segments. Before the Miller plateau period, a small drive current is used to drive the power switch. During the Miller plateau period, a drive current with the same trend as the parasitic capacitance is used to drive the power switch. After the Miller plateau period ends, a large drive current is used to drive the power switch. This optimizes EMI performance, reduces losses, and improves efficiency.

[0057] It should be noted that the terms "large" and "small" in the context of "large driving current" and "small driving current" in this invention are relative and do not limit the current amplitude.

[0058] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A power drive module, comprising: The power switching transistor includes a control terminal, a first power terminal, and a second power terminal; and The driving circuit is configured to generate a driving current based on the voltage between the first and second power terminals to provide to the control terminal; in, When the drive voltage at the control terminal of the power switch is in the Miller plateau period, the change trend of the drive current is opposite to that of the voltage between the first and second power terminals.

2. The power drive module according to claim 1, characterized in that, After the Miller plateau period ends, the drive circuit uses a large drive current to drive the power switch.

3. The power drive module according to claim 1, characterized in that, Prior to the start of the Miller plateau period, the drive circuit drives the power switch with a small drive current.

4. The power drive module according to claim 1, characterized in that, The trend of the driving current changing with the voltage between the first and second power terminals is consistent with the trend of the parasitic capacitance between the control terminal and the first power terminal changing with the voltage between the first and second power terminals.

5. The power drive module according to claim 4, characterized in that, The rate at which the driving current changes with the voltage between the first and second power terminals is the same as the rate at which the parasitic capacitance between the control terminal and the first power terminal changes with the voltage between the first and second power terminals.

6. The power drive module according to claim 1, characterized in that, The driving circuit includes a detection circuit configured to sample the voltage between the first and second power terminals to generate a sampling signal.

7. The power drive module according to claim 6, characterized in that, The driving circuit includes a current conversion circuit configured to generate the driving current based on the sampled signal.

8. The driving circuit according to claim 7, characterized in that, The current conversion circuit includes: A voltage-controlled current source is configured to generate a first current proportional to the sampled signal; as well as The current generating circuit receives the first current and generates the driving current.

9. The power drive module according to claim 8, characterized in that, The current generating circuit is configured to take the difference between the reference current and the first current to generate the drive current.

10. The power drive module according to claim 1, wherein the drive circuit and the power switch are integrated into an integrated circuit chip.

11. The power drive module according to claim 1, wherein the drive circuit and the power switch are respectively packaged, wherein the drive circuit is integrated into an integrated circuit chip.

12. A switching power supply, comprising a power drive module as described in any one of claims 1-11, for driving a load.

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