Multi-phase power supply and electronic device

Abstract

The embodiment of the invention provides a multi-phase power supply and electronic equipment, relates to the technical field of power supplies, and can reduce power consumption of the power supply. The multi-phase power supply comprises a plurality of power modules DrMOS, each power module comprises a driver and a power switch, each power module is provided with an enabling control end and a pulse signal control end, and the plurality of power modules comprise a first power module and a second power module; the voltage adjusting module is provided with a first pulse signal output end and a second pulse signal output end, the first pulse signal output end is electrically connected to the pulse signal control end of the first power module 0 block, and the second pulse signal output end is electrically connected to the pulse signal control end of the second power module; the voltage adjusting module is provided with an enabling state output end; and the enabling state conversion circuit is used for enabling the enabling control end of the first power module to receive an enabling signal and enabling the enabling control end of the second power module to receive a non-enabling signal when the enabling state output end outputs the first signal.

Description

Technical Field

[0001] This application relates to the field of power supply technology, specifically to a multiphase power supply and electronic device. Background Technology

[0002] With the increasing power demands on loads such as Central Processing Units (CPUs), current power supplies utilize multi-phase interleaved parallel buck converter circuits. These power supplies include multiple DrMOS power modules, which are power module blocks integrating a driver and a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). Each DrMOS forms the buck path for one phase. The power supply also includes a voltage regulator (VR) module to control each DrMOS. Under light loads, the power supply can operate in diode emulation mode (DEM) on only one phase to improve efficiency; under heavy loads, it can switch to full-phase operation to provide transient high current. However, current power supplies still suffer from high power consumption. Summary of the Invention

[0003] In view of this, embodiments of this application provide a multiphase power supply and electronic device that can reduce power consumption.

[0004] In a first aspect, embodiments of this application provide a multiphase power supply, comprising: multiple power modules (DrMOS), each power module including a driver and a power switch, each power module having an enable control terminal and a pulse signal control terminal, the enable control terminal being used to control the enable state of the power module, the pulse signal control terminal being used to control the operating state of the power module, the multiple power modules including a first power module and a second power module; a voltage adjustment module, the voltage adjustment module having a first pulse signal output terminal and a second pulse signal output terminal, the first pulse signal output terminal being electrically connected to the pulse signal control terminal of the first power module, the second pulse signal output terminal being electrically connected to the pulse signal control terminal of the second power module, the voltage adjustment module having an enable state output terminal; and an enable state switching circuit, the enable state switching circuit being used to enable the enable control terminal of the first power module to receive an enable signal and the enable control terminal of the second power module to receive a de-enable signal when the enable state output terminal outputs a first signal.

[0005] The enable state transition circuit can convert at least a portion of the signal output from the enable state output terminal and send the converted signal to the enable control terminals of different power modules, so that the enable control terminal of the first power module receives the enable signal and the enable control terminal of the second power module receives the disable signal. In this way, when the first power module is working and the second power module is not working, the first power module can be independently controlled to be in the enable state and the second power module can be controlled to be in the disable state, thereby reducing additional power consumption.

[0006] In some possible implementations, the enable state transition circuit is further configured to enable the enable control terminal of the first power module to receive an enable signal and the enable control terminal of the second power module to receive an enable signal when the enable state output terminal outputs a second signal. This means that the second signal output from the enable state output terminal can control both the first and second power modules to be in an enabled state.

[0007] In some possible implementations, the enable state transition circuit is further configured to cause the enable control terminal of the first power module to receive a de-enable signal and the enable control terminal of the second power module to receive a de-enable signal when the enable state output terminal outputs a third signal. This means that the third signal output from the enable state output terminal can control both the first and second power modules to be in a de-enable state.

[0008] In some possible implementations, the first signal is a low-level signal. Specifically, when the enable state output terminal outputs a low-level signal, the enable control terminal of the first power module receives the low-level signal, and the enable control terminal of the second power module receives a tri-state signal. The low-level signal is the enable signal, and the tri-state signal is the disable signal. Alternatively, the second signal is a high-level signal. Specifically, when the enable state output terminal outputs a high-level signal, the enable control terminal of the first power module receives the high-level signal, and the enable control terminal of the second power module also receives the high-level signal. The high-level signal is the enable signal. By coordinating the high-level signal, the low-level signal, and the tri-state signal, the enable states of different power modules can be controlled.

[0009] In some possible implementations, the third signal is a tri-state signal. Specifically, when the enable state transition circuit outputs a tri-state signal, it enables the enable control terminal of the first power module to receive the tri-state signal and the enable control terminal of the second power module to receive the tri-state signal. The tri-state signal is a non-enable signal.

[0010] In some possible implementations, the enable state output terminal is electrically connected to the enable control terminal of the first power module; the enable state transition circuit has an input terminal and an output terminal; the enable state output terminal is electrically connected to the input terminal of the enable state transition circuit, and the output terminal of the enable state transition circuit is electrically connected to the enable control terminal of the second power module. The enable state transition circuit is used to output a high-level signal when a high-level signal is input, and to output a tri-state signal when a low-level signal or a tri-state signal is input. By transforming the signal at the enable state output terminal through the enable state transition circuit and outputting it to some power modules, different power modules can be controlled to have different enable states based on the signal at the enable state output terminal.

[0011] In some possible implementations, the enable state transition circuit includes: a diode, with its anode connected to the input terminal and its cathode connected to the output terminal; the diode is used to conduct when the input terminal of the enable state transition circuit is high-level and to cut off when the input terminal is low-level or a tri-state signal; a first resistor, with the output terminal of the enable state transition circuit electrically connected to a first voltage terminal; and a second resistor, with the output terminal of the enable state transition circuit electrically connected to a second voltage terminal. This simple circuit structure of a diode and two voltage-dividing resistors enables signal conversion, allowing for different control of the enable states of different power modules.

[0012] In some possible implementations, the multiple power modules may also include a third power module, the enable control terminal of which is electrically connected to the output of the enable state transition circuit.

[0013] In some possible implementations, the enable state transition circuit has an input terminal, a first output terminal, and a second output terminal. The enable state output terminal is electrically connected to the input terminal of the enable state transition circuit, the first output terminal is electrically connected to the enable control terminal of the first power module, and the second output terminal is electrically connected to the enable control terminal of the second power module. The first signal is a signal belonging to a first voltage range. The enable state transition circuit is used to enable the first output terminal to output an enable signal and the second output terminal to output a de-enable signal when the enable state output terminal outputs the first signal. By transforming the signal at the enable state output terminal through the enable state transition circuit, the signals are output to different power modules respectively, thus allowing different power modules to have different enable states based on the voltage range of the signal at the enable state output terminal.

[0014] In some possible implementations, the enable state transition circuit is also used to enable the first output terminal to output an enable signal and the second output terminal to output an enable signal when the enable state output terminal outputs a second signal. The second signal is a signal belonging to a second voltage range, and the second voltage range does not overlap with the first voltage range.

[0015] In some possible implementations, the enabling state transition circuit is an analog-to-digital converter circuit.

[0016] In some possible implementations, the multiphase power supply is a multiphase step-down power supply.

[0017] Secondly, an electronic device is provided, including the aforementioned multiphase power supply. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the circuit structure of a multiphase power supply in related technologies;

[0020] Figure 2 This is a schematic diagram of the circuit structure of a multiphase power supply in an embodiment of this application;

[0021] Figure 3 This is a schematic diagram of the circuit structure of a multiphase power supply in an embodiment of this application;

[0022] Figure 4 This is a schematic diagram of the circuit structure of a multiphase power supply in an embodiment of this application;

[0023] Figure 5 This is a structural block diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0024] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0025] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0026] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0027] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0028] Before introducing the embodiments of this application, the relevant technologies and their technical problems will be explained first.

[0029] Let's take a computer's CPU power supply as an example. Figure 1 As shown, the power supply employs a multi-phase interleaved parallel buck circuit. The main components include VR, DrMOS, and a power inductor L. To handle transient high loads, the power supply can select 3-4 DrMOS to form one power rail. The CPU and voltage regulation module VR define their respective power stages (PS). The number of DrMOS participating in operation varies depending on the PS state. After receiving a PS state setting command from the CPU, VR controls the number of DrMOS participating in operation via a pulse width modulation (PWM) terminal. DrMOS also has a dedicated enable control terminal E, which controls its own enable state based on the signal received at the enable control terminal E. In related technologies, VR uses only one enable output control terminal EO to control the signal received at the enable control terminal E of all DrMOS in this power rail. When the power supply is configured to operate with only one phase (Ph), for example, the power supply (VR) sends a normal PWM signal to the DrMOS of this one phase, enabling the DrMOS of that phase to operate. The PWM signal sent by VR to the remaining DrMOS is a tri-state signal, preventing these DrMOS from operating. However, because the enable control terminals E of all DrMOS are connected together, the other inactive DrMOS remain enabled, resulting in unnecessary power consumption.

[0030] The following will use Table 1 as an example. Figure 1 The signal relationships of each terminal of the power supply under different PS states are explained.

[0031] Table 1

[0032]

[0033] In this context, High represents a high-level signal, Low represents a low-level signal, and Tri-state represents a three-state signal, which can be understood as an intermediate level between high and low levels. High / Low represents a pulse signal composed of alternating high and low levels, while High / Low / Tri-state represents a pulse signal composed of alternating high, low, and tri-state levels. Both High / Low and High / Low / Tri-state are normal PWM signals. When the DrMOS's PWM control terminal is High / Low or High / Low / Tri-state, the DrMOS is specifically controlled by this PWM signal. When the DrMOS's PWM control terminal is Tri-state, the DrMOS is disabled. When the DrMOS's enable control terminal E is High, the DrMOS is enabled. When the DrMOS's enable control terminal E is Tri-state, the DrMOS is disabled. In PS0 state, the full-phase DrMOS operates in Continuous Current Mode (CCM). In PS1 state, one phase DrMOS operates in Continuous Current Mode (CCM). In PS2 and PS3 states, one phase DrMOS operates in Diode Emulation Mode (DEM). In PS4 state, the full-phase DrMOS is not operating. The operating current is relatively high when the DrMOS is enabled and relatively low when it is disabled. Table 1 shows that in PS1, PS2, and PS3 states, only the DrMOS in Ph1 needs to operate. Although the DrMOS in Ph2 and Ph3 are not actively operating, they are still enabled, resulting in additional power loss. This loss increases with the number of DrMOS connected in parallel.

[0034] The embodiments of this application can solve the above-mentioned technical problems. The technical solutions of the embodiments of this application are described below.

[0035] like Figure 2 As shown, this application embodiment provides a multiphase power supply 10, which is used to supply power to a load 20. The multiphase power supply 10 includes multiple power modules DrMOS, including a first power module 11 and a second power module 12.

[0036] Each power module includes a driver Dr and a power switch, with the driver Dr driving the power switch. For example, each power module includes a first power switch M1 and a second power switch M2. The gate of the power switch is electrically connected to the driver Dr, which controls its on and off states. The power switch also has a source and a drain, which are referred to as the first terminal and the second terminal in the following description, respectively. The first terminal is one of the source and the drain, and the second terminal is the other. The multiphase power supply 10 also includes a power input terminal Vin for providing a power input voltage, such as 12V. For example, the first terminal of the first power switch M1 is electrically connected to the power input terminal Vin, the second terminal of the first power switch M1 is electrically connected to the first terminal of the second power switch M2, and the second terminal of the second power switch M2 is grounded. The connection node between the first power switch M1 and the second power switch M2 can serve as the output terminal of the power module. The multiphase power supply 10 may also include a capacitor C and an inductor corresponding to each power module. The inductors include, for example, a first inductor L1 corresponding to the first power module 11 and a second inductor L2 corresponding to the second power module 12. The output terminal of each power module is electrically connected to the first terminal of the capacitor C through the corresponding inductor. The second terminal of the capacitor C is grounded. The load 20 of the multiphase power supply 10 can be connected in parallel with the capacitor C. The output terminal of the first power module 11 is electrically connected to the first terminal of the capacitor C through the first inductor L1. Similarly, the output terminal of the second power module 12 is electrically connected to the first terminal of the capacitor C through the second inductor L2. The first power module 11, the first inductor L1, and the capacitor C constitute a one-phase buck circuit for supplying power to the load 20; the second power module 12, the second inductor L2, and the capacitor C constitute another phase buck circuit for supplying power to the load 20. In each power module, the driver Dr controls the on / off states of the first power switch M1 and the second power switch M2, enabling the two power switches, in conjunction with an inductor and capacitor, to step down the voltage at the power input terminal Vin, thus providing the stepped-down voltage to the load 20. It should be noted that... Figure 2 The specific circuit connection structure of the power module shown, as well as the voltage conversion circuit structure composed of the power module, inductor, and capacitor, are merely examples. This application does not limit these aspects, as long as they can form DrMOS and multiphase voltage conversion circuits to realize multiphase power supply.

[0037] Each power module has an enable control terminal and a pulse signal control terminal (PWM). The enable control terminal is used to control the enable state of the power module, and the pulse signal control terminal (PWM) is used to control the operating state of the power module. The operating state of the power module refers to the on / off state of the power switch.

[0038] The voltage adjustment module 30 has a first pulse signal output terminal PWM1 and a second pulse signal output terminal PWM2. The first pulse signal output terminal PWM1 is electrically connected to the pulse signal control terminal PWM of the first power module 11, and the second pulse signal output terminal PWM2 is electrically connected to the pulse signal control terminal PWM of the second power module 12. The voltage adjustment module 30 also has an enable state output terminal EO. The first pulse signal output terminal PWM1 and the second pulse signal output terminal PWM2 of the voltage adjustment module 30 are used to output signals corresponding to the first power module 11 and the second power module 12, respectively, to control the corresponding power modules to operate in the required state. The enable control terminal of the voltage adjustment module 30 is used to output an enable control signal to control the required power module to be in the required enabled state.

[0039] The enable state transition circuit 40 is used to enable the enable control terminal E of the first power module 11 to receive the enable signal and enable the enable control terminal E of the second power module 12 to receive the disable signal when the enable state output terminal EO outputs the first signal.

[0040] Specifically, the enable state transition circuit 40 can convert at least a portion of the signal output from the enable state output terminal EO and send the converted signal to the enable control terminals of different power modules. In this way, when the enable state output terminal EO outputs a first signal, the enable state transition circuit 40 can control the enable control terminals of at least two power modules to receive enable and disable signals respectively. That is, the first signal output from the enable state output terminal EO can control the first power module 11 to be in the enabled state and the second power module 12 to be in the disabled state. In other words, the enable states of different power modules can be controlled separately, rather than only controlling all power modules to be in the same enabled state.

[0041] In this embodiment of the multiphase power supply, the enable state switching circuit can convert at least a portion of the signal output from the enable state output terminal EO, and send the converted signal to the enable control terminals of different power modules. This allows the enable control terminal of the first power module to receive an enable signal, and the enable control terminal of the second power module to receive a de-enable signal. In this way, when the first power module is working and the second power module is not working, the first power module can be independently controlled to be in the enabled state, and the second power module can be controlled to be in the de-enable state, thereby reducing additional power consumption.

[0042] In some embodiments, the enable state transition circuit 40 is further configured to enable the enable control terminal of the first power module 11 to receive an enable signal and the enable control terminal of the second power module 12 to receive an enable signal when the enable state output terminal EO outputs a second signal. This means that the second signal output by the enable state output terminal EO can control both the first power module 11 and the second power module 12 to be in an enabled state.

[0043] In some embodiments, the enable state transition circuit 40 is further configured to, when the enable state output outputs a third signal, cause the enable control terminal of the first power module 11 to receive a de-enable signal, and cause the enable control terminal of the second power module 12 to receive a de-enable signal. This means that the third signal output by the enable state output terminal EO can control both the first power module 11 and the second power module 12 to be in a de-enable state.

[0044] In some embodiments, as shown in Table 2, Table 2 illustrates... Figure 2 The diagram shows the signal relationships of each terminal of the power supply under different PS states.

[0045] Table 2

[0046]

[0047] In this circuit, the first signal is a low-level signal (Low), Ph1 represents the first power module 11, and Ph2 represents the second power module 12. Specifically, the enable state transition circuit 40 is used to ensure that when the enable state output terminal EO outputs a low-level signal (Low), the enable control terminal of the first power module 11 receives the low-level signal (Low), and the enable control terminal of the second power module 12 receives a tri-state signal (Tri-state). The low-level signal (Low) is the enable signal, and the tri-state signal (Tri-state) is the disable signal. For example, in PS1, PS2, or PS3 states, the first power module 11 is in the enabled state and participates in power conversion, while the second power module 12 is in the disabled state and does not participate in power conversion. Therefore, the second power module 12 does not consume unnecessary power.

[0048] The second signal is a high-level signal High. Specifically, when the enable state switching circuit 40 outputs a high-level signal High at the enable state output terminal EO, it causes the enable control terminal of the first power module 11 to receive the high-level signal High, and the enable control terminal of the second power module 12 to receive the high-level signal High. The high-level signal High is the enable signal. For example, in the PSO state, both the first power module 11 and the second power module 12 are in the enabled state and participate in the operation.

[0049] In some embodiments, as shown in Table 2, the third signal is a tri-state signal Tri-state. Specifically, when the enable state output terminal EO outputs the tri-state signal Tri-state, the enable control terminal of the first power module 11 receives the tri-state signal Tri-state, and the enable control terminal of the second power module 12 also receives the tri-state signal Tri-state. The tri-state signal Tri-state is a non-enabling signal. For example, in PS4 state, both the first power module 11 and the second power module 12 are in a non-enabling state and do not participate in operation.

[0050] In some embodiments, the enable state output terminal EO is electrically connected to the enable control terminal of the first power module 11; the enable state transition circuit 40 has an input terminal and an output terminal; the enable state output terminal EO is electrically connected to the input terminal of the enable state transition circuit 40, and the output terminal of the enable state transition circuit 40 is electrically connected to the enable control terminal of the second power module 12. The enable state transition circuit 40 is used to output a high-level signal High when a high-level signal High is input, and to output a tri-state signal Tri-state when a low-level signal Low or a tri-state signal Tri-state is input. That is, the enable state output terminal EO can be directly electrically connected to the first power module 11 without going through the enable state transition circuit 40, so that the signal output by the enable state output terminal EO is directly transmitted to the enable control terminal of the first power module 11, while the enable control terminal of the second power module 12 is electrically connected to the enable state output terminal EO through the enable state transition circuit 40, so that the signal output by the enable state output terminal EO is transmitted to the enable control terminal of the second power module 12 after being converted by the enable state transition circuit 40. In this way, when the enable state output terminal EO outputs a high-level signal High, both the enable control terminals SYNC of the first power module 11 and the second power module 12 receive the high-level signal High, meaning that both the first power module 11 and the second power module 12 are in the enabled state; when the enable state output terminal EO outputs a low-level signal Low, the enable control terminal SYNC of the first power module 11 receives the low-level signal Low and is in the enabled state, while the enable control terminal SYNC of the second power module 12 receives the tri-state signal Tri-state output by the enable state transition circuit 40 and is in the disabled state; when the enable state output terminal EOSTB outputs the tri-state signal Tri-state, both the enable control terminals SYNC of the first power module 11 and the second power module 12 receive the tri-state signal Tri-state and are in the disabled state.

[0051] In some embodiments, such as Figure 3As shown, the enable state transition circuit 40 includes: a diode D, the anode of which is connected to the input terminal of the enable state transition circuit 40, i.e., the anode of the diode D is connected to the enable state output terminal EO, and the cathode of the diode D is connected to the output terminal of the enable state transition circuit 40. The diode D is used to conduct when the input terminal of the enable state transition circuit 40 is a high-level signal High, and to cut off when the input terminal of the enable state transition circuit 40 is a low-level signal Low or a tri-state signal Tri-state; a first resistor R1, the output terminal of the enable state transition circuit 40 is electrically connected to the first voltage terminal V1 through the first resistor R1; and a second resistor R2, the output terminal of the enable state transition circuit 40 is electrically connected to the second voltage terminal V2 through the second resistor R2.

[0052] Specifically, assuming the voltage at the first voltage terminal V1 is 3.3V and the voltage at the second voltage terminal V2 is 0V (i.e., ground voltage), 3.3V is a high-level signal (High), and 0V is a low-level signal (Low). The range of 0 to 3.3V is the tri-state signal (Tri-state). When the input of the enable state transition circuit 40 is a high-level signal (High), diode D conducts, and the high-level signal (High) is transmitted to the output of the enable state transition circuit 40. When the input of the enable state transition circuit 40 is a low-level signal (Low) or a tri-state signal (Tri-state), diode D is cut off, and the output of the enable state transition circuit 40 outputs a voltage between 3.3V and 0V, divided by the first resistor R1 and the second resistor R2, for example, 2.5V, which is the tri-state signal (Tri-state).

[0053] In some embodiments, such as Figure 3 As shown, the multiple power modules also include a third power module 13. The voltage adjustment module 30 also has a third pulse signal output terminal PWM3, which is electrically connected to the pulse signal control terminal PWM of the third power module 13. The enable control terminal SYNC of the third power module 13 is electrically connected to the output terminal of the enable state transition circuit 40. That is to say, the signal of the enable control terminal SYNC of the third power module 13 is exactly the same as that of the second power module 13, so the enable control process of the third power module 13 will not be described in detail.

[0054] Specifically, for example in Figure 3In this configuration, load 20 is the CPU. Besides being electrically connected to the output of the multiphase power supply 10 to obtain power, the CPU is also electrically connected to the voltage regulation module 30. During the operation of the multiphase power supply 10, the CPU issues instructions to set the PS state of the multiphase power supply 10 as needed. The voltage regulation module 30 of the multiphase power supply 10 can determine how many power modules need to participate in the operation to provide power based on these instructions. For the power modules participating in the operation, their pulse signal control terminal PWM will receive normal pulse signals including High, Low, and Tri-state. For the power modules not participating in the operation, their pulse signal control terminal PWM will continuously receive Tri-state signals. Furthermore, the voltage regulation module 30 controls the enable state of each power module through the signal output from the enable state output terminal EO in conjunction with the enable state switching circuit 40. Specific terminal signal states can be found in Table 2, where the terminal signal states of the third power module 13 are the same as those of the second power module 12. It is understandable that the multiphase power supply 10 can accommodate even more power modules.

[0055] In some embodiments, such as Figure 4 As shown, the enable state transition circuit 40 has an input terminal, a first output terminal O1, a second output terminal O2, a third output terminal O3, and a fourth output terminal O4; the enable state output terminal EO is electrically connected to the input terminal of the enable state transition circuit 40. Multiple power modules include a first power module 11, a second power module 12, a third power module 13, and a fourth power module 14. The voltage adjustment module 30 has a first pulse signal output terminal PWM1, a second pulse signal output terminal PWM2, a third pulse signal output terminal PWM3, and a fourth pulse signal output terminal PWM4. The first pulse signal output terminal PWM1 is electrically connected to the pulse signal control terminal PWM of the first power module 11; the second pulse signal output terminal PWM2 is electrically connected to the pulse signal control terminal PWM of the second power module 12; the third pulse signal output terminal PWM3 is electrically connected to the pulse signal control terminal PWM of the third power module 13; and the fourth pulse signal output terminal PWM4 is electrically connected to the pulse signal control terminal PWM of the fourth power module 14. The first output terminal O1 is electrically connected to the enable control terminal of the first power module 11, the second output terminal O2 is electrically connected to the enable control terminal of the second power module 12, the third output terminal O3 is electrically connected to the enable control terminal of the third power module 13, and the fourth output terminal O4 is electrically connected to the enable control terminal of the fourth power module 14. The first signal is a signal within a first voltage range; the enable state switching circuit 40 is used to enable the first output terminal O1 to output an enable signal and enable the second output terminal O2, the third output terminal O3, and the fourth output terminal O4 to output disable signals when the enable state output terminal EO outputs the first signal.

[0056] Specifically, for example, the enable state switching circuit 40 is an analog-to-digital converter circuit used to convert analog signals into digital signals for output. Assuming the first voltage range is 0–0.825V, the enable signal is digital signal 1, and the disable signal is digital signal 0. When the enable state output terminal EO outputs a voltage of 0–0.825V, the first output terminal O1 of the enable state switching circuit 40 outputs 1, and the second, third, and fourth output terminals O2, O3, and O4 output 0. For each power module, the digital signal 1 at the enable control terminal operates in the enabled state, and the digital signal 0 at the enable control terminal operates in the disabled state. That is, when the enable state output terminal EO of the voltage adjustment module 30 outputs a voltage of 0–0.825V, it can control the first power module 11 to be in the enabled state, while simultaneously controlling the second, third, and fourth power modules 12, 13, and 14 to be in the disabled state.

[0057] In some embodiments, Figure 4 The input and output states of the enable state transition circuit 40 shown in the figure can be as shown in Table 3.

[0058] Table 3

[0059]

[0060] The enable state switching circuit 40 uses a first signal when its input is between 0 and 0.825V. The enable state switching circuit 40 also enables the first output terminal O1 and the second output terminal O2 to output an enable signal 1, and the third output terminal O3 and the fourth output terminal O4 to output a disable signal 0, when the enable state output terminal EO outputs a second signal. The second signal is a signal belonging to a second voltage range that does not overlap with the first voltage range; for example, the second voltage range is 0.825V to 1.65V. When the enable state output terminal EO outputs a voltage between 0.825V and 1.65V, it controls the first power module 11 and the second power module 12 to be in an enabled state, and controls the third power module 13 and the fourth power module 14 to be in a disabled state. The 0.825V value can be divided into either the first voltage range or the second voltage range as needed. Additionally, the enable state switching circuit 40 can also be used to enable the first output terminal O1, the second output terminal O2, and the third output terminal O3 to output an enable signal 1, and to enable the fourth output terminal O4 to output a disable signal 0, when the enable state output terminal EO outputs a third signal. The third signal is a signal belonging to a third voltage range, and there is no overlap between any two of the first, second, and third voltage ranges. For example, the third voltage range is 1.655V to 2.475V. When the enable state output terminal EO outputs a voltage of 1.655V to 2.475V, it controls the first power module 11, the second power module 12, and the third power module 13 to be in the enabled state, and controls the fourth power module 14 to be in the disabled state. The 1.655V value can be divided into either the second or third voltage range as needed. Additionally, the enable state transition circuit 40 can also be used to enable the first output terminal O1, the second output terminal O2, the third output terminal O3, and the fourth output terminal O4 to output enable signal 1 when the enable state output terminal EO outputs a fourth signal. The fourth signal is a signal belonging to a fourth voltage range, and there is no overlap between any two of the first, second, third, and fourth voltage ranges. For example, the fourth voltage range is 2.475V to 3.3V. When the enable state output terminal EO outputs a voltage of 2.475V to 3.3V, it controls the first power module 11, the second power module 12, the third power module 13, and the fourth power module to be in an enabled state. The 2.475V value can be divided into either the third or fourth voltage range as needed. In other words, the 3.3V voltage range that the enable output terminal EO can output is divided into four parts: 0 to 0.825V enables one power module and disables the other three power modules; 0.825V to 1.65V enables two power modules and disables the other two power modules; 1.65V to 2.475V enables three power modules and disables the other one power module; and 2.475V to 3.3V enables all four power modules.Understandably, the voltage range division and control logic for each power module described here are merely examples. Other division methods and control logic can also be used to control the enable state of different power modules. The number of power modules is also just an example and can be set as needed.

[0061] In some embodiments, the enable state transition circuit 40 is an analog-to-digital converter (ADC). The ADC can convert analog signals of different voltage ranges into digital signals with two defined states, thereby controlling the enable state of the power module. The output of the enable state transition circuit 40 can be a general purpose input / output (GPIO) port.

[0062] In some embodiments, the multiphase power supply 10 in this application can be a multiphase step-down power supply. That is, each power module constitutes a one-phase step-down voltage conversion branch.

[0063] This application also provides an electronic device, including the multiphase power supply 10 in any of the above embodiments.

[0064] Figure 5 A schematic diagram of the structure of the electronic device 100 is shown.

[0065] Electronic device 100 may include processor 110, external memory interface 120, internal memory 121, universal serial bus (USB) interface 130, charging management module 140, power management module 141, battery 142, display screen 194, etc.

[0066] It is understood that the structures illustrated in the embodiments of the present invention do not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0067] Processor 110 may include one or more processing units, such as application processors (APs), modem processors, graphics processing units (GPUs), image signal processors (ISPs), controllers, video codecs, digital signal processors (DSPs), baseband processors, and / or neural network processing units (NPUs). These different processing units may be independent devices or integrated into one or more processors.

[0068] The controller can generate operation control signals based on the instruction opcode and timing signals to complete the control of instruction fetching and execution.

[0069] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0070] The charging management module 140 receives charging input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 receives charging input from the wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 receives wireless charging input via the wireless charging coil of the electronic device 100. While charging the battery 142, the charging management module 140 can also supply power to the electronic device via the power management module 141.

[0071] The power management module 141 connects the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, providing power to the processor 110, internal memory 121, display screen 194, etc. The power management module 141 can also monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage current, impedance). In some other embodiments, the power management module 141 may also be located within the processor 110. In other embodiments, the power management module 141 and the charging management module 140 may be located in the same device. In this embodiment, the multiphase power supply 10 can be the power management module 141.

[0072] Electronic device 100 implements display functions through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations and for graphics rendering. Processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0073] Display screen 194 is used to display images, videos, etc. Display screen 194 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a miniature LED, a microLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, electronic device 100 may include one or N displays 194, where N is a positive integer greater than 1.

[0074] The external storage interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions. For example, music, video, and other files can be saved on the external memory card.

[0075] Internal memory 121 can be used to store computer executable program code, which includes instructions. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback, image playback, etc.), etc. The data storage area may store data created during the use of electronic device 100 (such as audio data, phonebook, etc.). Furthermore, internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc. Processor 110 executes various functional applications and data processing of electronic device 100 by running instructions stored in internal memory 121 and / or instructions stored in memory located in the processor.

[0076] The electronic devices involved in this application may be any product such as smart TVs, mobile phones, tablets, personal computers (PCs), personal digital assistants (PDAs), smartwatches, wearable electronic devices, augmented reality (AR) devices, virtual reality (VR) devices, in-vehicle devices, drone devices, smart cars, smart speakers, robots, smart glasses, etc.

[0077] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state drive).

[0078] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, or the existence of B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0079] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A multiphase power supply, characterized in that, include: Multiple power modules DrMOS, each power module including a driver and a power switch, the power module having an enable control terminal and a pulse signal control terminal, the enable control terminal being used to control the enable state of the power module, the pulse signal control terminal being used to control the operating state of the power module, the multiple power modules including a first power module and a second power module; A voltage adjustment module has a first pulse signal output terminal and a second pulse signal output terminal. The first pulse signal output terminal is electrically connected to the pulse signal control terminal of the first power module, and the second pulse signal output terminal is electrically connected to the pulse signal control terminal of the second power module. The voltage adjustment module also has an enable state output terminal. An enable state transition circuit is provided, wherein when the enable state output terminal outputs a first signal, the enable control terminal of the first power module receives an enable signal, and the enable control terminal of the second power module receives a de-enable signal.

2. The multiphase power supply according to claim 1, characterized in that, The enable state transition circuit is further configured to enable the enable control terminal of the first power module to receive an enable signal and the enable control terminal of the second power module to receive an enable signal when the enable state output terminal outputs a second signal.

3. The multiphase power supply according to claim 2, characterized in that, The enable state transition circuit is also used to enable the enable control terminal of the first power module to receive a non-enable signal and the enable control terminal of the second power module to receive a non-enable signal when the enable state output terminal outputs a third signal.

4. The multiphase power supply according to claim 2, characterized in that, The first signal is a low-level signal. The enable state switching circuit is specifically used to enable the enable control terminal of the first power module to receive the low-level signal and enable the enable control terminal of the second power module to receive the tri-state signal when the enable state output terminal outputs a low-level signal. The low-level signal is an enable signal and the tri-state signal is a disable signal. The second signal is a high-level signal. Specifically, when the enable state switching circuit outputs a high-level signal, it enables the enable control terminal of the first power module to receive a high-level signal and the enable control terminal of the second power module to receive a high-level signal. The high-level signal is an enable signal.

5. The multiphase power supply according to claim 3, characterized in that, The third signal is a tri-state signal. Specifically, when the enable state switching circuit outputs a tri-state signal, it enables the enable control terminal of the first power module to receive the tri-state signal and the enable control terminal of the second power module to receive the tri-state signal. The tri-state signal is a non-enable signal.

6. The multiphase power supply according to any one of claims 1 to 5, characterized in that, The enable state output terminal is electrically connected to the enable control terminal of the first power module; The enable state transition circuit has an input terminal and an output terminal; The enable state output terminal is electrically connected to the input terminal of the enable state switching circuit, and the output terminal of the enable state switching circuit is electrically connected to the enable control terminal of the second power module. The enable state switching circuit is used to output a high-level signal when a high-level signal is input, and to output a tri-state signal when a low-level signal or a tri-state signal is input.

7. The multiphase power supply according to claim 6, characterized in that, The enabling state transition circuit includes: A diode, wherein the anode of the diode is electrically connected to the input terminal of the enable state transition circuit, and the cathode of the diode is electrically connected to the output terminal of the enable state transition circuit. The diode is used to conduct when the input terminal of the enable state transition circuit is a high-level signal, and to cut off when the input terminal of the enable state transition circuit is a low-level signal or a tri-state signal. The first resistor is used to electrically connect the output terminal of the enable state switching circuit to the first voltage terminal. The second resistor is used to electrically connect the output terminal of the enable state transition circuit to the second voltage terminal.

8. The multiphase power supply according to claim 6, characterized in that, The plurality of power modules also includes a third power module, the enable control terminal of which is electrically connected to the output terminal of the enable state transition circuit.

9. The multiphase power supply according to claim 1, characterized in that, The enable state transition circuit has an input terminal, a first output terminal, and a second output terminal; The enable state output terminal is electrically connected to the input terminal of the enable state switching circuit, the first output terminal is electrically connected to the enable control terminal of the first power module, and the second output terminal is electrically connected to the enable control terminal of the second power module. The first signal is a signal that belongs to the first voltage range; The enable state switching circuit is used to enable the first output terminal to output an enable signal and enable the second output terminal to output a disable signal when the enable state output terminal outputs a first signal.

10. The multiphase power supply according to claim 9, characterized in that, The enable state switching circuit is further configured to enable the first output terminal to output an enable signal and the second output terminal to output an enable signal when the enable state output terminal outputs a second signal. The second signal is a signal belonging to a second voltage range, and the second voltage range does not overlap with the first voltage range.

11. The multiphase power supply according to claim 9, characterized in that, The enable state transition circuit is an analog-to-digital converter circuit.

12. The multiphase power supply according to claim 1, characterized in that, The multiphase power supply is a multiphase step-down power supply.

13. An electronic device, characterized in that, Includes the multiphase power supply as described in any one of claims 1 to 12.

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