Double-end input single-phase three-level photovoltaic inverter model prediction control method and system
By using a model predictive control method for a dual-input single-phase three-level photovoltaic inverter, the problem of unbalanced midpoint voltage caused by DC-side voltage imbalance is solved, achieving efficient and stable output current, reducing switching losses and inverter costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- AOTAI ELECTRIC
- Filing Date
- 2025-12-15
- Publication Date
- 2026-04-17
AI Technical Summary
Traditional single-phase three-level photovoltaic inverters have difficulty maintaining neutral point voltage balance when the DC side voltage is unbalanced, resulting in output current distortion, complex control, and high cost.
A model predictive control method for a dual-input single-phase three-level photovoltaic inverter is adopted. By defining the unbalance degree k, the spatial vector diagram is divided into six sectors, and candidate vectors and duty cycles are determined to achieve control of the switching transistors, avoiding the midpoint voltage balance strategy and reducing the DC side capacitor value.
Under unbalanced voltage conditions at the midpoint, it outputs high-quality current, reduces the number of switching operations, lowers switching losses, improves inverter efficiency, and reduces costs.
Smart Images
Figure CN121886986A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of photovoltaic inverter technology, and in particular to a model predictive control method and system for a dual-input single-phase three-level photovoltaic inverter. Background Technology
[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.
[0003] Single-phase multilevel inverters have been widely used in small-scale residential photovoltaic power generation due to their large number of output levels, high current quality, and low device voltage stress.
[0004] Traditional single-phase multilevel photovoltaic inverters often employ a three-level topology. For a three-level topology, it is crucial to maintain the inverter's midpoint voltage balance at all times. If the capacitor voltage becomes unbalanced, additional harmonics will be introduced to the output side, reducing power generation quality. In contrast, the single-phase three-level T-type inverter (1P-3L-TI) has become a commonly used topology for three-level inverters due to its advantages such as fewer switching power devices and higher efficiency.
[0005] Furthermore, for inverters requiring capacitor voltage balancing, a midpoint voltage or floating capacitor voltage balancing strategy must be added. This typically increases the number of controllers, and the parameters of multiple controllers are difficult to adjust simultaneously. Capacitor voltage balancing control can sometimes be coupled with other control objectives, further complicating controller design. Sometimes, to ensure minimal capacitor voltage fluctuations, larger capacitance values are required, increasing costs.
[0006] To address this issue, the upper and lower DC-side capacitors of a single-phase photovoltaic inverter can be controlled at different voltages. That is, the upper and lower DC-side capacitors are connected to different DC-side photovoltaic panels, providing dual-input DC voltages. Therefore, the capacitor voltage control algorithm can be omitted. Since the DC-side capacitor voltage does not need to be balanced, the capacitor value can be further reduced. Due to the difference in photovoltaic panel output voltage, the DC-side midpoint voltage becomes unbalanced. However, traditional methods can only operate the inverter under balanced midpoint voltage conditions, not unbalanced conditions. When the DC-side voltage is unbalanced, the voltage vector position in the photovoltaic 1P-3L-TI changes according to the degree of DC-side voltage imbalance. This real-time dynamic change renders the traditional midpoint balancing control strategy inapplicable, making it difficult to accurately track the reference current and resulting in severe output current distortion. Summary of the Invention
[0007] To address the aforementioned issues, this invention proposes a model predictive control method and system for a dual-input single-phase three-level photovoltaic inverter, which enables the single-phase three-level T-type inverter to stably output high-quality current even under neutral point voltage imbalance conditions.
[0008] In some implementations, the following technical solutions are adopted: A model predictive control method for a dual-input single-phase three-level photovoltaic inverter includes: Under the condition of voltage imbalance at the midpoint, the imbalance degree k is defined. The maximum and minimum voltage values are determined based on the voltages of the upper and lower capacitors on the DC side. The spatial vector diagram is divided into six sectors based on the maximum and minimum voltage values, and two candidate vectors are determined in each sector. The candidate vectors are determined based on the value of the imbalance degree. The two candidate vectors in each sector form a symmetrical three-segment sequence. Calculate the reference voltage for the inverter output line voltage, determine the sector based on the reference voltage value, determine the candidate vector based on the unbalance value, sort the vectors, calculate the duty cycle of the two candidate vectors respectively, and generate a PWM signal to control the state of each switch based on the duty cycle.
[0009] As a further approach, an imbalance is defined as the ratio of the voltages of the upper and lower capacitors on the DC side.
[0010] As a further option, the maximum voltage is determined based on the voltage of the upper and lower capacitors on the DC side. and minimum value Specifically: ; in, and These are the voltages of the upper and lower capacitors on the DC side, respectively.
[0011] As a further solution, the spatial vector diagram is divided into six sectors based on the maximum and minimum voltage values, specifically: First sector S1: u max < u < u max + u min ; Second sector S2: u min < u < u max ; Third sector S3: 0< u < u min ; Sector 4: -u min < u <0; Sector 5 (S5): -u max <u < -u min ; Sector 6: -u max - u min < u <- u max ; in, u This is the reference voltage for the inverter output line voltage. As a further approach, the candidate vectors within each sector are specifically as follows: The candidate vector for the first sector S1 is: when k When >1, the candidate vectors are PN and PO; when k When <1, the candidate vectors are: PN, ON; The candidate vector for the second sector S2 is: when k When >1, the candidate vectors are PO and ON; when k When <1, the candidate vectors are: ON, PO; The candidate vector for the third sector S3 is: when k When >1, the candidate vectors are ON and OO; when k When <1, the candidate vectors are: PO, OO; The candidate vector for sector S4 is: when k When >1, the candidate vectors are OO and NO; when k When <1, the candidate vectors are: OO and OP; The candidate vector for sector S5 is: when k When >1, the candidate vectors are NO and OP; when k When <1, the candidate vectors are: OP, NO; The candidate vector for sector S6 is: when k When >1, the candidate vectors are NP and OP; when k When <1, the candidate vectors are: NP and NO.
[0012] As a further step, the reference voltage is calculated. Specifically: ; ; in, T s Sampling time, Let k be the output current at time k. , , , These are the reference currents at times k-2, k-1, k, and k+1, respectively. R is the equivalent load on the output side, and L is the filter capacitor.
[0013] As a further step, the duty cycle of the two candidate vectors is calculated separately, specifically as follows: When the reference voltage belongs to the first sector, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the second sector, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the third sector, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the fourth sector, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the fifth sector, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the sixth sector, the duty cycles of the two candidate vectors are as follows: ; in, u This is the reference voltage for the inverter output line voltage. d Left indicates that the output voltage is less than u The duty cycle corresponding to the candidate vector, d The right side indicates that the output voltage is greater than u The duty cycle corresponding to the candidate vector.
[0014] In other embodiments, the following technical solutions are adopted: A model predictive control system for a dual-input single-phase three-level photovoltaic inverter includes: The sector division module is configured to define the unbalance degree k under the midpoint voltage unbalance condition, determine the maximum and minimum voltage values based on the voltages of the upper and lower capacitors on the DC side, divide the spatial vector map into six sectors based on the maximum and minimum voltage values, and determine two candidate vectors in each sector. The candidate vectors are determined based on the value of the unbalance degree. The two candidate vectors in each sector form a symmetrical three-segment sequence. The control module is configured to calculate the reference voltage of the inverter output line voltage, determine the sector based on the value of the reference voltage, determine the candidate vector based on the value of the unbalance, sort the vectors, calculate the duty cycle of two candidate vectors respectively, and generate PWM signals to control the state of each switch based on the duty cycle.
[0015] In other embodiments, the following technical solutions are adopted: A terminal device includes a processor and a memory, the processor being used to implement instructions; the memory being used to store multiple instructions adapted to be loaded and executed by the processor to perform the above-described model predictive control method for a dual-input single-phase three-level photovoltaic inverter.
[0016] In other embodiments, the following technical solutions are adopted: A computer-readable storage medium storing a plurality of instructions adapted for loading and execution by a processor of a terminal device of the above-described model predictive control method for a dual-input single-phase three-level photovoltaic inverter.
[0017] Compared with the prior art, the beneficial effects of the present invention are: (1) The control strategy for unbalanced operating conditions proposed in this invention divides the spatial vector diagram into six sectors. Compared with the four sectors in balanced operating conditions, it can achieve the output voltage of a four-level topology using a three-level topology, with fewer switching operations and improved output current quality. Furthermore, this strategy can also operate under neutral point voltage balance conditions. Since it is not necessary to balance the neutral point voltage at all times, a neutral point voltage balancing procedure is not required, which also helps to reduce the capacitance value of the DC side capacitor, thereby simplifying the program and reducing the cost of the inverter.
[0018] (2) This invention constructs a spatial vector diagram under the condition of voltage imbalance at the midpoint, and also provides the spatial vector diagram under the condition of voltage imbalance at the midpoint. u p > u n and u p < u n In both cases, the two candidate vectors selected in each sector, and the three-segment sequence formed by the two vectors, calculate the duty cycle of each candidate vector by the maximum and minimum voltage values, and then form a PWM waveform to control the switching transistor. The whole process does not include the value function and weighting factor, thus avoiding the computational burden caused by the cyclic calculation of the value function while achieving fast response.
[0019] Other features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0020] Figure 1 This is a topology diagram of 1P-3L-TI in an embodiment of the present invention; Figure 2This is a space voltage vector diagram of 1P-3L-TI under the midpoint voltage balance condition in an embodiment of the present invention; Figure 3(a) shows the 1P-3L-TI in the embodiment of the present invention under the condition of voltage imbalance at the midpoint. k Space voltage vector diagram under >1; Figure 3(b) shows the 1P-3L-TI in the embodiment of the present invention under the condition of voltage imbalance at the midpoint. k Space voltage vector diagram under <1; Figures 4(a) and (b) are schematic diagrams of the number of switching operations of 1P-3L-TI in the first sector under the conditions of balanced and unbalanced midpoint voltage. Figure 5 This is a schematic diagram of the control strategy process under the condition of unbalanced midpoint voltage in an embodiment of the present invention; Figures 6(a)-(c) are respectively k =2.33、 k =0.67 and k Schematic diagram of output voltage and current when =1; Figure 7 This is a comparison chart of simulation results for the number of switch switching operations in an embodiment of the present invention. Detailed Implementation
[0021] It should be noted that the following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.
[0022] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.
[0023] Example 1 In one or more embodiments, a model predictive control method for a dual-input single-phase three-level photovoltaic inverter is disclosed, comprising: S101: Under the condition of unbalanced voltage at the midpoint, define the unbalance degree k, determine the maximum and minimum voltage values based on the voltage of the upper and lower capacitors on the DC side, divide the spatial vector diagram into six sectors based on the maximum and minimum voltage values, and determine two candidate vectors in each sector. The candidate vectors are determined based on the value of the unbalance degree; the two candidate vectors in each sector form a symmetrical three-segment sequence.
[0024] This embodiment applies to single-phase three-level photovoltaic inverters with dual-ended inputs. The following explanation uses the 1P-3L-TI topology as an example; the 1P-3L-TI topology is as follows: Figure 1 As shown. The voltages of the upper and lower capacitors on the DC side are respectively u p , u n Each is supplied with voltage by an independent photovoltaic panel, and the total voltage provided by the DC-side photovoltaic panels is... u dc The equivalent load on the output side is R The filter capacitor is L The output current is i a .
[0025] Each phase contains four switches. Taking phase a as an example, S... a1 With S_ a1 Complementary, S a2 With S_ a2 Complementary. Depending on the switching combinations, the 1P-3L-TI can output three different voltages. The relationship between the switching combinations and the output voltage under DC-side midpoint voltage imbalance conditions is shown in Table 1.
[0026] Table 1 Relationship between phase a switch combination and output voltage
[0027] The following analysis examines the spatial vector diagrams under different midpoint voltage balance conditions in this embodiment.
[0028] (1) When u p = u n At that time, i.e., under the condition of neutral voltage balance, the space voltage vector diagram of 1P-3L-TI is as follows: Figure 2 As shown. At this time, in + u dc / 2 and - u dc There are redundant vectors at each of the / 2 points. Figure 2 As can be seen, the nine space voltage vectors divide the space vector diagram into four sectors, resulting in a total of five output voltage levels. Therefore, under balanced operating conditions, the output voltage of the 1P-3L-TI is a five-level voltage.
[0029] (2) Under the condition of voltage imbalance at the midpoint, the unbalance degree k is first defined: (1) and These are the upper capacitor voltage and lower capacitor voltage on the DC side, respectively; it can be observed that... kIt is a non-negative number. When k When the voltage is equal to 1, it is the neutral point voltage balance condition.
[0030] (2-1) When u p > u n At that time, that is k When the value is greater than 1, the spatial voltage vector diagram is shown in Figure 3(a).
[0031] As can be seen from Figure 3(a), originally in k =1 when + u dc / 2 and - u dc The redundant vector at / 2 is separated into four complementary redundant vectors. These four vectors correspond to different output voltage amplitudes, therefore... k When the value is greater than 1, the spatial vector diagram becomes 6 sectors, and the output voltage can take seven different levels. Compared to the balanced condition, the number of output voltage levels is increased when unbalanced.
[0032] (2-2) When u p < u n At that time, that is k When <1, the spatial voltage vector diagram is shown in Figure 3(b).
[0033] It can be observed that, with k The operating conditions are similar when the voltage is >1. The spatial vector diagram is still divided into six sectors, and the output voltage still has seven different levels. Only the positions of the vectors PO, ON, OP, and NO have changed. Therefore, as long as the 1P-3L-TI operates under conditions of DC-side midpoint voltage imbalance, it will definitely be able to output more voltage levels.
[0034] Where P, O, and N correspond to the values in Table 1. u p ,0, u n PO represents the output voltage of bridge arm a. u p The output voltage of bridge arm b is 0; the others follow the same pattern.
[0035] Therefore, k There are three possible values, corresponding to three different spatial vector diagrams. Therefore, this embodiment unifies the above three cases and establishes a unified spatial vector diagram for the case of unbalanced midpoint voltage. This spatial vector diagram is also applicable to the case of balanced midpoint voltage.
[0036] Based on this, this embodiment defines u maxand u min for: (2) Assume the reference voltage at this time is u ,according to u max and u min The spatial vector map can be divided into six sectors, and the determination method is shown in Table 2.
[0037] Table 2. Criteria for Sector Judgment
[0038] Based on Table 2, a unified spatial voltage vector diagram can be constructed. When the midpoint voltages are balanced, vectors PO and ON, OP and NO will coincide, thus obtaining the spatial vector diagram when the midpoint voltages are equal.
[0039] After determining the sectors, this embodiment also specifies two candidate vectors to be used in each sector, which needs to be based on... k The value is used to determine the vector selection, as shown in Table 3.
[0040] Table 3. Criteria for Vector Judgment
[0041] Based on the spatial vector diagram determined above, the number of switching operations under different midpoint voltage balance conditions is analyzed below.
[0042] exist Figure 2 Under the midpoint balance condition, taking sector S1 as an example, when using the traditional method (SPWM strategy, i.e., carrier modulation technology), when the reference voltage is located in S1, the vectors participating in the synthesis of the reference voltage are PN, PO, and ON, which can form a five-segment symmetrical sequence, as shown in Figure 4(a). At this time, the switching states of phase a and phase b are PPOPP and ONNNO, respectively. It can be observed that phases a and b each undergo two switching state changes.
[0043] by k Taking the case of >1 as an example, we analyze the switching state changes during imbalance. When the reference voltage vector is located at S1 in Figure 3(a), the vectors participating in the synthesis of the reference voltage are PO and PN, which can form a three-segment sequence, as shown in Figure 4(b). At this time, the switching states of phase a and phase b are PPP and ONO, respectively. It can be found that the switching state of phase a remains unchanged, while phase b undergoes two switching state changes.
[0044] k >1 and k <1 The three-segment vectors of all sectors are shown in Table 4.
[0045] Table 4. Principles for Selecting Three-Segment Sequences
[0046] It can be observed that only in sectors S2 and S5 does the state of each of the two phase switches change once. In the remaining sectors, one phase switch remains unchanged while the other phase changes twice.
[0047] In contrast, under traditional neutral point voltage balance conditions, the state of both phase switches changes once in all sectors. Therefore, compared to k =1 indicates the neutral voltage balance condition. In this embodiment, the number of switching state changes can be reduced under unbalanced conditions, thereby reducing switching losses and improving efficiency.
[0048] S102: Calculate the reference voltage of the inverter output line voltage, determine the sector based on the value of the reference voltage, determine the candidate vector based on the value of the unbalance, and sort the vectors. Calculate the duty cycle of the two candidate vectors respectively, and generate a PWM signal to control the state of each switch based on the duty cycle.
[0049] The specific process is as follows: Figure 5 As shown, it includes: Depend on Figure 1 The 1P-3L-TI loop can be established using the following discrete equation: (3) (4) in, T s Sampling time, Let k be the output current (sampling current) at time k. , , , These are the reference currents at times k-2, k-1, k, and k+1, respectively. R is the equivalent load on the output side, and L is the filter capacitor on the output side.
[0050] At this time, the formula (3) is calculated to obtain u ab ( k (This refers to Table 2) u Therefore, we can first determine based on Table 2. u The voltage across the sector. Then, according to Table 3, the two vectors needed at this point can be determined. Based on the different sectors where these two vectors are located, and referring to Table 2, the duty cycle is: When the reference voltage belongs to the first sector S1, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the second sector S2, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the third sector S3, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to the fourth sector S4, the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to sector 5 (S5), the duty cycles of the two candidate vectors are as follows: ; When the reference voltage belongs to sector S6, the duty cycles of the two candidate vectors are as follows: ; in, u For reference voltage, d Left indicates that the output voltage is less than u The duty cycle corresponding to the candidate vector, d The right side indicates that the output voltage is greater than u The duty cycle corresponding to the candidate vector. For example k When the value is greater than 1, in the third sector S3, as shown in Figure 3(a), u is located between OO and ON, and the output voltage corresponding to OO is 0, while the output voltage corresponding to ON is... u min Therefore, 0 < u < u min . d The left side represents the vector corresponding to 0, i.e., the duty cycle of OO. d Right indicates u min The corresponding vector, i.e., the duty cycle of ON, is then sorted according to Table 4 to form a symmetrical three-segment sequence. Combined with the appropriate PWM signal output in Table 1, the inverter can operate normally under unbalanced conditions.
[0051] This embodiment analyzes the spatial vector diagrams under balanced and unbalanced voltage conditions at the midpoint and finds that... k When the value is not equal to 1, the number of output voltage layers in the space voltage vector diagram increases under the midpoint voltage imbalance condition, thus reducing the output voltage. dv / dt This improves the quality of the output current. By analyzing the switching losses under unbalanced midpoint voltage conditions, it was found that compared to the midpoint voltage balancing strategy, under both unbalanced operating conditions... k <1 and kIn the case of >1, the number of switching operations can be reduced in two-thirds of the sectors, and the number of switching operations is the same as when the midpoint voltage is balanced in one-third of the sectors. Therefore, the unbalanced strategy proposed in this embodiment can reduce the number of switching operations overall, which is beneficial to reducing switching losses and improving inverter efficiency. By calculating the duty cycle when synthesizing the reference voltage under unbalanced conditions, the reference current can be accurately tracked.
[0052] This embodiment of the method can improve the output voltage levels, achieving the effect of a four-level inverter using a three-level inverter, while eliminating the need for a balancing capacitor voltage algorithm in a four-level inverter. This embodiment of the method also reduces the number of switching operations, thereby reducing switching losses and improving inverter efficiency. This embodiment of the method is applicable to both balanced and unbalanced neutral point voltage operating conditions. Since it is not necessary to constantly balance the neutral point voltage, the traditional neutral point voltage balancing strategy can be eliminated, and the DC-side capacitor value can be appropriately reduced, thus simplifying the program and reducing inverter costs.
[0053] The strategy proposed in this embodiment will be verified under three operating conditions: DC-side upper and lower capacitor voltages of 140V and 60V, 80V and 120V, and 100V and 100V (midpoint voltage balance condition). k The values are 2.33, 0.67, and 1 respectively; at a modulation index of 0.8, the load ( R The size is 24Ω, filter inductor L The sampling period was 100 μs and the value was 8 mH. This was verified in simulations, and the results are shown in Figures 6(a)-(c). Figure 7 As shown.
[0054] Referring to Figures 6(a)-(c), the output voltage exhibits a seven-level waveform under both unbalanced operating conditions. In this case, the 1P-3L-TI can achieve the same function as a four-level topology without requiring a capacitor voltage balancing strategy. Under balanced operating conditions, the proposed strategy results in a five-level output voltage. The output current exhibits a smooth sinusoidal waveform under all three operating conditions. k When the values are 2.33, 0.67, and 1, the corresponding output current THDs are 0.97%, 1.14%, and 1.58%, respectively. It can be seen that the method proposed in this embodiment takes into account both balanced and unbalanced midpoint voltage conditions, and can stably output high-quality sinusoidal current.
[0055] At the same time, measurements were also taken. k The number of switching operations under different modulation indices is calculated for values of 2.33, 0.67, and 1, as well as for the traditional method (SPWM strategy) when the midpoint voltage is balanced. For example... Figure 7 As shown, it can be observed that the number of switching operations for the imbalance strategy proposed in this embodiment is less than that of the traditional neutral point voltage balancing strategy, even in kWhen the value is 1, the number of switching operations proposed by the strategy is still less than that of the traditional method, thus effectively reducing switching losses and improving inverter efficiency.
[0056] In summary, the method described in this embodiment can operate under both balanced and unbalanced midpoint conditions, providing high-quality output current, fewer switching operations, and high inverter efficiency. Furthermore, this method does not require a midpoint voltage balancing strategy and does not need to maintain midpoint voltage balance at all times, thus reducing the capacitance values of the upper and lower DC-side capacitors and lowering costs.
[0057] Example 2 In one or more embodiments, a dual-input single-phase three-level photovoltaic inverter model predictive control system is disclosed, comprising: The sector division module is configured to define the unbalance degree k under the midpoint voltage unbalance condition, determine the maximum and minimum voltage values based on the voltages of the upper and lower capacitors on the DC side, divide the spatial vector map into six sectors based on the maximum and minimum voltage values, and determine two candidate vectors in each sector. The candidate vectors are determined based on the value of the unbalance degree. The two candidate vectors in each sector form a symmetrical three-segment sequence. The control module is configured to calculate the reference voltage of the inverter output line voltage, determine the sector based on the value of the reference voltage, determine the candidate vector based on the value of the unbalance, sort the vectors, calculate the duty cycle of two candidate vectors respectively, and generate PWM signals to control the state of each switch based on the duty cycle.
[0058] It should be noted that the specific implementation methods of the above modules are exactly the same as those in Example 1, and will not be described in detail again.
[0059] Example 3 In one or more embodiments, a terminal device is disclosed, comprising a processor and a memory, wherein the processor is used to implement instructions; and the memory is used to store multiple instructions adapted to be loaded by the processor and executed by the processor to perform the model predictive control method for a dual-input single-phase three-level photovoltaic inverter described in Embodiment 1.
[0060] It should be understood that in this embodiment, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc.
[0061] Memory may include read-only memory and random access memory, and provides instructions and data to the processor. A portion of memory may also include non-volatile random access memory. For example, memory may also store information about the device type.
[0062] In the implementation process, each step of the above method can be completed by the integrated logic circuits in the processor hardware or by software instructions.
[0063] Example 4 In one or more embodiments, a computer-readable storage medium is disclosed, wherein a plurality of instructions are stored, the instructions being adapted to be loaded by a processor of a terminal device and executed by the model predictive control method for a dual-input single-phase three-level photovoltaic inverter described in Embodiment 1.
[0064] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.
Claims
1. A model predictive control method for a dual-input single-phase three-level photovoltaic inverter, characterized in that, include: Under the condition of voltage imbalance at the midpoint, the imbalance degree k is defined. The maximum and minimum voltage values are determined based on the voltages of the upper and lower capacitors on the DC side. The spatial vector diagram is divided into six sectors based on the maximum and minimum voltage values, and two candidate vectors are determined in each sector. The candidate vectors are determined based on the value of the imbalance degree. The two candidate vectors in each sector form a symmetrical three-segment sequence. Calculate the reference voltage for the inverter output line voltage, determine the sector based on the reference voltage value, determine the candidate vector based on the unbalance value, sort the vectors, calculate the duty cycle of the two candidate vectors respectively, and generate a PWM signal to control the state of each switch based on the duty cycle.
2. The model predictive control method of a dual-input single-phase three-level photovoltaic inverter according to claim 1, wherein, The imbalance is defined as the ratio of the voltages of the upper and lower capacitors on the DC side.
3. The model predictive control method of a dual-input single-phase three-level photovoltaic inverter according to claim 1, wherein, Determining a maximum and minimum value of a voltage on the basis of the voltage of the upper and lower capacitors on the DC side and minimum values , in particular: ； wherein, and Vup and Vdown are the voltages of the upper and lower capacitors on the DC side, respectively.
4. The model predictive control method of a three-level single-phase dual-input photovoltaic inverter according to claim 3, wherein, The spatial vector diagram is divided into six sectors based on the maximum and minimum voltage values, specifically: First sector S1 : u max u u max u min Second sector S2: u min u u max Third sector S3: 0< u < u min ; Fourth sector S4: -u min u <0; Fifth sector S5: -u max u -u min Sixth sector S6: -u max - u min < u u max ; wherein, u Vref is a reference voltage for the inverter output line voltage.
5. The model predictive control method of a dual-input single-phase three-level photovoltaic inverter according to claim 1, wherein, The candidate vectors within each sector are specifically: The candidate vectors of the first sector S1 are: PN, PO when k >1; PN, ON when k <1. The candidate vectors of the second sector S2 are: when k 1, the candidate vectors are PO, ON; when k <1, the candidate vectors are: ON, PO; The candidate vector of the third sector S3 is: when k >1, the candidate vector is ON, OO; when k <1, the candidate vector is: PO, OO; The candidate vector for sector S4 is: when k When >1, the candidate vectors are OO and NO; when k When <1, the candidate vectors are: OO and OP; The candidate vectors of the fifth sector S5 are: when k 1, the candidate vectors are NO, OP; when k <1, the candidate vectors are: OP, NO; The candidate vectors of the sixth sector S6 are: when k >1, the candidate vectors are NP, OP; when k <1, the candidate vectors are: NP, NO.
6. The model predictive control method of a three-level single-phase dual-input photovoltaic inverter according to claim 1, wherein, Computing a reference voltage In particular: ； ； in, T s Sampling time, Let k be the output current at time k. , , , These are the reference currents at times k-2, k-1, k, and k+1, respectively. R is the equivalent load on the output side, and L is the filter capacitor.
7. The model predictive control method for a dual-input single-phase three-level photovoltaic inverter as described in claim 1, characterized in that, Calculate the duty cycle of the two candidate vectors separately, as follows: When the reference voltage belongs to the first sector, the duty cycles of the two candidate vectors are as follows: ； When the reference voltage belongs to the second sector, the duty cycles of the two candidate vectors are as follows: ； When the reference voltage belongs to the third sector, the duty cycles of the two candidate vectors are as follows: ； When the reference voltage belongs to the fourth sector, the duty cycles of the two candidate vectors are as follows: ； When the reference voltage belongs to the fifth sector, the duty cycles of the two candidate vectors are as follows: ； When the reference voltage belongs to the sixth sector, the duty cycles of the two candidate vectors are as follows: ； in, u This is the reference voltage for the inverter output line voltage. d Left indicates that the output voltage is less than u The duty cycle corresponding to the candidate vector, d The right side indicates that the output voltage is greater than u The duty cycle corresponding to the candidate vector.
8. A model predictive control system for a dual-input single-phase three-level photovoltaic inverter, characterized in that, include: The sector division module is configured to define the unbalance degree k under the midpoint voltage unbalance condition, determine the maximum and minimum voltage values based on the voltages of the upper and lower capacitors on the DC side, divide the spatial vector map into six sectors based on the maximum and minimum voltage values, and determine two candidate vectors in each sector. The candidate vectors are determined based on the value of the unbalance degree. The two candidate vectors in each sector form a symmetrical three-segment sequence. The control module is configured to calculate the reference voltage of the inverter output line voltage, determine the sector based on the value of the reference voltage, determine the candidate vector based on the value of the unbalance, sort the vectors, calculate the duty cycle of two candidate vectors respectively, and generate PWM signals to control the state of each switch based on the duty cycle.
9. A terminal device comprising a processor and a memory, the processor configured to implement instructions; the memory configured to store a plurality of instructions, the terminal device characterized by, The instructions are adapted to be loaded by a processor and executed by the dual-input single-phase three-level photovoltaic inverter model predictive control method according to any one of claims 1-7.
10. A computer-readable storage medium having stored therein a plurality of instructions, wherein the instructions, when executed by a processor, cause the processor to perform operations comprising: The instructions are adapted to be loaded by the processor of the terminal device and executed by the model predictive control method for a dual-input single-phase three-level photovoltaic inverter as described in any one of claims 1-7.