ASI bus master station module

Abstract

The invention provides an ASI bus master station module which comprises an ASI master station, the ASI master station comprises a host system and an AS1 master station hardware structure, and the host system communicates with the AS1 master station hardware structure through a host interface; the hardware structure of the AS1 master station comprises an Anybus chip, two stm32 single-chip microcomputers, an ASI4U chip and an internal decoupling circuit. The method has the beneficial effects that the ASI master station is simple in wiring, and due to the two-wire system wiring mode of the ASI network, the wiring work is simplified, the maintenance difficulty is reduced, and the reliability of the system is improved. The ASI master station adopts a serial bidirectional digital communication mode, so that data transmission between the master station and the sensor and between the master station and the actuator is more efficient, the communication mode is high in speed and high in data accuracy, and the real-time performance and reliability of the whole system are ensured.

Description

Technical Field

[0001] This invention belongs to the field of ASI bus, and in particular relates to an ASI bus master module. Background Technology

[0002] The bus master module is indeed a core component in an automated control system, acting as the "commander" of the entire system. It coordinates communication and data management across the network and is used as a control unit in industrial automation control. Currently, the main problems with bus master modules are as follows:

[0003] The main station has cumbersome wiring, is difficult to maintain, and has low system reliability. Data transmission between the main station and sensors / actuators is inefficient; this communication method is not only slow but also has low data accuracy, failing to ensure the real-time performance and reliability of the entire system. It lacks robust equipment monitoring and management functions, making real-time monitoring and management of equipment and the operational status of sensors and actuators impossible, resulting in a high failure rate. It does not support various network configurations, making it impossible to easily adjust the network topology according to actual needs, and thus unable to adapt the system to different application scenarios and changing requirements. It cannot meet the requirements for production line switching, expansion, and upgrades. It cannot reduce system installation and maintenance costs. Furthermore, it cannot achieve seamless connection and communication between devices from different manufacturers, hindering system integration and failing to improve overall system performance and compatibility. Summary of the Invention

[0004] In view of this, the present invention aims to provide an ASI bus master module to solve at least one of the problems existing in the prior art.

[0005] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0006] An ASI bus master module includes an ASI master station, which comprises a host system and an AS1 master station hardware structure. The host system and the AS1 master station hardware structure communicate via a host interface. The AS1 master station hardware structure includes an Anybus chip, two STM32 microcontrollers, an ASI4U chip, and an internal decoupling circuit. The Anybus chip communicates with the host system via the host interface and also communicates with one STM32 microcontroller. This STM32 microcontroller communicates with the other STM32 microcontroller via an SPI interface. The other STM32 microcontroller also communicates with the ASI4U chip, enabling bidirectional serial data transmission. The ASI4U chip is connected to the AS1 cable of the AS1 slave station via the internal decoupling circuit.

[0007] Furthermore, the Anybus chip and the two STM32 microcontrollers form the transmission control layer. The transmission control layer can package data into master station request messages and transmit data to the ASI4U chip through a serial interface; and receive slave station response messages transmitted by the ASI4U chip.

[0008] Furthermore, the message structure of the master station request message is 14 bits, including 1 start bit, 1 control bit, 5 address bits, 5 information bits, 1 parity check bit and 1 end bit;

[0009] When the control bit is 1, a command instruction is transmitted; when the control bit is 0, a data instruction is transmitted. The address bit is used to indicate the address of the slave station that the ASI master station wants to access.

[0010] The highest bit of the information bits is used to distinguish between write parameter instructions and data exchange instructions. When the highest bit is 1, it is a write parameter instruction; when the highest bit is 0, it is a data exchange instruction.

[0011] The parity bit is used for even parity checks in ASI master request and slave response messages.

[0012] Furthermore, the message structure of the slave station response message includes a start bit, an even parity bit, an end bit, and four information bits.

[0013] Furthermore, the operation control between the ASI master station and the ASI slave station is divided into an initialization phase, a startup phase, and a periodic normal operation phase, which are executed sequentially, with different control tasks performed in each phase.

[0014] The first stage is the initialization phase. The initialization operation is performed offline. During the initialization phase, the ASI master station controls the ASI slave station to perform a reset operation. During the initialization phase, the ASI master station can connect to all slave station addresses of the host system.

[0015] After the offline phase ends, the startup phase begins, which is divided into a detection phase and an activation phase. During the startup phase, the ASI master station first checks whether any slave stations have joined online by reading their IDs and using the I / O slave station configuration commands. If a slave station has joined, its address will be marked. The master station will access all slave station addresses. If a slave address is marked, the activation phase begins; otherwise, the ASI master station remains in the detection phase. Once in the activation phase, the ASI master station will activate the marked ASI slave stations according to the ASI master station operation mode selected by the host system.

[0016] Finally, the ASI master station enters the periodic normal operation phase, which is divided into three sub-phases: the data exchange phase, during which the ASI master station will exchange data with all ASI slave stations in the active slave station list.

[0017] During the management phase, the ASI master station executes instructions issued by the host system. If no instructions are received from the host system, the ASI master station will skip this phase.

[0018] During the internal operation phase, the ASI master station polls all slave addresses to obtain the current status of the slaves. If a correct slave response message is received, the master station will read the slave's configuration information. If a new slave joins during the internal operation phase, the ASI master station will establish communication with it and exchange data with it in subsequent ASI cycles.

[0019] Furthermore, the ASI master station has two operating modes: protection mode and protection mode. In protection mode, only slave stations configured by the host system will be activated. If the ASI slave station is detected through the offline operation page of the gateway without being configured by the host system, the slave station address and slave station configuration detected by this operation will be directly written into the slave station list and slave station configuration data, and the configuration data and list will be stored in non-volatile storage.

[0020] In configuration mode, an ASI slave will be activated as long as it is marked; successfully activated slaves will be written to the active slave list; in configuration mode, an ASI slave will be activated as long as the slave address bit in the ASI slave list is 1.

[0021] The ASI master station will send a write parameter command to the slave address that needs to be activated to activate the ASI slave. If the ASI master station receives a response message from the ASI slave, the ASI master station will continue to send a data exchange command to the slave.

[0022] If the ASI master receives a correct response message from the ASI slave to the data exchange command, the address of that ASI slave will be written into the list of active slaves.

[0023] If the ASI master station does not receive a correct response message from the ASI slave station for the write parameter command, the ASI master station will not continue to send data exchange messages to the slave station.

[0024] If the ASI master station does not receive a correct response message from the ASI slave station for the data exchange command, the ASI master station will directly remove the ASI slave station from the slave station list and delete the configuration information of the ASI slave station from the CDI code.

[0025] Furthermore, in protection mode, if a slave address in the slave list is set to 1, the ASI master station will compare the slave configuration data of that address with the configuration information in the CDI code. If the configurations are exactly the same, the slave at that address will be activated. If the configurations are different, the slave at that address will be marked as having misconfigured information, and the error message of misconfigured information will be reported to the PLC.

[0026] Furthermore, the ASI4U chip can modulate and encode current pulse signals from the digital signals of the STM32 microcontroller. The internal decoupling circuit modulates the current pulse signals into ASI pulse signals. During signal modulation, Manchester encoding is performed within the STM32 microcontroller. After completing Manchester encoding, the STM32 microcontroller serially sends the encoded sequence to the ASI4U chip. The ASI4U chip's transmitter converts the Manchester encoded signal into current pulses and sends them to the ASI cable. These current pulses are then modulated into ASI voltage pulses by the internal decoupling circuit and transmitted over the ASI cable. The ASI4U chip's receiver receives the response pulses and divides them into ASI+ and ASI parts. The ASI4U chip reassembles the positive and negative pulses into a Manchester encoded sequence and then serially sends it to the STM32 microcontroller. The STM32 microcontroller decodes the encoded sequence to obtain the corresponding message from the slave station.

[0027] Compared with existing technologies, the ASI bus master module of the present invention has the following advantages:

[0028] (1) The ASI bus master module described in this invention has simple ASI master station wiring. Because of the two-wire wiring mode of the ASI network, the wiring work is simplified, the maintenance difficulty is reduced, and the reliability of the system is improved. The ASI master station adopts a serial bidirectional digital communication method, which makes the data transmission between the master station and the sensors and actuators more efficient. This communication method is not only fast, but also has high data accuracy, ensuring the real-time performance and reliability of the entire system.

[0029] (2) The ASI bus master module described in this invention has powerful device monitoring and management functions, enabling real-time monitoring and management of devices. It can monitor the working status of sensors and actuators in real time and promptly detect and handle abnormal situations. This helps improve the stability and security of the system and reduce the failure rate.

[0030] (3) The ASI bus master module described in this invention supports multiple network configurations and can easily adjust the network topology according to actual needs, providing users with great flexibility and enabling the system to adapt to different application scenarios and changing requirements.

[0031] (4) The ASI bus master module described in this invention, due to the unique polling mechanism of the ASI master station, can allow the addition of new devices without affecting the operation of other devices, thus meeting the requirements of production line switching, expansion and upgrading.

[0032] (5) The ASI bus master module described in this invention significantly reduces the installation and maintenance costs of the system by reducing cabling requirements and providing a unified communication protocol.

[0033] (6) The ASI bus master module described in this invention uses a standardized communication protocol, which enables seamless connection and communication between devices from different manufacturers. This helps to reduce the integration difficulty of the system and improve the overall performance and compatibility of the system. Attached Figure Description

[0034] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0035] Figure 1 This is a schematic diagram of the workflow of the ASI master station according to an embodiment of the present invention;

[0036] Figure 2 This is a schematic diagram of the ASI master station according to an embodiment of the present invention;

[0037] Figure 3 This is a schematic diagram of the AS1 master station hardware structure according to an embodiment of the present invention;

[0038] Figure 4 This is a schematic diagram of the message structure of the master station request message according to an embodiment of the present invention;

[0039] Figure 5 This is a schematic diagram of the message structure of the slave station response message according to an embodiment of the present invention;

[0040] Figure 6 This is a schematic diagram of the ASI signal modulation process according to an embodiment of the present invention. Detailed Implementation

[0041] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0042] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0043] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0044] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0045] It should be noted that the ASI bus master module is a control unit in the ASI (Actuator Sensor Interface) network used in industrial automation control. The ASI bus is a low-level network monitoring system for fieldbuses, specifically designed to provide a simple, economical, and efficient connection between sensors and actuators. The gateway in the ASI master allows the ASI bus to connect to various fieldbuses, such as Profinet and Ethercat. The ASI master is responsible for coordinating data exchange between field actuators / sensors and the upper-level bus.

[0046] like Figures 1 to 6As shown, the ASI bus master module includes an ASI master station, which has the following structure: a host system and an AS1 master station hardware structure. The host system and the AS1 master station hardware structure communicate through a host interface. The AS1 master station hardware structure includes an Anybus chip, two STM32 microcontrollers, an ASI4U chip, and an internal decoupling circuit. The Anybus chip communicates with the host system through the host interface and also communicates with one STM32 microcontroller. This STM32 microcontroller communicates with the other STM32 microcontroller through an SPI interface. The other STM32 microcontroller can also transmit bidirectional serial data with the ASI4U chip. The ASI4U chip is connected to the AS1 cable of the AS1 slave station through the internal decoupling circuit.

[0047] In this embodiment, the master station supports scalability of slave station addresses, meaning it can be expanded from connecting 31 slave stations to connecting up to 62 slave stations. The ASI master station communicates with different slave stations (A / B slave stations) with the same station number through the select bits of the master station message. Figure 2 and Figure 3 As shown, the host system is the PLC. The ASI master station uses an Anybus chip to integrate an internal gateway, which allows the ASI master station to exchange data with the PLC via the network port.

[0048] The ASI master station uses two STM32 microcontrollers, the STM32F407 and STM32F411, to implement the master station's execution and transmission control functions. The ASI-specific chip ASI4U is used to modulate and encode the microcontroller's digital signals into current pulse signals. The ASI master station also integrates internal decoupling, which modulates the current pulses into ASI pulse signals conforming to the standard.

[0049] The STM32F407 chip acts as a bridge, sending data and instructions from the PLC to the STM32F411 chip via the SPI interface. It receives and processes the data uploaded by the STM32F411 and then uploads the data back to the PLC, thus realizing the host interface function of the ASI master station.

[0050] The STM32F411 chip controls the ASI slave stations according to the aforementioned ASI master station workflow. Simultaneously, the STM32F411 chip also handles the transmission control functions of the ASI master station.

[0051] In a preferred embodiment of the present invention, the Anybus chip and the two STM32 microcontrollers constitute a transmission control layer. The transmission control layer can package data into master station request messages, transmit data to the ASI4U chip through a serial interface, and receive slave station response messages transmitted by the ASI4U chip.

[0052] The message structure of the master station request message is 14 bits, including 1 start bit, 1 control bit, 5 address bits, 5 information bits, 1 parity bit and 1 end bit;

[0053] When the control bit is 1, a command instruction is transmitted; when the control bit is 0, a data instruction is transmitted. The address bit is used to indicate the address of the slave station that the ASI master station wants to access.

[0054] The highest bit of the information bits is used to distinguish between write parameter instructions and data exchange instructions. When the highest bit is 1, it is a write parameter instruction; when the highest bit is 0, it is a data exchange instruction.

[0055] The parity bit is used for even parity checks in ASI master request and slave response messages.

[0056] In this embodiment, the ASI master station's transmission control layer first packages the data into a master station request message that conforms to the specifications, such as... Figure 2 As shown, the master station request message is encoded into Manchester II encoded data and then transmitted to the ASI4U chip via a serial interface. The system also receives slave response messages from the ASI4U chip, checks the slave response messages, stores the correct slave response information bits in the corresponding data map, and uploads it to the PLC.

[0057] Figure 4 This demonstrates the message structure of an ASI master request message. An ASI master request message is 14 bits long, including a 1-bit start bit (always 0), a 1-bit control bit (a 1 for command instructions like reset, broadcast, read I / O configuration, etc., and a 0 for data instructions like write parameters and data exchange), a 5-bit address bit (showing the slave address the master wants to access), a 5-bit information bit (the highest bit distinguishes between write parameter and data exchange instructions; a 1 for write parameter and a 0 for data exchange), and the remaining 4 bits show the data the master wants to send to the slave, a 1-bit parity bit (ASI master request and slave response messages use even parity), and a 1-bit stop bit (always 1).

[0058] In a preferred embodiment of the present invention, the message structure of the slave station response message includes a start bit, an even parity bit, an end bit, and four information bits.

[0059] In this embodiment, Figure 5This demonstrates the message structure of an ASI slave response message. Similar to the ASI master request message, the ASI slave response message also includes a start bit (always 0), a parity bit (always even), and a stop bit (always 1). The slave response message contains only 4 bits of information, which are the data the slave wants to transmit to the master. The master determines the correctness of the slave's response message by checking the start bit, stop bit, and parity bit.

[0060] The ASI4U chip acts as a signal transceiver for the ASI master station, modulating digital signals into transmitted signal current pulses. The current pulse signals are then modulated into compliant ASI pulse signals by a dedicated decoupling circuit for the ASI bus. Conversely, the ASI pulse signals can also be demodulated and reconstructed into digital signals.

[0061] In a preferred embodiment of the present invention, the operation control between the ASI master station and the ASI slave station is divided into several stages, and different control tasks are performed in each stage.

[0062] The first stage is the initialization phase, which is performed offline. During this phase, the ASI master station mainly controls the ASI slave stations to perform reset operations. During this phase, the ASI master station can connect to all slave addresses of the ASI system, namely 0-31A and 1B-31B, to send master station request commands.

[0063] After the offline phase ends, the startup phase begins. In this phase, the master station first checks for any newly joined slave stations by reading their IDs and using I / O configuration commands. If a slave station joins, its address is marked. After the master station accesses all slave addresses (0-31A, 1B-31B), if any slave address is marked, it enters the activation phase; otherwise, the ASI master station remains in the detection phase. Upon entering the activation phase, the ASI master station activates the marked slave stations according to the master station operation mode selected by the PLC.

[0064] The ASI master station has two operating modes: Protection Mode and Protection Mode. In Protection Mode, only slave stations configured by the PLC are activated. Users can set the desired slave address to 1 in the slave list (LPS) of the master station via the PLC, and then write the corresponding slave configuration information (i.e., IO configuration, ID encoding, ID1 encoding, and ID2 encoding) into the configuration data (PCD) of the configured slave. This allows users to pre-set the slave addresses and types they want to add to the ASI bus. Alternatively, users can detect slaves through the Quick Setup page of the gateway's offline operation interface. The slave addresses and configurations detected through this operation are directly written to the LPS and PCD, and the configuration data and list are stored in non-volatile memory. In protection mode, if the slave address in LDS is set to 1, the master station will compare the configuration information in the PCD and CDI of that address. If the configurations are exactly the same, the slave at that address will be activated. If the configurations are different, the slave at that address will be marked as having misconfigured information, and the error message of misconfigured information will be reported to the PLC.

[0065] In configuration mode, a slave is activated whenever it is marked. Successfully activated slaves are added to the active slave list. In configuration mode, a slave is activated as long as the slave address bit in the LDS is 1.

[0066] The master station activates the slave by sending a write parameter command to the slave address that needs to be activated. If the master station receives a response message from the slave, it will continue to send a data exchange command to the slave. If the master station receives a correct response message from the slave to the data exchange command, the slave address will be added to the Active Slave List (LAS). If the master station does not receive a correct response message from the slave to the write parameter command, it will not continue to send data exchange messages to the slave. If the master station does not receive a correct response message from the slave to the data exchange command, it will directly delete the slave from the LDS and remove the slave's configuration information from the CDI.

[0067] In this embodiment, the master station detects the presence of a slave on the ASI bus by sending commands containing the slave address, read the IO configuration, and read the ID code. If the master station receives correct response messages from the slave for both commands, it continues to send commands to read the ID1 and ID2 codes to the slave at that address. If correct response messages are received from the slave for both commands, the slave at that address is added to the detected slave list (LDS), and the corresponding slave configuration information is written to the slave configuration data map (CDI). The master station then continues to access the next slave address in the same manner. If the master station does not receive correct response messages from the slave for both the read IO configuration and read ID code commands, it will send the same two commands to the next slave address to access it. After the master station has continuously accessed all slave addresses (i.e., 0-31A, 1B-31B) in this phase, if a slave is written into the LDS list, the master station enters the next phase, the activation phase. If the LDS list is empty, the master station remains in the scanning phase, continuously polling each slave address in the manner described above to detect whether a slave exists on the ASI bus, until a slave joins the ASI bus.

[0068] Finally, the ASI master station enters the periodic normal operation phase, which is divided into three sub-phases. The data exchange phase involves the ASI master station exchanging data with all slave stations in the active slave station list. Due to the ASI cycle limitation, the ASI master station can only exchange data with 31 slave stations per ASI cycle (the master station exchanges data with slave stations by sending data exchange instructions; the data to be exchanged is encapsulated in the master station's request message and the slave station's response message). Therefore, if there are two slave stations, A and B, with the same address online, these two slave stations will complete their data exchange with the ASI master station in different ASI cycles.

[0069] During the management phase, the ASI master station primarily executes instructions issued by the PLC, such as retrieving configuration information from a slave station, changing the slave station's address, and writing parameters to the slave station. If no instructions are received from the PLC, the ASI master station will skip this phase.

[0070] During the internal operation phase, the ASI master station polls all slave addresses to obtain the current status of each slave. If a correct slave response message is received (the master station checks the message structure upon receiving it; if the structure is correct, the master station considers it a correct response message; the slave response message structure is described below), the master station reads the slave's configuration information. If a new slave joins during this phase, the master station establishes communication with it and exchanges data with it in subsequent ASI cycles.

[0071] In addition, to enhance the compatibility of the ASI master station, the ASI master station integrates different composite transaction types to realize periodic data exchange with different types of slave stations, such as S-7.3 (analog slave), S-7.A.9 (analog slave with scalable address) and S-7.A.7 (4I / 4O slave with scalable address).

[0072] In a preferred embodiment of the present invention, the modulation of the ASI signal includes Manchester encoding performed in the STM32F411. After completing the Manchester encoding, the STM32F411 serially sends the encoded sequence to the ASI4U chip. The transmitter of the ASI4U chip converts the Manchester encoded signal into a current pulse and sends it to the ASI line. After passing through the ASI decoupling circuit, the current pulse is modulated into an ASI voltage pulse similar to Sin2 and transmitted on the ASI cable. The response pulse received by the receiver of the ASI4U chip is differentially divided into two parts: ASI+ and ASI. The ASI4U chip reassembles the positive and negative pulses into a Manchester encoded sequence and then serially sends it to the STM32F411. The STM32F411 decodes the encoded sequence to obtain the corresponding message from the slave station.

[0073] The ASI bus master module can solve:

[0074] ASI master station cabling is simple because the two-wire wiring mode of the ASI network simplifies cabling work, reduces maintenance difficulty, and improves system reliability.

[0075] The ASI master station uses a serial bidirectional digital communication method, which makes the data transmission between the master station and sensors and actuators more efficient. This communication method is not only fast, but also has high data accuracy, ensuring the real-time performance and reliability of the entire system.

[0076] The ASI master station boasts powerful equipment monitoring and management capabilities, enabling real-time monitoring and management of equipment. It can monitor the operational status of sensors and actuators in real time, promptly identifying and addressing anomalies. This helps improve system stability and security, and reduces the failure rate.

[0077] The ASI master station supports multiple network configurations, allowing users to easily adjust the network topology according to actual needs, providing great flexibility and enabling the system to adapt to different application scenarios and changing requirements.

[0078] Thanks to the unique polling mechanism of the ASI master station, new equipment can be added without affecting the operation of other equipment, meeting the requirements for production line switching, expansion, and upgrades.

[0079] ASI master stations significantly reduce system installation and maintenance costs by minimizing cabling requirements and providing a unified communication protocol.

[0080] The ASI master station uses a standardized communication protocol, which enables seamless connection and communication between devices from different manufacturers. This helps reduce the difficulty of system integration and improves the overall system performance and compatibility.

[0081] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An ASI bus master module, characterized in that: The system includes an ASI master station, which comprises a host system and an AS1 master station hardware structure. The host system communicates with the AS1 master station hardware structure via a host interface. The AS1 master station hardware structure includes an Anybus chip, two STM32 microcontrollers, an ASI4U chip, and an internal decoupling circuit. The Anybus chip communicates with the host system via the host interface and also communicates with one STM32 microcontroller. This STM32 microcontroller communicates with the other STM32 microcontroller via an SPI interface. The other STM32 microcontroller can also transmit bidirectional serial data with the ASI4U chip. The ASI4U chip is connected to the AS1 cable of the AS1 slave station via the internal decoupling circuit.

2. The ASI bus master module according to claim 1, characterized in that: The Anybus chip and two STM32 microcontrollers form the transmission control layer. The transmission control layer can package data into master station request messages and transmit data to the ASI4U chip through a serial interface; it also receives slave station response messages transmitted by the ASI4U chip.

3. The ASI bus master module of claim 2, wherein: The message structure of the master station request message is 14 bits, including 1 start bit, 1 control bit, 5 address bits, 5 information bits, 1 parity bit and 1 end bit. When the control bit is 1, a command instruction is transmitted; when the control bit is 0, a data instruction is transmitted. The address bit is used to indicate the address of the slave station that the ASI master station wants to access. The highest bit of the information bits is used to distinguish between write parameter instructions and data exchange instructions. When the highest bit is 1, it is a write parameter instruction; when the highest bit is 0, it is a data exchange instruction. The parity bit is used for even parity checks in ASI master request and slave response messages.

4. The ASI bus master module of claim 2, wherein: The message structure of the slave station response message includes a start bit, an even parity bit, an end bit, and four information bits.

5. The ASI bus master module of claim 2, wherein: The operation control between the ASI master station and the ASI slave station is divided into an initialization phase, a startup phase, and a periodic normal operation phase, which are executed sequentially. Different control tasks are performed in each phase. The first stage is the initialization phase. The initialization operation is performed offline. During the initialization phase, the ASI master station controls the ASI slave station to perform a reset operation. During the initialization phase, the ASI master station can connect to all slave station addresses of the host system. After the offline phase ends, the startup phase begins. The startup phase is divided into the detection phase and the activation phase. During the startup phase, the ASI master station first checks whether any slave stations have joined online by reading the ID and IO slave station configuration commands. If a slave station has joined, its address will be marked. The master station will then access all slave station addresses. If a slave address is marked, the activation phase begins; otherwise, the ASI master station remains in the detection phase. Once the activation phase begins, the ASI master station will activate the marked ASI slave stations according to the ASI master station operation mode selected by the host system. Finally, the ASI master station enters the periodic normal operation phase, which is divided into three sub-phases: the data exchange phase, during which the ASI master station will exchange data with all ASI slave stations in the active slave station list. During the management phase, the ASI master station executes instructions issued by the host system. If no instructions are received from the host system, the ASI master station will skip this phase. During the internal operation phase, the ASI master station polls all slave addresses to obtain the current status of the slaves. If a correct slave response message is received, the master station will read the slave's configuration information. If a new slave joins during the internal operation phase, the ASI master station will establish communication with it and exchange data with it in subsequent ASI cycles.

6. The ASI bus master module of claim 5, wherein: The ASI master station has two operating modes: protection mode and protection mode. In protection mode, only slave stations configured by the host system will be activated. If the ASI slave station is detected through the offline operation page of the gateway without being configured by the host system, the slave station address and slave station configuration detected by this operation will be directly written into the slave station list and slave station configuration data, and the configuration data and list will be stored in non-volatile storage. In configuration mode, an ASI slave will be activated as long as it is marked. Successfully activated slaves will be added to the list of active slaves; In configuration mode, an ASI slave will be activated as long as the slave address bit in the ASI slave list is 1. The ASI master station will send a write parameter instruction to the slave address that needs to be activated to activate the ASI slave. If the ASI master station receives a response message from the ASI slave, the ASI master station will continue to send a data exchange instruction to the slave. If the ASI master receives a correct response message from the ASI slave to the data exchange command, the address of that ASI slave will be written into the list of active slaves. If the ASI master station does not receive a correct response message from the ASI slave station for the write parameter command, the ASI master station will not continue to send data exchange messages to the slave station. If the ASI master station does not receive a correct response message from the ASI slave station for the data exchange command, the ASI master station will directly remove the ASI slave station from the slave station list and delete the configuration information of the ASI slave station from the CDI code.

7. The ASI bus master module of claim 5, wherein: In protected mode, if a slave address in the slave list is set to 1, the ASI master station will compare the slave configuration data of that address with the configuration information in the CDI code. If the configurations are exactly the same, the slave at that address will be activated. If the configurations are different, the slave at that address will be marked as having misconfigured information, and the error message of misconfigured information will be reported to the PLC.

8. The ASI bus master module of claim 2, wherein: The ASI4U chip can modulate and encode digital signals from an STM32 microcontroller into current pulse signals. The internal decoupling circuit modulates the current pulse signals into ASI pulse signals. During signal modulation, Manchester encoding is performed in the STM32 microcontroller. After the STM32 microcontroller completes the Manchester encoding, it serially sends the encoded sequence to the ASI4U chip. The transmitter of the ASI4U chip converts the Manchester encoded signal into current pulses and sends them to the ASI cable. After passing through the internal decoupling circuit, the current pulses are modulated into ASI voltage pulses and transmitted on the ASI cable. The ASI4U chip's receiver receives a response pulse, which is then divided into two parts: ASI+ and ASI. The ASI4U chip reassembles the positive and negative pulses into a Manchester encoded sequence and sends it serially to the STM32 microcontroller. The STM32 microcontroller decodes the encoded sequence to obtain the corresponding message from the slave station.

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