Method for reducing surface roughness of two-inch silicon wafer
By treating silicon wafers with coarse and fine etching methods under ultrasonic conditions, the problem of difficult surface roughness reduction of silicon wafers in existing technologies has been solved, achieving low-cost and high-efficiency surface smoothing and improving the performance and production efficiency of photodetectors.
Patent Information
- Application Number
- CN202511782772.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-30
- Publication Date
- 2026-04-17
AI Technical Summary
Existing technologies are unable to effectively reduce the surface roughness of silicon wafers in visible light photodetectors, which affects the device responsivity and responsivity non-uniformity. Furthermore, existing methods are costly, require expensive equipment, or are difficult to mass-produce.
A combination of coarse and fine etching under ultrasonic conditions was adopted. A mixed solution of HNO3, HF and CH3COOH was used to treat silicon wafers. Ultrasonic treatment ensured uniform contact between the etching solution and the wafer surface, thereby reducing surface roughness.
This technology reduces the surface roughness of silicon wafers to 0.1µm, simplifies process operations, lowers costs, makes it suitable for mass production, and improves light energy utilization and responsivity uniformity, supporting high-precision transfer of photolithography patterns and the miniaturization of devices.
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Figure CN121888879A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of photoelectric detector manufacturing technology, and relates to a method for reducing the surface roughness of a two-inch silicon wafer, specifically a method for reducing the surface roughness of a two-inch silicon wafer by using ultrasonic isotropic wet etching. Background Technology
[0002] Visible light detectors, due to their fast response speed and high sensitivity, are widely used in fields such as photoelectric tracking and deep-sea exploration. Among them, visible light focal plane array photodetectors can further achieve long-distance, high-precision 3D detection capabilities. In platform environmental perception, they can provide 3D terrain data at a distance of several kilometers, with high frame rates and centimeter-level accuracy, enabling high-speed, precise, and numerical mapping capabilities. In active imaging guidance, they can achieve active detection of faint and concealed targets tens of kilometers away based on 3D shape data, supplementing existing planar image detection capabilities. In long-distance space target detection, they can achieve high-precision 3D shape and attitude measurement of small targets hundreds of kilometers away. In air-to-ground / space-to-ground observation, they can improve mapping capabilities to centimeter-level accuracy.
[0003] In the device structure design of photodiodes in photodetectors, the absorption of light by the ohmic contact layer on the light-gathering surface causes light intensity attenuation, which has a negligible contribution to the photoelectric response but a negative effect on the device responsivity. For photodetectors in the visible light band, due to their large absorption coefficient, the surface roughness of the ohmic contact layer on the light-gathering surface directly affects the device's responsivity and responsivity non-uniformity, among other performance parameters.
[0004] In the fabrication of photodiodes in the visible light band, the photolithography process has extremely high requirements for the surface condition of silicon wafers. To achieve high-precision transfer of patterns, the surface grain size and roughness of the wafers should be as small as possible.
[0005] Currently, methods for reducing wafer surface roughness mainly include chemical mechanical polishing (CMP), plasma etching, surface coating, and wet etching. CMP primarily utilizes the chemical components in the polishing slurry to react chemically with the silicon wafer surface, while the abrasive particles in the slurry continue to undergo mechanical friction with the silicon wafer surface, thereby removing the surface layer of the silicon wafer. Generally, CMP is mainly used to planarize silicon wafers, achieving a TTV of ~5µm, but fine processing of the wafer surface is quite difficult. Plasma etching mainly treats the wafer surface with gas plasma to improve surface flatness and reduce surface roughness. This process can control surface roughness at the submicron level, but the material removal rate is low, and it is very easy to introduce lattice damage, causing an increase in device dark current. Surface coating technology uses rotating optical resin to fill microscopic defects, followed by dry etching to reduce wafer surface roughness. This method can reduce local surface roughness of the wafer to tens of nanometers, but the equipment required is expensive, the process is complex, and it is difficult to achieve mass production.
[0006] Wet etching technology mainly uses a chemical etching solution (HNA mixture, i.e., nitric acid, hydrofluoric acid, and acetic acid mixed in a certain volume ratio) to perform isotropic etching on silicon wafers. Nitric acid is responsible for oxidizing silicon, and hydrofluoric acid is responsible for removing the oxide layer. This process is simple, enables the mass production of wafers, and can quickly remove the damaged layer on the wafer surface, significantly reducing surface roughness. Summary of the Invention
[0007] (a) Purpose of the invention The purpose of this invention is to reduce the surface roughness of silicon wafers by treating the surface through a combination of coarse etching, fine etching, and ultrasonication. Coarse etching removes the damaged layer on the silicon wafer surface, while fine etching performs micro-treatment on the wafer surface. Both etching solutions are based on a mixture of HF and HNO3 (fuming nitric acid) with the addition of a CH3COOH buffer solution to stabilize the etching rate. Simultaneously, the etching solution system is ultrasonically treated to ensure uniform contact between the etching solution and the silicon wafer surface, achieving surface treatment and reducing surface roughness. This provides an isotropic wet etching method for reducing the surface roughness of two-inch silicon wafers.
[0008] (II) Technical Solution To address the aforementioned technical problems, this invention provides a method for reducing the surface roughness of a two-inch silicon wafer, comprising the following steps: Step 001: Prepare coarse and fine etching solutions, and allow them to stand after preparation; place both etching solutions into an ultrasonic device for later use.
[0009] Step 002: Bond the two-inch silicon wafer to the two-inch sapphire substrate to protect the non-etched side.
[0010] Step 003: The bonded wafer is first coarsely etched under ultrasonic conditions, followed by fine etching.
[0011] Step 004: Debond the wafer and remove the two-inch silicon wafer.
[0012] Furthermore, the volume ratio of chemical reagents in the coarse etching solution is HNO3:HF:CH3COOH = 8:1:2; the volume ratio of chemical reagents in the fine etching solution is HNO3:HF:CH3COOH = 3:8:20. The concentrations of the chemical reagents used in both etching solutions are the same: HNO3: 90%; HF: 40%; CH3COOH: 99.8%. In step 001, a crude etching solution is prepared in a beaker made of polytetrafluoroethylene. The specific ratio of the etching solution is HNO3:HF:CH3COOH=160mL:20mL:40mL. The solution is stirred evenly with a plastic rod and left to stand for 24 hours. Prepare a fine etching solution in a polytetrafluoroethylene beaker with a specific ratio of HNO3:HF:CH3COOH = 30mL:80mL:200mL. Stir well with a plastic rod and let stand for 24 hours. The two corrosive solutions, after being left to stand, are placed into the ultrasonic equipment for use.
[0013] In step 002, a two-inch N-type single-crystal silicon wafer with a resistivity of ~1000Ω was selected as the test wafer. Paraffin wax was used to uniformly bond the silicon wafer to the sapphire wafer, protecting the non-etched surface. The bonding temperature was 120℃, the cooling time was 2 minutes, and the TTV of the wafer after bonding was ≤5µm.
[0014] In step 003, the bonded wafer is placed in a polytetrafluoroethylene basket for etching; Place the basket in the coarse corrosive solution and ultrasonically corrode it for 10 minutes. Remove the basket and rinse with high-purity water for 10 minutes. Place the basket in the etching solution and ultrasonically etch for 30 minutes. Remove the basket and rinse with high-purity water for 10 minutes.
[0015] In step 004, the basket is placed in the heated dewaxing solution to debond the wafers and the silicon wafers are removed. The heating temperature of the dewaxing solution is 80°C.
[0016] (III) Beneficial Effects The method for reducing the surface roughness of two-inch silicon wafers provided by the above technical solution has the following beneficial effects: (1) By using the technique of coarse etching combined with fine etching under ultrasonic conditions, the surface roughness of two-inch silicon wafers can reach ~0.1µm. It has the characteristics of simple process operation, low equipment and cost requirements, small surface damage, and mass production, and has broad application prospects.
[0017] (2) For photodiodes in the visible light band, since they have a large absorption coefficient and short absorption length in silicon, the light-gathering surface with low surface roughness can significantly improve the light energy utilization rate and enhance the device responsivity and responsivity uniformity.
[0018] (3) In the future, photodiodes will continue to develop towards integration and miniaturization, with the pixel center distance becoming smaller and smaller. In order to achieve high-precision transfer of photolithography patterns, the surface condition of the wafer is required to be more refined. Therefore, the preparation of two-inch silicon wafers with low surface roughness is of great significance for high-precision photolithography and the preparation of miniaturized devices. Attached Figure Description
[0019] Figure 1 This is a flowchart illustrating a method for reducing the surface roughness of a two-inch silicon wafer according to an embodiment of the present invention. Detailed Implementation
[0020] To make the objectives, contents, and advantages of the present invention clearer, the specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.
[0021] According to the method for reducing the surface roughness of a two-inch silicon wafer as described in this invention, a two-inch N-type high-resistivity single-crystal silicon wafer is used as the etching material, and the two-inch silicon wafer with low surface roughness prepared therefrom is used as an embodiment of this invention.
[0022] like Figure 1 As shown, the method for reducing the surface roughness of a two-inch silicon wafer in this embodiment includes the following steps: Step 001: Prepare a crude etching solution in a polytetrafluoroethylene beaker. The specific ratio of the etching solution is HNO3:HF:CH3COOH = 160mL:20mL:40mL. Stir well with a plastic rod and let stand for 24 hours. Prepare a fine etching solution in a polytetrafluoroethylene beaker with a specific ratio of HNO3:HF:CH3COOH = 30mL:80mL:200mL. Stir well with a plastic rod and let stand for 24 hours. The two corrosive solutions, after being left to stand, are placed into the ultrasonic equipment for use.
[0023] Step 002: A two-inch N-type single-crystal silicon wafer with a resistivity of ~1000Ω was selected as the test wafer. Paraffin wax was used to uniformly bond the silicon wafer to the sapphire wafer, protecting the non-etched surface. The bonding temperature was 120℃, the cooling time was 2 minutes, and the TTV of the wafer after bonding was ≤5µm.
[0024] Step 003: Place the bonded wafer in a PTFE basket for etching; Place the basket in the coarse corrosive solution and ultrasonically corrode it for 10 minutes. Remove the basket and rinse with high-purity water for 10 minutes. Place the basket in the etching solution and ultrasonically etch for 30 minutes. Remove the basket and rinse with high-purity water for 10 minutes.
[0025] Step 004: Place the basket into the heated dewaxing solution to debond the wafers and remove the silicon wafers. The dewaxing solution is heated to 80°C.
[0026] As can be seen from the above technical solution, the present invention has the following significant features: (1) This invention innovatively proposes a method to reduce the surface roughness of two-inch silicon wafers by combining coarse etching with fine etching under ultrasonic conditions, which can reduce the surface roughness of two-inch silicon wafers to 0.1µm. This preparation method is simple to operate, low in cost, and does not introduce surface damage, laying a certain process foundation for the development of high-precision photolithography and miniaturized devices.
[0027] (2) The low surface roughness light-gathering surface prepared by the method described in this invention can be applied to silicon-based photodetectors in the visible light band, which can effectively improve their responsivity and responsivity uniformity and other index parameters; it is of great significance to the development of weak light detection in complex environments such as underwater.
[0028] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for reducing the surface roughness of a two-inch silicon wafer, characterized in that, Includes the following steps: Step 001: Prepare the coarse etching solution and the fine etching solution, and let them stand after preparation; place the two etching solutions into the ultrasonic equipment for later use; Step 002: Bond the two-inch silicon wafer to the two-inch sapphire substrate to protect the non-etched side; Step 003: The bonded wafer is first coarsely etched under ultrasonic conditions, followed by fine etching; Step 004: Debond the wafer and remove the two-inch silicon wafer.
2. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 1, characterized in that, In step 001, the volume ratio of chemical reagents in the coarse etching solution is HNO3:HF:CH3COOH = 8:1:2; the volume ratio of chemical reagents in the fine etching solution is HNO3:HF:CH3COOH = 3:8:20; the concentrations of chemical reagents used in both etching solutions are the same, namely HNO3: 90%; HF: 40%; CH3COOH: 99.8%.
3. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 2, characterized in that, In step 001, a coarse etching solution is prepared in a beaker made of polytetrafluoroethylene. The specific ratio of the etching solution is HNO3:HF:CH3COOH = 160mL:20mL:40mL. The solution is stirred evenly with a plastic rod and left to stand for 24 hours.
4. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 3, characterized in that, In step 001, a fine etching solution is prepared in a beaker made of polytetrafluoroethylene. The specific ratio of the etching solution is HNO3:HF:CH3COOH = 30mL:80mL:200mL. The solution is stirred evenly with a plastic rod and allowed to stand for 24 hours.
5. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 4, characterized in that, In step 002, a two-inch N-type single-crystal silicon wafer with a resistivity of 1000Ω is selected as the test piece. Paraffin wax is used to uniformly bond the silicon wafer and the sapphire sheet together to protect the non-corrosion surface.
6. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 5, characterized in that, In step 002, the bonding temperature is 120℃, the cooling time is 2min, and the TTV of the wafer after bonding is ≤5µm.
7. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 6, characterized in that, In step 003, the bonded wafer is placed in a PTFE basket for etching.
8. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 7, characterized in that, In step 003, the basket is placed in the coarse etching solution and ultrasonically etched for 10 minutes; then the basket is removed and rinsed with high-purity water for 10 minutes.
9. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 8, characterized in that, In step 003, the basket is placed in the fine etching solution and ultrasonically etched for 30 minutes; then the basket is removed and rinsed with high-purity water for 10 minutes.
10. The method for reducing the surface roughness of a two-inch silicon wafer as described in claim 9, characterized in that, In step 004, the basket is placed in the heated dewaxing solution to debond the wafers and the silicon wafers are removed. The heating temperature of the dewaxing solution is 80°C.