Defect detection and repair method for filled through silicon via
By combining laser confocal scanning microscopy and terahertz time-domain spectroscopy, precise detection and repair of through-silicon via (TSV) defects have been achieved, solving the problem of difficulty in online detection and repair of TSV voids in existing technologies, and improving product yield and reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAMEN EAST MICROELECTRONICS EQUIPMENT CO LTD
- Filing Date
- 2025-12-30
- Publication Date
- 2026-04-17
AI Technical Summary
Existing technologies struggle to detect and repair voids in through-silicon vias (TSVs) online, especially internal voids, leading to the scrapping of entire wafers or unnecessary rework.
By combining laser confocal scanning microscopy with a terahertz time-domain spectroscopy system, the defect type is determined by comprehensively analyzing the three-dimensional surface height distribution map and terahertz reflection signal, and targeted electroplating filling or laser annealing repair is performed.
It enables online, non-destructive testing of through-silicon via defects, improving the manufacturing yield and reliability of products such as 3D ICs and high-bandwidth memories, and avoiding unnecessary rework.
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Figure CN121888940A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, specifically to a method for defect detection and repair of filled through-silicon vias. Background Technology
[0002] As the semiconductor industry evolves towards higher density and higher integration, 3D packaging technology, with its core advantages of shortening interconnect paths, increasing data transmission rates, and reducing power consumption, has become a key supporting technology for advanced electronic devices such as 3D ICs, high-bandwidth memory (HBM), and silicon interposers. Through-silicon vias (TSVs), as the core interconnect structure of 3D packaging, form vertical conductive channels in silicon wafers to facilitate the conduction of electrical and thermal signals between different chip layers. Their structural integrity directly affects the performance and long-term reliability of packaged devices. Among these, copper-filled TSVs, due to their low resistivity and high electromigration tolerance, are currently the mainstream TSV technology. Their fabrication process involves multiple key steps, including photolithography, etching, barrier layer deposition, copper electroplating, and chemical mechanical polishing (CMP).
[0003] However, after filling and subsequent chemical mechanical polishing (CMP) processes, two typical void defects are prone to occur in filled through-silicon vias (TSVs) due to multiple factors: one is surface voids, located on the top surface of the TSV, which easily lead to subsequent bonding failures and abnormally high interconnect resistance; the other is internal voids, mainly located at the bottom or sidewalls of the TSV, which are difficult to identify using conventional detection methods. Currently, the detection of void defects in TSVs mainly relies on offline destructive methods, such as focused ion beam scanning electron microscopy (FIB-SEM) or transmission electron microscopy (TEM). These methods cannot achieve online detection and repair.
[0004] Therefore, existing technologies have shortcomings and need to be improved and developed. Summary of the Invention
[0005] The purpose of this invention is to provide a method for defect detection and repair of filled through-silicon vias, so as to solve the problems mentioned in the background art.
[0006] To achieve the above objectives, the present invention provides the following technical solution:
[0007] A method for defect detection and repair of filled through-silicon vias, comprising:
[0008] A substrate is provided, through-silicon vias are formed in the substrate, and conductive material is filled into the through-silicon vias to form a filled through-silicon via;
[0009] Chemical mechanical polishing is performed on the filled silicon vias to make the top surface of the filled silicon vias flush with the top surface of the substrate;
[0010] A laser confocal system was used to perform a partitioned scan of the top surface of a filled through-silicon via to obtain a three-dimensional surface height distribution map of each detection area.
[0011] Terahertz waves are emitted from the back side of the substrate upwards using a terahertz time-domain spectroscopy system, and the terahertz waves are directed to the corresponding region at the bottom of the filled silicon via, and terahertz reflection signals from the corresponding detection regions are received.
[0012] Based on the three-dimensional surface height distribution map of each detection area and the corresponding terahertz reflection signal, the presence and type of defects in the detection area are comprehensively determined.
[0013] If a surface void defect is determined to exist, the detection area where the surface void defect is located is marked as the area to be repaired, and targeted void repair treatment is performed on the area to be repaired.
[0014] Among these, the determination of whether defects exist and their types in the detection area, based on the three-dimensional surface height distribution map of each detection area and the corresponding terahertz reflection signal, also includes:
[0015] If an internal void defect is determined to exist, the coordinate information of the detection area where the internal void defect is located is recorded, and void repair processing is not performed.
[0016] If no defects are found, the coordinates of the inspection area where the defects are found are recorded as good product data, and void repair is not performed.
[0017] Among them, based on the three-dimensional surface height distribution map and reflection signal, the presence and type of defects in filled silicon vias are comprehensively determined, including:
[0018] Based on the three-dimensional surface height distribution map, the surface height h of each detection area is calculated and obtained, and the surface height h is compared with the reference height. The difference between the preset height threshold and the value of the value of the preset height threshold Compare;
[0019] Based on the terahertz reflection signal, the reflected light intensity I and the delay time Δt of each detection area are calculated and compared with the preset light intensity threshold I. th Compare with the preset time tolerance threshold δt;
[0020] like If so, it is determined that there is a surface void defect in the detection area;
[0021] like If so, it is determined that there is an internal void defect in the detection area;
[0022] like If the test result is positive, it is determined that there are no voids or defects in the tested area.
[0023] The void repair treatment performed on the area to be repaired includes:
[0024] The area to be repaired should be treated with electroplating or laser annealing.
[0025] The top region of the filled through-silicon via after void repair was scanned using a laser confocal system to obtain a three-dimensional surface height distribution map of the area to be repaired, and the surface height h1 of the area to be repaired was calculated.
[0026] like If the condition is met, the repair is considered complete, and the void repair process ends.
[0027] The conductive material includes copper, and electroplating is performed on the area to be repaired, specifically including:
[0028] Targeted spraying of [a substance] into the area to be repaired Electrolyte;
[0029] Simultaneously, a pulse current with a peak current density of 1 mA / mm²-10 mA / mm² is applied to the area to be repaired, and the duration of the pulse current is 1 s-10 s.
[0030] The laser annealing process performed on the area to be repaired includes:
[0031] The area to be repaired is irradiated multiple times using a nanosecond pulsed laser to melt and cool the conductive material on the surface of the through-silicon via, thereby closing the surface voids and defects.
[0032] The conductive materials include copper or tungsten.
[0033] The laser confocal system includes a laser confocal scanning microscope, which is used to scan the front surface of a chemically mechanically polished filled silicon via to obtain its three-dimensional surface morphology image. Specifically, it includes:
[0034] A laser confocal scanning microscope with a wavelength of 405 nm was used to scan the top region of the filled through-silicon via from the front to obtain its three-dimensional surface height distribution map.
[0035] The terahertz time-domain spectroscopy system includes a femtosecond laser-pumped optical guide antenna. It emits terahertz waves from the back side of the substrate upwards to the bottom region of the filled through-silicon via (TSV), and receives the reflected terahertz signal from the bottom region of the TSV. Specifically, it includes:
[0036] A femtosecond laser-pumped optical guide antenna generates terahertz waves of 0.1 TH-2 THz. The terahertz waves illuminate the bottom region of the filled silicon via from the back side of the substrate and receive the reflected signal from the bottom region of the filled silicon via.
[0037] The length of the filled through-silicon via is 50μm-300μm, and the diameter of the filled through-silicon via is greater than or equal to 0.8μm.
[0038] The beneficial effects of the above-described technical solution of the present invention are as follows:
[0039] By integrating non-destructive testing technologies such as laser confocal scanning microscopy and terahertz time-domain spectroscopy, it is possible to determine the presence and type of defects in filled silicon vias online and non-destructively, and to accurately repair areas with surface void defects. This avoids the scrapping or invalid rework of entire wafers due to the inability to identify defect types in traditional processes, thereby improving the manufacturing yield and reliability of advanced packaging products such as 3D ICs, high-bandwidth memory (HBM), and silicon interposers. Attached Figure Description
[0040] The above and other objects, features, and advantages of exemplary embodiments of the present invention will become readily apparent upon reading the following detailed description with reference to the accompanying drawings. In the drawings, several embodiments of the invention are illustrated by way of example and not limitation, and like or corresponding reference numerals denote like or corresponding parts, wherein:
[0041] Figure 1 This is a flowchart illustrating a defect detection and repair method for filled through-silicon vias provided in an embodiment of the present invention.
[0042] Figure 2 This is a schematic diagram of a laser confocal system performing partitioned scanning, provided in an embodiment of the present invention.
[0043] Figure 3 This is a schematic diagram of a structure for detecting reflection signals using a terahertz time-domain spectroscopy system, provided in an embodiment of the present invention.
[0044] Figure 4 This is a flowchart illustrating a method for determining whether a filled through-silicon via (TSV) has defects and the type of defects, as provided in an embodiment of the present invention. Detailed Implementation
[0045] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Those skilled in the art should understand that the embodiments described below are only some, not all, of the embodiments disclosed. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0046] Furthermore, the directional terms used in this invention, such as [up], [down], [front], [back], [left], [right], [inside], [outside], and [side], are merely for reference to the accompanying drawings. Therefore, the directional terms used are for illustrating and understanding this invention, and not for limiting it. In the various figures, structurally similar units are represented by the same reference numerals. For clarity, the various parts in the figures are not drawn to scale. Additionally, some well-known parts may not be shown in the figures.
[0047] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.
[0048] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings.
[0049] like Figure 1 The diagram shown is a flowchart illustrating a defect detection and repair method for filled through-silicon vias provided in an embodiment of the present invention, including:
[0050] S1, providing a substrate, forming a through-silicon via (TSV) through the substrate, and filling the TSV with conductive material to form a filled TSV;
[0051] S2, perform chemical mechanical polishing on the filled silicon via to make the top surface of the filled silicon via flush with the top surface of the substrate;
[0052] S3, using a laser confocal system to perform partitioned scanning of the top surface of the filled silicon via to obtain a three-dimensional surface height distribution map of each detection area;
[0053] S4. Terahertz waves are emitted from the back side of the substrate upward using a terahertz time-domain spectroscopy system, so that the terahertz waves are directionally incident on the corresponding area at the bottom of the filled silicon via, and terahertz reflection signals from the corresponding detection areas are received.
[0054] S5, based on the three-dimensional surface height distribution map of each detection area and the corresponding terahertz reflection signal, comprehensively determine whether there are defects in the detection area and the type of defects;
[0055] S601, if a surface void defect is determined to exist, the detection area where the surface void defect is located is marked as the area to be repaired, and directional void repair processing is performed on the area to be repaired.
[0056] Among these, the determination of whether defects exist and their types in the detection area, based on the three-dimensional surface height distribution map of each detection area and the corresponding terahertz reflection signal, also includes:
[0057] S602, if an internal void defect is determined to exist, the coordinate information of the detection area where the internal void defect is located is recorded, and void repair processing is not performed;
[0058] S603 If no defects are found, the coordinates of the inspection area where no defects are found are recorded as good product data, and void repair processing is not performed.
[0059] In this embodiment of the invention, if a bottom or sidewall defect is determined to exist in the area to be inspected, the coordinate information of the area where the defect is located is recorded and marked as an unrepairable area. Such defects cannot be effectively repaired by micro-area processes such as surface electroplating or laser annealing, therefore no repair processing is performed. If the area to be inspected is determined to be defect-free (i.e., the surface morphology is smooth and the internal filling is dense), the coordinate information of the area, along with the corresponding morphology and terahertz characteristic parameters, are recorded as good product data for subsequent yield statistics, process feedback, or as a reference benchmark for wafers in the same batch. By accurately identifying the defect type of filled through-silicon vias and treating them accordingly, only repairable surface voids are repaired, avoiding unnecessary rework. Simultaneously, data recording provides data support for production line process optimization.
[0060] In this embodiment of the invention, a silicon wafer is provided as a base substrate. This wafer can be a wafer with integrated front-end device structures. Preferably, the surface of the wafer has undergone pre-cleaning and activation treatment to ensure the cleanliness of subsequent processes.
[0061] It should be noted that no particular restrictions are placed on the substrate material of the wafer in this embodiment of the invention. In this embodiment, the substrate material can be selected from semiconductors or wide-bandgap materials such as single-crystal silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), and gallium nitride (GaN). Among these, single-crystal silicon is the most commonly used substrate material and is suitable for the manufacture of large-scale integrated circuits such as logic chips and memory devices.
[0062] In this embodiment of the invention, the process of forming a through-silicon via (TSV) is as follows: a vertical through-hole with a high aspect ratio (typically 5:1 to 20:1) is etched into the substrate using an etching process to form a through-silicon via (TSV). Generally, the diameter of the TSV is 2 μm-50 μm and the depth is 50 μm-300 μm. Preferably, the sidewalls of the TSV are passivated to reduce defect formation during subsequent filling processes.
[0063] In this embodiment of the invention, the conductive material includes copper or tungsten. Preferably, the conductive material is copper. Exemplarily, the process of forming a filled through-silicon via (TSV) with copper as the conductive material is as follows: a barrier layer (such as Ta / TaN) and a copper seed layer are sequentially deposited on the inner wall of the TSV, followed by filling with high-purity copper through an electroplating process, thereby forming the filled TSV. The length of the filled TSV is 50 μm-300 μm, and the diameter of the filled TSV is greater than or equal to 0.8 μm.
[0064] In this embodiment of the invention, the process of chemical mechanical polishing (CMP) of a filled silicon via with copper conductive material is as follows: first, high-speed rough polishing is performed to remove most of the excess copper layer, and then low-speed fine polishing is performed to achieve global planarization. The polishing endpoint is monitored in real time by an optical endpoint detection system to ensure that the top surface of the filled silicon via is highly consistent with the upper surface of the substrate.
[0065] The laser confocal system includes a laser confocal scanning microscope, which is used to scan the front surface of a chemically mechanically polished filled silicon via to obtain its three-dimensional surface morphology image. Specifically, it includes:
[0066] A laser confocal scanning microscope with a wavelength of 405 nm was used to scan the top region of the filled through-silicon via from the front to obtain its three-dimensional surface height distribution map.
[0067] like Figure 2 The diagram shown is a schematic representation of a laser confocal scanning system for partitioned scanning according to an embodiment of the present invention. A laser confocal scanning microscope with a wavelength of 405 nm is used, incident perpendicularly from the front of the wafer, to scan the top region of the filled through-silicon vias point by point. Based on the principle of optical tomography, the three-dimensional surface morphology is reconstructed to obtain a high-resolution three-dimensional surface height distribution map h(x, y). The lateral resolution of the laser confocal scanning microscope is ≤300 nm, and the longitudinal resolution is ≤10 nm. The three-dimensional surface height distribution map h(x, y) is used to quantitatively characterize whether there are surface morphology anomalies such as surface voids or protrusions in the top region of the filled through-silicon vias. Surface voids typically manifest as a local area with a significantly lower height than the surrounding defect-free area. For example, when the surface height of a certain region of the filled through-silicon via is significantly lower... At this point, it can be preliminarily determined that surface voids exist in the region. The preset height threshold is 50 nm. This is the reference height for the defect-free area.
[0068] The terahertz time-domain spectroscopy system includes a femtosecond laser-pumped optical guide antenna. It emits terahertz waves from the back side of the substrate upwards to the bottom region of the filled through-silicon via (TSV), and receives the reflected terahertz signal from the bottom region of the TSV. Specifically, it includes:
[0069] A femtosecond laser-pumped optical guide antenna generates terahertz waves of 0.1 TH-2 THz. The terahertz waves illuminate the bottom region of the filled silicon via from the back side of the substrate and receive the reflected signal from the bottom region of the filled silicon via.
[0070] like Figure 3 The diagram shows a schematic of a terahertz time-domain spectroscopy system for detecting reflected signals, as provided in an embodiment of the present invention. A femtosecond laser-pumped optical guide antenna (including a femtosecond laser and an optical guide antenna) excites a nonlinear crystal (such as ZnTe or GaP) to generate terahertz waves in the frequency range of 0.1 THz-2 THz. Because silicon has a low absorption coefficient and dielectric loss in the 0.1 THz-2 THz frequency band, it exhibits high transparency to terahertz waves, allowing them to effectively penetrate silicon substrates hundreds of micrometers thick. However, the skin depth of highly conductive metals such as copper or tungsten in this frequency band is only on the order of tens of nanometers, causing terahertz waves to be almost unable to penetrate these materials and instead be strongly reflected at the metal surface or metal-dielectric interface.
[0071] When a filled through-silicon via (TSV) is well-filled with copper, terahertz waves are reflected upon reaching the bottom of the TSV. However, if there are bottom or sidewall voids within the TSV, the terahertz waves can pass through these voids and generate additional secondary reflection signals at subsequent interfaces (such as the copper interface at the bottom or sidewall of the void). This reflection behavior, caused by differences in the electromagnetic properties of the materials, provides a physical basis for distinguishing between defect types such as complete filling, surface voids, and internal voids in TSVs.
[0072] In areas with good copper filling, due to copper's high reflectivity to terahertz waves, most of the energy is reflected, while transmission and secondary reflection are weak. In this case, the reflection intensity mainly comes from the reflection incident on the well-filled copper area, and the reflection intensity I0 ≤ preset light intensity threshold I. th The principal reflection time t1 refers to the time difference between the emission of a terahertz wave onto a defect-free, well-filled copper region and the first significant emission. The principal reflection time t1 can be used as a benchmark value for comparison with other reflection times.
[0073] For areas where copper is not fully filled and there are voids at the bottom or sidewalls, the presence of these voids creates multiple reflective interfaces. Each reflective interface generates a reflected signal, and the superposition of these signals increases the intensity of the received reflected signal. At this point, the reflection intensity I0 > the preset light intensity threshold I. th When bottom or sidewall voids exist, terahertz waves will undergo additional reflections at these voids, resulting in secondary reflections. The secondary reflection time t2 refers to the time difference between the emission of a terahertz wave onto a bottom or sidewall void in a filled through-silicon via and the first significant emission.
[0074] Regarding the delay time, it is the time difference between the final reflection time and the previous reflection time. For defect-free regions, there are no secondary reflections, and all reflected signals return within the expected time, Δt = t1 - t1, Δt = 0. For regions with voids or defects, there are primary and secondary reflection times, Δt = t2 - t1. If Δt > 0, it indicates that the terahertz wave underwent additional reflections in the propagation path, potentially indicating internal voids or other structural anomalies. Considering system noise and process fluctuations, a preset time tolerance threshold δt is introduced. When... If the condition is such that the area has a bottom or sidewall cavity defect, then it is determined that the area has such a defect. If the test area is found to be free of bottom or sidewall voids, it is determined that there are no defects in the test area, thus avoiding misjudgment caused by minor fluctuations.
[0075] like Figure 4 The diagram shown illustrates a flowchart of an embodiment of the present invention for determining whether a filled through-silicon via (TSV) has defects and the type of defects. Specifically, the determination of whether a TSV has defects and the type of defects, based on a three-dimensional surface height distribution map and reflection signals, includes:
[0076] S501, based on the three-dimensional surface height distribution map, calculates and obtains the surface height h of each detection area, and compares the surface height h with the reference height. The difference between the preset height threshold and the value of the value of the preset height threshold Compare;
[0077] S502, based on the terahertz reflection signal, calculates and obtains the reflected light intensity I and the delay time Δt of each detection area, and compares them with the preset light intensity threshold I. th Compare with the preset time tolerance threshold δt;
[0078] S503, if If so, it is determined that there is a surface void defect in the detection area;
[0079] S504, if If so, it is determined that there is an internal void defect in the detection area;
[0080] S505, if If the test result is positive, it is determined that there are no voids or defects in the tested area.
[0081] In this embodiment of the invention, by fusing the three-dimensional surface morphology information obtained from laser confocal scanning with the internal structure response obtained from terahertz time-domain spectroscopy (THz-TDS), a high-precision, non-destructive comprehensive determination of defects in filled through-silicon vias (TSVs) can be achieved. Based on the three-dimensional surface height distribution map and reflection signals, a comprehensive determination is made regarding the presence and type of defects in the filled TSVs, specifically including:
[0082] First, based on the three-dimensional surface height distribution map h(x, y) obtained by the laser confocal system, the average surface height h of each detection area is calculated, and the surface height h is compared with the reference height. The difference between the preset height threshold and the value of the value of the preset height threshold Comparison is used to make a preliminary judgment on whether there are any abnormalities in surface morphology.
[0083] Secondly, based on the terahertz reflection signal (including reflection intensity, primary reflection time, secondary reflection time, etc.), the reflected light intensity I and delay time Δt of each detection area are calculated and compared with the preset light intensity threshold I. th The time tolerance threshold δt is compared with the time tolerance threshold to determine whether there is an internal void defect.
[0084] like If the test result is negative, the area being tested is determined to have a surface void defect. This indicates that there is a local depression at the top of the filled through-silicon via (such as a pit formed after CMP), but the internal filling is complete and there is no secondary reflective interface. This situation is judged as a surface void defect, which is a repairable defect.
[0085] like If the test result shows an internal void defect in the detected area, it indicates that the top morphology of the filled through-silicon via is normal, but the terahertz signal intensity is significantly enhanced and there is a noticeable time delay, indicating that the terahertz wave has penetrated the incompletely filled area, producing additional reflection. This situation is judged as a bottom or sidewall defect, which is usually not repairable in situ.
[0086] like If the result is positive, it indicates that there are no void defects in the detection area. This means that the top of the filled through-silicon via is flat, the internal filling is dense, and there is no obvious reflection anomaly. Therefore, it is determined that there are no void defects in the detection area, and the structure of the filled through-silicon via is intact.
[0087] By making the above comprehensive judgment, we can accurately distinguish between surface voids and internal voids, avoid misjudgments or missed detections caused by traditional single detection methods, provide a reliable basis for subsequent selective repair, and thus improve the yield and reliability of 3D packaging.
[0088] The void repair treatment performed on the area to be repaired includes:
[0089] The area to be repaired should be treated with electroplating or laser annealing.
[0090] The top region of the filled through-silicon via after void repair was scanned using a laser confocal system to obtain a three-dimensional surface height distribution map of the area to be repaired, and the surface height h1 of the area to be repaired was calculated.
[0091] like If the condition is met, the repair is considered complete, and the void repair process ends.
[0092] In this embodiment of the invention, for the area to be repaired, electroplating filling or laser annealing is selected for repair treatment. After the repair treatment is completed, considering that the internal defect detection has already been completed by terahertz wave back-side detection, this step only requires a secondary surface scan detection of the area to be repaired using a laser confocal system. Referring to the surface void defect determination principle described above, it is determined whether there are still surface void defects remaining in the area. If it is determined that the repair is complete, the void repair treatment ends. Since the specific determination principle of surface void defects has been explained in detail above, it will not be repeated here.
[0093] The conductive material includes copper, and electroplating is performed on the area to be repaired, specifically including:
[0094] Targeted spraying of [a substance] into the area to be repaired Electrolyte;
[0095] Simultaneously, a pulse current with a peak current density of 1 mA / mm²-10 mA / mm² is applied to the area to be repaired, and the duration of the pulse current is 1 s-10 s.
[0096] In this embodiment of the invention, micro-area electroplating filling can be performed on the area to be repaired: a micro-nozzle is used to apply a high-purity electroplating filler. Acidic electrolytes containing ions (such as copper sulfate solution, The electrolyte is directed onto the area to be repaired, ensuring that it only covers the area to be repaired and does not spread to the surrounding defect-free areas. At the same time, a pulsed current of 1mA / mm²-10mA / mm² is directed onto the area to be repaired for 1s-10s to achieve selective deposition of copper.
[0097] The laser annealing process performed on the area to be repaired includes:
[0098] The area to be repaired is irradiated multiple times using a nanosecond pulsed laser to melt and cool the conductive material on the surface of the through-silicon via, thereby closing the surface voids and defects.
[0099] In this embodiment of the invention, the laser annealing treatment of the area to be repaired specifically includes: using a 532nm nanosecond pulsed laser, focusing the laser beam onto the area to be repaired, controlling the spot diameter within the range of 10-50µm, and the laser energy density within the range of 5J / cm²–30J / cm², and irradiating the surface void defect with 1-5 pulses. The laser energy is rapidly absorbed by the conductive material (such as copper) at the top of the filled through-silicon via, causing the surface metal material of the filled through-silicon via to locally melt in a very short time (on the nanosecond scale), and then rapidly cool and solidify due to the material's own thermal conduction, achieving the collapse and closure of the void region under the drive of surface tension. This process does not require the addition of additional materials, and the melting depth and range can be precisely controlled by adjusting the laser parameters, thereby efficiently and in-situ repairing the void defect at the top of the filled through-silicon via. After the repair is completed, a secondary inspection can be performed to verify the repair effect.
[0100] This invention provides a defect detection and repair method for filled through-silicon vias (TSVs). By integrating non-destructive testing technologies such as laser confocal scanning microscopy and terahertz time-domain spectroscopy, it enables online and non-destructive determination of the presence and type of defects in filled TSVs. It also allows for precise repair of voids in areas with surface void defects, avoiding the scrapping or unnecessary rework of entire wafers due to the inability to identify defect types in traditional processes. This improves the manufacturing yield and reliability of advanced packaging products such as 3D ICs, high-bandwidth memory (HBM), and silicon interposers.
[0101] The above-described preferred embodiments of the present invention are provided as examples, but it will be apparent to those skilled in the art that such embodiments are provided merely by way of example. Many modifications, alterations, and alternatives will occur to those skilled in the art without departing from the spirit and intent of the invention. It should be understood that various alternatives to the embodiments of the invention described herein may be employed in the practice of the invention. The appended claims are intended to define the scope of protection of the invention and therefore cover the modular compositions, equivalents, or alternatives within the scope of these claims.
Claims
1. A method for defect detection and repair of filled through-silicon vias, characterized in that, include: A substrate is provided, in which a through-silicon via is formed, and the through-silicon via is filled with a conductive material to form a filled through-silicon via; The filled silicon via is subjected to chemical mechanical polishing so that the top surface of the filled silicon via is flush with the upper surface of the substrate; The top surface of the filled through-silicon via is scanned in sections using a laser confocal system to obtain a three-dimensional surface height distribution map of each detection area; A terahertz wave is emitted from the back side of the substrate upward using a terahertz time-domain spectroscopy system, and the terahertz wave is directed to the corresponding region at the bottom of the filled silicon via, and terahertz reflection signals from the corresponding detection regions are received. Based on the three-dimensional surface height distribution map of each detection area and the corresponding terahertz reflection signal, the presence and type of defects in the detection area are comprehensively determined. If a surface void defect is determined to exist, the detection area where the surface void defect is located is marked as a repair area, and a directional void repair process is performed on the repair area.
2. The defect detection and repair method for filled through-silicon vias as described in claim 1, characterized in that, The method of comprehensively determining whether a defect exists and the type of defect in each detection area based on the three-dimensional surface height distribution map of each detection area and the corresponding terahertz reflection signal further includes: If an internal void defect is determined to exist, the coordinate information of the detection area where the internal void defect is located is recorded, and the void repair process is not performed. If no defects are found, the coordinates of the detection area where the defects are found are recorded as good product data, and the void repair process is not performed.
3. The defect detection and repair method for filled through-silicon vias as described in claim 1, characterized in that, The determination of whether the filled through-silicon via (TSV) has defects and the type of defects, based on the three-dimensional surface height distribution map and the reflection signal, specifically includes: Based on the three-dimensional surface height distribution map, the surface height h of each detection area is calculated and obtained, and the surface height h is compared with the reference height. The difference between the preset height threshold and the value of the value of the preset height threshold Compare; Based on the terahertz reflection signal, the reflected light intensity I and the delay time Δt of each detection region are calculated and compared with a preset light intensity threshold I. th Compare with the preset time tolerance threshold δt; like If so, it is determined that the detection area has surface void defects; like If so, it is determined that the detection area has an internal void defect; like If the test area is found to be defect-free, then the test area is determined to be free of defects.
4. The defect detection and repair method for filled through-silicon vias as described in claim 1, characterized in that, The cavity repair process is performed on the area to be repaired, specifically including: The area to be repaired is subjected to electroplating filling or laser annealing. The top region of the filled through-silicon via after the void repair process is scanned using the laser confocal system to obtain a three-dimensional surface height distribution map of the area to be repaired, and the surface height h1 of the area to be repaired is calculated. like If the repair is completed, the cavity repair process ends.
5. The defect detection and repair method for filled through-silicon vias as described in claim 4, characterized in that, The conductive material includes copper, and the electroplating filling of the area to be repaired specifically includes: Targeted spraying of [a substance] into the area to be repaired Electrolyte; Simultaneously, a pulse current with a peak current density of 1 mA / mm²-10 mA / mm² is applied to the area to be repaired, and the duration of the pulse current is 1 s-10 s.
6. The defect detection and repair method for filled through-silicon vias as described in claim 4, characterized in that, The laser annealing process is performed on the area to be repaired, specifically including: The area to be repaired is irradiated multiple times using a nanosecond pulsed laser to melt and solidify the conductive material on the surface of the filled silicon via, thereby causing the surface void defects to close.
7. The defect detection and repair method for filled through-silicon vias as described in claim 1, wherein the conductive material comprises copper or tungsten.
8. The defect detection and repair method for filled through-silicon vias as described in claim 1, characterized in that, The laser confocal system includes a laser confocal scanning microscope. The laser confocal system is used to scan the front surface of the chemically mechanically polished filled silicon via to obtain its three-dimensional surface morphology image. Specifically, this includes: A laser confocal scanning microscope with a wavelength of 405 nm was used to scan the top region of the filled silicon via from the front to obtain its three-dimensional surface height distribution map.
9. The defect detection and repair method for filled through-silicon vias as described in claim 1, characterized in that, The terahertz time-domain spectroscopy system includes a femtosecond laser-pumped optical guide antenna. The system emits terahertz waves upwards from the back side of the substrate to the bottom region of the filled silicon via, and receives the reflected terahertz signal from the bottom region of the filled silicon via. Specifically, this includes: The femtosecond laser pump optical guide antenna generates a 0.1TH-2THz terahertz wave, which illuminates the bottom region of the filled silicon via from the back side of the substrate, and receives the reflected signal from the bottom region of the filled silicon via.
10. The defect detection and repair method for filled through-silicon vias as described in claim 1, characterized in that, The length of the filled silicon via is 50μm-300μm, and the diameter of the filled silicon via is greater than or equal to 0.8μm.