Inductor-capacitor voltage controlled oscillator with common mode noise separation

Abstract

The present disclosure relates to a voltage controlled oscillator (VCO) with improved phase noise compared to other VCOs. The VCO may include a first cell and a second cell separated by common mode (CM) isolation circuitry to reduce the amplitude of CM noise at the output signal. The CM isolation circuitry may inductively couple the first cell to the second cell for generating an output signal based on a resonant frequency range including resonant frequencies of the CM isolation circuitry, the first cell, and the second cell. Accordingly, the first cell and the second cell may each include a portion of the entire CM noise. In some cases, these portions of CM noise on the first unit and / or the second unit may improve the signal-to-noise ratio of the output signal.

Description

Background Technology

[0001] This disclosure relates in general to wireless communication, and more specifically to voltage-controlled oscillators for transmitter and / or receiver circuits.

[0002] In some applications, a voltage-controlled oscillator (VCO) may include a current source circuit system and a resonator circuit system. The current source circuit system may generate a direct current (DC) signal based on a received bias voltage. The resonator circuit system may generate the VCO output signal based on the DC signal. For example, the resonator circuit system may generate an output signal with a desired oscillation frequency and voltage amplitude based on the inductance and / or capacitance values ​​of its components and the current value of the DC signal. In some cases, the current source circuit system and / or the resonator circuit system may include one or more nonlinear capacitors and other components. A change in the voltage across the nonlinear capacitor may correspond to a change in the capacitance of the nonlinear capacitor. A change in the capacitance of the nonlinear capacitor may introduce undesirable noise in the phase and / or frequency of the output signal. Summary of the Invention

[0003] The following outlines some embodiments disclosed herein. It should be understood that these aspects are presented merely to provide the reader with a concise overview of these particular embodiments, and are not intended to limit the scope of this disclosure. In fact, this disclosure may cover many aspects that may not be set forth below.

[0004] In one embodiment, an electronic device may include: an antenna; and a voltage-controlled oscillator (VCO) comprising: a first voltage-controlled current source; a first inductor-capacitor tank circuit coupled to the first voltage-controlled current source; a second inductor-capacitor tank circuit inductively coupled to the first inductor-capacitor tank circuit; and a second voltage-controlled current source coupled to the second inductor-capacitor tank circuit and coupled to a ground terminal.

[0005] In another embodiment, a voltage-controlled oscillator (VCO) may include: a first inductor-capacitor tank circuit that can receive a direct current (DC) signal; and a second inductor-capacitor tank circuit that can be inductively coupled to the first inductor-capacitor tank circuit based on the DC signal to generate an output signal having a desired oscillation frequency within a resonant frequency range, the second inductor-capacitor tank circuit being inductively decoupled from the first inductor-capacitor tank circuit based on a signal having a non-desired oscillation frequency outside the resonant frequency range.

[0006] In yet another embodiment, a voltage-controlled oscillator (VCO) may include: a first voltage-controlled current source coupled to a voltage source; a first inductor-capacitor tank coupled to the first voltage-controlled current source; a second inductor-capacitor tank inductively coupled to the first inductor-capacitor tank; and a second voltage-controlled current source coupled to the second inductor-capacitor tank and coupled to a ground terminal.

[0007] Various modifications to the features described above may be possible with respect to the various aspects of this disclosure. Other features may also be incorporated into these aspects. These modifications and additional features may exist individually or in any combination. For example, the various features discussed below with respect to one or more embodiments of the illustrated embodiments may be incorporated individually or in any combination into any of the foregoing aspects of this disclosure. The brief summary presented above is intended only to familiarize the reader with certain aspects and context of embodiments of this disclosure and does not limit the claimed subject matter. Attached Figure Description

[0008] Various aspects of this disclosure can be better understood by reading the following detailed description and referring to the accompanying drawings, in which the same reference numerals refer to the same parts.

[0009] Figure 1 This is a block diagram of an electronic device according to an embodiment of the present disclosure;

[0010] Figure 2 It is based on the implementation scheme of this disclosure. Figure 1 Functional diagram of electronic devices;

[0011] Figure 3 It is based on the implementation scheme of this disclosure. Figure 1 A schematic diagram of the transmitter of an electronic device;

[0012] Figure 4 It is based on the implementation scheme of this disclosure. Figure 1 A schematic diagram of the receiver of an electronic device;

[0013] Figure 5 It is based on the implementation scheme of this disclosure. Figure 3 transmitter and / or Figure 4 A schematic diagram of the voltage-controlled oscillator (VCO) of the receiver, which generates the output signal;

[0014] Figure 6 It is based on the implementation scheme of this disclosure. Figure 5 A schematic diagram of a VCO, wherein the common-mode isolation circuit system of the VCO includes a transformer;

[0015] Figure 7 It is based on the implementation scheme of this disclosure. Figure 6 A schematic diagram of a VCO, in which the common-mode isolation circuit system includes a transformer and a common-mode degradation inductor;

[0016] Figure 8 It is based on the implementation scheme of this disclosure. Figure 6 A schematic diagram of a VCO, wherein the common-mode isolation circuit system includes a transformer and a T-section impedance circuit; and

[0017] Figure 9 It is based on the implementation scheme of this disclosure. Figure 6 A schematic diagram of a VCO, in which the common-mode isolation circuit system includes a transformer and a PI section impedance circuit. Detailed Implementation

[0018] When describing elements of various embodiments of this disclosure, the articles “a,” “an,” and “the” are intended to refer to one or more elements present in the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and indicate that additional elements may be present in addition to those listed. Additionally, it should be understood that references to “an embodiment” or “an embodiment” of this disclosure are not intended to be construed as excluding the existence of additional embodiments that also incorporate the described features. Furthermore, specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. The use of the terms “approximately,” “close to,” “about,” “close to,” and / or “substantially” should be understood to mean including close to the target (e.g., design, value, and quantity), such as within limits of any suitable or conceivable error (e.g., within 0.1%, 1%, 5%, 10%, 25%, etc. of the target). Furthermore, it should be understood that any exact values, figures, measurements, etc., provided herein are conceivable to include approximate values ​​of such exact values, figures, measurements, etc. (e.g., within limits of a suitable or conceivable error). Additionally, the term "set" can include one or more. That is, a set can include a single collection of one member, but a set can also include a collection of multiple members.

[0019] This disclosure relates to an inductor-capacitor (LC) voltage-controlled oscillator (VCO), hereinafter referred to as VCO, which has reduced phase noise compared to other VCOs not including the disclosed embodiment. The VCO generates an output signal (e.g., a differential output signal) with a desired oscillation frequency. The VCO may include a differential circuitry for generating the output signal. Without compensation, in some cases, the VCO may also generate undesirable common-mode (CM) noise. CM noise can cause undesirable voltage and / or frequency shifts around the output signal, resulting in undesirable flicker and / or phase noise in the output signal. The VCO may include circuitry for reducing the amplitude of the undesirable CM noise, as will be understood.

[0020] In some cases, one or more nonlinear capacitors of a VCO may generate CM noise. For example, voltage fluctuations across the terminals of a nonlinear capacitor may generate at least a portion of the CM noise. In various cases, voltage fluctuations may be caused by thermally induced noise, power supply voltage fluctuations, gate-induced noise from one or more switches of the VCO, noise from one or more VCO materials and / or one or more VCO components, noise due to manufacturing processes and / or variations in manufacturing processes, flicker noise from one or more complementary metal-oxide-semiconductor (CMOS) components of the VCO, or combinations thereof, etc.

[0021] The VCO may include a first unit and a second unit. The first unit may include a first portion (e.g., half, nearly half) of the nonlinear capacitor of the VCO, and the second unit may include the remaining portion (e.g., half, nearly half) of the nonlinear capacitor. Thus, the first unit may generate a portion (e.g., half, nearly half) of the CM noise, and the second unit may generate the remaining portion (e.g., half, nearly half) of the CM noise.

[0022] The first unit can be coupled to the second unit via a common-mode isolation circuit system to provide common-mode isolation (e.g., common-mode decoupling, common-mode separation) between the first and second units. For example, the common-mode isolation circuit system may include a transmit line, a transformer, and / or an impedance circuit having a resonant frequency based on the desired oscillation frequency of the output signal. The common-mode isolation circuit system can conduct both the direct current (DC) signal and the output signal while reducing the amplitude of the CM noise of the first unit at the second unit and reducing the amplitude of the CM noise of the second unit at the first unit. Therefore, the first unit can generate a corresponding portion of the CM noise, which is decoupled from the remaining portion of the CM noise of the second unit. Furthermore, the output terminal of the VCO can be located on either the first or second unit. The VCO can output an output signal containing a corresponding portion (e.g., half, nearly half) of the CM noise of the first or second unit via the output terminal. Therefore, the VCO can reduce the amplitude of the unwanted CM noise to improve the phase noise of the output signal.

[0023] Furthermore, the first and second units may each include a switch. In some embodiments, the first unit may include an n-channel metal-oxide-semiconductor (NMOS) switch, and the second unit may include a p-channel metal-oxide-semiconductor (PMOS) switch. The VCO can generate an output signal with a higher voltage amplitude based on the common-mode isolation between the NMOS and PMOS switches. For example, common-mode isolation between the NMOS and PMOS switches can reduce the gate voltage dependence of the NMOS and PMOS switches. Therefore, common-mode isolation can increase the voltage amplitude by one or more of the NMOS and / or PMOS switches to generate an output signal with an increased voltage amplitude without increasing the power consumption of the VCO. Common-mode isolation between the first and second units can improve the signal-to-noise ratio (SNR) of the VCO to generate an output signal without increasing the power consumption of the VCO. Therefore, the VCO can improve the phase noise of the output signal by increasing the SNR of the output signal.

[0024] Furthermore, the drain terminal of the NMOS switch can be coupled to the common-mode isolation circuit system via at least one or more nonlinear capacitors of the first unit. The first unit can conduct a corresponding portion of the CM noise away from the common-mode isolation circuit system. Similarly, the drain terminal of the PMOS switch can be coupled to the common-mode isolation circuit system via at least one or more nonlinear capacitors of the second unit. The second unit can conduct the remaining portion of the CM noise away from the common-mode isolation circuit system. Therefore, the first unit can conduct a corresponding portion of the CM noise, which is inverted relative to the remaining portion of the CM noise in the second unit.

[0025] In some cases, CM noise and / or inverted CM noise can be combined with the gate voltages of one or more switches to increase the voltage amplitude through one or more switches. Therefore, the VCO can generate an output signal with an increased voltage amplitude without increasing the VCO's power consumption. That is, the VCO can generate an output signal with an improved SNR based on decoupling and inverting the CM noise of the first and second units. Therefore, the VCO can improve the phase noise of the output signal by increasing the SNR of the output signal.

[0026] In some embodiments, the electronic device may include one or more VCOs to generate an output signal having one or more oscillation frequencies. The VCO's output signal may correspond to a clock signal, a carrier signal for signal modulation, a frequency-synthesized signal, and / or a down-converted signal based on the received signal of the electronic device, etc. Therefore, the VCO can improve the operation of the electronic device by generating an improved signal with a desired oscillation frequency, reduced noise, and / or reduced electrical power. In some embodiments, the improved signal may reduce timing error rates and / or improve the integrity of transmitted and / or received data, etc.

[0027] Figure 1 This is a block diagram of an electronic device 10 according to an embodiment of the present disclosure. Among other things, the electronic device 10 may also include one or more processors 12 (collectively referred to herein as a single processor, which may be implemented in any suitable form of processing circuitry), memory 14, non-volatile storage device 16, display 18, input structure 22, input / output (I / O) interface 24, network interface 26, and power supply 29. Figure 1 The various functional blocks shown may include hardware elements (including circuits), software elements (including machine-executable instructions), or combinations of hardware and software elements (which may be referred to as logic units). Processor 12, memory 14, non-volatile storage device 16, display 18, input structure 22, input / output (I / O) interface 24, network interface 26, and / or power supply 29 may each be directly or indirectly communicatively coupled to each other (e.g., through or via another component, communication bus, network) to send and / or receive signals between them. It should be noted that... Figure 1 This is merely one example of a specific implementation and is intended to illustrate the types of components that may exist in electronic device 10.

[0028] By way of example, electronic device 10 may include any suitable computing device, including desktop or laptop computers, portable or handheld electronic devices (such as wireless electronic devices or smartphones), tablet computers, wearable electronic devices, and other similar devices. In additional or alternative embodiments, electronic device 10 may include access points such as base stations, routers (e.g., wireless routers or Wi-Fi routers), hubs, switches, etc. It should be noted that Figure 1 The processor 12 and other related items may be embodied, in whole or in part, as software, hardware, or both. Furthermore, Figure 1 The processor 12 and other related items may be a single, contained processing module, or may be integrated, wholly or partially, into any other element within the electronic device 10. The processor 12 may be implemented using a combination of a general-purpose microprocessor, microcontroller, digital signal processor (DSP), field-programmable gate array (FPGA), programmable logic device (PLD), controller, state machine, gated logic, discrete hardware component, dedicated hardware finite state machine, or any other suitable entity capable of performing computational or other manipulations of information. The processor 12 may include one or more application processors, one or more baseband processors, or both, and performs the various functions described herein.

[0029] exist Figure 1 In the electronic device 10, processor 12 may be operatively coupled to memory 14 and non-volatile storage device 16 to execute various algorithms. Such programs or instructions executed by processor 12 may be stored in any suitable article of writing comprising one or more tangible computer-readable media. The tangible computer-readable media may individually or collectively include memory 14 and / or non-volatile storage device 16 to store instructions or routines. Memory 14 and non-volatile storage device 16 may include any suitable article of writing for storing data and executable instructions, such as random access memory, read-only memory, rewritable flash memory, hard disk drive, and optical disk. Furthermore, programs (e.g., operating systems) encoded on such computer program products may also include instructions executable by processor 12 to enable electronic device 10 to provide various functions.

[0030] In some embodiments, display 18 may facilitate a user's viewing of images generated on electronic device 10. In some embodiments, display 18 may include a touchscreen that facilitates user interaction with the user interface of electronic device 10. Furthermore, it should be understood that in some embodiments, display 18 may include one or more liquid crystal displays (LCDs), light-emitting diode (LED) displays, organic light-emitting diode (OLED) displays, active-matrix organic light-emitting diode (AMOLED) displays, or some combination of these and / or other display technologies.

[0031] The input structure 22 of electronic device 10 enables a user to interact with electronic device 10 (e.g., pressing a button to increase or decrease the volume level). Like network interface 26, I / O interface 24 enables electronic device 10 to interact with a variety of other electronic devices. In some embodiments, I / O interface 24 may include I / O ports for hardwired connections for charging and / or content manipulation using standard connectors and protocols such as Lightning connectors, Universal Serial Bus (USB), or other similar connectors and protocols. Network interface 26 may include one or more interfaces for, for example, personal area networks (PANs), such as Ultra Wideband (UWB) or Bluetooth. ® Network; Local Area Network (LAN) or Wireless Local Area Network (WLAN), such as a protocol using one of the IEEE 802.11x series of protocols (e.g., Wi-Fi). ® Networks; and / or wide area networks (WANs), such as any standards related to the 3rd Generation Partnership Project (3GPP), including, for example, 3rd generation (3G) cellular networks, Universal Mobile Telecommunications System (UMTS), 4th generation (4G) cellular networks, Long Term Evolution (LTE) networks. ® This includes LTE cellular networks, LTE-LAA cellular networks, 5G cellular networks and / or New Radio (NR) cellular networks, 6G or higher cellular networks, satellite networks, non-terrestrial networks, etc. Specifically, network interface 26 may include one or more interfaces for cellular communication standards, such as those for using defined and / or implemented frequency ranges for wireless communication, including millimeter-wave (mmWave) frequency ranges (e.g., 24.25 GHz to 300 GHz). Network interface 26 of electronic device 10 may allow communication via the aforementioned networks (e.g., 5G, Wi-Fi, LTE-LAA, etc.).

[0032] Network interface 26 may also include one or more interfaces for, for example, broadband fixed wireless access networks (e.g., WiMAX). ® Mobile broadband wireless network (Mobile WiMAX) ® Asynchronous digital subscriber lines (e.g., ADSL, VDSL), terrestrial digital video broadcasting (DVB-T) ® Network and its extension DVB handheld devices (DVB-H) ® Networks, ultra-broadband (UWB) networks, alternating current (AC) power lines, etc.

[0033] As illustrated, network interface 26 may include transceiver 30. In some embodiments, all or part of transceiver 30 may be located within processor 12. Transceiver 30 may support the transmission and reception of various wireless signals via one or more antennas, and therefore may include transmitters and receivers. Power supply 29 for electronic device 10 may include any suitable power source, such as a rechargeable lithium polymer (Li-poly) battery and / or an AC power converter.

[0034] Figure 2 It is based on the implementation scheme of this disclosure. Figure 1 Functional diagram of electronic device 10. As illustrated, processor 12, memory 14, transceiver 30, transmitter 52, receiver 54 and / or antenna 55 (exemplified as 55A-55N, collectively referred to as antenna 55) may be communicatively coupled to each other directly or indirectly (e.g., via another component, communication bus, network) to transmit and / or receive signals between each other.

[0035] Electronic device 10 may include a transmitter 52 and / or a receiver 54, both enabling the transmission and reception of signals between electronic device 10 and external devices via, for example, a network (e.g., including a base station or access point) or a direct connection. As illustrated, transmitter 52 and receiver 54 may be combined into transceiver 30. Electronic device 10 may also have one or more antennas 55A-55N electrically coupled to transceiver 30. Antennas 55A-55N may be configured in omnidirectional or directional configurations, such as single-beam, dual-beam, or multi-beam arrangements. Each antenna 55 may be associated with one or more beams and various configurations. In some embodiments, multiple antennas in antennas 55A-55N of an antenna group or module may be communicatively coupled to a corresponding transceiver 30 and each emits radio frequency signals that may combine constructively and / or destructively to form a beam. Electronic device 10 may include multiple transmitters, multiple receivers, multiple transceivers, and / or multiple antennas suitable for various communication standards. In some implementations, transmitter 52 and receiver 54 may transmit and receive information via other wired or wired systems or devices.

[0036] As illustrated, various components of electronic device 10 can be coupled together via bus system 56. Bus system 56 may include, for example, a data bus, as well as power buses, control signal buses, and status signal buses in addition to the data bus. Components of electronic device 10 may be coupled together or use some other mechanism to accept or provide input to each other.

[0037] Figure 3This is a schematic diagram of a transmitter 52 (e.g., a transmitting circuit) according to an embodiment of this disclosure. As illustrated, the transmitter 52 is capable of receiving outgoing data 60 to be transmitted via one or more antennas 55 in the form of a digital signal. A digital-to-analog converter (DAC) 62 of the transmitter 52 can convert the digital signal into an analog signal. A VCO 63 can generate a carrier signal having a carrier frequency (e.g., a desired oscillation frequency). The VCO 63 can output an output signal (e.g., a carrier signal) to a modulator 64. The modulator 64 can combine the converted analog signal with the carrier signal to generate radio waves. Alternatively or additionally, the VCO 63 can provide the carrier signal having the carrier frequency to any other feasible circuitry, for example, to perform any other feasible function.

[0038] A power amplifier (PA) 66 receives a modulated signal from a modulator 64. The power amplifier 66 amplifies the modulated signal to a suitable level to drive its transmission via one or more antennas 55. A filter 68 (e.g., filter circuitry and / or software) of the transmitter 52 then removes unwanted noise from the amplified signal to generate a transmit signal 70 to be transmitted via one or more antennas 55. The filter 68 may include one or more suitable filters for removing unwanted noise from the amplified signal, such as bandpass filters, bandstop filters, low-pass filters, high-pass filters, and / or decimation filters.

[0039] Although transmitter 52 is shown as including a single VCO 63, it should be understood that electronics 10 and / or transmitter 52 may include additional VCOs 63. In various embodiments, the additional VCO 63 may perform different operations of electronics 10 and / or transmitter 52, such as frequency synthesis applications and clock generation applications. Furthermore, power amplifier 66 and / or filter 68 may be referred to as part of the radio frequency front end (RFFE) (and more specifically, the transmit front end (TXFE) of electronics 10). Additionally, transmitter 52 may include any suitable additional components not shown, or may exclude some of the illustrated components, such that transmitter 52 can transmit outgoing data 60 via one or more antennas 55. For example, transmitter 52 may include a mixer and / or a digital upconverter. Also, if power amplifier 66 outputs an amplified signal within or substantially within the desired frequency range (so that filtering of the amplified signal is unnecessary), transmitter 52 may not include filter 68.

[0040] Figure 4This is a schematic diagram of a receiver 54 (e.g., a receiver circuitry system) according to an embodiment of this disclosure. As illustrated, receiver 54 is capable of receiving a received signal 80 from one or more antennas 55 in the form of an analog signal. A low-noise amplifier (LNA) 82 amplifies the received analog signal to a suitable level for processing by receiver 54. A filter 84 (e.g., a filter circuitry system and / or software) removes unwanted noise, such as interchannel interference, from the received signal 80. Filter 84 also removes additional signals LNA 82s received by one or more antennas 55 at frequencies other than the desired signal. Filter 84 may include one or more suitable filters, such as bandpass filters, bandstop filters, low-pass filters, high-pass filters, and / or decimation filters, for removing unwanted noise or signals from the received signal 80. The low-noise amplifier 82 and / or filter 84 may be referred to as part of the RFFE (and more specifically, the receiver front-end (RXFE) of electronic device 10).

[0041] Receiver 54 may include a VCO 63 for receiving the received signal 80. VCO 63 may receive the received signal 80 from filter 84. Alternatively or additionally, VCO 63 may receive the received signal 80 from any other feasible circuitry, such as one or more antennas 55 or LNA 82. In some embodiments, VCO 63 may generate an output signal having a desired oscillation frequency indicating the frequency and phase of the received signal 80. In alternative or additional embodiments, VCO 63 may generate an oscillation signal that is mixed with the received signal 80 to produce an intermediate frequency (IF) signal to down-convert the frequency of the incoming RF signal for processing. Although receiver 54 is shown as including a single VCO 63, it should be understood that receiver 54 may include additional VCOs 63. For example, additional VCOs 63 may perform different operations of receiver 54.

[0042] Demodulator 86 may remove the radio frequency carrier signal from the filtered signal and / or extract the demodulated signal (e.g., envelope signal) for processing. In some embodiments, demodulator 86 may receive a signal indicating the frequency and phase of the received signal 80 and / or an intermediate frequency (IF) signal generated from VCO 63 to remove the radio frequency carrier signal from the filtered signal and / or extract the demodulated signal (e.g., envelope signal) for processing. Analog-to-digital converter (ADC) 88 may receive the demodulated analog signal and convert it into a digital signal of incoming data 90 for further processing by electronics 10. Additionally, receiver 54 may include any suitable additional components not shown, or may exclude some of the illustrated components, such that receiver 54 may receive the received signal 80 via one or more antennas 55. For example, receiver 54 may include a mixer and / or a digital downconverter.

[0043] Figure 5 This is a schematic diagram of a VCO 63 for a transmitter 52 and / or receiver 54 according to an embodiment of the present disclosure, which generates an output signal 110. VCO 63 may include a CMOS circuit system 112 (e.g., a current source circuit system), an inductor-capacitor (LC) tank circuit system 114 (e.g., a resonator circuit system), and a common-mode isolation circuit system 116. CMOS circuit system 112 may include an NMOS circuit 118 (e.g., a first voltage-controlled current source) and a PMOS circuit 120 (e.g., a second voltage-controlled current source). LC tank circuit system 114 may include a first LC tank circuit 122 and a second LC tank circuit 124.

[0044] VCO 63 may include a first unit 126 and a second unit 128, each unit including a portion of a CMOS circuit system 112 and an LC tank system 114. Specifically, the first unit 126 may include an NMOS circuit 118 and a first LC tank 122. Furthermore, the second unit 128 may include a PMOS circuit 120 and a second LC tank 124. In various embodiments, a common-mode isolation circuit system 116 may be disposed on and / or coupled to the first and second units. The common-mode isolation circuit system 116 may couple the first unit 126 to the second unit 128 for DC signals and signals having a desired oscillation frequency within and / or equal to a high or low threshold of the resonant frequency range. Furthermore, the common-mode isolation circuit system 116 may decouple the first unit 126 to the second unit 128 for signals having an undesired oscillation frequency outside the resonant frequency range (e.g., inductive decoupling).

[0045] In the depicted embodiment, NMOS circuit 118 may be coupled to voltage source 130 to receive bias voltage 132 (e.g., a DC signal). Alternatively or additionally, VCO 63 may receive the received signal 80 discussed above, in addition to or as a substitute for bias voltage 132 from any other feasible circuitry (e.g., one or more antennas 55, LNA 82). In any case, NMOS circuit 118 may generate a DC signal with a certain amount of current based on the received bias voltage 132, received signal 80, and other possibilities. Furthermore, VCO 63 may generate and output output signal 110 during operation based on the received bias voltage 132, received signal 80, and / or any other feasible input signal.

[0046] In some embodiments, VCO 63 may generate an output signal 110 having an oscillation frequency (e.g., a desired oscillation frequency) based on the frequency and phase of the received signal 80. In alternative or additional embodiments, VCO 63 may generate an output signal 110 having an oscillation frequency (e.g., a desired oscillation frequency) corresponding to a carrier signal having a carrier frequency for transmitting the outgoing data 60 discussed above. In yet another alternative or additional embodiment, VCO 63 may generate an output signal 110 corresponding to the oscillation signal for mixing with the received signal 80 to generate an intermediate frequency (IF) signal to down-convert the frequency of the incoming RF signal for processing.

[0047] The NMOS circuit 118 can be differentially coupled to a first LC tank path 122. The first LC tank path 122 can be coupled to a second LC tank path 124 via a common-mode isolation circuit system 116. Therefore, the first cell 126 can be coupled to the second cell 128 via the common-mode isolation circuit system 116. Furthermore, the second LC tank path 124 can be differentially coupled to a PMOS circuit 120. The PMOS circuit 120 can be coupled to a ground terminal 134. For example, the ground terminal 134 can have a ground voltage, such as a virtual ground voltage, 0 volts, or near-0 volts.

[0048] PMOS circuit 120 can utilize NMOS circuit 118 to generate a DC signal with a certain amount of current based on bias voltage 132, received signal 80, and other possibilities. NMOS circuit 118 and PMOS circuit 120 may each include a voltage-controlled current source to output the DC signal (e.g., current) to first LC tank path 122 and second LC tank path 124. NMOS circuit 118 and PMOS circuit 120 can provide the DC signal based on received bias voltage 132 (or any other feasible input signal) and ground voltage.

[0049] The first LC tank path 122, the second LC tank path 124, and the common-mode isolation circuit system 116 may at least partially share a resonant frequency range. For example, the first LC tank path 122 and the second LC tank path 124 may have resonant frequencies corresponding to desired oscillation frequencies within the resonant frequency range. Furthermore, the common-mode isolation circuit system 116 may couple (e.g., inductively coupled) the first unit 126 to the second unit 128 for both a DC signal and a signal having a desired oscillation frequency within the resonant frequency range. Therefore, the first LC tank path 122 and the second LC tank path 124 may generate an output signal 110 (e.g., a differential output signal) having a desired oscillation frequency within the resonant frequency range based on the received DC signal, as will be understood.

[0050] In some implementations, the common-mode isolation circuit system 116 may include a transmit line, a transformer, and / or impedance circuitry associated with the resonant frequency range. The common-mode isolation circuit system 116 may at least partially isolate common-mode signals of the first unit 126 and the second unit 128 having undesired oscillation frequencies outside the resonant frequency range. For example, the common-mode isolation circuit system 116 may at least partially decouple the first unit 126 (e.g., inductively decouple) from the second unit 128 for common-mode signals of the first unit 126 and the second unit 128 having undesired oscillation frequencies outside the resonant frequency range.

[0051] In the depicted embodiments, the NMOS circuit 118 may include a first switch 136 (e.g., a first NMOS switch) and a second switch 138 (e.g., a second NMOS switch) forming a first voltage-controlled current source. Furthermore, the PMOS circuit 120 may include a third switch 140 (e.g., a first PMOS switch) and a fourth switch 142 (e.g., a second PMOS switch) forming a second voltage-controlled current source. It should be understood that in alternative or additional embodiments, the NMOS circuit 118 and / or the PMOS circuit 120 may each include different switches (such as any feasible transistors) and / or different numbers of switches to provide a voltage-controlled current source.

[0052] The source terminals of the first switch 136 and the second switch 138 can be coupled to the voltage source 130 via the first degraded inductor 144. The first degraded inductor 144 can reduce noise and / or leakage at the voltage source 130 at the VCO 63, and / or reduce noise and / or leakage at the VCO 63 at the voltage source 130.

[0053] The gate terminal of the second switch 138 may be coupled (e.g., cross-coupled) to the drain terminal of the first switch 136 via the first node 146. The gate terminal of the first switch 136 may be coupled (e.g., cross-coupled) to the drain terminal of the second switch 138 via the second node 148. The drain terminal of the first switch 136 may be coupled to the first LC channel 122 via the first node 146. The drain terminal of the second switch 138 may be coupled to the first LC channel 122 via the second node 148.

[0054] Furthermore, the source terminals of the third switch 140 and the fourth switch 142 can be coupled to the ground terminal 134 via the second degraded inductor 150. The second degraded inductor 150 can reduce noise and / or leakage at the ground terminal 134 at the VCO 63, and / or reduce noise and / or leakage at the VCO 63 at the ground terminal 134.

[0055] The gate terminal of the fourth switch 142 may be coupled (e.g., cross-coupled) to the drain terminal of the third switch 140 via the third node 152. The gate terminal of the third switch 140 may be coupled (e.g., cross-coupled) to the drain terminal of the fourth switch 142 via the fourth node 154. The drain terminal of the third switch 140 may be coupled to the second LC channel 124 via the third node 152. The drain terminal of the fourth switch 142 may be coupled to the second LC channel 124 via the fourth node 154.

[0056] In the depicted embodiment, the drain terminal of the first switch 136 can be coupled to the positive output terminal 160 via the first node 146. Furthermore, the drain terminal of the second switch 138 can be coupled to the negative output terminal 162 via the second node 148. Therefore, the positive output terminal 160 and the negative output terminal 162 can output the output signal 110.

[0057] It should be understood that, in alternative or additional embodiments, the drain terminal of the third switch 140 may be coupled to the second positive output terminal via the third node 152, and the drain terminal of the fourth switch 142 may be coupled to the second negative output terminal via the fourth node 154. For example, the VCO 63 may also include a second positive output terminal and a second negative output terminal as alternatives to or in addition to the positive output terminal 160 and the negative output terminal 162. Therefore, in alternative or additional embodiments, the second positive output terminal and the second negative output terminal may output the output signal 110 as alternatives to or in addition to the positive output terminal 160 and the negative output terminal 162.

[0058] In different embodiments, the first LC tank path 122 and the second LC tank path 124 may include different numbers of capacitors and inductors to generate the output signal 110. In certain cases, the capacitance and inductance values ​​of the first LC tank path 122 and the second LC tank path 124 may be equal, nearly equal, or substantially equal. The capacitance and inductance values ​​of the first LC tank path 122 and the second LC tank path 124 may correspond to the desired oscillation frequency of the output signal 110. Therefore, adjusting the capacitance and / or inductance values ​​of the first LC tank path 122 and the second LC tank path 124 can tune the desired oscillation frequency of the output signal 110 within the resonant frequency range. In some cases, the desired oscillation frequency may be higher than a threshold (e.g., higher than 0.1 GHz, higher than 1 GHz, higher than 10 GHz, higher than 19 GHz, etc.) or within the resonant frequency range (e.g., 24.25 GHz to 300 GHz or millimeter wave frequencies, and other possibilities).

[0059] As mentioned above, the first LC tank path 122, the second LC tank path 124, and the common-mode isolation circuit system 116 may at least partially share a resonant frequency range. Furthermore, the common-mode isolation circuit system 116 may couple the first LC tank path 122 and the second LC tank path 124 for a DC signal and may inductively couple the first LC tank path 122 and the second LC tank path 124 for a signal having a desired oscillation frequency within the resonant frequency range. For example, the common-mode isolation circuit system 116 may include a transmit line, a transformer, and / or impedance circuitry associated with the resonant frequency range. Therefore, the common-mode isolation circuit system 116 may inductively couple the first LC tank path 122 and the second LC tank path 124 for an output signal 110 having a desired oscillation frequency. The first LC tank path 122 and the second LC tank path 124 may generate the output signal 110 having a desired oscillation frequency based on the inductive coupling via the common-mode isolation circuit system 116. Therefore, the VCO 63 may output an output signal 110 having a desired oscillation frequency within the resonant frequency range.

[0060] In some cases, if not otherwise considered, the first switch 136, the second switch 138, the third switch 140, and / or the fourth switch 142 may include nonlinear parasitic capacitors with nonlinear capacitance values ​​during operation. In additional or alternative cases, the first LC tank circuit 122 and / or the second LC tank circuit 124 may each include one or more nonlinear capacitors (e.g., varactor diodes) and / or one or more nonlinear parasitic capacitors with nonlinear capacitance values ​​during operation. Voltage fluctuations across the nonlinear capacitors may correspond to changes in the capacitance value of the nonlinear capacitors.

[0061] If left unconsidered, changes in the capacitance of a nonlinear capacitor may generate unwanted CM noise in response to undesired voltage fluctuations [164 and 166]. Under different circumstances, voltage fluctuations may be caused by thermally induced noise, power supply voltage fluctuations, gate-induced noise from one or more switches of the VCO, noise from one or more VCO materials and / or one or more VCO components, noise due to manufacturing processes and / or variations in manufacturing processes, flicker noise from one or more complementary metal-oxide-semiconductor (CMOS) components of the VCO, or combinations thereof.

[0062] In the depicted embodiment, the first unit 126 may include a first portion (e.g., half, nearly half) of the nonlinear capacitor of the VCO 63, and the second unit 128 may include the remaining portion (e.g., half, nearly half) of the nonlinear capacitor. The first unit 126 may generate a portion (e.g., half, nearly half) of CM noise 164, and the second unit 128 may generate the remaining portion (e.g., half, nearly half) of CM noise 166 of the VCO 63. CM noises 164 and 166 may have undesired oscillation frequencies outside the resonant frequency range of the common-mode isolation circuit system 116. Therefore, the common-mode isolation circuit system 116 may decouple the inductance of the first unit 126 from the second unit 128 for CM noises 164 and 166. Thus, the first unit 126 may generate a corresponding portion of CM noise 164, which is at least partially decoupled and / or isolated from the remaining portion of the CM noise 166 of the second unit 128. In some cases, CM noise 164 and 166 may have undesired oscillation frequencies below a threshold (e.g., below 1 GHz, below 220 kHz, below 100 kHz, etc.). CM noise 164 and 166 may have oscillation frequencies higher than those of the DC signal. For example, the DC signal may have oscillation frequencies below a threshold (e.g., below 100 kHz, below 10 kHz, below 1 kHz, etc.).

[0063] As mentioned above, output terminals 160 and 162 of VCO 63 may be disposed on the first unit 126. Therefore, VCO 63 may output an output signal 110 via output terminals 160 and 162 representing a corresponding portion (e.g., half, nearly half) of the CM noise 164 of the first unit 126. Furthermore, in alternative or additional embodiments, VCO 63 may include a second output terminal disposed on the second unit 128. In such embodiments, VCO 63 may output an output signal 110 via the second output terminal representing the remaining portion (e.g., half, nearly half) of the CM noise 166 of the second unit 128. In any case, VCO 63 may output an output signal 110 representing a portion of the CM noise 164 or 166 of VCO 63 compared to the entire CM noise 164 and 166 of VCO 63. Therefore, VCO 63 may reduce the amplitude of undesired noise to improve the phase noise of the output signal 110.

[0064] Furthermore, the common-mode isolation between NMOS circuit 118 and PMOS circuit 120 reduces the gate voltage dependence between one or more of switches 136, 138, 140, and 142. In some cases, VCO 63 can generate an output signal 110 with a higher voltage amplitude based on the common-mode isolation between the first cell 126 and the second cell 128. VCO 63 can generate an output signal 110 with an increased voltage amplitude without (e.g., disproportionately) increasing the power consumption of VCO 63.

[0065] For example, one or more of switches 136, 138, 140, and 142 can generate an output signal 110 with an increased voltage amplitude based on common-mode isolation without increasing the power consumption of VCO 63. Therefore, VCO 63 can generate an output signal 110 with an increased voltage amplitude without increasing the voltage amplitude of CM noise 164 or 166. Therefore, VCO 63 can generate an output signal 110 with reduced phase noise based on improving the SNR of the output signal 110.

[0066] Furthermore, the drain terminals of the first switch 136 and the second switch 138 can be coupled to the first LC tank path 122 and the common-mode isolation circuit system 116. Therefore, the first switch 136 and the second switch 138 can conduct corresponding portions of the CM noise 164 away from the common-mode isolation circuit system 116. Similarly, the drain terminals of the third switch 140 and the fourth switch 142 can be coupled to the second LC tank path 124 and the common-mode isolation circuit system 116. Therefore, the third switch 140 and the fourth switch 142 can also conduct the remaining portion of the CM noise 166 away from the common-mode isolation circuit system 116. Thus, the first unit 126 can conduct the corresponding portion of the CM noise 164 that is out of phase with the remaining portion of the CM noise 166 of the second unit 128.

[0067] In some cases, CM noise 164 or 166 and / or inverted CM noise 164 or 166 can be combined with the gate voltage of one or more of switches 136, 138, 140, and 142 to increase the voltage amplitude through the respective switches 136, 138, 140, and 142. Therefore, VCO 63 can generate an output signal 110 with an increased voltage amplitude without increasing the power consumption of VCO 63. That is, VCO 63 can generate an output signal 110 with an improved SNR based on decoupling and inverting the CM noise 164 and 166 of the first unit 126 and the second unit 128. Therefore, VCO 63 can output an output signal 110 with reduced phase noise.

[0068] Considering the foregoing, compared to other VCOs, VCO 63 can consume a certain amount of electrical power to generate an output signal 110 with reduced phase noise. That is, VCO 63 can generate the output signal 110 with improved SNR without increasing power consumption. Alternatively or additionally, compared to other VCOs, VCO 63 can generate an output signal 110 with phase noise by consuming a reduced amount of electrical power. That is, VCO 63 can generate an output signal 110 with phase noise with improved efficiency. Therefore, VCO 63 can improve the operation of transmitter 52, receiver 54, and / or electronic device 10 by generating a signal with improved signal integrity due to reduced noise and / or improved efficiency due to reduced power consumption. For example, the improved signal can reduce timing error rate and / or improve the integrity of transmitted and / or received data, etc.

[0069] Figure 6 This is a schematic diagram of a VCO 63 according to an embodiment of the present disclosure, wherein the common-mode isolation circuit system 116 includes a transformer 180. The transformer 180 may include a first inductor 182 and a second inductor 184. Furthermore, the common-mode isolation circuit system 116 may include a transmit line 186 coupled to the first inductor 182 and the second inductor 184. For example, the transmit line 186 may be branched onto the first inductor 182 and the second inductor 184. The transmit line 186 may conduct a DC signal (e.g., current) between the first unit 126 and the second unit 128. Therefore, the NMOS circuit 118 and the PMOS circuit 120 may generate a DC signal based on a bias voltage 132.

[0070] The first unit 126 may include a first inductor 182, and the second unit 128 may include a second inductor 184. The first inductor 182 may be coupled to the drain terminal of the first switch 136 via a first node 146, and may be coupled to the drain terminal of the second switch 138 via a second node 148. The second inductor 184 may be coupled to the drain terminal of the third switch 140 via a third node 152, and may be coupled to the drain terminal of the fourth switch 142 via a fourth node 154. Therefore, the first inductor 182 and the second inductor 184 may differentially receive a DC signal in response to the VCO 63 receiving a bias voltage 132 (or any other feasible input signal).

[0071] The first inductor 182 and the second inductor 184 can be inductively coupled to a signal having an oscillation frequency within the resonant frequency range with a coupling factor (K) equal to or higher than a first threshold. The first threshold can be 0.3, 0.4, 0.44, 0.5, 0.72, 0.76, 0.9, or 1, among other possibilities. In different embodiments, the first inductor 182 and the second inductor 184 can have different dimensions corresponding to the resonant frequency range.

[0072] As mentioned above, the first LC tank path 122 and the second LC tank path 124 can generate an output signal 110 having a desired oscillation frequency within the resonant frequency range. Therefore, the first inductor 182 can be inductively coupled to the second inductor 184 for the output signal 110 of the VCO 63 based on the output signal 110 having the desired oscillation frequency. Therefore, the transformer 180 can inductively couple the first unit 126 to the second unit 128 for the output signal 110.

[0073] Furthermore, the first inductor 182 and the second inductor 184 can be inductively decoupled for signals having oscillation frequencies outside the resonant frequency range based on a coupling factor equal to or lower than a second threshold. The second threshold can be 1, 0.9, 0.85, 0.72, 0.64, 0.5, 0.4, 0.2, 0.1, or 0.5, among other possibilities. Therefore, the first inductor 182 and the second inductor 184 can be inductively decoupled for CM noises 164 and 166 having undesired oscillation frequencies outside the resonant frequency range. Thus, the transformer 180 can at least partially decouple and / or isolate the first unit 126 from the second unit 128 for CM noises 164 and 166.

[0074] In the depicted embodiment, the first LC tank circuit 122 may include a first inductor 182, a first capacitor bank 190, a first switched capacitor circuit 192, and a first varactor diode 194. Furthermore, the second LC tank circuit 124 may include a second inductor 184, a second capacitor bank 196, a second switched capacitor circuit 198, and a second varactor diode 200. In some cases, the capacitance and inductance values ​​of the first LC tank circuit 122 and the second LC tank circuit 124 may be equal, nearly equal, or substantially equal. It should be understood that in different embodiments, the first LC tank circuit 122 and the second LC tank circuit 124 may include different circuit components. For example, the first LC tank circuit 122 and the second LC tank circuit 124 may include different numbers of capacitors and / or inductors for generating the output signal 110.

[0075] The first capacitor bank 190 and the second capacitor bank 196 may each include a plurality of capacitors. In some embodiments, one or more capacitors in the first capacitor bank 190 and / or the second capacitor bank 196 may be coupled to ground terminal 134. It should be understood that in different embodiments, the first capacitor bank 190 and the second capacitor bank 196 may each include different numbers of capacitors. In some cases, the first capacitor bank 190 and the second capacitor bank 196 may each include a plurality of nonlinear capacitors.

[0076] The first switched capacitor circuit 192 may include primary capacitors 210, 212, 214, 216, 218, and 220, and primary switches 222, 224, and 226. Based on closing the first primary switch 222, the first primary capacitor 210 and the second primary capacitor 212 may be coupled to the positive output terminal 160 and the negative output terminal 162, respectively, via a first node 146 and a second node 148. Based on closing the second primary switch 222, the third primary capacitor 214 and the fourth primary capacitor 216 may be coupled to the positive output terminal 160 and the negative output terminal 162, respectively, via a first node 146 and a second node 148. Based on closing the third primary switch 222, the fifth primary capacitor 218 and the sixth primary capacitor 220 may be coupled to the positive output terminal 160 and the negative output terminal 162, respectively, via a first node 146 and a second node 148.

[0077] The second switched capacitor circuit 198 may include secondary capacitors 230, 232, 234, 236, 238, and 240, and secondary switches 246, 248, and 250. Based on closing the first secondary switch 246, the first secondary capacitor 230 and the second secondary capacitor 232 can be coupled to the positive output terminal 160 and the negative output terminal 162, respectively, via a third node 152 and a fourth node 154. Based on closing the second secondary switch 248, the third secondary capacitor 234 and the fourth secondary capacitor 236 can be coupled to the positive output terminal 160 and the negative output terminal 162, respectively, via a third node 152 and a fourth node 154. Based on closing the third secondary switch 250, the fifth secondary capacitor 238 and the sixth secondary capacitor 240 can be coupled to the positive output terminal 160 and the negative output terminal 162, respectively, via a third node 152 and a fourth node 154.

[0078] As described above, electronic device 10 may include VCO 63. In some embodiments, processor 12 of electronic device 10 may generate control signals to open and close each of primary switches 222, 224 and 226 and / or secondary switches 246, 248 and 250 to adjust the capacitance values ​​of the first LC circuit 122 and the second LC circuit 124. Alternatively or additionally, any other feasible circuitry may generate the control signals.

[0079] The capacitance and inductance values ​​of the first LC tank circuit 122 and the second LC tank circuit 124 may be equal, nearly equal, or substantially equal. In some cases, each of the primary capacitors 210, 212, 214, 216, 218, and 220 may have a capacitance value corresponding to the capacitance value of the corresponding secondary capacitors 230, 232, 234, 236, 238, and 240. In specific cases, each of the primary capacitors 210, 212, 214, 216, 218, and 220 may have a capacitance value equal to or nearly equal to the capacitance value of the corresponding secondary capacitors 230, 232, 234, 236, 238, and 240.

[0080] Furthermore, the processor 12 can use a first-stage switch 246 to open and close the first primary switch 222, a second-stage switch 248 to open and close the second primary switch 222, and a third-stage switch 250 to open and close the third primary switch 222. Therefore, in response to opening and closing the primary switches 222, 224, and 226 and / or the secondary switches 246, 248, and 250, the capacitance and inductance values ​​of the first LC circuit 122 and the second LC circuit 124 can be adjusted equally, almost equally, or substantially equally.

[0081] The first varactor diode 194 may include a first primary junction diode 260 and a second primary junction diode 262. The second varactor diode 200 may include a first primary junction diode 270 and a second primary junction diode 272. The first varactor diode 194 and the second varactor diode 200 can receive a tuning voltage (V). CTRL 264 (or control voltage 264) is used to adjust and / or control the capacitance values ​​of the first primary junction diode 260, the second primary junction diode 262, the first primary junction diode 270, and the second secondary junction diode 272. In some cases, the processor 12 may generate the tuning voltage 264. Alternatively or additionally, any other feasible circuit system may generate the tuning voltage 264.

[0082] As mentioned above, the capacitance and inductance values ​​of the first LC channel 122 and the second LC channel 124 may be equal, nearly equal, or substantially equal. In some cases, each of the first primary junction diode 260, the first secondary junction diode 270, the second primary junction diode 262, and the second secondary junction diode 272 may have a corresponding capacitance value (e.g., equal or nearly equal capacitance values). Furthermore, a tuning voltage 264 may be provided to the first varactor diode 194 and the second varactor diode 200. Therefore, the capacitance and inductance values ​​of the first LC channel 122 and the second LC channel 124 can be adjusted equally, nearly equally, or substantially equally based on tuning the first converter 194 and the second converter 200.

[0083] The capacitance values ​​of the first LC channel 122 and the second LC channel 124 correspond to the desired oscillation frequency of the output signal 110. Therefore, adjusting the capacitance values ​​of the first LC channel 122 and the second LC channel 124 can adjust the desired oscillation frequency of the output signal 110. Therefore, opening and closing the primary switches 222, 224 and 226 and the secondary switches 246, 248 and 250 and / or adjusting the voltage value of the tuning voltage 264 can tune the desired oscillation frequency of the output signal 110.

[0084] As discussed above, the first unit 126 may include a first portion (e.g., half, nearly half) of the nonlinear capacitor of VCO 63, and the second unit 128 may include the remaining portion (e.g., half, nearly half) of the nonlinear capacitor. In some embodiments, one or more capacitors of the first capacitor bank 190 and / or the second capacitor bank 196 may have nonlinear capacitance values ​​and / or may form nonlinear parasitic capacitors during operation of VCO 63. Alternatively or additionally, one or more primary capacitors of the primary capacitors 210, 212, 214, 216, 218 and / or 220 of the first switched capacitor circuit 192 and / or one or more secondary capacitors of the secondary capacitors 230, 232, 234, 236, 238 and / or 240 of the second switched capacitor circuit 198 may have nonlinear capacitance values ​​and / or may form nonlinear parasitic capacitors during operation of VCO 63. Alternatively or additionally, one or more of the first primary junction diode 260, the first primary junction diode 270, the second primary junction diode 262, and the second secondary junction diode 272 of the first varactor diode 194 and / or the second varactor diode 200 may have a non-linear capacitance value and / or may form a non-linear parasitic capacitor during operation of the VCO 63. Furthermore, each of the switches 136, 138, 140, and / or 142 may form one or more non-linear parasitic capacitors between one or more corresponding terminals during operation of the VCO 63.

[0085] In any case, as mentioned above, the capacitance and inductance values ​​of the first LC tank path 122 and the second LC tank path 124 may be equal, nearly equal, or substantially equal. In some cases, the capacitance changes based on the nonlinear capacitance values ​​of the first LC tank path 122 of the first unit 126 and the second LC tank path 124 of the second unit 128 may also be equal, nearly equal, or substantially equal. Therefore, when generating the output signal 110 with the desired oscillation frequency, the first unit 126 and the second unit 128 may each generate corresponding portions of the entire CM noise 164 and 166 of the VCO 63. Furthermore, the transformer 180 may at least partially decouple and / or isolate the first unit 126 from the second unit 128 for the CM noise 164 and 166. Therefore, during the operation of the VCO 63, the first unit 126 and the second unit 128 may each comprise equal portions, half, or nearly half of the entire CM noise 164 and 166.

[0086] Therefore, inductively coupling the first unit 126 and the second unit 128 via the common-mode isolation circuit system 116 can reduce the undesirable voltage and / or frequency offset of the output signal 110 based on the first CM noise 164 and / or the second CM noise 166. Furthermore, the VCO 63 can generate the output signal 110 with improved SNR without increasing power consumption. Alternatively or additionally, compared to other VCOs, the VCO 63 can generate the output signal 110 with phase noise by consuming a reduced amount of electrical power. That is, the VCO 63 can generate the output signal 110 with phase noise with improved efficiency. Therefore, the VCO 63 can improve the operation of the transmitter 52, receiver 54, and / or electronic device 10 by generating a signal with improved signal integrity based on reduced noise and / or improved efficiency based on reduced power consumption. For example, the improved signal can reduce timing error rate and / or improve the integrity of transmitted and / or received data, etc.

[0087] Considering the foregoing, the first LC channel 122 may include a portion of the common-mode isolation circuit system 116 based on the inclusion of a first inductor 182. Furthermore, the second LC channel 124 may include a second portion of the common-mode isolation circuit system 116 based on the inclusion of a second inductor 184. The first inductor 182 may form the first LC channel 122 with the first capacitor bank 190, the first switched capacitor circuit 192, and the first varactor diode 194, and may also form the common-mode isolation circuit system 116 with the second inductor 184. Similarly, the second inductor 184 may form the second LC channel 124 with the second capacitor bank 196, the second switched capacitor circuit 198, and the second varactor diode 200, and may also form the common-mode isolation circuit system 116 with the first inductor 182. That is, the common-mode isolation circuit system 116, the first LC channel 122, and the second LC channel 124 may share the first LC channel 122 and the second inductor 184. Therefore, in some implementations, the common-mode isolation circuit system 116, the first LC channel 122 and / or the second LC channel 124 can occupy less area by sharing the first LC channel 122 and the second inductor 184, compared to having dedicated inductors that are not shared.

[0088] Furthermore, the first inductor 182 may be disposed near the second inductor 184. In some embodiments, the second inductor 184 may cover or under the first inductor 182, for example, on or in a printed circuit board (PCB), among other possibilities. Therefore, the first inductor 182 and the second inductor 184 may occupy less area than the area occupied by the first inductor 182 and the second inductor 184 arranged in different configurations (e.g., side-by-side). In some cases, the first inductor 182 and the second inductor 184 may occupy an area corresponding to the area of ​​either the first inductor 182 or the second inductor 184, which is smaller than the area occupied by the first inductor 182 and the second inductor 184 arranged in different configurations. For example, the first inductor 182 and the second inductor 184 may occupy an area corresponding to a portion of the area occupied by the first inductor 182 and the second inductor 184 arranged side-by-side.

[0089] Figure 7 This is a schematic diagram of VCO 63 according to an embodiment of the present disclosure, wherein the common-mode isolation circuit system 116 includes a transformer 180 and a common-mode degradation inductor 300. As mentioned above, the common-mode isolation circuit system 116 may include impedance circuitry associated with a resonant frequency range. In the depicted embodiment, the common-mode isolation circuit system 116 may include a common-mode degradation inductor 300 coupled to a first inductor 182 and a second inductor 184 having a resonant frequency range (e.g., branched onto the first inductor and the second inductor).

[0090] The common-mode degradation inductor 300 can conduct a DC signal (e.g., current) between the first cell 126 and the second cell 128. Therefore, the NMOS circuit 118 and the PMOS circuit 120 can generate a DC signal based on the bias voltage 132. Furthermore, the common-mode degradation inductor 300 can have an impedance value corresponding to decoupling a signal having an oscillation frequency outside the resonant frequency range. Therefore, the common-mode degradation inductor 300 can reduce the amplitude of noise and / or leakage (e.g., CM noise 164) in the first cell 126 at the second cell 128 and / or reduce the amplitude of noise and / or leakage (e.g., CM noise 166) in the second cell 128 at the first cell 126.

[0091] As discussed above, the first inductor 182 and the second inductor 184 can be inductively coupled to signals having oscillation frequencies within the resonant frequency range with a coupling factor (K) equal to or higher than a first threshold. Furthermore, the first inductor 182 and the second inductor 184 can be inductively decoupled to signals having oscillation frequencies outside the resonant frequency range based on a coupling factor equal to or lower than a second threshold. Therefore, the VCO 63 can generate an output signal 110 with a desired oscillation frequency within the resonant frequency range based on the inclusion of the common-mode degraded inductor 300 to reduce phase noise.

[0092] Figure 8 This is a schematic diagram of VCO 63 according to an embodiment of the present disclosure, wherein the common-mode isolation circuit system 116 includes a transformer 180 and a T-segment impedance circuit 302. In the depicted embodiment, the common-mode isolation circuit system 116 may include a T-segment impedance circuit 302 coupled to a first inductor 182 and a second inductor 184 (e.g., branched onto the first inductor and the second inductor). The T-segment impedance circuit 302 may include a first impedance component 304 coupled to the first inductor 182 (e.g., branched onto the first inductor). The T-segment impedance circuit 302 may include a second impedance component 306 coupled to the second inductor 184 and coupled to the first impedance component 304 via a fifth node 310. The T-segment impedance circuit 302 may include a third impedance component 308 coupled to the first impedance component 304 and the second impedance component 306 via the fifth node 310. For example, the third impedance component 308 may also be coupled to a ground terminal 134.

[0093] The T-segment impedance circuit 302 may have an impedance value corresponding to decoupling signals having oscillation frequencies outside the resonant frequency range (e.g., CM noise 164 and 166). The first impedance component 304, the second impedance component 306, and the third impedance component 308 may each include a programmable or non-programmable resistor, capacitor, and / or inductor. For example, the first impedance component 304, the second impedance component 306, and / or the third impedance component 308 may include a common-mode degradation inductor 300, among other possibilities. In some embodiments, the first impedance component 304, the second impedance component 306, and / or the third impedance component 308 may include a switch. For example, the processor 12 or any other feasible component may generate control signals to program the programmable resistor, capacitor, and / or inductor. Furthermore, the processor 12 or any other feasible component may provide control signals to the switch to couple or decouple (e.g., bypass) the first impedance component 304, the second impedance component 306, and / or the third impedance component 308.

[0094] Therefore, the T-segment impedance circuit 302 can reduce the amplitude of noise and / or leakage (e.g., CM noise 164) of the first unit 126 at the second unit 128 and / or reduce the amplitude of noise and / or leakage (e.g., CM noise 166) of the second unit 128 at the first unit 126. As discussed above, the first inductor 182 and the second inductor 184 can be inductively coupled to signals having oscillation frequencies within the resonant frequency range with a coupling factor (K) equal to or higher than a first threshold. Furthermore, the first inductor 182 and the second inductor 184 can be inductively decoupled to signals having oscillation frequencies outside the resonant frequency range based on a coupling factor equal to or lower than a second threshold. Therefore, the VCO 63 can generate an output signal 110 with a desired oscillation frequency within the resonant frequency range with reduced phase noise based on the inclusion of the T-segment impedance circuit 302.

[0095] Figure 9 This is a schematic diagram of VCO 63 according to an embodiment of the present disclosure, wherein the common-mode isolation circuit system 116 includes a transformer 180 and a PI segment impedance circuit 320. In the depicted embodiment, the common-mode isolation circuit system 116 may include a PI segment impedance circuit 320 coupled to a first inductor 182 and a second inductor 184 (e.g., branched onto the first inductor and the second inductor). The PI segment impedance circuit 320 may include a first impedance component 304 coupled to the first inductor 182 and the second inductor 184 (e.g., branched onto the first inductor and the second inductor). The PI segment impedance circuit 320 may include a second impedance component 306 coupled to the first inductor 182 and a ground terminal 134. The PI segment impedance circuit 320 may include a third impedance component 308 coupled to the second inductor 184 and the ground terminal 134.

[0096] The PI-segment impedance circuit 320 may have an impedance value corresponding to decoupling signals having oscillation frequencies outside the resonant frequency range (e.g., CM noise 164 and 166). The first impedance component 304, the second impedance component 306, and the third impedance component 308 may each include a programmable or non-programmable resistor, capacitor, and / or inductor. For example, the first impedance component 304, the second impedance component 306, and / or the third impedance component 308 may include a common-mode degradation inductor 300, among other possibilities. In some embodiments, the first impedance component 304, the second impedance component 306, and / or the third impedance component 308 may include a switch. For example, the processor 12 or any other feasible component may generate control signals to program the programmable resistor, capacitor, and / or inductor. Furthermore, the processor 12 or any other feasible component may provide control signals to the switch to couple or decouple (e.g., bypass) the first impedance component 304, the second impedance component 306, and / or the third impedance component 308.

[0097] Therefore, the PI segment impedance circuit 320 can reduce the amplitude of noise and / or leakage (e.g., CM noise 164) at the first unit 126 and / or reduce the amplitude of noise and / or leakage (e.g., CM noise 166) at the second unit 128. As discussed above, the first inductor 182 and the second inductor 184 can be inductively coupled to signals having oscillation frequencies within the resonant frequency range with a coupling factor (K) equal to or higher than a first threshold. Furthermore, the first inductor 182 and the second inductor 184 can be inductively decoupled to signals having oscillation frequencies outside the resonant frequency range based on a coupling factor equal to or lower than a second threshold. Therefore, the VCO 63 can generate an output signal 110 with a desired oscillation frequency within the resonant frequency range with reduced phase noise based on the inclusion of the PI segment impedance circuit 320.

[0098] The specific embodiments described above have been shown by way of example, and it should be understood that these embodiments are permissible with various modifications and alternatives. It should also be understood that the claims are not intended to be limited to the specific forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the substance and scope of this disclosure.

[0099] The techniques presented and claimed herein are referenced and applied to specific examples of physical and practical nature that significantly improve the art and are therefore not abstract, intangible, or purely theoretical. Furthermore, if any claim appended to this specification contains one or more elements designated as “means for [performing] [function]…” or “steps for [performing] [function]…”, such elements are intended to be interpreted in accordance with 35 USC 112(f). However, for any claim containing elements designated in any other manner, such elements are intended not to be interpreted in accordance with 35 USC 112(f).

[0100] As is widely recognized, the use of personally identifiable information should comply with privacy policies and practices that are generally accepted to meet or exceed industry or governmental requirements for protecting user privacy. In particular, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of authorized use should be clearly explained to users.

[0101] An electronic device may include: an antenna; and a voltage-controlled oscillator (VCO) comprising: a first voltage-controlled current source; a first inductor-capacitor tank circuit coupled to the first voltage-controlled current source; a first impedance component coupled to the first inductor-capacitor tank circuit; a second inductor-capacitor tank circuit coupled to the first inductor-capacitor tank circuit, the second inductor-capacitor tank circuit being inductively coupled to the first inductor-capacitor tank circuit; and a second voltage-controlled current source coupled to the second inductor-capacitor tank circuit and coupled to a ground terminal.

[0102] The first inductor-capacitor tank circuit may include a first capacitor and a first inductor having a first resonant frequency within the resonant frequency range, and the second inductor-capacitor tank circuit may include a second capacitor and a second inductor having a second resonant frequency within the resonant frequency range. The first inductor and the second inductor may be inductively coupled based on a signal having a desired oscillation frequency within the resonant frequency range, and the first inductor and the second inductor may be inductively decoupled based on a signal having a non-desired oscillation frequency outside the resonant frequency range.

[0103] The electronic device may include: a second impedance component coupled to the first impedance component and the second inductor-capacitor tank circuit, the second inductor-capacitor tank circuit being coupled to the first impedance component via the second impedance component; and a third impedance component coupled to the first impedance component and the second impedance component.

[0104] The electronic device may include: a second impedance component coupled to the first impedance component and the first inductor-capacitor tank circuit; and a third impedance component coupled to the first impedance component and the second inductor-capacitor tank circuit.

[0105] The electronic device may include a receiver, which includes the VCO, wherein the VCO can receive a received signal from the antenna and the VCO can output an output signal indicating the frequency and phase of the received signal.

[0106] The electronic device may include a transmitter, which includes the VCO, wherein the VCO may be coupled to a voltage source, and the VCO may output an output signal corresponding to a carrier signal to modulate a transmission signal for transmission by the antenna.

[0107] A voltage-controlled oscillator (VCO) may include: a first inductor-capacitor tank circuit that can receive a direct current (DC) signal; a first impedance component coupled to the first inductor-capacitor tank circuit; and a second inductor-capacitor tank circuit coupled to the first impedance component, the second inductor-capacitor tank circuit being inductively coupled to the first inductor-capacitor tank circuit based on the DC signal to generate an output signal having a desired oscillation frequency within a resonant frequency range and inductively decoupled from the first inductor-capacitor tank circuit based on a signal having a non-desired oscillation frequency outside the resonant frequency range.

[0108] The first impedance component may include a degraded inductor that reduces the amplitude of the signal having the undesired oscillation frequency.

[0109] The VCO may include: a second impedance component coupled to the first impedance component and the second inductor-capacitor tank circuit, the second inductor-capacitor tank circuit being coupled to the first impedance component via the second impedance component; and a third impedance component coupled to the first impedance component and the second impedance component.

[0110] The VCO may include: a second impedance component coupled to the first impedance component and the first inductor-capacitor tank circuit; and a third impedance component coupled to the first impedance component and the second inductor-capacitor tank circuit.

[0111] The VCO may include a first voltage-controlled current source and a second voltage-controlled current source. The first voltage-controlled current source may be coupled to a voltage source and the first inductor-capacitor tank circuit. The second voltage-controlled current source may be coupled to the second inductor-capacitor tank circuit and a ground terminal. The first voltage-controlled current source and the second voltage-controlled current source may generate the DC signal based on the bias voltage of the voltage source.

[0112] The first inductor-capacitor tank circuit may include a first capacitor and a first inductor having a resonant frequency corresponding to the desired oscillation frequency, and the second inductor-capacitor tank circuit may include a second capacitor and a second inductor having a resonant frequency corresponding to the desired oscillation frequency. The first inductor and the second inductor may be inductively coupled based on a signal having the desired oscillation frequency and inductively decoupled based on a signal having a non-desired oscillation frequency.

[0113] A voltage-controlled oscillator (VCO) includes: a first voltage-controlled current source coupled to a voltage source; a first inductor-capacitor tank coupled to the first voltage-controlled current source; a first impedance component coupled to the first inductor-capacitor tank; a second inductor-capacitor tank coupled to the first impedance component; and a second voltage-controlled current source coupled to the second inductor-capacitor tank, the second voltage-controlled current source being coupled to a ground terminal.

[0114] The first impedance component may include a degraded inductor that reduces the amplitude of a signal having an undesired oscillation frequency outside the resonant frequency range of the first inductor-capacitor tank circuit and the second inductor-capacitor tank circuit.

[0115] The VCO may include: a second impedance component coupled to the first impedance component and the second inductor-capacitor tank circuit, the second inductor-capacitor tank circuit being coupled to the first impedance component via the second impedance component; and a third impedance component coupled to the first impedance component and the second impedance component.

[0116] The VCO may include: a second impedance component coupled to the first impedance component and the first inductor-capacitor tank circuit; and a third impedance component coupled to the first impedance component and the second inductor-capacitor tank circuit.

[0117] The first inductor-capacitor tank circuit, the second inductor-capacitor tank circuit, or both can output an output signal based on the bias voltage of the voltage source.

[0118] The first inductor-capacitor tank circuit may include a first capacitor and a first inductor having a first resonant frequency within the resonant frequency range, and the second inductor-capacitor tank circuit may include a second capacitor and a second inductor having a second resonant frequency within the resonant frequency range.

[0119] The first inductor and the second inductor can be inductively coupled based on signals having a desired oscillation frequency within the resonant frequency range of the first inductor-capacitor tank circuit and the second inductor-capacitor tank circuit.

[0120] The first inductor and the second inductor can be inductively decoupled based on signals having undesired oscillation frequencies outside the resonant frequency range of the first inductor-capacitor tank circuit and the second inductor-capacitor tank circuit.

Claims

1. An electronic device, the electronic device comprising: antenna; and A voltage-controlled oscillator (VCO), the voltage-controlled oscillator (VCO) comprising: First voltage-controlled current source The first inductor-capacitor tank circuit is coupled to the first voltage-controlled current source. A second inductor-capacitor tank circuit is configured to be inductively coupled to the first inductor-capacitor tank circuit. The second voltage-controlled current source is coupled to the second inductor-capacitor tank circuit and to the ground terminal.

2. The electronic device of claim 1, wherein the first inductor-capacitor tank circuit comprises a first capacitor and a first inductor having a first resonant frequency within a resonant frequency range, the second inductor-capacitor tank circuit comprises a second capacitor and a second inductor having a second resonant frequency within the resonant frequency range, the first inductor and the second inductor being configured to perform inductive coupling based on a signal having a desired oscillation frequency within the resonant frequency range, and the first inductor and the second inductor being configured to perform inductive decoupling based on a signal having a non-desired oscillation frequency outside the resonant frequency range.

3. The electronic device according to claim 1, wherein the electronic device includes a receiver, and the receiver includes the VCO.

4. The electronic device of claim 3, wherein the VCO is configured to receive a received signal from the antenna, and the VCO is configured to output an output signal indicating the frequency and phase of the received signal.

5. The electronic device according to claim 1, wherein the electronic device includes a transmitter, and the transmitter includes the VCO.

6. The electronic device of claim 5, wherein the VCO is configured to generate an output signal corresponding to a carrier signal to modulate a transmission signal for transmission by the antenna.

7. A voltage-controlled oscillator (VCO), the voltage-controlled oscillator (VCO) comprising: The first inductor-capacitor tank circuit is configured to receive a direct current (DC) signal. and A second inductor-capacitor tank circuit is configured to inductively couple to the first inductor-capacitor tank circuit based on the DC signal to generate an output signal having a desired oscillation frequency within the resonant frequency range, and the second inductor-capacitor tank circuit is configured to inductively decouple from the first inductor-capacitor tank circuit based on a signal having a non-desired oscillation frequency outside the resonant frequency range.

8. The VCO according to claim 7, wherein the VCO includes a first voltage-controlled current source and a second voltage-controlled current source, the first voltage-controlled current source being configured to be coupled to a voltage source and the first inductor-capacitor tank circuit, and the second voltage-controlled current source being configured to be coupled to the second inductor-capacitor tank circuit and a ground terminal.

9. The VCO of claim 8, wherein the first voltage-controlled current source and the second voltage-controlled current source are configured to generate the DC signal based on the bias voltage of the voltage sources.

10. The VCO of claim 7, wherein the first inductor-capacitor tank circuit comprises a first capacitor and a first inductor having a first resonant frequency corresponding to the desired oscillation frequency, and the second inductor-capacitor tank circuit comprises a second capacitor and a second inductor having a second resonant frequency corresponding to the desired oscillation frequency.

11. The VCO of claim 10, wherein the first inductor and the second inductor are configured to perform inductive coupling based on a signal having the desired oscillation frequency and to perform inductive decoupling based on a signal having the undesired oscillation frequency outside the resonant frequency range.

12. A voltage-controlled oscillator (VCO), the voltage-controlled oscillator (VCO) comprising: A first voltage-controlled current source, the first voltage-controlled current source being configured to be coupled to a voltage source; The first inductor-capacitor tank circuit is coupled to the first voltage-controlled current source; A second inductor-capacitor tank circuit is configured to be inductively coupled to the first inductor-capacitor tank circuit. and A second voltage-controlled current source is coupled to the second inductor-capacitor tank circuit and configured to be coupled to a ground terminal.

13. The VCO of claim 12, wherein the first voltage-controlled current source comprises a first switch and a second switch, the source terminals of the first switch and the second switch are configured to be coupled to the voltage source, the gate terminal of the first switch is configured to be coupled to the drain terminal of the second switch, the gate terminal of the second switch is configured to be coupled to the drain terminal of the first switch, and the drain terminals of the first switch and the drain terminals of the second switch are coupled to the first inductor-capacitor tank circuit.

14. The VCO according to claim 12, wherein the capacitance value of the first inductor-capacitor tank circuit corresponds to the capacitance value of the second inductor-capacitor tank circuit.

15. The VCO according to claim 12, wherein The first inductor-capacitor tank circuit includes a first capacitor bank, a first switched capacitor circuit, a first varactor diode, or any combination thereof, and The second inductor-capacitor circuit includes a second capacitor bank, a second switched capacitor circuit, a second varactor diode, or any combination thereof.

16. The VCO of claim 12, wherein the first inductor-capacitor tank circuit, the second inductor-capacitor tank circuit, or both are configured to output an output signal based on the bias voltage of the voltage source.

17. The VCO of claim 12, wherein the first inductor-capacitor tank circuit comprises a first capacitor and a first inductor having a first resonant frequency within the resonant frequency range, and the second inductor-capacitor tank circuit comprises a second capacitor and a second inductor having a second resonant frequency within the resonant frequency range.

18. The VCO of claim 17, wherein the first inductor and the second inductor are configured to perform inductive coupling based on a signal having a desired oscillation frequency within the resonant frequency range.

19. The VCO of claim 17, wherein the first inductor and the second inductor are configured to perform inductive decoupling based on a signal having an undesired oscillation frequency outside the said resonant frequency range.

20. The VCO of claim 12, wherein the second voltage-controlled current source comprises a third switch and a fourth switch, the source terminals of the third switch and the fourth switch being configured to be coupled to the ground terminal, the gate terminal of the third switch being configured to be coupled to the drain terminal of the fourth switch, the gate terminal of the fourth switch being configured to be coupled to the drain terminal of the third switch, and the drain terminals of the third switch and the fourth switch being coupled to the second inductor-capacitor tank circuit.

21. An electronic device, the electronic device comprising: antenna; and A voltage-controlled oscillator (VCO), the voltage-controlled oscillator (VCO) comprising: First voltage-controlled current source The first inductor-capacitor tank circuit is coupled to the first voltage-controlled current source. The first impedance component is coupled to the first inductor-capacitor tank circuit. A second inductor-capacitor tank circuit, the second inductor-capacitor tank circuit being coupled to and configured to be inductively coupled to the first inductor-capacitor tank circuit, and The second voltage-controlled current source is coupled to the second inductor-capacitor tank circuit and to the ground terminal.

22. The electronic device of claim 21, wherein the first inductor-capacitor tank circuit comprises a first capacitor and a first inductor having a first resonant frequency within a resonant frequency range, the second inductor-capacitor tank circuit comprises a second capacitor and a second inductor having a second resonant frequency within the resonant frequency range, the first inductor and the second inductor being configured to inductively couple based on a signal having a desired oscillation frequency within the resonant frequency range, and the first inductor and the second inductor being configured to inductively decouple based on a signal having a non-desired oscillation frequency outside the resonant frequency range.

23. The electronic device of claim 21, wherein the electronic device comprises: A second impedance component is coupled to the first impedance component and the second inductor-capacitor tank circuit, and the second inductor-capacitor tank circuit is coupled to the first impedance component via the second impedance component; and a third impedance component, which is coupled to the first impedance component and the second impedance component.

24. The electronic device of claim 21, wherein the electronic device comprises: A second impedance component is coupled to the first impedance component and the first inductor-capacitor tank circuit; and a third impedance component, which is coupled to the first impedance component and the second inductor-capacitor tank circuit.

25. The electronic device of claim 21, the electronic device comprising a receiver, the receiver including the VCO, wherein the VCO is configured to receive a received signal from the antenna, and the VCO is configured to output an output signal indicating the frequency and phase of the received signal.

26. The electronic device of claim 21, the electronic device comprising a transmitter, the transmitter including the VCO, wherein the VCO is configured to be coupled to a voltage source, the VCO being configured to output an output signal corresponding to a carrier signal to modulate a transmission signal for transmission by the antenna.

27. A voltage-controlled oscillator (VCO), the voltage-controlled oscillator (VCO) comprising: The first inductor-capacitor tank circuit is configured to receive a direct current (DC) signal. A first impedance component, the first impedance component being coupled to the first inductor-capacitor tank circuit; and A second inductor-capacitor tank circuit is coupled to the first impedance component, and the second inductor-capacitor tank circuit is configured as follows: Based on the DC signal, inductive coupling is performed to the first inductor-capacitor tank circuit to generate an output signal with a desired oscillation frequency within the resonant frequency range, and The inductor is decoupled from the first inductor-capacitor tank circuit based on a signal having an undesired oscillation frequency outside the said resonant frequency range.

28. The VCO of claim 27, wherein the first impedance component includes a degraded inductor configured to reduce the amplitude of the signal having the undesired oscillation frequency.

29. The VCO of claim 27, wherein the VCO comprises: A second impedance component is coupled to the first impedance component and the second inductor-capacitor tank circuit, and the second inductor-capacitor tank circuit is coupled to the first impedance component via the second impedance component; and a third impedance component, which is coupled to the first impedance component and the second impedance component.

30. The VCO of claim 27, wherein the VCO comprises: A second impedance component is coupled to the first impedance component and the first inductor-capacitor tank circuit; and a third impedance component, which is coupled to the first impedance component and the second inductor-capacitor tank circuit.

31. The VCO of claim 27, wherein the VCO includes a first voltage-controlled current source and a second voltage-controlled current source, the first voltage-controlled current source being configured to be coupled to a voltage source and a first inductor-capacitor tank circuit, the second voltage-controlled current source being configured to be coupled to a second inductor-capacitor tank circuit and a ground terminal, and the first voltage-controlled current source and the second voltage-controlled current source being configured to generate the DC signal based on a bias voltage of the voltage source.

32. The VCO of claim 27, wherein the first inductor-capacitor tank circuit comprises a first capacitor and a first inductor having a resonant frequency corresponding to the desired oscillation frequency, and the second inductor-capacitor tank circuit comprises a second capacitor and a second inductor having a resonant frequency corresponding to the desired oscillation frequency, the first inductor and the second inductor being configured to inductively couple based on a signal having the desired oscillation frequency and to inductively decouple based on a signal having the undesired oscillation frequency.

33. A voltage-controlled oscillator (VCO), the voltage-controlled oscillator (VCO) comprising: A first voltage-controlled current source, the first voltage-controlled current source being configured to be coupled to a voltage source; The first inductor-capacitor tank circuit is coupled to the first voltage-controlled current source; A first impedance component, the first impedance component being coupled to the first inductor-capacitor tank circuit; The second inductor-capacitor tank circuit is coupled to the first impedance component; and A second voltage-controlled current source is coupled to the second inductor-capacitor tank circuit and configured to be coupled to a ground terminal.

34. The VCO of claim 33, wherein the first impedance component includes a degraded inductor configured to reduce the amplitude of a signal having an undesired oscillation frequency outside the resonant frequency range of the first inductor-capacitor tank circuit and the second inductor-capacitor tank circuit.

35. The VCO according to claim 33, wherein the VCO comprises: A second impedance component is coupled to the first impedance component and the second inductor-capacitor tank circuit, and the second inductor-capacitor tank circuit is coupled to the first impedance component via the second impedance component; and a third impedance component, which is coupled to the first impedance component and the second impedance component.

36. The VCO according to claim 33, wherein the VCO comprises: A second impedance component is coupled to the first impedance component and the first inductor-capacitor tank circuit; and a third impedance component, which is coupled to the first impedance component and the second inductor-capacitor tank circuit.

37. The VCO of claim 33, wherein the first inductor-capacitor tank circuit, the second inductor-capacitor tank circuit, or both are configured to output an output signal based on the bias voltage of the voltage source.

38. The VCO of claim 33, wherein the first inductor-capacitor tank circuit comprises a first capacitor and a first inductor having a first resonant frequency within the resonant frequency range, and the second inductor-capacitor tank circuit comprises a second capacitor and a second inductor having a second resonant frequency within the resonant frequency range.

39. The VCO of claim 38, wherein the first inductor and the second inductor are configured to perform inductive coupling based on a signal having a desired oscillation frequency within the resonant frequency range of the first inductor-capacitor tank circuit and the second inductor-capacitor tank circuit.

40. The VCO of claim 38, wherein the first inductor and the second inductor are configured to perform inductive decoupling based on a signal having an undesired oscillation frequency outside the resonant frequency range of the first inductor-capacitor tank circuit and the second inductor-capacitor tank circuit.

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