Method for manufacturing a carbon nanotube-based field effect transistor sensor and sensor

By employing a self-aligned deposition process and electron beam evaporation technology in carbon nanotube sensors, combined with a Y2O3/HfO2 composite passivation layer and a gold-sulfur bond immobilizing aptamer, the problems of uneven gold nanoparticle deposition and poor device consistency were solved, achieving the fabrication of sensors with high stability and high uniformity, suitable for environmental monitoring and biomedical detection.

CN121899228BActive Publication Date: 2026-06-23XIANGTAN UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XIANGTAN UNIV
Filing Date
2026-03-23
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

Existing technologies for depositing gold nanoparticles in carbon nanotube sensors suffer from complex deposition processes, uneven particle distribution, and poor device consistency.

Method used

A self-aligned deposition process and electron beam evaporation were used to deposit a layer of gold nanoparticles in the functional region of the conductive channel of carbon nanotubes. The aptamers were fixed by gold-sulfur bonds. Combined with a Y2O3/HfO2 composite passivation layer and precise pore opening technology, the loss and inhomogeneity of nanoparticles in traditional methods were avoided.

Benefits of technology

This improves the deposition stability and distribution uniformity of gold nanoparticles, enhances the device consistency and detection performance of the sensor, and makes it suitable for mass production and real-time on-site detection.

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Abstract

The application relates to a preparation method of a carbon nanotube-based field effect tube sensor and the sensor, and relates to the fields of nanomaterials and biosensing technology, and comprises the following steps: preparing a carbon nanotube conductive channel on a substrate, and forming a source electrode and a drain electrode at two ends of the carbon nanotube conductive channel; depositing a passivation layer above the carbon nanotube conductive channel and the source electrode and the drain electrode; performing opening processing on the passivation layer to expose a functional area of the carbon nanotube conductive channel; depositing a gold nanoparticle layer on the functional area after the opening is completed through a self-alignment deposition process and an electron beam evaporation mode; and fixing aptamers on the surface of the gold nanoparticle layer through a gold-sulfur bond to complete functionalization preparation of the biosensor. The application solves the problem of high loss rate of gold nanoparticles, and improves the batch uniformity and detection performance of the sensor.
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Description

Technical Field

[0001] This invention relates to the field of nanoelectronic device and sensor manufacturing technology, and in particular to a method for preparing a field-effect transistor sensor based on carbon nanotubes and the sensor itself. Specifically, it relates to a process for preparing a carbon nanotube sensor with a functionalized interface constructed by gold nanoparticle self-assembly and deposition technology and the sensor itself. Background Technology

[0002] With the development of nanomaterials and microelectronics technology, nanomaterial-based sensors have received widespread attention in fields such as environmental monitoring, biomedical detection, and food safety. Among them, carbon nanotubes (CNTs) are widely used in field-effect transistor sensors (CNT-FETs) due to their excellent electrical properties, high carrier mobility, and large specific surface area, as well as their extreme sensitivity to changes in surface charge.

[0003] In CNT-FET sensors, gold nanoparticles (Au NPs) are typically introduced onto the surface of carbon nanotubes to immobilize antibodies, aptamers, or other biorecognition molecules, thereby constructing a sensing interface with specific recognition capabilities. Gold nanoparticles not only possess excellent biocompatibility, but their surface can also bind to thiol-modified molecules via Au–S bonds, making them an important material for constructing biofunctionalized interfaces.

[0004] Currently, the most commonly used method for preparing gold nanoparticles is chemical synthesis. Chemical synthesis typically involves a reduction reaction in solution to generate gold nanoparticles, for example, by reacting reagents such as chloroauric acid, sodium citrate, and tannic acid in an aqueous solution to form a stable, dispersed Au NP solution.

[0005] After obtaining the solution containing Au NPs, gold nanoparticles need to be modified onto the surface of a solid substrate. Previous studies have proposed forming Au NP array structures on the substrate surface through self-assembly. For example, Sato et al. constructed a gold nanoparticle array on a silica (SiO2) surface via self-assembly. This method first treats the silicon wafer with oxygen plasma to make its surface hydrophilic; then, it modifies the surface with aminopropyltriethoxysilane (APTES) to form an aminated structure; next, the substrate is placed in a weakly acidic Au NP solution. Since the amino groups are positively charged in the solution, they can adsorb negatively charged gold nanoparticles, thus forming an Au NP array on the substrate surface. By controlling the reaction time, nanoparticle structures with suitable density can be obtained. Finally, ozone cleaning removes the APTES molecules, leaving only the gold nanoparticles.

[0006] However, in the actual manufacturing process of carbon nanotube sensors, the above method still has the following shortcomings:

[0007] Solution self-assembly methods rely on surface chemical reactions, and the process steps are relatively complex.

[0008] The distribution of nanoparticles is easily affected by solution concentration and reaction time, making it difficult to precisely control particle density.

[0009] In micro-nano fabrication processes, nanoparticles are prone to detachment during cleaning or photolithography.

[0010] Significant differences exist in the distribution of gold nanoparticles among different devices, which affects the consistency and stability of the devices.

[0011] Therefore, a new preparation method is needed to improve the deposition stability and distribution uniformity of gold nanoparticles in carbon nanotube sensors. Summary of the Invention

[0012] The purpose of this invention is to provide a method for fabricating a field-effect transistor sensor based on carbon nanotubes and the sensor itself, thereby solving the problems of complex gold nanoparticle deposition processes, uneven particle distribution, and poor device consistency in existing technologies. The technical problem to be solved by this invention is achieved through the following technical solution.

[0013] According to a first aspect of this application, a method for fabricating a field-effect transistor sensor based on carbon nanotubes is provided, comprising the following steps:

[0014] A carbon nanotube conductive channel is fabricated on a substrate, and a source and a drain are formed at both ends of the carbon nanotube conductive channel.

[0015] A passivation layer is deposited above the carbon nanotube conductive channel and the source and drain electrodes;

[0016] The passivation layer is perforated to expose the functional regions of the carbon nanotube conductive channels;

[0017] On the functional area after the opening is completed, a layer of gold nanoparticles is deposited by a self-aligned deposition process and an electron beam evaporation method.

[0018] The aptamer is immobilized on the surface of the gold nanoparticle layer via gold-sulfur bonds, thus completing the functionalization of the biosensor.

[0019] Preferably, the retention rate of the gold nanoparticle layer is not less than 95%.

[0020] Preferably, the passivation layer is processed using a combination of photolithography and etching, and the openings are precisely aligned with the functional areas of the carbon nanotube conductive channels.

[0021] Preferably, the self-aligned deposition is performed immediately after the opening is completed, so that the gold nanoparticle layer is deposited only in the functional region.

[0022] Preferably, the substrate is a 4-inch silicon wafer, and the fabrication method simultaneously fabricates multiple carbon nanotube field-effect transistor sensors on the 4-inch silicon wafer. After the fabrication is completed, the sensor array is packaged to obtain wafer-level batch sensor chips.

[0023] According to a second aspect of this application, a field-effect transistor sensor employing the above-described method for fabricating a carbon nanotube-based field-effect transistor sensor is provided, comprising:

[0024] Substrate;

[0025] Carbon nanotube conductive channels are disposed on the substrate;

[0026] The source and drain electrodes are disposed at both ends of the conductive channel of the carbon nanotube;

[0027] A passivation layer is provided on the carbon nanotube conductive channel and above the source and drain electrodes, and the passivation layer has openings that expose the functional areas of the carbon nanotube conductive channel.

[0028] A gold nanoparticle layer is deposited on the functional region of the carbon nanotube conductive channel exposed by the opening using a self-aligned deposition process.

[0029] An aptamer layer is fixed to the surface of the gold nanoparticle layer via gold-sulfur bonds, and the aptamer layer is used to specifically bind to the target analyte ion.

[0030] Preferably, the substrate includes a silicon base layer and a silicon dioxide layer disposed on the silicon base layer; the substrate is a 4-inch silicon wafer, and the carbon nanotube field-effect transistors are distributed in an array on the 4-inch silicon wafer to form a wafer-level sensor array.

[0031] Preferably, the substrate is a flexible substrate, which is one or more composite structures selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, and polydimethylsiloxane.

[0032] Preferably, the opening is covered with a gate dielectric layer, and the gold nanoparticle layer is deposited on the gate dielectric layer.

[0033] Preferably, the passivation layer is a composite passivation layer, which includes a yttrium oxide seed layer and a hafnium oxide layer deposited on the yttrium oxide seed layer.

[0034] According to one embodiment of this application, the beneficial effects of using this carbon nanotube-based field-effect transistor sensor are as follows:

[0035] An ultrathin gold film is deposited on the substrate surface using electron beam evaporation; the preparation process is simple and reduces solution chemical reaction steps.

[0036] Taking advantage of the spontaneous aggregation of gold under extremely thin conditions (below 2 nm), gold is deposited by electron beam evaporation to form discrete gold nanoparticle structures. The size and density of Au NPs can be controlled by adjusting the deposition thickness. Compared with solution self-assembly methods, this method can achieve uniform deposition on the entire substrate surface, thereby improving the uniformity between devices.

[0037] This process is compatible with existing micro / nano fabrication processes and is suitable for the mass production of carbon nanotube sensor arrays. Attached Figure Description

[0038] Figure 1 This is a flowchart of the steps involved in fabricating a field-effect transistor sensor based on carbon nanotubes according to the present invention.

[0039] Figure 2 a shows the transfer characteristic curves of 72 devices prepared by the old and new processes after modification with gold nanoparticles (AuNPs);

[0040] Figure 2 b is the transconductance (gm) histogram of the old process device;

[0041] Figure 2 c is the histogram of the subthreshold swing (SS) of the old process device;

[0042] Figure 2 d is a bar chart showing the coefficient of variation (CV) of key indicators (SS, Vth, Ion, gm) for the old and new processes;

[0043] Figure 2 e represents the transconductance (gm) histogram of the new process device;

[0044] Figure 2 f is the histogram of the subthreshold swing (SS) of the new process device;

[0045] Figure 3 a is a scanning electron microscope (SEM) image of carbon nanotube (CNT) channels in the old process;

[0046] Figure 3 b is a scanning electron microscope (SEM) image of the carbon nanotube (CNT) channels in the new process;

[0047] Figure 3 c represents the preservation status of gold nanoparticles (AuNPs) in the old process;

[0048] Figure 3 d represents the preservation status of gold nanoparticles (AuNPs) in the new process;

[0049] Figure 4 a shows a comparison of the EDS spectra of gold signal intensity before and after preparation;

[0050] Figure 4 b is a box plot showing the percentage of gold weight (h) in the 20 channel regions;

[0051] Figure 4 c is a pair Figure 4 c and Figure 4 Quantitative EDS analysis bar chart of gold content and atomic percentage in d;

[0052] Figure 4 d represents the percentage of gold atoms (h) in the 20 channel regions, as shown in the box plot.

[0053] Figure 5 This is a schematic diagram of the structure of a field-effect transistor sensor based on carbon nanotubes according to the present invention;

[0054] Figure 6 This is a flowchart of the steps of a cadmium ion detection method based on the above-mentioned carbon nanotube-based field-effect transistor sensor according to the present invention.

[0055] The structure includes a silicon substrate 110, a silicon dioxide layer 120, a carbon nanotube conductive channel 210, a source electrode 221, a drain electrode 222, a yttrium oxide seed layer 310, a hafnium oxide layer 320, a gate dielectric layer 330, a gold nanoparticle layer 410, and an aptamer layer 420. Detailed Implementation

[0056] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0057] It should be noted that the above detailed descriptions are exemplary and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0058] like Figure 1 As shown, a second aspect of the present invention provides a method for fabricating a field-effect transistor sensor based on carbon nanotubes, comprising the following steps:

[0059] Step 1: Fabricate carbon nanotube conductive channels on a substrate, and form source and drain electrodes at both ends of the carbon nanotube conductive channels;

[0060] In this step, carbon nanotube conductive channels are fabricated on a 4-inch Si / SiO2 wafer substrate, and source and drain electrodes are fabricated using microfabrication technology.

[0061] The substrate for this step includes a silicon substrate and a silicon dioxide layer disposed on the silicon substrate;

[0062] The substrate can also be a flexible substrate, wherein the flexible substrate is one or more composite structures selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, and polydimethylsiloxane.

[0063] Step 2: Deposit a passivation layer on top of the carbon nanotube conductive channels and the source and drain electrodes;

[0064] In this step, the passivation layer is a composite passivation layer, which includes a yttrium oxide seed layer and a hafnium oxide layer deposited on the yttrium oxide seed layer.

[0065] The passivation layer adopts a Y2O3 (0.5 nm) / HfO2 (5 nm) bilayer structure. The Y2O3 seed layer is completed by atomic layer deposition (ALD) at 180 °C, and its surface hydroxyl density reaches 9.2 × 1014 cm-2, which provides high-density nucleation sites for the subsequent HfO2 layer, thereby increasing the density of the HfO2 film to 99.3% and stabilizing the dielectric constant at 22.1.

[0066] First, a 0.3 nm layer of Y₂O₃ yttrium oxide is deposited using electron beam deposition, followed by a 5 nm layer of HfO₂ hafnium oxide deposited using atomic force deposition. Hafnium oxide generates significant stress during growth and subsequent annealing. Hafnium oxide is a high-k material with excellent stability and performance in solution. However, it has a significant drawback: direct deposition on certain substrates (especially non-silicon substrates such as carbon nanotubes, gallium nitride, and two-dimensional materials) often results in poor interface quality and numerous defects. The yttrium oxide layer can act as a buffer layer, effectively releasing stress and preventing film cracking or performance degradation.

[0067] Step 3: Open the passivation layer to expose the functional regions of the carbon nanotube conductive channels;

[0068] Opening process: First, spin-coat photoresist and expose the opening area using deep ultraviolet (DUV) lithography (i-line, 365 nm). After development and fixing, a photoresist mask is formed. Then, reactive ion etching (RIE, CHF3 / O2 gas ratio = 15:1) is used to etch the opening. The final opening diameter is controlled at 18 ± 1 μm, and the edge roughness Ra < 8 nm.

[0069] Step 4: Deposit a layer of gold nanoparticles on the functional area after the opening is completed using a self-aligned deposition process;

[0070] In this step, self-aligned deposition is performed within 30 seconds after opening the aperture under high vacuum (≤5 × 10⁻⁶). -7The deposition of AuNPs in the functional region is completed in a Torr environment to ensure that the active sites on the surface of CNT channels are not oxidized or contaminated, thereby achieving highly selective and conformal deposition of AuNPs in the functional region and providing a structural basis for subsequent stable fixation of aptamers.

[0071] In this embodiment, the thickness of the gold nanoparticle layer is 0.3 nm to 1.5 nm.

[0072] In other embodiments, a gate dielectric layer 330 is deposited on the opening, and a gold nanoparticle layer is deposited on the gate dielectric layer 330.

[0073] Due to the interference of complex solution environments on CNT channels, the introduction of the gate dielectric layer 330 in this embodiment can effectively avoid this problem. Moreover, the thickness is ultra-thin, only about 5nm. Through the chemical gating coupling effect, the sensitivity, stability and repeatability of the sensor can be greatly improved, providing a key structural innovation for realizing an ultra-sensitive, large-scale, multifunctional biosensor platform.

[0074] Step 5: Immobilize the aptamer on the surface of the gold nanoparticle layer via gold-sulfur bonds to complete the functionalization of the biosensor.

[0075] This step, by adopting a reverse process of "passivation first, then opening, and then deposition", fundamentally avoids the physical erosion and chemical corrosion that AuNPs suffer during the multi-step wet / dry processing of passivation layer deposition, photoresist coating, development and etching in traditional methods.

[0076] As a specific implementation method, the self-aligned deposition process is a physical vapor deposition process, and the retention rate of the gold nanoparticle layer is not less than 95%. In this invention, by using electron beam evaporation as the physical vapor deposition method, and under the conditions of maintaining the substrate temperature at 25 ± 2 °C and controlling the deposition rate at 0.03 Å / s, the required thickness of the AuNPs layer is achieved.

[0077] This process avoids damage to the CNT structure caused by high-energy particle bombardment during sputtering, and the vacuum environment suppresses Au atom aggregation, resulting in AuNPs with a monodisperse island-like distribution. X-ray reflectance (XRR) measurements show that the actual deposition thickness is 0.91 ± 0.02 nm, and the thickness uniformity (3σ) is ±1.3%.

[0078] Quantitative analysis using energy-dispersive X-ray spectroscopy (EDS) surface scanning revealed that the surface density of Au within the pore region was [value missing]. Au signals were not detected in other areas of the passivation layer, confirming that the deposition was completely confined to the functional area. After a standard cleaning process (acetone:isopropanol:deionized water = 1:1:1, sonication for 5 min), the Au residue still reached 95.7% of the initial value, meeting the technical requirement of a retention rate of not less than 95%, thus ensuring the long-term reliability of the aptamer modification interface.

[0079] As a specific implementation method, the passivation layer aperture processing employs a combination of photolithography and etching, precisely aligning the apertures with the functional regions of the carbon nanotube conductive channels. Self-aligned deposition is performed immediately after aperture opening, ensuring that the gold nanoparticle layer is deposited only within the functional regions. In this invention, by employing a step-through photolithography system with an overlay accuracy of ≤±50 nm, combined with a dual patterning process based on a SiO2 hard mask, the alignment deviation between the aperture center and the geometric center of the CNT channel is achieved to be ≤±35 nm. The aperture shape is circular, with a diameter slightly larger than the CNT channel width (40 μm), ensuring complete exposure of the entire functional area.

[0080] "Immediate deposition" refers to transferring the material to the deposition chamber within the same vacuum chamber without breaking the vacuum after the opening etching is completed. The entire process takes ≤60 seconds, avoiding the adsorption of H2O / O2 molecules in the air on the CNT surface to form interface states (density is lower than that after conventional exposure). Down to This maintains the intrinsic carrier mobility of CNTs (μ ≈ 1.2 × 10⁻⁶). 4 (cm² / V·s); This synergistic design reduced the contact resistance of the CNT channels after AuNP deposition to 12.4 kΩ, a 63.2% decrease compared to the misaligned deposition sample, significantly improving the signal-to-noise ratio of the readout.

[0081] In one specific implementation, the substrate is a 4-inch silicon wafer. The fabrication method involves simultaneously fabricating multiple carbon nanotube field-effect transistor sensors on the 4-inch silicon wafer. After fabrication, the sensor array is packaged to obtain wafer-level batch sensor chips.

[0082] By integrating 1024 independent CNT-FET cells on a 4-inch wafer and employing fan-out wafer-level packaging (FO-WLP), each cell is interconnected to a flexible polyimide (PI) substrate via copper pillar bumps (25 μm in diameter and 15 μm in height). After epoxy resin underfill and laser dicing, a miniature sensor chip with a single size of 1.2 mm × 1.2 mm is obtained. After aging at 85 °C / 85% RH for 168 h, the packaged device... The drift was only -2.1%, far below the industry standard limit (-10%), indicating that the packaging structure effectively blocked moisture and ion migration; the overall wafer yield reached 94.7%, and the unit device manufacturing cost was reduced by 76.3% compared with single-wafer fabrication, verifying the method's ability to support industrialization.

[0083] like Figure 5 As shown, the first aspect of the present invention provides a field-effect transistor sensor based on carbon nanotubes, comprising:

[0084] The substrate includes a silicon substrate 110 and a silicon dioxide layer 120 disposed on the silicon substrate 110;

[0085] Carbon nanotube conductive channels 210 are disposed on silicon dioxide layer 120;

[0086] Source 221 and drain 222 are disposed at both ends of carbon nanotube conductive channel 210;

[0087] A passivation layer covers the carbon nanotube conductive channel 210 and the source electrode 221 and drain electrode 222. The passivation layer has openings that expose the functional regions of the carbon nanotube conductive channel 210. The passivation layer is a composite passivation layer, which includes a yttrium oxide seed layer 310 and a hafnium oxide layer 320 deposited on the yttrium oxide seed layer 310.

[0088] A gold nanoparticle layer 410 is deposited on the functional region of the carbon nanotube conductive channel 210 exposed by a self-aligned deposition process. The thickness of the gold nanoparticle layer 410 is 0.3 nm to 1.5 nm.

[0089] The aptamer layer 420 is fixed to the surface of the gold nanoparticle layer 410 via gold-sulfur bonds. The aptamer layer 420 is used to specifically bind to the target analyte ion.

[0090] In this invention, by setting the passivation layer as a composite structure of Y2O3 seed layer and HfO2 layer, and performing precise opening after passivation, and then performing self-aligned gold nanoparticle deposition in the opening area, AuNPs are deposited only on the surface of CNT functional channels, avoiding the high loss (about 60%) of AuNPs caused by fluid shearing and etching in the traditional "deposition before passivation" process.

[0091] The Y2O3 seed layer enhances the interfacial bonding energy between HfO2 and CNT, suppresses the tendency of HfO2 layer to peel off in subsequent wet processing, and improves the long-term stability of the device; while the AuNPs layer with a thickness range of 0.3 nm to 1.5 nm ensures sufficient surface atomic density to support high coverage covalent anchoring of aptamers, and avoids the risk of agglomeration or short circuit caused by excessive thickness.

[0092] The strong chemical bonding of gold-sulfur bonds (bond energy of approximately 45 kcal / mol) further ensures the structural integrity and binding orientation consistency of the aptamer in the liquid phase detection environment, thereby achieving a synergistic unity of high retention rate (≥95%), high stability and high recognition fidelity at the single device level.

[0093] In one specific implementation, the thickness of the gold nanoparticle layer 410 is 0.9 nm. In this invention, by limiting the thickness of the gold nanoparticle layer 410 to 0.9 nm, AuNPs form a continuous but non-closed sub-monolayer island-like distribution within the open-pore region, with an average particle size of 2.1 nm and an areal density of... The structure exhibited clear lattice fringes under transmission electron microscopy (TEM) (corresponding to an Au interplanar spacing of 0.235 nm), and X-ray photoelectron spectroscopy (XPS) showed an Au 4f7 / 2 peak at 83.98 eV, confirming that it is in a metallic state rather than an oxidized state. At this thickness, the grafting efficiency of thiol groups on the AuNPs surface reached 92.4%, an increase of 37.6% and 18.2% compared to the 0.3 nm and 0.6 nm samples, respectively, thus significantly enhancing the aptamer coupling density and orientation uniformity. In Cd... 2+ Concentration of 10 -13 At time M, the relative change in current at sensor drain 222 ( The efficiency reached -12.4%, which is 2.8 times and 1.5 times higher than that of the 0.3 nm and 0.6 nm samples, respectively, indicating that the 0.9 nm thickness achieved the optimal balance between carrier modulation efficiency and interface charge transfer dynamics.

[0094] As a specific implementation, the carbon nanotube conductive channel 210 has a size of 20μm × 40μm, allowing for controllable edge morphology fabrication at standard photolithographic resolution (≥0.5μm). The channel aspect ratio (L / W = 2) balances carrier migration path length and lateral electric field uniformity; at this size, the device transconductance ( The average value was 18.3 μS, the subthreshold swing (SS) was 112 mV / dec, and the threshold voltage ( The coefficient of variation (CV) was 3.2%, which was 41.7% and 28.6% lower than the control groups of 10 μm × 20 μm and 30 μm × 60 μm, respectively. At the same time, this size effectively suppressed the influence of edge scattering on carrier transport and established a stable mapping relationship between the area of ​​the aperture region (≈800 μm²) and the total amount of AuNPs deposited, ensuring the consistency of stoichiometry of the functional interface between different devices, thereby supporting the discrete control of the electrical parameters of the wafer-level array.

[0095] In one specific implementation, a 4-inch silicon wafer is used as the substrate, and carbon nanotube field-effect transistors are distributed in an array on the 4-inch silicon wafer to form a wafer-level sensor array. An array containing 1024 independent CNT-FET units is constructed on a 4-inch Si / SiO2 wafer using stepper lithography and simultaneous etching processes. The spacing between each unit is 200 μm, and the channel resistance difference from the wafer center to the edge devices is ≤±4.8%, indicating that the process has excellent spatial uniformity.

[0096] This structure enables the production of hundreds of sensor units with consistent performance in a single wafer fabrication. Combined with automated probe station testing, initial screening of the electrical parameters of the entire wafer can be completed within 2 hours. After packaging, key parameters of 72 randomly selected devices (…) SS , The CV values ​​were all below 5.0%, which is significantly better than the traditional single-wafer fabrication process (CV > 18%), verifying the process compatibility and quality control of the structure for large-scale manufacturing.

[0097] like Figure 2 a to Figure 2 As shown in f, the performance and uniformity of carbon nanotube field-effect transistors (CNT-FETs) fabricated using the traditional (old) process and the optimized process are compared, demonstrating the array uniformity of this carbon nanotube field-effect transistor:

[0098] like Figure 2 The transfer characteristic curves (gate voltage Vds = -0.1 V) of 72 devices fabricated using two different processes after modification with gold nanoparticles (AuNPs) show the current response within the gate voltage range. It is evident that the optimized process (bottom) exhibits a more concentrated I_ds distribution and a smoother curve compared to the old process (top). At the same V_gs, the optimized process devices show more stable current.

[0099] like Figure 2 b and Figure 2 c. In the histograms of transconductance (gm) and subthreshold swing (SS) of devices using older processes, gm and SS have wider distributions and larger peak shifts, indicating poor device performance uniformity.

[0100] like Figure 2 e and Figure 2 f. In the histogram of transconductance (gm) and subthreshold swing (SS) of the optimized process device, the distribution of gm and SS is narrower, the mean is more concentrated, and the device consistency is significantly improved.

[0101] like Figure 2The bar chart for d compares the coefficients of variation (CV) of key indicators (SS, Vth, Ion, gm) between the old and optimized processes. The CV of the optimized process is lower than that of the old process: SS decreased from 6% to 4%, Vth from 11% to 6%, Ion from 10% to 8%, and gm from 10% to 9%. This demonstrates that the optimized process significantly improves device uniformity.

[0102] As can be seen, this embodiment achieves protection of critical areas of the device by covering the carbon nanotube conductive channel 210, source 221, and drain 222 with a composite passivation layer containing a yttrium oxide seed layer 310 and a hafnium oxide layer 320, and by setting openings on the passivation layer to expose the functional areas of the carbon nanotube conductive channel 210.

[0103] By using a self-aligned deposition process, the gold nanoparticle layer 410 is deposited only on the functional areas exposed by the openings. This avoids the significant loss of gold nanoparticles caused by fluid shear stress and chemical etching that occurs when gold nanoparticles are deposited first and then passivated in traditional processes. This increases the gold nanoparticle retention rate to over 95%, thereby ensuring the integrity and stability of the aptamer fixation interface.

[0104] The composite passivation layer structure composed of yttrium oxide seed layer 310 and hafnium oxide layer 320 enhances the interfacial adhesion between the passivation layer and carbon nanotubes, thereby improving the overall stability of the device.

[0105] By fixing the aptamer layer 420 to the surface of the gold nanoparticle layer 410 via gold-sulfur bonds, the stable anchoring of the biometric element is ensured, providing a reliable basis for the specific recognition of cadmium ions.

[0106] By using a 4-inch silicon wafer as a substrate and distributing carbon nanotube field-effect transistors in an array, the mass production of wafer-level sensor arrays has been achieved, significantly improving production efficiency and batch consistency.

[0107] In the process of cadmium ion detection, the test solution is dropped onto the surface of the biosensor, a liquid grid system is constructed with a reference electrode and a specific voltage parameter is applied, the change of drain current signal is collected, and the quantitative detection of cadmium ions is achieved by combining the calibration curve. The method has a response time of less than 10 seconds, a detection limit as low as 2.830 aM, a linear range of 10-15 M to 10-9 M, and excellent anti-interference ability against common interfering ions.

[0108] This design not only solves the problem of high loss rate of gold nanoparticles, but also significantly improves the batch uniformity and detection performance of the sensor by precisely controlling the thickness of gold nanoparticles and wafer-level batch preparation process, providing a reliable technical solution for real-time ultrasensitive detection of cadmium ions on site.

[0109] like Figure 6As shown, a third aspect of the present invention provides a method for detecting cadmium ions based on a carbon nanotube-based field-effect transistor sensor, comprising the following steps:

[0110] Step 71: Drop the solution to be tested onto the surface of the carbon nanotube conductive channel of the biosensor;

[0111] Step 72: Construct a liquid gate system using a reference electrode, apply drain-source voltage Vds and gate voltage Vgs, and acquire the drain current signal of the biosensor.

[0112] Step 73: Based on the relative change in drain current and a pre-established calibration curve, quantitative detection of cadmium ions in the test solution is achieved. The calibration curve is plotted with the logarithm of Cd²⁺ concentration on the x-axis and the relative change in drain current on the y-axis.

[0113] It also includes step 74: After the test is completed, the sensor channel is cleaned with deionized water to enable repeated detection;

[0114] In this invention, by using Cd² + The detection model is based on aptamer-Cd² + Combining the induced electrostatic gate effect, the high sensitivity of p-type CNT channels to changes in interface charge (caused by changes in charge per unit unit change) is utilized. Reaching -0.87% / e - In the liquid gate system, Cd² + Concentration is converted into a measurable drain current response; the Ag / AgCl reference electrode provides a stable potential reference. With precise adjustment of Vgs using a potentiostat, the device operates in the subthreshold region ( ), within this interval It reaches its maximum value (15.2 μS / V), thereby amplifying the current disturbance caused by weak binding events;

[0115] This detection mechanism requires no enzyme labeling, fluorescent labeling, or signal amplification steps; it directly outputs an electrical signal, with a response time of Cd². + Diffusion and aptamer conformation adjustment jointly determine the measured t 90 < 8.3 s, meeting the requirements for real-time dynamic monitoring.

[0116] In one specific implementation, the drop volume of the test solution is 5 μL to 20 μL; the drain-source voltage Vds is -0.05V to -0.2V; the gate voltage Vgs has a scan range of -0.6V to +1V; and the reference electrode is an Ag / AgCl electrode.

[0117] Under this parameter combination, the sensor detects Cd² +The response exhibited a strictly log-linear relationship (R² = 0.99987), and the detection limit (LOD = 3σ / S) was statistically determined to be 2.830 aM (σ = 0.0023%, S = 0.0024% / aM) after 72 blank tests. The linear response range spanned six orders of magnitude (10^6). - ¹ 5 -10 -9 M), and in 10 - ¹² M Cd² + The response repeatability RSD of 5 consecutive detections in solution was 2.4%, confirming that this parameter set is the optimal operating window for achieving ultrasensitive and highly reproducible detection.

[0118] Unless otherwise specified, all materials, reagents and instruments used in the embodiments of this invention can be obtained through commercial channels.

[0119] Key raw material: Aqueous dispersion of single-walled carbon nanotubes (SWCNTs), purity > 95%, diameter distribution 0.8–1.2 nm, purchased from NanoIntegris.

[0120] Gold sputtering target (99.999%), purchased from Kurt J. Lesker.

[0121] Yttrium oxide (Y2O3, 99.99%) and hafnium oxide (HfO2, 99.99%) precursors were purchased from Sigma-Aldrich.

[0122] Cd² + The standard stock solution (1000 mg / L, soluble in 1% HNO3) was purchased from the National Center for Analysis and Testing of Nonferrous Metals and Electronic Materials.

[0123] The aptamer sequence (5′-SH-(CH2)6-TTCTTCTTCCTCCCTTTCTTCTTCTTC-3′) was synthesized and purified by HPLC by Shanghai Sangon Biotech Co., Ltd.

[0124] Buffers: Tris-HCl buffer (10 mM, pH 7.4, containing 0.1% Tween-20), prepared using analytical grade reagents; PBS buffer (10 mM, pH 7.4).

[0125] Instrumentation: Electron beam evaporation coating system (CHA Industries, E-Beam Evaporator Model 3100);

[0126] Atomic layer deposition system (Beneq TFS 200);

[0127] Reactive ion etching system (Oxford Instruments Plasmalab System 100);

[0128] Stepper lithography machine (Canon FPA-3030i5);

[0129] Four-probe tester (Keithley 4200-SCS semiconductor parameter analyzer);

[0130] Transmission electron microscope (JEOL JEM-2100F, accelerating voltage 200 kV).

[0131] X-ray photoelectron spectroscopy (Thermo Scientific ESCALAB 250Xi);

[0132] X-ray reflectometer (Bruker D8 Discover).

[0133] Example 1:

[0134] This embodiment provides a wafer-level carbon nanotube-based field-effect transistor sensor based on the self-aligned deposition of a Y2O3 / HfO2 composite passivation layer and 0.9 nm gold nanoparticles.

[0135] High-purity single-walled carbon nanotube (CNT) films were transferred onto a 4-inch Si(100) / SiO2(300 nm) wafer using dielectric-assisted laser lift-off (DALI). A 20 μm × 40 μm channel region was then defined using electron beam lithography (EBL), and Ti / Au (5 nm / 45 nm) electrodes were deposited as source and drain electrodes using electron beam evaporation. Y2O3 (5 nm) and HfO2 (30 nm) atomic layers were sequentially deposited on the device surface at 180 °C. A 35 μm diameter circular opening was fabricated directly above each CNT channel using i-line lithography (mask overlay accuracy ±35 nm) combined with CHF3 / O2 mixed gas RIE etching. Immediately after opening, the wafer was transferred to an electron beam evaporation chamber, where a gold target was evaporated at a substrate temperature of 25 °C and a deposition rate of 0.03 Å / s to obtain a 0.9 nm thick gold nanoparticle layer. The sensor was then immersed in a 1 mM aptamer ethanol solution for incubation. h, and then rinsed alternately with ethanol and PBS buffer to complete the aptamer functionalization modification.

[0136] Figure 3 Preservation status of gold nanoparticles (AuNPs) in conventional preparation processes (e.g.) Figure 3 a, Figure 3b) Scanning electron microscopy (SEM) images of carbon nanotube (CNT) channels in the old process, showing the degradation of the AuNPs layer before and after the channel preparation step. It can be seen that compared to the old process, the new process results in a more uniform and denser CNT network distribution, and the AuNPs adhere more stably to the CNT surface. Local magnification shows that the gold nanoparticles are more uniformly distributed within the CNT network, which is beneficial for forming a stable surface modification structure.

[0137] from Figure 3 c and Figure 3 The number of gold particles in d is visible. Compared with the old process, the number of gold element signals is significantly increased, the distribution is more uniform and the density is higher, indicating that AuNPs can be better maintained on the CNT channel surface in subsequent processes.

[0138] Results showed that scanning electron microscopy (SEM) revealed clear opening edges and no residual adhesive; EPS characterization images confirmed that AuNPs were distributed in an isolated island pattern with an average particle size of 2.1 nm and a lattice fringe spacing of 0.235 nm corresponding to the Au plane; XPS spectra showed the Au4f7 / 2 peak at 83.98 eV and the S 2p peak at 161.85 eV, confirming successful gold-sulfur bond formation; electrical tests showed the device turn-on current. Turn off the current The on / off ratio reaches 1.5 × 10³, and the subthreshold swing SS = 112 mV / dec.

[0139] like Figure 4 The comparison of EDS spectra of a showed that there was a difference in the gold signal intensity before and after preparation, confirming the loss of gold nanoparticles (AuNPs). Figure 4 c is a pair Figure 3 c and Figure 3 Quantitative EDS analysis of gold content and atomic percentage in sample d showed that the gold content was reduced by approximately 40%. Figure 4 b and Figure 4 The box plot of gold weight (g) versus atomic percentage (h) for 20 channel regions (d) shows that AuNPs were significantly lost and variability increased in the old process.

[0140] This embodiment successfully constructed a CNT-FET biosensor prototype with complete structure, clean interface, and excellent electrical performance, verifying the feasibility and repeatability of the Y2O3 / HfO2 composite passivation layer and the 0.9 nm AuNPs self-aligned deposition process, laying the foundation for subsequent performance verification.

[0141] Example 2:

[0142] This embodiment is intended to verify the process robustness of the lower limit of the carbon nanotube conductive channel size (20 μm × 40 μm) in this application.

[0143] The product was obtained by referring to the method of Example 1, except that the size of the conductive channel of the carbon nanotube was 20 μm × 40 μm.

[0144] The results show that SEM observation reveals a complete channel edge morphology with no obvious etching damage; electrical parameter tests show... SS = 112 mV / dec The CV value was 3.2%; in 10 - ¹² MCd² + in solution, The response repeatability RSD was 2.4%.

[0145] The 20 μm × 40 μm size ensures machining accuracy while achieving optimal electrical performance and sensing response, verifying the technical rationality and optimality of the size limit in this application.

[0146] Example 3:

[0147] This embodiment aims to verify the impact of the lower limit of the drain-source voltage Vds (-0.05 V) on the detection performance in this application.

[0148] Based on the process of Example 1, electrical tests were performed under the condition of Vds = -0.05 V to obtain sensor response data.

[0149] The results show that at this Vds, the device operates in the strong linear region. The absolute value decreased to 0.42 μA, but Maintain 14.8 μS / V; for 10 - ¹² M Cd² + of The difference from Vds = -0.1 V (-12.4%) is less than 5%, and the noise level is reduced by 18.3%.

[0150] Although Vds = -0.05 V reduces the signal amplitude, it significantly suppresses thermal noise and improves the signal-to-noise ratio, verifying the technical effectiveness of the lower limit value of Vds in this application.

[0151] Example 4:

[0152] This embodiment is intended to verify the impact of the upper limit of the drain-source voltage Vds (-0.2 V) on the detection performance in this application.

[0153] To investigate the effect of Vds, we conducted parallel experiments at -0.2 V, with all other conditions the same as in Example 1. The results showed that the sensor's response to 10... - ¹² M Cd² + of Response time t 90 = 8.1 s.

[0154] The device response is slightly enhanced and faster at Vds = -0.2 V, confirming that the upper limit of Vds in this application has technical feasibility and performance gain potential.

[0155] Example 5:

[0156] This embodiment verifies the ultrasensitive detection performance and selectivity of the sensor of the present invention for cadmium ions.

[0157] Comparative Example 1 (blank control): Sensors from the same batch without aptamer modification; Comparative Example 2 (out-of-parameter sample): Sensors with AuNPs thickness of 0.2 nm (below the lower limit of this application); Comparative Example 3 (closest to the prior art): Sensors prepared using the traditional "AuNPs deposition followed by passivation" process; Comparative Example 4 (lacking functional components): Sensors without an AuNPs layer, only modified with aptamers. All samples were tested under the same conditions (Vds = -0.1 V, Vgs = 0 V, 10 μL solution drop-coated) for Cd²⁻. + Response test, and simultaneous examination of K + Pb² + Cu² + Zn² + (Concentration is 10) -6 The interference response of M). The test results are shown in Table 1.

[0158] Table 1 Results of the effect test

[0159]

[0160] As shown in Table 1, Example 1 affects Cd² + The response was significantly higher than all comparative examples (p < 0.001), and the response to common interfering ions was less than ±0.3%, confirming its high specificity; the detection limit reached 2.830 aM, which was about 50 times and 130 times higher than comparative examples 2 and 3, respectively; R² = 0.99987.

[0161] This invention, through the synergistic effect of a Y2O3 / HfO2 composite passivation layer and 0.9 nm AuNPs self-aligned deposition, not only solves the problems of high AuNPs loss and batch-to-batch inhomogeneity, but also achieves a qualitative breakthrough in the molecular recognition-electrical signal transduction pathway, obtaining ultrasensitive and highly selective Cd²⁺ far exceeding existing technologies. + Detection performance.

[0162] Example 6:

[0163] In this application embodiment, the test samples include sensors prepared according to each embodiment in Examples 1 to 4, and Cd² tests are performed under the same electrical test conditions (Vds = -0.1 V, Vgs = 0 V, 10 μL solution drop-coated). + Response testing. Results show that the sensors fabricated using all implementation methods achieve a response time of 10... - ¹² M Cd² + A distinguishable decrease in drain current was observed in all solutions. The response values ​​for Example 1 (0.9 nm AuNPs), Example 4 (20 μm × 40 μm channel), and Example 5 (Vds = -0.05 V) were -12.4%, -12.4%, and -11.9%, respectively, with a coefficient of variation (CV) of 2.1%. This indicates that the devices can stably achieve the cadmium ion detection function claimed in this invention under different parameter combinations. Experimental results show that the carbon nanotube-based field-effect transistor sensor prepared in this invention exhibits excellent ultrasensitive response and high selectivity in the cadmium ion detection model.

[0164] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0165] It should be noted that the terms "first," "second," etc., used in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented in a sequence other than those illustrated or described herein.

[0166] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or apparatus.

[0167] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways, such as rotated 90 degrees or in other orientations, and the spatial relative descriptions used herein will be interpreted accordingly.

[0168] The detailed description above has been referenced to the accompanying drawings, which form part of this document. In the drawings, similar symbols typically identify similar parts unless the context otherwise indicates otherwise. The embodiments illustrated in the detailed description and accompanying drawings are not intended to be limiting. Other embodiments may be used and other modifications may be made without departing from the spirit or scope of the subject matter presented herein.

[0169] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for fabricating a field-effect transistor sensor based on carbon nanotubes, characterized in that, Includes the following steps: A carbon nanotube conductive channel is fabricated on a substrate, and a source and a drain are formed at both ends of the carbon nanotube conductive channel. A passivation layer is deposited above the carbon nanotube conductive channel and the source and drain electrodes; The passivation layer is perforated to expose the functional regions of the carbon nanotube conductive channels; On the functional area after the opening is completed, a layer of gold nanoparticles is deposited by a self-aligned deposition process and an electron beam evaporation method. The aptamer is immobilized on the surface of the gold nanoparticle layer via gold-sulfur bonds, thus completing the functionalization of the biosensor.

2. The method for fabricating a carbon nanotube-based field-effect transistor sensor according to claim 1, characterized in that, The retention rate of the gold nanoparticle layer is not less than 95%.

3. The method for fabricating a carbon nanotube-based field-effect transistor sensor according to claim 1, characterized in that, The passivation layer is processed using a combination of photolithography and etching, and the openings are precisely aligned with the functional areas of the carbon nanotube conductive channels.

4. The method for fabricating a carbon nanotube-based field-effect transistor sensor according to claim 3, characterized in that, The self-aligned deposition is performed immediately after the opening is completed, so that the gold nanoparticle layer is deposited only in the functional region.

5. The method for fabricating a field-effect transistor sensor based on carbon nanotubes according to claim 1, characterized in that, The substrate is a 4-inch silicon wafer. The fabrication method involves simultaneously fabricating multiple carbon nanotube field-effect transistor sensors on the 4-inch silicon wafer to form a sensor array. After fabrication, the sensor array is packaged to obtain wafer-level batch sensor chips.

6. A field-effect transistor sensor using the fabrication method of the carbon nanotube-based field-effect transistor sensor according to any one of claims 1 to 5, characterized in that, include: Substrate; Carbon nanotube conductive channels are disposed on the substrate; The source and drain electrodes are disposed at both ends of the conductive channel of the carbon nanotube; A passivation layer is provided on the carbon nanotube conductive channel and above the source and drain electrodes, and the passivation layer has openings that expose the functional areas of the carbon nanotube conductive channel. A gold nanoparticle layer is deposited on the functional region of the carbon nanotube conductive channel exposed by the opening using a self-aligned deposition process. An aptamer layer is fixed to the surface of the gold nanoparticle layer via gold-sulfur bonds, and the aptamer layer is used to specifically bind to the target analyte ion.

7. The field-effect transistor sensor according to claim 6, characterized in that, The substrate is a 4-inch silicon wafer, which includes a silicon base layer and a silicon dioxide layer disposed on the silicon base layer. The field-effect transistor sensors are distributed in an array on the 4-inch silicon wafer to form a wafer-level sensor array.

8. The field-effect transistor sensor according to claim 6, characterized in that, The substrate is a flexible substrate, which is one or more composite structures selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, and polydimethylsiloxane.

9. The field-effect transistor sensor according to claim 6, characterized in that, The opening is covered with a gate dielectric layer, and the gold nanoparticle layer is deposited on the gate dielectric layer.

10. The field-effect transistor sensor according to claim 6, characterized in that, The passivation layer is a composite passivation layer, which includes a yttrium oxide seed layer and a hafnium oxide layer deposited on the yttrium oxide seed layer.