Efficient data access for accelerated management commands

Abstract

The invention relates to efficient data access for accelerating management commands. Typically, default execution management (admin) commands involve low performance. Some management commands involve accessing memory and utilizing additional resources to improve performance, such as how to execute input / output (I / O) commands. For those management commands executed with improved performance, the management commands may be modified such that the modified management commands are executed similar to I / O commands. Additionally, the modified management commands are placed in different commit queues separate from unmodified management commands that are not visible to the host device. And after completion, the management command is published to the management completion queue. In another aspect, the modified management command is invisible to the host device. Upon completion of the modified management command, completion for an unmodified management command (i.e., the modified management command in an unmodified form) is issued to the same management completion queue as all other management commands.

Description

Background Technology Technical Field

[0001] The implementation scheme disclosed herein relates in general to the effective processing of management orders.

[0002] Description of related technologies

[0003] The Non-Volatile Memory (NVM) (NVMe) protocol typically defines two types of commands: administrative commands and input / output (I / O) commands. I / O commands are usually related to data transfer (e.g., read, write, and copy commands). Administrative commands are responsible for managing the data storage device, such as entering low-power states, creating queues, and deleting queues.

[0004] A system typically has multiple host devices, such as physical host devices or virtual host devices. In a virtualization scenario, there may be more host devices, but for each host device there is a single pair of management queues (e.g., commit and complete). For each host device, there is a management commit queue and a management complete queue. Additionally, for each host device, there may be multiple commit queues and one or more complete queues.

[0005] The general statement about management commands is that they do not need to be executed, and therefore require fewer resources to process. Management commands are typically executed with minimal resources and generally do not utilize automation. Automation is for performance purposes and is therefore used for I / O commands in areas such as data transfer and security.

[0006] Sometimes, management commands need to outperform typical performance, such as for live migrations. In such scenarios, typical management command processing is insufficient. Therefore, there is a need in the field to improve management command processing. Summary of the Invention

[0007] Typically, executing administrative (admin) commands by default involves low performance. Some administrative commands involve accessing memory and utilizing additional resources to improve performance, such as how input / output (I / O) commands are executed. For those administrative commands that execute with improved performance, the command can be modified so that it executes like an I / O command. Additionally, modified administrative commands are placed in a separate submission queue from unmodified administrative commands, which are not visible to the host device. Upon completion, the administrative command publishes completion to the administrative completion queue. Modified administrative commands, on the other hand, are not visible to the host device. When a modified administrative command completes, completion is published to the same administrative completion queue as all other administrative commands for the unmodified administrative command (i.e., the modified administrative command in its unmodified form).

[0008] In one embodiment, a data storage device includes: a memory device; and a controller coupled to the memory device, wherein the controller is configured to: allocate resources for processing administrative (admin) commands; determine that the administrative command is a high-performance administrative command; modify the administrative command; and use other resources to process the administrative command.

[0009] In another embodiment, a data storage device includes: a memory device; and a controller coupled to the memory device, wherein the controller is configured to: execute management commands using an administrative resource; execute modified management commands using resources other than the administrative resource, wherein the modified management commands are unmodified management commands that have been modified; publish completion for the management commands in an administrative completion queue; and publish completion for the unmodified management commands in the administrative completion queue when the modified management commands are completed.

[0010] In another embodiment, a data storage device includes: a component for storing data; and a controller coupled to the component for storing data, wherein the controller is configured to: modify an administrative (admin) command, wherein the administrative command has administrative resources allocated for executing the administrative command; place the modified administrative command in a submission queue, the submission queue being different from an administrative submission queue from which the administrative command is retrieved; and execute the modified administrative command using input / output (I / O) command resources instead of the administrative command resources. Attached Figure Description

[0011] To gain a more detailed understanding of the features described above, the present disclosure, which has been briefly outlined above, can be described in more detail with reference to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only typical embodiments of the invention and should not be construed as limiting the scope of the disclosure, as other equivalent embodiments are permissible.

[0012] Figure 1 This is a schematic block diagram illustrating a storage system according to certain implementation schemes, wherein the data storage device can be used as a storage device for the host device.

[0013] Figure 2 This is a block diagram illustrating a method of operating a storage device to execute read or write commands according to one or more embodiments.

[0014] Figure 3 This is a schematic diagram of fast non-volatile memory (NVM) (NVMe) management and input / output (I / O) queues.

[0015] Figure 4 This is a schematic diagram of the real-time migration concept.

[0016] Figure 5 It is a schematic diagram of a system based on an implementation plan.

[0017] Figure 6 This is a flowchart illustrating the processing of management commands according to an implementation plan.

[0018] For ease of understanding, the same reference numerals are used where possible to denote the same elements common in the figures. Elements disclosed in one embodiment are intended to be usefully used in other embodiments without being specifically listed. Detailed Implementation

[0019] Reference is made below to embodiments of this disclosure. However, it should be understood that this disclosure is not limited to the specifically described embodiments. Rather, any combination of the following features and elements (whether or not different embodiments are involved) is contemplated to realize and practice this disclosure. Furthermore, while embodiments of this disclosure may achieve advantages over other possible solutions and / or over the prior art, whether a particular advantage is achieved by a given embodiment does not limit this disclosure. Therefore, the following aspects, features, embodiments, and advantages are merely illustrative and should not be considered as elements or limitations of the appended claims unless expressly stated in the claims. Similarly, reference to “this disclosure” should not be construed as a generalization of any inventive subject matter disclosed herein and should not be considered as elements or limitations of the appended claims unless expressly stated in the claims.

[0020] Typically, executing administrative (admin) commands by default involves low performance. Some administrative commands involve accessing memory and utilizing additional resources to improve performance, such as how input / output (I / O) commands are executed. For those administrative commands that execute with improved performance, the command can be modified so that it executes like an I / O command. Additionally, modified administrative commands are placed in a separate submission queue from unmodified administrative commands, which are not visible to the host device. Upon completion, the administrative command publishes completion to the administrative completion queue. Modified administrative commands, on the other hand, are not visible to the host device. When a modified administrative command completes, completion is published to the same administrative completion queue as all other administrative commands for the unmodified administrative command (i.e., the modified administrative command in its unmodified form).

[0021] Figure 1This is a schematic block diagram illustrating a storage system 100 according to certain embodiments, the storage system having a data storage device 106 that can be used as a storage device for a host device 104. For example, the host device 104 may utilize non-volatile memory (NVM) 110 included in the data storage device 106 to store and retrieve data. The host device 104 includes host dynamic random access memory (DRAM) 138. In some examples, the storage system 100 may include multiple storage devices, such as the data storage device 106, which may operate as a storage array. For example, the storage system 100 may include multiple data storage devices 106 configured as a redundant array of inexpensive / disk-only (RAID) disks, which together act as a mass storage device for the host device 104.

[0022] Host device 104 can store data to and / or retrieve data from one or more storage devices (such as data storage device 106). Figure 1 As illustrated, host device 104 can communicate with data storage device 106 via interface 114. Host device 104 can include any of a wide range of devices, including computer servers, network attached storage (NAS) units, desktop computers, notebook computers, tablet computers, set-top boxes, handsets (such as so-called "smart" phones, so-called "smart" boards), televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, or other devices capable of sending or receiving data from data storage devices.

[0023] Host DRAM 138 may optionally include a host memory buffer (HMB) 150. HMB 150 is a portion of host DRAM 138 allocated to data storage device 106 for the exclusive use of the controller 108 of data storage device 106. For example, controller 108 may store mapped data, buffer commands, logical-to-physical (L2P) tables, metadata, etc., in HMB 150. In other words, HMB 150 may be used by controller 108 to store data that would typically be stored in volatile memory 112, buffer 116, or the controller 108's internal memory (such as static random access memory (SRAM)). In an example where data storage device 106 does not include DRAM (i.e., optional DRAM 118), controller 108 may utilize HMB 150 as DRAM for data storage device 106.

[0024] Data storage device 106 includes a controller 108, an NVM 110, a power supply 111, volatile memory 112, an interface 114, a write buffer 116, and optional DRAM 118. In some examples, data storage device 106 may include components not shown for clarity. Figure 1 Additional components are shown in the diagram. For example, data storage device 106 may include a printed circuit board (PCB) to which components of data storage device 106 are mechanically attached, and the PCB includes conductive traces for electrical interconnection of the components of data storage device 106. In some examples, the physical dimensions and connector configuration of data storage device 106 may conform to one or more standard form factors. Some example standard form factors include, but are not limited to, 3.5” data storage devices (e.g., HDDs or SSDs), 2.5” data storage devices, 1.8” data storage devices, peripheral component interconnect (PCI), extended PCI (PCI-X), and fast PCI (PCIe) (e.g., PCIe x1, x4, x8, x16, PCIe microcards, micro PCI, etc.). In some examples, data storage device 106 may be directly coupled to the motherboard of host device 104 (e.g., directly soldered or inserted into a connector).

[0025] Interface 114 may include one or both of a data bus for exchanging data with host device 104 and a control bus for exchanging commands with host device 104. Interface 114 may operate according to any suitable protocol. For example, interface 114 may operate according to one or more of the following protocols: Advanced Technology Attachment (ATA) (e.g., Serial ATA (SATA) and Parallel ATA (PATA)), Fibre Channel Protocol (FCP), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), PCI and PCIe, High Speed ​​Non-Volatile Memory (NVMe), OpenCAPI, GenZ, Cache Coherent Interface Accelerator (CCIX), Open Channel SSD (OCSSD), etc. Interface 114 (e.g., a data bus, a control bus, or both) is electrically connected to controller 108, thereby providing an electrical connection between host device 104 and controller 108, allowing data exchange between host device 104 and controller 108. In some examples, the electrical connection of interface 114 may also allow data storage device 106 to receive power from host device 104. For example, as Figure 1 As illustrated, power supply 111 can receive power from host device 104 via interface 114.

[0026] NVM 110 may include multiple memory devices or memory cells. NVM 110 may be configured to store and / or retrieve data. For example, a memory cell of NVM 110 may receive data from controller 108 and a message instructing the memory cell to store data. Similarly, a memory cell may receive a message from controller 108 instructing the memory cell to retrieve data. In some examples, each memory cell in the memory cell may be referred to as a die. In some examples, NVM 110 may include multiple dies (i.e., multiple memory cells). In some examples, each memory cell may be configured to store a relatively large amount of data (e.g., 128MB, 256MB, 512MB, 1GB, 2GB, 4GB, 8GB, 16GB, 32GB, 64GB, 128GB, 256GB, 512GB, 1TB, etc.).

[0027] In some examples, each memory cell may include any type of non-volatile memory device, such as flash memory device, phase-change memory (PCM) device, resistive random access memory (ReRAM) device, magnetoresistive random access memory (MRAM) device, ferroelectric random access memory (F-RAM), holographic memory device, and any other type of non-volatile memory device.

[0028] NVM 110 may include multiple flash memory devices or memory cells. The NVM flash memory devices may include NAND- or NOR-based flash memory devices and may store data based on the charge contained in the floating gate of the transistor in each flash memory cell. In the NVM flash memory device, the flash memory device may be divided into multiple dies, each of which includes multiple physical or logical blocks, which may be further divided into multiple pages. Each of the multiple blocks within a particular memory device may include multiple NVM cells. Rows of NVM cells may be electrically connected using word lines to define pages within the multiple pages. A corresponding cell in each of the multiple pages may be electrically connected to a corresponding bit line. Furthermore, the NVM flash memory device may be a 2D or 3D device and may be a single-level cell (SLC), multi-level cell (MLC), three-level cell (TLC), or four-level cell (QLC). Controller 108 may write data to and read data from the NVM flash memory device at the page level and erase data from the NVM flash memory device at the block level.

[0029] Power supply 111 can provide power to one or more components of data storage device 106. When operating in standard mode, power supply 111 can use power provided by an external device (such as host device 104) to power one or more components. For example, power supply 111 can use power received from host device 104 via interface 114 to power one or more components. In some examples, power supply 111 may include one or more power storage components configured to provide power to one or more components when operating in a shutdown mode (such as when power is stopped from external devices). In this way, power supply 111 can be used as an onboard backup power source. Some examples of one or more power storage components include, but are not limited to, capacitors, supercapacitors, batteries, etc. In some examples, the electrical energy that can be stored by one or more power storage components can be a function of the cost and / or size (e.g., area / volume) of one or more power storage components. In other words, as the electrical energy stored by one or more power storage components increases, the cost and / or size of one or more power storage components also increases.

[0030] Controller 108 may use volatile memory 112 to store information. Volatile memory 112 may include one or more volatile memory devices. In some examples, controller 108 may use volatile memory 112 as a cache. For example, controller 108 may store cached information in volatile memory 112 until the cached information is written to NVM 110. Figure 1 As illustrated, volatile memory 112 may consume power received from power supply 111. Examples of volatile memory 112 include, but are not limited to, random access memory (RAM), dynamic random access memory (DRAM), static RAM (SRAM), and synchronous dynamic RAM (SDRAM (e.g., DDR1, DDR2, DDR3, DDR3L, LPDDR3, DDR4, LPDDR4, etc.)). Similarly, optional DRAM 118 may be used to store mapped data, buffered commands, logical-to-physical (L2P) tables, metadata, cached data, etc. In some examples, data storage device 106 does not include optional DRAM 118, making data storage device 106 DRAM-free. In other examples, data storage device 106 includes optional DRAM 118.

[0031] Controller 108 may manage one or more operations of data storage device 106. For example, controller 108 may manage reading data from and / or writing data to NVM 110. In some embodiments, when data storage device 106 receives a write command from host device 104, controller 108 may initiate a data storage command to store data to NVM 110 and monitor the progress of the data storage command. Controller 108 may determine at least one operating characteristic of storage system 100 and store at least one operating characteristic in NVM 110. In some embodiments, when data storage device 106 receives a write command from host device 104, controller 108 may temporarily store the data associated with the write command in internal memory or write buffer 116 before sending the data associated with the write command to NVM 110. Controller 108 may include circuitry or a processor configured to execute programs for operating data storage device 106.

[0032] Controller 108 may include an optional second volatile memory 120. The optional second volatile memory 120 may be similar to volatile memory 112. For example, the optional second volatile memory 120 may be SRAM. Controller 108 may allocate a portion of the optional second volatile memory to host device 104 as a controller memory buffer (CMB) 122. CMB 122 may be directly accessed by host device 104. For example, host device 104 may utilize CMB 122 to store one or more submission queues that are normally maintained in host device 104, rather than maintaining one or more submission queues in host device 104. In other words, host device 104 may generate commands and store the generated commands (with or without associated data) in CMB 122, where controller 108 accesses CMB 122 to retrieve the stored generated commands and / or associated data.

[0033] Figure 2 This is a block diagram illustrating a method 200 for operating a storage device to execute read or write commands according to one embodiment. Method 200 can be used with a storage system 100 having a host device 104 and a data storage device 106 including a controller 108. Method 200 can be used with a host device and a storage device including an command processor.

[0034] Method 200 begins at operation 250, where the host device writes commands as entries to a commit queue. At operation 250, the host device may write one or more commands to the commit queue. These commands may be read commands or write commands. The host device may include one or more commit queues. The host device may write one or more commands to the commit queue in any order (i.e., commit order), regardless of the sequential write order (i.e., sequential processing order) of the one or more commands.

[0035] In operation 252, the host device writes one or more updated commit queue tail pointers and causes the doorbell to ring or sends an interrupt signal to notify the storage device or signal that a new command is ready to be executed. The doorbell signal can be... Figure 2 Doorbell 218. If there is more than one commit queue, the host can write to the updated tail pointer of the commit queue and send a doorbell or interrupt signal for each commit queue. In operation 254, in response to receiving a doorbell or interrupt signal, the controller of the storage device retrieves a command from one or more commit queues, and the controller receives the command or a direct memory access (DMA) read command.

[0036] In operation 256, the controller processes commands and writes or transfers data associated with the commands to the host device memory. The controller can process more than one command at a time. The controller can process one or more commands in the order of submission or in sequential order. Processing a write command may include: identifying the partition to which the data associated with the command will be written; writing the data to one or more logical block addresses (LBAs) of the partition; and advancing the write pointer of the partition to identify the next available LBA within the partition.

[0037] In operation 258, once a command has been fully processed, the controller writes the completion entry corresponding to the executed command to the completion queue of the host device and moves or updates the CQ head pointer to point to the newly written completion entry.

[0038] In operation 260, the controller generates an interrupt signal or doorbell signal and sends it to the host device. The interrupt signal indicates that the command has been executed and the data associated with the command is available in the memory device. The interrupt signal also notifies the host device that the completion queue is ready to be read or processed.

[0039] In operation 262, the host device processes the completion entry. In operation 264, the host device writes the updated CQ header pointer to the storage device and causes the doorbell to ring or sends an interrupt signal to the storage device to release the completion entry.

[0040] NVMe is based on a paired commit and complete queue mechanism. Commands are placed into the commit queue by the host device software. Completed commands are placed into the associated complete queue by the data storage device controller. Generally, commit and complete queues are allocated in the host device's memory.

[0041] Figure 3 An example is shown of a host device that communicates with the controller via a pair of management queues for all controller management operations and a submission queue set up for I / O processing for each core. Figure 3 This is a diagram 300 illustrating NVMe management and I / O queues. Both the management command queue and the I / O command queue play a role in managing and executing commands used to access data on the NVMe data storage device.

[0042] More specifically, regarding the management command queue, it handles management tasks related to NVMe storage devices. Management commands include operations such as device initialization, firmware updates, and other management functions. Systems or users typically use management commands to configure and manage NVMe devices.

[0043] More specifically, regarding the I / O command queue, the I / O command queue handles data input and output operations—the basic tasks of reading data from and writing data to NVMe data storage devices. I / O commands are used for routine data transfer operations between the host device and the NVMe data storage device. These commands are used for everyday data access and storage tasks.

[0044] In summary, management commands handle the management tasks of NVMe devices, while I / O commands are responsible for the core data transfer operations between the host device and the NVMe data storage device. Each command plays a different role in managing and optimizing the performance of the NVMe data storage device. The management command path is the slow path that does not produce high performance. On the other hand, the I / O command path is the high-performance path and also supports many pending commands in the system.

[0045] However, in some scenarios, there are specific management commands that will benefit from overall performance. An example of a management command triggered by the host device and that will benefit from complete performance data transfer is live migration mode.

[0046] Live migration operation theory applies to scenarios where one controller is used to migrate another controller. A host device can assign a controller to a virtual machine (VM) as a directly assigned device, and the namespace belonging to the controller appears as a regular local NVMe disk of the VM. The live migration service selects a target node with an available controller from compatible NVMe devices, which may not be manufactured by the same vendor. The host device can concurrently perform live migrations of data from multiple namespaces of the controller. During a live migration from a controller, the host device can issue multiple live migration-related commands to the controller.

[0047] For management commands, execution is required within certain types of management commands, such as those used for live migration. Live migration is a known feature in the industry and is merely a non-limiting example. Live migration occurs in a multi-host environment where the host device can decide and remove a VM, retrieve all tasks and all data associated with that specific VM, and migrate these tasks and data to a new machine.

[0048] Figure 4 The concept of live migration is described 400. The motivation is to enable host devices to live migrate VMs from one controller to another by supporting mechanisms that allow the host to perform the following operations: copying user data of the assigned namespace to a different NVM subsystem; modifying the previously copied namespace using changes to the original namespace when the host device live migrates the VM; pausing the controller; transferring queue state to another controller so that the VM can continue to run on the other controller; and continuing processing on the new controller.

[0049] Figure 4 The original virtual machine and its associated namespace A are shown. Ultimately, the host device decides, for whatever reason, to remove the original VM and then has a new VM that will be responsible for tasks and data. There is a flow of change, and this flow is a complex flow managed by the host device.

[0050] This process involves copying namespace A to a new namespace, such as namespace A'. Then, all queues need to be recreated, except for the new VM and the new controller. Then, all content is copied to the new VM. When the host device needs to copy content and sends commands, some management commands will require full performance because those management commands will copy the namespace. Full performance is required to copy the namespace. The problem is that those commands are defined as management commands, and for management commands, full performance is not possible.

[0051] This disclosure addresses the issue of high performance for management commands in specific scenarios. Management commands are typically queued in the management path, which is slow and cannot provide high performance.

[0052] One straightforward approach is for the data storage device and the firmware (FW) implemented on the data storage device side to manually allocate all the resources needed to execute management commands, but this is inefficient. More specifically, the performance will not be as good as full automation and complexity. This is something that the FW needs to manage manually.

[0053] When a data storage device receives a special management command, the data storage device will identify the special management command, and the firewall (FW) will process it. One or more virtual queues are created in advance for special management commands. Whenever the FW receives and identifies a special management command, it will modify the command so that it is treated as an I / O command (such as a read command) instead of a management command. The FW will also change the contents of the command to make it a regular I / O command. The FW will then queue the modified command in a virtual commit queue, and the FW will ring a doorbell.

[0054] After the doorbell rings, all administrative resources allocated to the administrative command (before modification) are released, and the data storage device responds to the doorbell. The hardware (HW) portion of the data storage device controller executes the modified administrative command as a typical I / O command, and ultimately the FW sends a completion message to the administrative queue (not the virtual completion queue), because a specific commit to a particular virtual commit queue is associated with the administrative completion queue and not with any other completion queue.

[0055] As mentioned above, special management commands, previously queued in the management path, have already consumed management resources, including command slots. The data storage device controller will initially release these management resources and engage with the I / O path. Resource allocation from the I / O path involves backdoor mechanisms, and the acceleration of commands within the I / O path adds another layer of complexity. This complexity manifests as the need to cancel and manually allocate I / O resources.

[0056] As discussed herein, this disclosure proposes a method for seamlessly transferring specific (e.g., particular) management commands already queued in the management path to the I / O path to enhance high-performance execution. This method operates under the assumption that no additional specific logic is required and aims to leverage existing logic within the data storage device controller.

[0057] This concept involves identifying management commands that will benefit from improved media access and performance. Once identified, the command undergoes minor modifications and is then queued in a dedicated commit queue managed by the data storage device controller, which remains invisible to the host device. After the command is modified, the management path places the revised command into the special commit queue, rings the bell, and releases all allocated management resources used for that command.

[0058] The I / O path is activated by a doorbell signal, retrieves the command from a special commit queue, and executes it as a regular read / write command. Upon completion, an execution message is published to the management completion queue, which is associated with both the management commit queue and the special commit queue. This innovative approach ensures efficient command processing while leveraging existing logic embedded in the data storage device controller. The main benefit is facilitating high-performance read / write equivalent commands queued within the management path, all without introducing additional complexity to the overall workflow.

[0059] The data storage device controller supports at least one pair of host device queues for managing commits and completions, as well as many other pairs of host devices for I / O queues. Except for the additional commit queues being invisible to the host devices, at least one additional commit queue is merged with all relevant logic. Instead, the data storage device manages the additional commit queues while emulating the functionality of regular host devices.

[0060] Figure 5 This is a schematic diagram 500 based on an implementation scheme. For example... Figure 5 As shown, the HMB contains a regular host device commit queue and a special commit queue (e.g., a virtual commit queue). Although shown as being in the HMB, the special commit queue may reside in the HMB, DRAM, or SRAM. The HIM also contains a management path responsible for detecting special management commands. When a special management command is detected, the logic modifies those commands, queuing them in the special commit queue and ringing a doorbell, allowing the regular data path to continue operating as usual to expedite the modified management command. Finally, completions and interrupts are published to the correct management completion queue, and interrupts are published to the host device.

[0061] The data storage device controller functions by encompassing the necessary logic for managing specific management commit queues. Additionally, the controller incorporates supplementary logic into the management path. The logic within the management path can be implemented in HW, FW, or a combination of both, thus providing flexibility in the design and deployment of the proposed system.

[0062] Figure 6This is a flowchart 600 illustrating the processing of a management command according to one implementation. Basically, a management command arrives, management command resources are allocated, and then the logic determines whether the management command is a regular management command or a special management command that would benefit from higher performance. If the management command is a regular management command, it is executed as usual. Otherwise, a file system (FW) is involved. The FW modifies the original management command to use an I / O format. The modified command is placed in a special commit queue. The FW releases the management resources allocated for the unmodified management command, rings the doorbell of the special commit queue, and then the I / O path retrieves the command, executes it, and publishes completion to the original management completion queue.

[0063] Figure 6 A comprehensive flowchart 600 summarizes the essence of the concept. The process begins by retrieving a management command from the management submission queue. The data storage device controller then carefully examines the command, parses its components, and allocates management resources for command execution. In cases where the management command is a routine management command without specific performance requirements, the command proceeds along the slow path for execution.

[0064] However, if a particular command requires optimal user data access, the original management command undergoes modification to align with the I / O format. This modification may include changing the opcode to resemble a standard read or write command. The refined version of the command is then queued in a special commit queue managed by the data storage device. Simultaneously, management resources initially allocated for the specific management command before it was identified as a special management command are released. Subsequently, the management path activates the doorbell associated with the special commit queue.

[0065] The fast I / O path immediately retrieves the revised command from a special commit queue and executes the modified management command as a standard read / write command, ensuring high-performance data access. Finally, a completion message is generated and published to the management completion queue, thus ending the execution of the modified command.

[0066] More specifically, regarding flowchart 600, the management command initially arrives at box 602, and management command resources are allocated at box 604. At box 606, the controller determines whether the management command will benefit from user data access for high performance. If the answer is no, the controller performs the management comment in the normal manner at box 608. If yes, the management command is modified to use the I / O format at box 610, and the management command is queued in a special submission queue for data storage device management at box 612. The management resources allocated to the original, unmodified management command are released at box 614, and the doorbell of the special submission queue is rung at box 616. At box 618, the I / O path fetches and executes the modified management command, and at box 620, completion is posted to the original management completion queue.

[0067] By identifying and modifying management commands, and then queuing them within the management path to execute high-performance read / write equivalent commands, none of this introduces additional complexity into the overall workflow. This benefit is achieved by leveraging the pre-existing logic and features of the data storage device controller.

[0068] In one embodiment, a data storage device includes: a memory device; and a controller coupled to the memory device, wherein the controller is configured to: allocate resources for processing administrative (admin) commands; determine that the administrative command is a high-performance administrative command; modify the administrative command; and use other resources to process the administrative command. The controller is configured to retrieve the administrative command from an administrative command submission queue, and wherein the controller is configured to place the modified administrative command in a different submission queue. The different submission queues are located in a host memory buffer (HMB), dynamic random access memory (DRAM), or static random access memory (SRAM). The controller is configured to ring a doorbell for the different submission queues. The modification includes changing the administrative command to use an input / output (I / O) command format. The controller is configured to retrieve and execute the modified administrative command. The controller is configured to post completion to an administrative completion queue after the execution. The modification includes changing the opcode of the administrative command to align with the input / output (I / O) command format. The controller is configured to transfer the modified administrative command from a slow administrative path to a high-performance I / O path for execution. The controller is configured to maintain a submission queue for modified management commands, wherein the submission queue is not visible to the host device.

[0069] In another embodiment, a data storage device includes: a memory device; and a controller coupled to the memory device, wherein the controller is configured to: execute a management command using an administrative resource; execute a modified management command using resources other than the administrative resource, wherein the modified management command is an unmodified management command that has been modified; publish completion for the management command in an administrative completion queue; and publish completion for the unmodified management command in the administrative completion queue when the modified management command completes. The controller is configured to publish completion to an internal completion queue upon completion of the modified management command, wherein the internal completion queue is not visible to the host device. The controller is configured to retrieve a management command from an administrative submission queue. The controller is configured to place the modified management command in a submission queue different from the administrative submission queue. The administrative submission queue is located separately and in a different position from the submission queue. The modification occurs in a host interface module (HIM) within the controller. The HIM includes a management path module that executes the modification and places the modified management command in a different submission queue where the management command resides.

[0070] In another embodiment, a data storage device includes: a component for storing data; and a controller coupled to the component for storing data, wherein the controller is configured to: modify an administrative (admin) command, wherein the administrative command has administrative resources allocated for executing the administrative command; place the modified administrative command in a submission queue, the submission queue being different from an administrative submission queue from which the administrative command is retrieved; and execute the modified administrative command using input / output (I / O) command resources instead of the administrative command resources. Completion of the administrative command is published in an administrative completion queue. The controller is configured to maintain a completion queue for the modified administrative command, wherein the completion queue for the modified administrative command is invisible to the host device.

[0071] While the foregoing describes an embodiment of this disclosure, other and further embodiments of this disclosure may be designed without departing from the basic scope of this disclosure, and the scope of this disclosure is defined by the appended claims.

Claims

1. A data storage device, the data storage device comprising: Memory devices; and A controller, coupled to the memory device, wherein the controller is configured to: Allocate resources for processing administrative (admin) commands; The management command was determined to be a high-performance management command. Modify the management commands; and Use other resources to process the management commands.

2. The data storage device of claim 1, wherein the controller is configured to retrieve the management command from the management command submission queue, and wherein the controller is configured to place the modified management command in a different submission queue.

3. The data storage device according to claim 2, wherein the different submission queues are disposed in a host memory buffer (HMB), dynamic random access memory (DRAM), or static random access memory (SRAM).

4. The data storage device of claim 2, wherein the controller is configured to ring the doorbells of the different submission queues.

5. The data storage device of claim 1, wherein the modification includes changing the management command to use an input / output (I / O) command format.

6. The data storage device of claim 1, wherein the controller is configured to acquire and execute modified management commands.

7. The data storage device of claim 6, wherein the controller is configured to publish completion to the management completion queue after the execution.

8. The data storage device of claim 1, wherein the modification includes changing the opcode of the management command to align with the input / output (I / O) command format.

9. The data storage device of claim 8, wherein the controller is configured to transfer modified management commands from a slow management path to a high-performance I / O path for execution.

10. The data storage device of claim 1, wherein the controller is configured to maintain a submission queue for modified management commands, and wherein the submission queue is invisible to the host device.

11. A data storage device, the data storage device comprising: Memory devices; and A controller, coupled to the memory device, wherein the controller is configured to: Use the admin resource to execute administrative commands; Use resources other than the management resources mentioned above to execute the modified management commands, wherein the modified management commands are the unmodified management commands that have been modified; Post completion requests for management commands in the management completion queue; as well as When a modified management command is completed, the completion status for the unmodified management command is published in the management completion queue.

12. The data storage device of claim 11, wherein the controller is configured to issue a completion notice to an internal completion queue upon completion of a modified management command, wherein the internal completion queue is invisible to the host device.

13. The data storage device of claim 11, wherein the controller is configured to retrieve the management command from the management submission queue.

14. The data storage device of claim 13, wherein the controller is configured to place modified management commands in a different submission queue than the management submission queue.

15. The data storage device of claim 14, wherein the management submission queue is located in a separate and different location from the submission queue.

16. The data storage device of claim 11, wherein the modification occurs in the host interface module (HIM) within the controller.

17. The data storage device of claim 16, wherein the HIM includes a management path module that performs the modification and places the modified management command in a different submission queue in which the management command resides.

18. A data storage device, the data storage device comprising: Components used for storing data; and A controller, coupled to the component for storing data, wherein the controller is configured to: Modify the admin command, wherein the admin command has management resources allocated for executing the admin command; The modified management command is placed in a submission queue, which is different from the management submission queue from which the management command is obtained; as well as Use the input / output (I / O) command resource instead of the management command resource to execute the modified management command.

19. The data storage device of claim 18, wherein completion of management commands and unmodified management commands is published in a management completion queue, wherein completion of unmodified management commands is published when modified management commands are completed.

20. The data storage device of claim 19, wherein the controller is configured to maintain a completion queue for modified management commands, wherein the completion queue for modified management commands is invisible to the host device.

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